Re: [PATCH] aspeed/sdmc: Check RAM size value at realize time

[Cédric Le Goater]

On 6/25/24 8:58 AM, Cédric Le Goater wrote:

The RAM size of the SDMC device is validated for the SoC and set when
the Aspeed machines are initialized and then later used by several
SoC implementations. However, the SDMC model never checks that the RAM
size has been actually set before being used. Do that at realize.

Signed-off-by: Cédric Le Goater 



Applied to aspeed-next.

Thanks,

C.



---
  hw/misc/aspeed_sdmc.c | 6 ++
  1 file changed, 6 insertions(+)

diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c
index 94eed9264d09..ebf139cb5c91 100644
--- a/hw/misc/aspeed_sdmc.c
+++ b/hw/misc/aspeed_sdmc.c
@@ -271,6 +271,12 @@ static void aspeed_sdmc_realize(DeviceState *dev, Error 
**errp)
  AspeedSDMCClass *asc = ASPEED_SDMC_GET_CLASS(s);
  
  assert(asc->max_ram_size < 4 * GiB || asc->is_bus64bit);

+
+if (!s->ram_size) {
+error_setg(errp, "RAM size is not set");
+return;
+}
+
  s->max_ram_size = asc->max_ram_size;
  
  memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_sdmc_ops, s,

RE: [PATCH] aspeed/sdmc: Check RAM size value at realize time

[Jamin Lin]

> -Original Message-
> From: Cédric Le Goater 
> Sent: Tuesday, June 25, 2024 2:59 PM
> To: qemu-...@nongnu.org; qemu-devel@nongnu.org
> Cc: Peter Maydell ; Joel Stanley ;
> Andrew Jeffery ; Jamin Lin
> ; Cédric Le Goater 
> Subject: [PATCH] aspeed/sdmc: Check RAM size value at realize time
> 
> The RAM size of the SDMC device is validated for the SoC and set when the
> Aspeed machines are initialized and then later used by several SoC
> implementations. However, the SDMC model never checks that the RAM size
> has been actually set before being used. Do that at realize.
> 
> Signed-off-by: Cédric Le Goater 
> ---
>  hw/misc/aspeed_sdmc.c | 6 ++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c index
> 94eed9264d09..ebf139cb5c91 100644
> --- a/hw/misc/aspeed_sdmc.c
> +++ b/hw/misc/aspeed_sdmc.c
> @@ -271,6 +271,12 @@ static void aspeed_sdmc_realize(DeviceState *dev,
> Error **errp)
>  AspeedSDMCClass *asc = ASPEED_SDMC_GET_CLASS(s);
> 
>  assert(asc->max_ram_size < 4 * GiB || asc->is_bus64bit);
> +
> +if (!s->ram_size) {
> +error_setg(errp, "RAM size is not set");
> +return;
> +}
> +
>  s->max_ram_size = asc->max_ram_size;
> 
>  memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_sdmc_ops, s,
> --
> 2.45.2

Reviewed-by: Jamin_lin < jamin_...@aspeedtech.com>

Thanks-Jamin