Re: [PATCH] tests/tcg/ppc64le: remove INT128 requirement to run non_signalling_xscv

2021-12-20 Thread Richard Henderson

On 12/20/21 4:18 AM, Matheus K. Ferst wrote:
I'd like to avoid mtvsrdd/mfvsrld because they were introduced in PowerISA v3.0, and 
xscvspdpn/xscvdpspn are from v2.07.


Fair enough, I suppose.


How about

asm("mtvsrd 0, %2\n\t"
     "mtvsrd 1, %3\n\t"
     "xxmrghd 0, 0, 1\n\t"
     INSN " 0, 0\n\t"
     "mfvsrd %0, 0\n\t"
     "xxswapd 0, 0\n\t"
     "mfvsrd %1, 0\n\t"
     : "=r" (th), "=r" (tl)
     : "r" (bh), "r" (bl)
     : "vs0", "vs1");

?


Looks good.


r~



Re: [PATCH] tests/tcg/ppc64le: remove INT128 requirement to run non_signalling_xscv

2021-12-20 Thread Matheus K. Ferst

On 17/12/2021 20:54, Richard Henderson wrote:
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On 12/16/21 6:09 AM, matheus.fe...@eldorado.org.br wrote:
+    asm("mtvsrd 0, 
%3\n\t"  \
+    "xxswapd 0, 
0\n\t"  \
+    "mtvsrd 0, 
%2\n\t"  \


This doesn't work.  The lower half of vs0 is undefined after mtvsrd.
You actually want mtvsrdd 0, %2, %3, with "b" as the constraint for bh.

+    "mfvsrd %0, 
0\n\t"  \
+    "xxswapd 0, 
0\n\t"  \
+    "mfvsrd %1, 
0\n\t"  \


Drop the xxswapd and use mfvsrld.

Otherwise it looks ok.


r~


I'd like to avoid mtvsrdd/mfvsrld because they were introduced in 
PowerISA v3.0, and xscvspdpn/xscvdpspn are from v2.07. How about


asm("mtvsrd 0, %2\n\t"
"mtvsrd 1, %3\n\t"
"xxmrghd 0, 0, 1\n\t"
INSN " 0, 0\n\t"
"mfvsrd %0, 0\n\t"
"xxswapd 0, 0\n\t"
"mfvsrd %1, 0\n\t"
: "=r" (th), "=r" (tl)
: "r" (bh), "r" (bl)
: "vs0", "vs1");

?

Thanks,
Matheus K. Ferst
Instituto de Pesquisas ELDORADO 
Analista de Software
Aviso Legal - Disclaimer 



Re: [PATCH] tests/tcg/ppc64le: remove INT128 requirement to run non_signalling_xscv

2021-12-17 Thread Richard Henderson

On 12/16/21 6:09 AM, matheus.fe...@eldorado.org.br wrote:

+asm("mtvsrd 0, %3\n\t"  \
+"xxswapd 0, 0\n\t"  \
+"mtvsrd 0, %2\n\t"  \


This doesn't work.  The lower half of vs0 is undefined after mtvsrd.
You actually want mtvsrdd 0, %2, %3, with "b" as the constraint for bh.


+"mfvsrd %0, 0\n\t"  \
+"xxswapd 0, 0\n\t"  \
+"mfvsrd %1, 0\n\t"  \


Drop the xxswapd and use mfvsrld.

Otherwise it looks ok.


r~