Re: [PATCH 1/2] target/riscv: Tentatively remove Zhinx* from ISA extension string
On 2022/04/28 11:39, Weiwei Li wrote: > > 在 2022/4/28 上午7:58, Alistair Francis 写道: >> On Sun, Apr 24, 2022 at 3:22 PM Tsukasa OI >> wrote: >>> This commit disables ISA string conversion for Zhinx and Zhinxmin >>> extensions for now. Because extension category ordering of "H" is not >>> ratified, their ordering is likely invalid. >>> >>> Once "H"-extension ordering is determined, we can add Zhinx* again. >>> >>> Signed-off-by: Tsukasa OI >> Weiwei Li does this sound alright to you? >> >> Alistair > > Even though the rule says: "The first letter following the 'Z' conventionally > indicates the most closely > > related alphabetical extension category, IMAFDQLCBKJTPVH", zhinx* is not > related to 'H' extension actually. > > I think the most closely related alphabetical extension is 'F' extension. > > Regards, > > Weiwei Li I don't quite agree that. Although Zhinx* extensions are **functionally** related to 'F' (rather than 'H'), that's not how canonical ordering of Z* extensions works, at least this is not how canonical ordering is implemented in GNU/LLVM toolchains. Both toolchains orders Z* multi-letter extensions by second "character"- first manner. My interpretation is, Z* multi-letter extensions should be ordered by category character (the second one) first. Yes, it should have reflected the most closely related single-letter extension, but it didn't happend on Zhinx* extensions. Thanks, Tsukasa > >>> --- >>> target/riscv/cpu.c | 2 -- >>> 1 file changed, 2 deletions(-) >>> >>> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c >>> index 0c774056c5..c765f7ff00 100644 >>> --- a/target/riscv/cpu.c >>> +++ b/target/riscv/cpu.c >>> @@ -954,8 +954,6 @@ static void riscv_isa_string_ext(RISCVCPU *cpu, char >>> **isa_str, int max_str_len) >>> ISA_EDATA_ENTRY(zfh, ext_zfh), >>> ISA_EDATA_ENTRY(zfhmin, ext_zfhmin), >>> ISA_EDATA_ENTRY(zfinx, ext_zfinx), >>> - ISA_EDATA_ENTRY(zhinx, ext_zhinx), >>> - ISA_EDATA_ENTRY(zhinxmin, ext_zhinxmin), >>> ISA_EDATA_ENTRY(zdinx, ext_zdinx), >>> ISA_EDATA_ENTRY(zba, ext_zba), >>> ISA_EDATA_ENTRY(zbb, ext_zbb), >>> -- >>> 2.32.0 >>> >
Re: [PATCH 1/2] target/riscv: Tentatively remove Zhinx* from ISA extension string
在 2022/4/28 上午7:58, Alistair Francis 写道: On Sun, Apr 24, 2022 at 3:22 PM Tsukasa OI wrote: This commit disables ISA string conversion for Zhinx and Zhinxmin extensions for now. Because extension category ordering of "H" is not ratified, their ordering is likely invalid. Once "H"-extension ordering is determined, we can add Zhinx* again. Signed-off-by: Tsukasa OI Weiwei Li does this sound alright to you? Alistair Even though the rule says: "The first letter following the 'Z' conventionally indicates the most closely related alphabetical extension category, IMAFDQLCBKJTPVH", zhinx* is not related to 'H' extension actually. I think the most closely related alphabetical extension is 'F' extension. Regards, Weiwei Li --- target/riscv/cpu.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 0c774056c5..c765f7ff00 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -954,8 +954,6 @@ static void riscv_isa_string_ext(RISCVCPU *cpu, char **isa_str, int max_str_len) ISA_EDATA_ENTRY(zfh, ext_zfh), ISA_EDATA_ENTRY(zfhmin, ext_zfhmin), ISA_EDATA_ENTRY(zfinx, ext_zfinx), -ISA_EDATA_ENTRY(zhinx, ext_zhinx), -ISA_EDATA_ENTRY(zhinxmin, ext_zhinxmin), ISA_EDATA_ENTRY(zdinx, ext_zdinx), ISA_EDATA_ENTRY(zba, ext_zba), ISA_EDATA_ENTRY(zbb, ext_zbb), -- 2.32.0
Re: [PATCH 1/2] target/riscv: Tentatively remove Zhinx* from ISA extension string
On Sun, Apr 24, 2022 at 3:22 PM Tsukasa OI wrote: > > This commit disables ISA string conversion for Zhinx and Zhinxmin > extensions for now. Because extension category ordering of "H" is not > ratified, their ordering is likely invalid. > > Once "H"-extension ordering is determined, we can add Zhinx* again. > > Signed-off-by: Tsukasa OI Weiwei Li does this sound alright to you? Alistair > --- > target/riscv/cpu.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 0c774056c5..c765f7ff00 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -954,8 +954,6 @@ static void riscv_isa_string_ext(RISCVCPU *cpu, char > **isa_str, int max_str_len) > ISA_EDATA_ENTRY(zfh, ext_zfh), > ISA_EDATA_ENTRY(zfhmin, ext_zfhmin), > ISA_EDATA_ENTRY(zfinx, ext_zfinx), > -ISA_EDATA_ENTRY(zhinx, ext_zhinx), > -ISA_EDATA_ENTRY(zhinxmin, ext_zhinxmin), > ISA_EDATA_ENTRY(zdinx, ext_zdinx), > ISA_EDATA_ENTRY(zba, ext_zba), > ISA_EDATA_ENTRY(zbb, ext_zbb), > -- > 2.32.0 >
