Re: [PATCH 13/13] target/arm: Delete dead code from disas_simd_indexed

[Peter Maydell]

On Tue, 25 Jun 2024 at 15:18, Richard Henderson
 wrote:
>
> On 6/25/24 05:41, Peter Maydell wrote:
> > On Tue, 25 Jun 2024 at 06:09, Richard Henderson
> >  wrote:
> >>
> >> The last insns in this block, MLA and MLS, were converted
> >> with f80701cb44d, and this code should have been removed then.
> >
> > "MLA, MLS, SQDMULH, SQRDMULH, were converted with f80701cb44d
> > and f80701cb44d33", I think, since there's still code for
> > all four of those insns that we're deleting here ?
>
> Yes.

...except "with 8db93dcd3def0ca and f80701cb44d".

-- PMM

Re: [PATCH 13/13] target/arm: Delete dead code from disas_simd_indexed

[Richard Henderson]

On 6/25/24 05:41, Peter Maydell wrote:

On Tue, 25 Jun 2024 at 06:09, Richard Henderson
 wrote:


The last insns in this block, MLA and MLS, were converted
with f80701cb44d, and this code should have been removed then.


"MLA, MLS, SQDMULH, SQRDMULH, were converted with f80701cb44d
and f80701cb44d33", I think, since there's still code for
all four of those insns that we're deleting here ?


Yes.


r~

Re: [PATCH 13/13] target/arm: Delete dead code from disas_simd_indexed

[Peter Maydell]

On Tue, 25 Jun 2024 at 06:09, Richard Henderson
 wrote:
>
> The last insns in this block, MLA and MLS, were converted
> with f80701cb44d, and this code should have been removed then.

"MLA, MLS, SQDMULH, SQRDMULH, were converted with f80701cb44d
and f80701cb44d33", I think, since there's still code for
all four of those insns that we're deleting here ?


> -switch (16 * u + opcode) {
> -case 0x10: /* MLA */
> -case 0x14: /* MLS */
> -{
> -static NeonGenTwoOpFn * const fns[2][2] = {
> -{ gen_helper_neon_add_u16, gen_helper_neon_sub_u16 },
> -{ tcg_gen_add_i32, tcg_gen_sub_i32 },
> -};
> -NeonGenTwoOpFn *genfn;
> -bool is_sub = opcode == 0x4;
> -
> -if (size == 1) {
> -gen_helper_neon_mul_u16(tcg_res, tcg_op, tcg_idx);
> -} else {
> -tcg_gen_mul_i32(tcg_res, tcg_op, tcg_idx);
> -}
> -if (opcode == 0x8) {
> -break;
> -}
> -read_vec_element_i32(s, tcg_op, rd, pass, MO_32);
> -genfn = fns[size - 1][is_sub];
> -genfn(tcg_res, tcg_op, tcg_res);
> -break;
> -}
> -case 0x0c: /* SQDMULH */
> -if (size == 1) {
> -gen_helper_neon_qdmulh_s16(tcg_res, tcg_env,
> -   tcg_op, tcg_idx);
> -} else {
> -gen_helper_neon_qdmulh_s32(tcg_res, tcg_env,
> -   tcg_op, tcg_idx);
> -}
> -break;
> -case 0x0d: /* SQRDMULH */
> -if (size == 1) {
> -gen_helper_neon_qrdmulh_s16(tcg_res, tcg_env,
> -tcg_op, tcg_idx);
> -} else {
> -gen_helper_neon_qrdmulh_s32(tcg_res, tcg_env,
> -tcg_op, tcg_idx);
> -}
> -break;

Otherwise
Reviewed-by: Peter Maydell 

thanks
-- PMM