Re: [PATCH 4/5] target/riscv: take xl into consideration for vector address

2023-03-27 Thread LIU Zhiwei



On 2023/3/27 18:00, Weiwei Li wrote:

Sign-extend the vector address when xl = 32.

Signed-off-by: Weiwei Li 
Signed-off-by: Junqiang Wang 
---
  target/riscv/vector_helper.c | 3 +++
  1 file changed, 3 insertions(+)

diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index a58d82af8c..07477663eb 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -172,6 +172,9 @@ static inline uint32_t vext_get_total_elems(CPURISCVState 
*env, uint32_t desc,
  
  static inline target_ulong adjust_addr(CPURISCVState *env, target_ulong addr)

  {
+if (env->xl == MXL_RV32) {
+addr = (int32_t)addr;
+}


Incorrect. Same reason as patch 1.

Zhiwei


  return (addr & ~env->cur_pmmask) | env->cur_pmbase;
  }
  




Re: [PATCH 4/5] target/riscv: take xl into consideration for vector address

2023-03-27 Thread Daniel Henrique Barboza




On 3/27/23 07:00, Weiwei Li wrote:

Sign-extend the vector address when xl = 32.

Signed-off-by: Weiwei Li 
Signed-off-by: Junqiang Wang 
---


Reviewed-by: Daniel Henrique Barboza 


  target/riscv/vector_helper.c | 3 +++
  1 file changed, 3 insertions(+)

diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index a58d82af8c..07477663eb 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -172,6 +172,9 @@ static inline uint32_t vext_get_total_elems(CPURISCVState 
*env, uint32_t desc,
  
  static inline target_ulong adjust_addr(CPURISCVState *env, target_ulong addr)

  {
+if (env->xl == MXL_RV32) {
+addr = (int32_t)addr;
+}
  return (addr & ~env->cur_pmmask) | env->cur_pmbase;
  }