Re: [PATCH for-8.0 13/19] target/ppc: Convert to 3-phase reset

[Greg Kurz]

On Thu, 24 Nov 2022 11:50:16 +
Peter Maydell  wrote:

> Convert the ppc CPU class to use 3-phase reset, so it doesn't
> need to use device_class_set_parent_reset() any more.
> 
> Signed-off-by: Peter Maydell 
> ---

Reviewed-by: Greg Kurz 

>  target/ppc/cpu-qom.h  |  4 ++--
>  target/ppc/cpu_init.c | 12 
>  2 files changed, 10 insertions(+), 6 deletions(-)
> 
> diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h
> index 89ff88f28c9..0fbd8b72468 100644
> --- a/target/ppc/cpu-qom.h
> +++ b/target/ppc/cpu-qom.h
> @@ -143,7 +143,7 @@ typedef struct PPCHash64Options PPCHash64Options;
>  /**
>   * PowerPCCPUClass:
>   * @parent_realize: The parent class' realize handler.
> - * @parent_reset: The parent class' reset handler.
> + * @parent_phases: The parent class' reset phase handlers.
>   *
>   * A PowerPC CPU model.
>   */
> @@ -154,7 +154,7 @@ struct PowerPCCPUClass {
>  
>  DeviceRealize parent_realize;
>  DeviceUnrealize parent_unrealize;
> -DeviceReset parent_reset;
> +ResettablePhases parent_phases;
>  void (*parent_parse_features)(const char *type, char *str, Error **errp);
>  
>  uint32_t pvr;
> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> index cbf00813743..95d25856a0e 100644
> --- a/target/ppc/cpu_init.c
> +++ b/target/ppc/cpu_init.c
> @@ -7031,16 +7031,18 @@ static bool ppc_cpu_has_work(CPUState *cs)
>  return cs->interrupt_request & CPU_INTERRUPT_HARD;
>  }
>  
> -static void ppc_cpu_reset(DeviceState *dev)
> +static void ppc_cpu_reset_hold(Object *obj)
>  {
> -CPUState *s = CPU(dev);
> +CPUState *s = CPU(obj);
>  PowerPCCPU *cpu = POWERPC_CPU(s);
>  PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
>  CPUPPCState *env = >env;
>  target_ulong msr;
>  int i;
>  
> -pcc->parent_reset(dev);
> +if (pcc->parent_phases.hold) {
> +pcc->parent_phases.hold(obj);
> +}
>  
>  msr = (target_ulong)0;
>  msr |= (target_ulong)MSR_HVB;
> @@ -7267,6 +7269,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void 
> *data)
>  PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
>  CPUClass *cc = CPU_CLASS(oc);
>  DeviceClass *dc = DEVICE_CLASS(oc);
> +ResettableClass *rc = RESETTABLE_CLASS(oc);
>  
>  device_class_set_parent_realize(dc, ppc_cpu_realize,
>  >parent_realize);
> @@ -7275,7 +7278,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void 
> *data)
>  pcc->pvr_match = ppc_pvr_match_default;
>  device_class_set_props(dc, ppc_cpu_properties);
>  
> -device_class_set_parent_reset(dc, ppc_cpu_reset, >parent_reset);
> +resettable_class_set_parent_phases(rc, NULL, ppc_cpu_reset_hold, NULL,
> +   >parent_phases);
>  
>  cc->class_by_name = ppc_cpu_class_by_name;
>  cc->has_work = ppc_cpu_has_work;

Re: [PATCH for-8.0 13/19] target/ppc: Convert to 3-phase reset

[Cédric Le Goater]

On 11/24/22 12:50, Peter Maydell wrote:

Convert the ppc CPU class to use 3-phase reset, so it doesn't
need to use device_class_set_parent_reset() any more.

Signed-off-by: Peter Maydell 


Reviewed-by: Cédric Le Goater 

Thanks,

C.


---
  target/ppc/cpu-qom.h  |  4 ++--
  target/ppc/cpu_init.c | 12 
  2 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h
index 89ff88f28c9..0fbd8b72468 100644
--- a/target/ppc/cpu-qom.h
+++ b/target/ppc/cpu-qom.h
@@ -143,7 +143,7 @@ typedef struct PPCHash64Options PPCHash64Options;
  /**
   * PowerPCCPUClass:
   * @parent_realize: The parent class' realize handler.
- * @parent_reset: The parent class' reset handler.
+ * @parent_phases: The parent class' reset phase handlers.
   *
   * A PowerPC CPU model.
   */
@@ -154,7 +154,7 @@ struct PowerPCCPUClass {
  
  DeviceRealize parent_realize;

  DeviceUnrealize parent_unrealize;
-DeviceReset parent_reset;
+ResettablePhases parent_phases;
  void (*parent_parse_features)(const char *type, char *str, Error **errp);
  
  uint32_t pvr;

diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index cbf00813743..95d25856a0e 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7031,16 +7031,18 @@ static bool ppc_cpu_has_work(CPUState *cs)
  return cs->interrupt_request & CPU_INTERRUPT_HARD;
  }
  
-static void ppc_cpu_reset(DeviceState *dev)

+static void ppc_cpu_reset_hold(Object *obj)
  {
-CPUState *s = CPU(dev);
+CPUState *s = CPU(obj);
  PowerPCCPU *cpu = POWERPC_CPU(s);
  PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
  CPUPPCState *env = >env;
  target_ulong msr;
  int i;
  
-pcc->parent_reset(dev);

+if (pcc->parent_phases.hold) {
+pcc->parent_phases.hold(obj);
+}
  
  msr = (target_ulong)0;

  msr |= (target_ulong)MSR_HVB;
@@ -7267,6 +7269,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void 
*data)
  PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
  CPUClass *cc = CPU_CLASS(oc);
  DeviceClass *dc = DEVICE_CLASS(oc);
+ResettableClass *rc = RESETTABLE_CLASS(oc);
  
  device_class_set_parent_realize(dc, ppc_cpu_realize,

  >parent_realize);
@@ -7275,7 +7278,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void 
*data)
  pcc->pvr_match = ppc_pvr_match_default;
  device_class_set_props(dc, ppc_cpu_properties);
  
-device_class_set_parent_reset(dc, ppc_cpu_reset, >parent_reset);

+resettable_class_set_parent_phases(rc, NULL, ppc_cpu_reset_hold, NULL,
+   >parent_phases);
  
  cc->class_by_name = ppc_cpu_class_by_name;

  cc->has_work = ppc_cpu_has_work;