Re: [PULL v3 00/16] tricore queue

2023-10-02 Thread Michael Tokarev 

29.09.2023 09:39, Bastian Koppelmann:



- Add FTOU, CRCN, FTOHP, and HPTOF insns


Changes from v2:
- Replaced %ld with PRIu64 for patch 13
- Dropped patches 15 - 19, as they require an updated patch series


Bastian Koppelmann (16):
   tests/tcg/tricore: Bump cpu to tc37x
   target/tricore: Implement CRCN insn
   target/tricore: Correctly handle FPU RM from PSW
   target/tricore: Implement FTOU insn
   target/tricore: Clarify special case for FTOUZ insn
   target/tricore: Implement ftohp insn
   target/tricore: Implement hptof insn
   target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0
   target/tricore: Swap src and dst reg for RCRR_INSERT
   target/tricore: Replace cpu_*_code with translator_*
   target/tricore: Fix FTOUZ being ISA v1.3.1 up
   tests/tcg/tricore: Extended and non-extened regs now match
   hw/tricore: Log failing test in testdevice
   tests/tcg: Reset result register after each test
   target/tricore: Remove CSFRs from cpu.h
   target/tricore: Change effective address (ea) to target_ulong


Is there anything here to apply to -stable, or there's no reason to bother?
"Fix RCPW/RRPW_INSERT insns for width = 0" might be a candidate, maybe others..

Thanks,

/mjt

Re: [PULL v3 00/16] tricore queue

2023-10-02 Thread Stefan Hajnoczi 
Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any 
user-visible changes.


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