Re: [Qemu-devel] [PATCH RFC v3 14/21] target-arm: Move the PXA270's iwMMXt reset to pxa270_reset()
On 3 February 2012 03:59, Andreas Färber afaer...@suse.de wrote: No other emulated CPU uses this at this time. But why does this code better fit in hw/ than target-arm? The iwMMXt registers are core registers after all. Also the defines let the board code request a cpu revision by name instead of using a magic number, so I think they're useful. Cheers
Re: [Qemu-devel] [PATCH RFC v3 14/21] target-arm: Move the PXA270's iwMMXt reset to pxa270_reset()
Am 17.02.2012 10:59, schrieb andrzej zaborowski: On 3 February 2012 03:59, Andreas Färber afaer...@suse.de wrote: No other emulated CPU uses this at this time. But why does this code better fit in hw/ than target-arm? The iwMMXt registers are core registers after all. It seems you've misread something here. This is all in target-arm. :) Also the defines let the board code request a cpu revision by name instead of using a magic number, so I think they're useful. No, the boards request a CPU by type name, which is not magic either. The whole point of QOM'ification is to have the CPU provide the necessary fields and methods, not logic spread across the code in an if-this-cpu-then fashion. I plan to tackle cp15 (the last remainder of CPUID code dependencies) when I'm through with all other targets. If someone really needs the CPUID they can access it through ARMCPU (CPUARMState). The final plan for rnpn is to have two QOM properties and to request a pxa270 CPU, then set the revision since there are no functional dependencies on the revision at all. (cc'ing Paul) I've actually compile-tested and grep'ed this. Please note also the following v4 that came out of an IRC discussion: http://repo.or.cz/w/qemu/afaerber.git/commitdiff/1262acf06308cf2bde46520d0238548cb73c79fe If you need the JTAG_ID somewhere please let us know soon. Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
Re: [Qemu-devel] [PATCH RFC v3 14/21] target-arm: Move the PXA270's iwMMXt reset to pxa270_reset()
On 17 February 2012 13:03, Andreas Färber afaer...@suse.de wrote: Am 17.02.2012 10:59, schrieb andrzej zaborowski: On 3 February 2012 03:59, Andreas Färber afaer...@suse.de wrote: No other emulated CPU uses this at this time. But why does this code better fit in hw/ than target-arm? The iwMMXt registers are core registers after all. It seems you've misread something here. This is all in target-arm. :) Yes, I did, sorry. I had looked at the whole series previously, forgotten it, then looked at this patch that was still in my inbox without any of the context. ... The final plan for rnpn is to have two QOM properties and to request a pxa270 CPU, then set the revision since there are no functional dependencies on the revision at all. (cc'ing Paul) I've actually compile-tested and grep'ed this. Sounds reasonable. Please note also the following v4 that came out of an IRC discussion: http://repo.or.cz/w/qemu/afaerber.git/commitdiff/1262acf06308cf2bde46520d0238548cb73c79fe If you need the JTAG_ID somewhere please let us know soon. No, it's not used anywhere (obviously otherwise it wouldn't be a comment) Cheers
