Re: [Qemu-devel] [PATCH v6 1/2] hw/arm: Add arm SBSA reference machine, skeleton part

[Hongbo Zhang]

On Thu, 4 Apr 2019 at 16:51, Radoslaw Biernacki
 wrote:
>
> There is one additional need which we just discovered with Fu Wei.
> We need second secure UART for RAS and MM from EL0.
> I'm adding a patch here (not sure if addresses and IRQ's are in your style so 
> please check those).
> I will adapt FW to your changes in next patch.
>
OK, I will take this into my next version of patch.
Thanks.

> From fbc84e29b966f94a27fe84195987e6ba0c55c1bc Mon Sep 17 00:00:00 2001
> From: Radoslaw Biernacki 
> Date: Thu, 4 Apr 2019 14:41:21 +0700
> Subject: [PATCH] Add 2nd secure uart Rebase of Fu Wei patch
>
> ---
>  hw/arm/sbsa-ref.c | 11 ---
>  1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
> index 6b26111840..dcfb34ff5b 100644
> --- a/hw/arm/sbsa-ref.c
> +++ b/hw/arm/sbsa-ref.c
> @@ -67,6 +67,7 @@ enum {
>  SBSA_PCIE_ECAM,
>  SBSA_GPIO,
>  SBSA_SECURE_UART,
> +SBSA_SECURE_UART_MM,
>  SBSA_SECURE_MEM,
>  SBSA_AHCI,
>  SBSA_EHCI,
> @@ -105,7 +106,9 @@ static const MemMapEntry sbsa_ref_memmap[] = {
>  [SBSA_RTC] ={ 0x6001, 0x1000 },
>  [SBSA_GPIO] =   { 0x6002, 0x1000 },
>  [SBSA_SECURE_UART] ={ 0x6003, 0x1000 },
> -[SBSA_SMMU] =   { 0x6004, 0x0002 },
> +/* The UART is a secure UART for S-EL0 OS testing */
> +[SBSA_SECURE_UART_MM] = { 0x6004, 0x1000 },
> +[SBSA_SMMU] =   { 0x6005, 0x0002 },
>  /* Space here reserved for more SMMUs */
>  [SBSA_AHCI] =   { 0x6010, 0x0001 },
>  [SBSA_EHCI] =   { 0x6011, 0x0001 },
> @@ -126,8 +129,9 @@ static const int sbsa_ref_irqmap[] = {
>  [SBSA_PCIE] = 3, /* ... to 6 */
>  [SBSA_GPIO] = 7,
>  [SBSA_SECURE_UART] = 8,
> -[SBSA_AHCI] = 9,
> -[SBSA_EHCI] = 10,
> +[SBSA_SECURE_UART_MM] = 9,
> +[SBSA_AHCI] = 10,
> +[SBSA_EHCI] = 11,
>  };
>
>  /*
> @@ -645,6 +649,7 @@ static void sbsa_ref_init(MachineState *machine)
>  create_uart(vms, pic, SBSA_UART, sysmem, serial_hd(0));
>
>  create_uart(vms, pic, SBSA_SECURE_UART, secure_sysmem, serial_hd(1));
> +create_uart(vms, pic, SBSA_SECURE_UART_MM, secure_sysmem, serial_hd(2));
>
>  create_rtc(vms, pic);
>
> --
> 2.17.1
>
>
> On Thu, 4 Apr 2019 at 15:27, Hongbo Zhang  wrote:
>>
>> I would like to wait for more days to see if there are any further
>> comments, and if no I will send another iteration with memory map
>> slightly changed.
>>
>> On Wed, 20 Mar 2019 at 18:27, Ard Biesheuvel  
>> wrote:
>> >
>> > On Mon, 18 Mar 2019 at 03:39, Hongbo Zhang  wrote:
>> > >
>> > > On Fri, 15 Mar 2019 at 18:41, Ard Biesheuvel  
>> > > wrote:
>> > > >
>> > > > On Fri, 15 Mar 2019 at 11:08, Hongbo Zhang  
>> > > > wrote:
>> > > > >
>> > > > > For the Aarch64, there is one machine 'virt', it is primarily meant 
>> > > > > to
>> > > > > run on KVM and execute virtualization workloads, but we need an
>> > > > > environment as faithful as possible to physical hardware, for 
>> > > > > supporting
>> > > > > firmware and OS development for pysical Aarch64 machines.
>> > > > >
>> > > > > This patch introduces new machine type 'sbsa-ref' with main features:
>> > > > >  - Based on 'virt' machine type.
>> > > > >  - A new memory map.
>> > > > >  - CPU type cortex-a57.
>> > > > >  - EL2 and EL3 are enabled.
>> > > > >  - GIC version 3.
>> > > > >  - System bus AHCI controller.
>> > > > >  - System bus EHCI controller.
>> > > >
>> > > > Hello Hongbo,
>> > > >
>> > > > Apologies for bringing this up now, but I seem to remember that the
>> > > > EHCI does not support 64-bit DMA. Did you run into any issues with
>> > > > this? Or was this fixed in QEMU in the mean time?
>> > > >
>> > > Hi Ard,
>> > > Which EHCI do you mean?
>> > > This time I use a newly introduced system bus EHCI, commit 114529f7
>> > > and I only tested USB mouse and key board, didn't test DMA function.
>> > >
>> >
>> > The host controller doesn't work without DMA, so if mouse and keyboard
>> > worked for you, and no DRAM exists below the 4 GB mark, this has
>> > apparently been fixed in QEMU.

Re: [Qemu-devel] [PATCH v6 1/2] hw/arm: Add arm SBSA reference machine, skeleton part

[Hongbo Zhang]

On Thu, 4 Apr 2019 at 16:47, Peter Maydell  wrote:
>
> On Thu, 4 Apr 2019 at 15:27, Hongbo Zhang  wrote:
> > I would like to wait for more days to see if there are any further
> > comments, and if no I will send another iteration with memory map
> > slightly changed.
>
> This is on my to-review list, but I've been a bit busy with work for
> the 4.0 release -- sorry I haven't been able to get to this yet. I'll
> try to have at least a first look over the next day or so, but I can't
> promise I'll manage that, so please go ahead and send out your next
> iteration whenever you're ready to do that.
>
Understand, thanks.

> thanks
> -- PMM

Re: [Qemu-devel] [PATCH v6 1/2] hw/arm: Add arm SBSA reference machine, skeleton part

[Radoslaw Biernacki]

There is one additional need which we just discovered with Fu Wei.
We need second secure UART for RAS and MM from EL0.
I'm adding a patch here (not sure if addresses and IRQ's are in your style
so please check those).
I will adapt FW to your changes in next patch.

>From fbc84e29b966f94a27fe84195987e6ba0c55c1bc Mon Sep 17 00:00:00 2001
From: Radoslaw Biernacki 
Date: Thu, 4 Apr 2019 14:41:21 +0700
Subject: [PATCH] Add 2nd secure uart Rebase of Fu Wei patch

---
 hw/arm/sbsa-ref.c | 11 ---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 6b26111840..dcfb34ff5b 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -67,6 +67,7 @@ enum {
 SBSA_PCIE_ECAM,
 SBSA_GPIO,
 SBSA_SECURE_UART,
+SBSA_SECURE_UART_MM,
 SBSA_SECURE_MEM,
 SBSA_AHCI,
 SBSA_EHCI,
@@ -105,7 +106,9 @@ static const MemMapEntry sbsa_ref_memmap[] = {
 [SBSA_RTC] ={ 0x6001, 0x1000 },
 [SBSA_GPIO] =   { 0x6002, 0x1000 },
 [SBSA_SECURE_UART] ={ 0x6003, 0x1000 },
-[SBSA_SMMU] =   { 0x6004, 0x0002 },
+/* The UART is a secure UART for S-EL0 OS testing */
+[SBSA_SECURE_UART_MM] = { 0x6004, 0x1000 },
+[SBSA_SMMU] =   { 0x6005, 0x0002 },
 /* Space here reserved for more SMMUs */
 [SBSA_AHCI] =   { 0x6010, 0x0001 },
 [SBSA_EHCI] =   { 0x6011, 0x0001 },
@@ -126,8 +129,9 @@ static const int sbsa_ref_irqmap[] = {
 [SBSA_PCIE] = 3, /* ... to 6 */
 [SBSA_GPIO] = 7,
 [SBSA_SECURE_UART] = 8,
-[SBSA_AHCI] = 9,
-[SBSA_EHCI] = 10,
+[SBSA_SECURE_UART_MM] = 9,
+[SBSA_AHCI] = 10,
+[SBSA_EHCI] = 11,
 };

 /*
@@ -645,6 +649,7 @@ static void sbsa_ref_init(MachineState *machine)
 create_uart(vms, pic, SBSA_UART, sysmem, serial_hd(0));

 create_uart(vms, pic, SBSA_SECURE_UART, secure_sysmem, serial_hd(1));
+create_uart(vms, pic, SBSA_SECURE_UART_MM, secure_sysmem,
serial_hd(2));

 create_rtc(vms, pic);

-- 
2.17.1


On Thu, 4 Apr 2019 at 15:27, Hongbo Zhang  wrote:

> I would like to wait for more days to see if there are any further
> comments, and if no I will send another iteration with memory map
> slightly changed.
>
> On Wed, 20 Mar 2019 at 18:27, Ard Biesheuvel 
> wrote:
> >
> > On Mon, 18 Mar 2019 at 03:39, Hongbo Zhang 
> wrote:
> > >
> > > On Fri, 15 Mar 2019 at 18:41, Ard Biesheuvel <
> ard.biesheu...@linaro.org> wrote:
> > > >
> > > > On Fri, 15 Mar 2019 at 11:08, Hongbo Zhang 
> wrote:
> > > > >
> > > > > For the Aarch64, there is one machine 'virt', it is primarily
> meant to
> > > > > run on KVM and execute virtualization workloads, but we need an
> > > > > environment as faithful as possible to physical hardware, for
> supporting
> > > > > firmware and OS development for pysical Aarch64 machines.
> > > > >
> > > > > This patch introduces new machine type 'sbsa-ref' with main
> features:
> > > > >  - Based on 'virt' machine type.
> > > > >  - A new memory map.
> > > > >  - CPU type cortex-a57.
> > > > >  - EL2 and EL3 are enabled.
> > > > >  - GIC version 3.
> > > > >  - System bus AHCI controller.
> > > > >  - System bus EHCI controller.
> > > >
> > > > Hello Hongbo,
> > > >
> > > > Apologies for bringing this up now, but I seem to remember that the
> > > > EHCI does not support 64-bit DMA. Did you run into any issues with
> > > > this? Or was this fixed in QEMU in the mean time?
> > > >
> > > Hi Ard,
> > > Which EHCI do you mean?
> > > This time I use a newly introduced system bus EHCI, commit 114529f7
> > > and I only tested USB mouse and key board, didn't test DMA function.
> > >
> >
> > The host controller doesn't work without DMA, so if mouse and keyboard
> > worked for you, and no DRAM exists below the 4 GB mark, this has
> > apparently been fixed in QEMU.
>

Re: [Qemu-devel] [PATCH v6 1/2] hw/arm: Add arm SBSA reference machine, skeleton part

[Peter Maydell]

On Thu, 4 Apr 2019 at 15:27, Hongbo Zhang  wrote:
> I would like to wait for more days to see if there are any further
> comments, and if no I will send another iteration with memory map
> slightly changed.

This is on my to-review list, but I've been a bit busy with work for
the 4.0 release -- sorry I haven't been able to get to this yet. I'll
try to have at least a first look over the next day or so, but I can't
promise I'll manage that, so please go ahead and send out your next
iteration whenever you're ready to do that.

thanks
-- PMM

Re: [Qemu-devel] [PATCH v6 1/2] hw/arm: Add arm SBSA reference machine, skeleton part

[Hongbo Zhang]

I would like to wait for more days to see if there are any further
comments, and if no I will send another iteration with memory map
slightly changed.

On Wed, 20 Mar 2019 at 18:27, Ard Biesheuvel  wrote:
>
> On Mon, 18 Mar 2019 at 03:39, Hongbo Zhang  wrote:
> >
> > On Fri, 15 Mar 2019 at 18:41, Ard Biesheuvel  
> > wrote:
> > >
> > > On Fri, 15 Mar 2019 at 11:08, Hongbo Zhang  
> > > wrote:
> > > >
> > > > For the Aarch64, there is one machine 'virt', it is primarily meant to
> > > > run on KVM and execute virtualization workloads, but we need an
> > > > environment as faithful as possible to physical hardware, for supporting
> > > > firmware and OS development for pysical Aarch64 machines.
> > > >
> > > > This patch introduces new machine type 'sbsa-ref' with main features:
> > > >  - Based on 'virt' machine type.
> > > >  - A new memory map.
> > > >  - CPU type cortex-a57.
> > > >  - EL2 and EL3 are enabled.
> > > >  - GIC version 3.
> > > >  - System bus AHCI controller.
> > > >  - System bus EHCI controller.
> > >
> > > Hello Hongbo,
> > >
> > > Apologies for bringing this up now, but I seem to remember that the
> > > EHCI does not support 64-bit DMA. Did you run into any issues with
> > > this? Or was this fixed in QEMU in the mean time?
> > >
> > Hi Ard,
> > Which EHCI do you mean?
> > This time I use a newly introduced system bus EHCI, commit 114529f7
> > and I only tested USB mouse and key board, didn't test DMA function.
> >
>
> The host controller doesn't work without DMA, so if mouse and keyboard
> worked for you, and no DRAM exists below the 4 GB mark, this has
> apparently been fixed in QEMU.

Re: [Qemu-devel] [PATCH v6 1/2] hw/arm: Add arm SBSA reference machine, skeleton part

[Ard Biesheuvel]

On Mon, 18 Mar 2019 at 03:39, Hongbo Zhang  wrote:
>
> On Fri, 15 Mar 2019 at 18:41, Ard Biesheuvel  
> wrote:
> >
> > On Fri, 15 Mar 2019 at 11:08, Hongbo Zhang  wrote:
> > >
> > > For the Aarch64, there is one machine 'virt', it is primarily meant to
> > > run on KVM and execute virtualization workloads, but we need an
> > > environment as faithful as possible to physical hardware, for supporting
> > > firmware and OS development for pysical Aarch64 machines.
> > >
> > > This patch introduces new machine type 'sbsa-ref' with main features:
> > >  - Based on 'virt' machine type.
> > >  - A new memory map.
> > >  - CPU type cortex-a57.
> > >  - EL2 and EL3 are enabled.
> > >  - GIC version 3.
> > >  - System bus AHCI controller.
> > >  - System bus EHCI controller.
> >
> > Hello Hongbo,
> >
> > Apologies for bringing this up now, but I seem to remember that the
> > EHCI does not support 64-bit DMA. Did you run into any issues with
> > this? Or was this fixed in QEMU in the mean time?
> >
> Hi Ard,
> Which EHCI do you mean?
> This time I use a newly introduced system bus EHCI, commit 114529f7
> and I only tested USB mouse and key board, didn't test DMA function.
>

The host controller doesn't work without DMA, so if mouse and keyboard
worked for you, and no DRAM exists below the 4 GB mark, this has
apparently been fixed in QEMU.

Re: [Qemu-devel] [PATCH v6 1/2] hw/arm: Add arm SBSA reference machine, skeleton part

[Hongbo Zhang]

On Fri, 15 Mar 2019 at 18:41, Ard Biesheuvel  wrote:
>
> On Fri, 15 Mar 2019 at 11:08, Hongbo Zhang  wrote:
> >
> > For the Aarch64, there is one machine 'virt', it is primarily meant to
> > run on KVM and execute virtualization workloads, but we need an
> > environment as faithful as possible to physical hardware, for supporting
> > firmware and OS development for pysical Aarch64 machines.
> >
> > This patch introduces new machine type 'sbsa-ref' with main features:
> >  - Based on 'virt' machine type.
> >  - A new memory map.
> >  - CPU type cortex-a57.
> >  - EL2 and EL3 are enabled.
> >  - GIC version 3.
> >  - System bus AHCI controller.
> >  - System bus EHCI controller.
>
> Hello Hongbo,
>
> Apologies for bringing this up now, but I seem to remember that the
> EHCI does not support 64-bit DMA. Did you run into any issues with
> this? Or was this fixed in QEMU in the mean time?
>
Hi Ard,
Which EHCI do you mean?
This time I use a newly introduced system bus EHCI, commit 114529f7
and I only tested USB mouse and key board, didn't test DMA function.

>
> >  - CDROM and hard disc on AHCI bus.
> >  - E1000E ethernet card on PCIE bus.
> >  - VGA display adaptor on PCIE bus.
> >  - No virtio deivces.
> >  - No fw_cfg device.
> >  - No ACPI table supplied.
> >  - Only minimal device tree nodes.
> >
> > Arm Trusted Firmware and UEFI porting to this are done accordingly, and
> > it should supply ACPI tables to load OS, the minimal device tree nodes
> > supplied from this platform are only to pass the dynamic info reflecting
> > command line input to firmware, not for loading OS.
> >
> > To make the review easier, this task is split into two patches, the
> > fundamental sceleton part and the peripheral devices part, this patch is
> > the first part.
> >
> > Signed-off-by: Hongbo Zhang 
> > ---
> >  default-configs/arm-softmmu.mak |   1 +
> >  hw/arm/Kconfig  |   3 +
> >  hw/arm/Makefile.objs|   1 +
> >  hw/arm/sbsa-ref.c   | 303 
> > 
> >  4 files changed, 308 insertions(+)
> >  create mode 100644 hw/arm/sbsa-ref.c
> >
> > diff --git a/default-configs/arm-softmmu.mak 
> > b/default-configs/arm-softmmu.mak
> > index 2a7efc1..4fbb6ac 100644
> > --- a/default-configs/arm-softmmu.mak
> > +++ b/default-configs/arm-softmmu.mak
> > @@ -144,6 +144,7 @@ CONFIG_IOH3420=y
> >  CONFIG_I82801B11=y
> >  CONFIG_ACPI=y
> >  CONFIG_ARM_VIRT=y
> > +CONFIG_SBSA_REF=y
> >  CONFIG_SMBIOS=y
> >  CONFIG_ASPEED_SOC=y
> >  CONFIG_SMBUS_EEPROM=y
> > diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> > index d298fbd..6654914 100644
> > --- a/hw/arm/Kconfig
> > +++ b/hw/arm/Kconfig
> > @@ -38,6 +38,9 @@ config PXA2XX
> >  config REALVIEW
> >  bool
> >
> > +config SBSA_REF
> > +bool
> > +
> >  config STELLARIS
> >  bool
> >
> > diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
> > index fa57c7c..fa812ec 100644
> > --- a/hw/arm/Makefile.objs
> > +++ b/hw/arm/Makefile.objs
> > @@ -12,6 +12,7 @@ obj-$(CONFIG_NSERIES) += nseries.o
> >  obj-$(CONFIG_OMAP) += omap_sx1.o palm.o
> >  obj-$(CONFIG_PXA2XX) += gumstix.o spitz.o tosa.o z2.o
> >  obj-$(CONFIG_REALVIEW) += realview.o
> > +obj-$(CONFIG_SBSA_REF) += sbsa-ref.o
> >  obj-$(CONFIG_STELLARIS) += stellaris.o
> >  obj-$(CONFIG_STRONGARM) += collie.o
> >  obj-$(CONFIG_VERSATILE) += vexpress.o versatilepb.o
> > diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
> > new file mode 100644
> > index 000..b6d31f2
> > --- /dev/null
> > +++ b/hw/arm/sbsa-ref.c
> > @@ -0,0 +1,303 @@
> > +/*
> > + * ARM SBSA Reference Platform emulation
> > + *
> > + * Copyright (c) 2018 Linaro Limited
> > + * Written by Hongbo Zhang 
> > + *
> > + * This program is free software; you can redistribute it and/or modify it
> > + * under the terms and conditions of the GNU General Public License,
> > + * version 2 or later, as published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope it will be useful, but WITHOUT
> > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> > + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License 
> > for
> > + * more details.
> > + *
> > + * You should have received a copy of the GNU General Public License along 
> > with
> > + * this program.  If not, see .
> > + */
> > +
> > +#include "qemu/osdep.h"
> > +#include "qapi/error.h"
> > +#include "qemu/error-report.h"
> > +#include "qemu/units.h"
> > +#include "sysemu/numa.h"
> > +#include "sysemu/sysemu.h"
> > +#include "exec/address-spaces.h"
> > +#include "exec/hwaddr.h"
> > +#include "kvm_arm.h"
> > +#include "hw/arm/arm.h"
> > +#include "hw/boards.h"
> > +#include "hw/intc/arm_gicv3_common.h"
> > +
> > +#define RAMLIMIT_GB 8192
> > +#define RAMLIMIT_BYTES (RAMLIMIT_GB * GiB)
> > +
> > +enum {
> > +SBSA_FLASH,
> > +SBSA_MEM,
> > +SBSA_CPUPERIPHS,
> > +SBSA_GIC_DIST,
> > +SBSA_GIC_REDIST,
> > +SBSA_SMMU,
> > +

Re: [Qemu-devel] [PATCH v6 1/2] hw/arm: Add arm SBSA reference machine, skeleton part

[Ard Biesheuvel]

On Fri, 15 Mar 2019 at 11:08, Hongbo Zhang  wrote:
>
> For the Aarch64, there is one machine 'virt', it is primarily meant to
> run on KVM and execute virtualization workloads, but we need an
> environment as faithful as possible to physical hardware, for supporting
> firmware and OS development for pysical Aarch64 machines.
>
> This patch introduces new machine type 'sbsa-ref' with main features:
>  - Based on 'virt' machine type.
>  - A new memory map.
>  - CPU type cortex-a57.
>  - EL2 and EL3 are enabled.
>  - GIC version 3.
>  - System bus AHCI controller.
>  - System bus EHCI controller.

Hello Hongbo,

Apologies for bringing this up now, but I seem to remember that the
EHCI does not support 64-bit DMA. Did you run into any issues with
this? Or was this fixed in QEMU in the mean time?


>  - CDROM and hard disc on AHCI bus.
>  - E1000E ethernet card on PCIE bus.
>  - VGA display adaptor on PCIE bus.
>  - No virtio deivces.
>  - No fw_cfg device.
>  - No ACPI table supplied.
>  - Only minimal device tree nodes.
>
> Arm Trusted Firmware and UEFI porting to this are done accordingly, and
> it should supply ACPI tables to load OS, the minimal device tree nodes
> supplied from this platform are only to pass the dynamic info reflecting
> command line input to firmware, not for loading OS.
>
> To make the review easier, this task is split into two patches, the
> fundamental sceleton part and the peripheral devices part, this patch is
> the first part.
>
> Signed-off-by: Hongbo Zhang 
> ---
>  default-configs/arm-softmmu.mak |   1 +
>  hw/arm/Kconfig  |   3 +
>  hw/arm/Makefile.objs|   1 +
>  hw/arm/sbsa-ref.c   | 303 
> 
>  4 files changed, 308 insertions(+)
>  create mode 100644 hw/arm/sbsa-ref.c
>
> diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
> index 2a7efc1..4fbb6ac 100644
> --- a/default-configs/arm-softmmu.mak
> +++ b/default-configs/arm-softmmu.mak
> @@ -144,6 +144,7 @@ CONFIG_IOH3420=y
>  CONFIG_I82801B11=y
>  CONFIG_ACPI=y
>  CONFIG_ARM_VIRT=y
> +CONFIG_SBSA_REF=y
>  CONFIG_SMBIOS=y
>  CONFIG_ASPEED_SOC=y
>  CONFIG_SMBUS_EEPROM=y
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index d298fbd..6654914 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -38,6 +38,9 @@ config PXA2XX
>  config REALVIEW
>  bool
>
> +config SBSA_REF
> +bool
> +
>  config STELLARIS
>  bool
>
> diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
> index fa57c7c..fa812ec 100644
> --- a/hw/arm/Makefile.objs
> +++ b/hw/arm/Makefile.objs
> @@ -12,6 +12,7 @@ obj-$(CONFIG_NSERIES) += nseries.o
>  obj-$(CONFIG_OMAP) += omap_sx1.o palm.o
>  obj-$(CONFIG_PXA2XX) += gumstix.o spitz.o tosa.o z2.o
>  obj-$(CONFIG_REALVIEW) += realview.o
> +obj-$(CONFIG_SBSA_REF) += sbsa-ref.o
>  obj-$(CONFIG_STELLARIS) += stellaris.o
>  obj-$(CONFIG_STRONGARM) += collie.o
>  obj-$(CONFIG_VERSATILE) += vexpress.o versatilepb.o
> diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
> new file mode 100644
> index 000..b6d31f2
> --- /dev/null
> +++ b/hw/arm/sbsa-ref.c
> @@ -0,0 +1,303 @@
> +/*
> + * ARM SBSA Reference Platform emulation
> + *
> + * Copyright (c) 2018 Linaro Limited
> + * Written by Hongbo Zhang 
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2 or later, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + *
> + * You should have received a copy of the GNU General Public License along 
> with
> + * this program.  If not, see .
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qapi/error.h"
> +#include "qemu/error-report.h"
> +#include "qemu/units.h"
> +#include "sysemu/numa.h"
> +#include "sysemu/sysemu.h"
> +#include "exec/address-spaces.h"
> +#include "exec/hwaddr.h"
> +#include "kvm_arm.h"
> +#include "hw/arm/arm.h"
> +#include "hw/boards.h"
> +#include "hw/intc/arm_gicv3_common.h"
> +
> +#define RAMLIMIT_GB 8192
> +#define RAMLIMIT_BYTES (RAMLIMIT_GB * GiB)
> +
> +enum {
> +SBSA_FLASH,
> +SBSA_MEM,
> +SBSA_CPUPERIPHS,
> +SBSA_GIC_DIST,
> +SBSA_GIC_REDIST,
> +SBSA_SMMU,
> +SBSA_UART,
> +SBSA_RTC,
> +SBSA_PCIE,
> +SBSA_PCIE_MMIO,
> +SBSA_PCIE_MMIO_HIGH,
> +SBSA_PCIE_PIO,
> +SBSA_PCIE_ECAM,
> +SBSA_GPIO,
> +SBSA_SECURE_UART,
> +SBSA_SECURE_MEM,
> +SBSA_AHCI,
> +SBSA_EHCI,
> +};
> +
> +typedef struct MemMapEntry {
> +hwaddr base;
> +hwaddr size;
> +} MemMapEntry;
> +
> +typedef struct {
> +MachineState parent;
> +struct arm_boot_info bootinfo;
> +const MemMapEntry *memmap;
> +const int *irqmap;
> +int s