Re: [Qemu-devel] [PULL 00/19] target-arm queue
On 26 April 2018 at 11:46, Peter Maydell wrote: > First arm pullreq of the 2.13 cycle! > > -- PMM > > The following changes since commit 4743c23509a51bd4ee85cc272287a41917d1be35: > > Update version for v2.12.0 release (2018-04-24 16:44:55 +0100) > > are available in the Git repository at: > > git://git.linaro.org/people/pmaydell/qemu-arm.git > tags/pull-target-arm-20180426 > > for you to fetch changes up to fbf32752663878947de455ff57cb5b9318f14bec: > > xilinx_spips: Correct SNOOP_NONE state when flushing the txfifo (2018-04-26 > 11:04:40 +0100) > Applied, thanks. -- PMM
Re: [Qemu-devel] [PULL 00/19] target-arm queue
On 12 May 2015 at 12:03, Peter Maydell wrote: > > v2 of the pull, fixing a silly compile failure on ARM hosts. > > target-arm queue: > * Support TZ and grouping in the GIC > * hw/sd: sd_reset cleanup > * armv7m_nvic: fix bug in systick device > > Applied, thanks. -- PMM
Re: [Qemu-devel] [PULL 00/19] target-arm queue
On 12 May 2015 at 09:10, Peter Crosthwaite wrote: > On Tue, May 12, 2015 at 1:01 AM, Peter Maydell > wrote: >> I could have sworn I'd tested that. Will fix & respin... >> > > Feel like grabbing the new Zynq series (v9) with it? :) Maybe. I was going to except for that last minute issue in v8. No real issue with doing two pullreqs, though; in some ways that's better than one large one. -- PMM
Re: [Qemu-devel] [PULL 00/19] target-arm queue
On Tue, May 12, 2015 at 1:01 AM, Peter Maydell wrote: > On 11 May 2015 at 14:40, Peter Maydell wrote: >> This is mostly the GIC TZ changes, with a couple of other >> minor bugfixes. >> >> -- PMM >> >> The following changes since commit b951cda21d6b232f138ccf008e12bce8ddc95465: >> >> Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into >> staging (2015-05-11 12:01:09 +0100) >> >> are available in the git repository at: >> >> >> git://git.linaro.org/people/pmaydell/qemu-arm.git >> tags/pull-target-arm-20150511 >> >> for you to fetch changes up to 49855cdaed78f66f501df6e18b8b3b7012cea2eb: >> >> hw/arm/highbank.c: Wire FIQ between CPU <> GIC (2015-05-11 14:28:54 +0100) > > Oops: > > hw/intc/arm_gic_kvm.c: In function ‘kvm_arm_gic_put’: > hw/intc/arm_gic_kvm.c:357:12: error: ‘GICState’ has no member named ‘enabled’ > hw/intc/arm_gic_kvm.c: In function ‘kvm_arm_gic_get’: > hw/intc/arm_gic_kvm.c:458:6: error: ‘GICState’ has no member named ‘enabled’ > > I could have sworn I'd tested that. Will fix & respin... > Feel like grabbing the new Zynq series (v9) with it? :) Regards, Peter > -- PMM >
Re: [Qemu-devel] [PULL 00/19] target-arm queue
On 11 May 2015 at 14:40, Peter Maydell wrote: > This is mostly the GIC TZ changes, with a couple of other > minor bugfixes. > > -- PMM > > The following changes since commit b951cda21d6b232f138ccf008e12bce8ddc95465: > > Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into > staging (2015-05-11 12:01:09 +0100) > > are available in the git repository at: > > > git://git.linaro.org/people/pmaydell/qemu-arm.git > tags/pull-target-arm-20150511 > > for you to fetch changes up to 49855cdaed78f66f501df6e18b8b3b7012cea2eb: > > hw/arm/highbank.c: Wire FIQ between CPU <> GIC (2015-05-11 14:28:54 +0100) Oops: hw/intc/arm_gic_kvm.c: In function ‘kvm_arm_gic_put’: hw/intc/arm_gic_kvm.c:357:12: error: ‘GICState’ has no member named ‘enabled’ hw/intc/arm_gic_kvm.c: In function ‘kvm_arm_gic_get’: hw/intc/arm_gic_kvm.c:458:6: error: ‘GICState’ has no member named ‘enabled’ I could have sworn I'd tested that. Will fix & respin... -- PMM
Re: [Qemu-devel] [PULL 00/19] target-arm queue
On 29 September 2014 19:26, Peter Maydell wrote: > ARM pullreq: nothing fantastically exciting, but getting the > EL2/EL3 patchset in ought to help with ongoing TZ work. > > -- PMM > > > The following changes since commit 70556264a89a268efba1d7e8e341adcdd7881eb4: > > libqos: use microseconds instead of iterations for virtio timeout > (2014-09-29 17:31:11 +0100) > > are available in the git repository at: > > git://git.linaro.org/people/pmaydell/qemu-arm.git > tags/pull-target-arm-20140929 > > for you to fetch changes up to 136e67e9b50b61fb03fedcea5c4fbe74cf44fdcc: > > target-arm: Add support for VIRQ and VFIQ (2014-09-29 18:48:51 +0100) > > > target-arm: > * more EL2/EL3 preparation work > * don't handle c15_cpar changes via tb_flush() > * fix some unused function warnings in ARM devices > * build the GDB XML for 32 bit CPUs into qemu-*-aarch64 > * implement guest breakpoint support > > Applied, thanks. -- PMM
Re: [Qemu-devel] [PULL 00/19] target-arm queue
On 19 August 2014 19:09, Peter Maydell wrote: > Flushing my queue of reviewed ARM patches: single step, > plus a collection of straightforward patches from other > people. > > thanks > -- PMM > > > The following changes since commit 0e4a77370594c91dd126f9872893ed473374cc72: > > Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into > staging (2014-08-19 13:00:57 +0100) > > are available in the git repository at: > > > git://git.linaro.org/people/pmaydell/qemu-arm.git > tags/pull-target-arm-20140819 > > for you to fetch changes up to 14a906f755f77b325666d67e071c572478d06067: > > arm: stellaris: Remove misleading address_space_mem var (2014-08-19 > 19:02:40 +0100) > > > target-arm: > * fix preferred return address for A64 BRK insn > * implement AArch64 single-stepping > * support loading gzip compressed AArch64 kernels > * use correct PSCI function IDs in the DT when KVM uses PSCI 0.2 > * minor cleanups > > > Christoffer Dall (2): > target-arm: Rename QEMU PSCI v0.1 definitions > arm/virt: Use PSCI v0.2 function IDs in the DT when KVM uses PSCI v0.2 > > Peter Crosthwaite (3): > arm: cortex-a9: Fix cache-line size and associativity > arm: armv7m: Rename address_space_mem -> system_memory > arm: stellaris: Remove misleading address_space_mem var > > Peter Maydell (12): > target-arm: Fix return address for A64 BRK instructions > target-arm: Collect up the debug cp register definitions > target-arm: Allow STATE_BOTH reginfo descriptions for more than cp14 > target-arm: Provide both 32 and 64 bit versions of debug registers > target-arm: Adjust debug ID registers per-CPU > target-arm: Don't allow AArch32 to access RES0 CPSR bits > target-arm: Correctly handle PSTATE.SS when taking exception to AArch32 > target-arm: Set PSTATE.SS correctly on exception return from AArch64 > target-arm: A64: Avoid duplicate exit_tb(0) in non-linked goto_tb > target-arm: Implement ARMv8 single-step handling for A64 code > target-arm: Implement ARMv8 single-stepping for AArch32 code > target-arm: Implement MDSCR_EL1 as having state > > Richard W.M. Jones (2): > loader: Add load_image_gzipped function. > aarch64: Allow -kernel option to take a gzip-compressed kernel. Applied, thanks. -- PMM
Re: [Qemu-devel] [PULL 00/19] target-arm queue
On 9 June 2014 16:10, Peter Maydell wrote: > Whoops. Resend of previous pull but with the PD0/PD1 patch dropped. > I haven't re-transmitted the individual patchmails. > > The following changes since commit 4a331bb33bdf112ba95470e5d6ea3561b049c280: > > Merge remote-tracking branch 'remotes/stefanha/tags/net-pull-request' into > staging (2014-06-09 15:00:21 +0100) > > are available in the git repository at: > > > git://git.linaro.org/people/pmaydell/qemu-arm.git > tags/pull-target-arm-20140609-1 > > for you to fetch changes up to 3b1a41381254f6080b5cfeb149c28a9237d42a0b: > > target-arm: Delete unused iwmmxt_msadb helper (2014-06-09 16:06:12 +0100) > > > > target-arm queue: > * support -bios option in vexpress boards > * register the Cortex-A57 impdef system registers > * fix handling of UXN bit in ARMv8 page tables > * complete support of crypto insns in A32/T32 > * implement CRC and crypto insns in A64 > * fix bugs in generic timer control register Applied this version; thanks. -- PMM
