Re: [Qemu-devel] [PULL 00/22] target-arm queue

2019-03-05 Thread Peter Maydell 
On Tue, 5 Mar 2019 at 16:50, Peter Maydell  wrote:
>
> target-arm queue for softfreeze:
> This has all the big stuff I want to get in for softfreeze;
> there may be one or two smaller patches I pick up later in
> the week.
>
> thanks
> -- PMM
>
> The following changes since commit 0984a157c1c053394adbf64ed7de97f1aebe6a2d:
>
>   Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into 
> staging (2019-03-05 09:33:20 +)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20190305
>
> for you to fetch changes up to 566528f823d1a2e9eb2d7b2ed839547cb31bfc34:
>
>   hw/arm/stellaris: Implement watchdog timer (2019-03-05 15:55:09 +)
>
> 
> target-arm queue:
>  * Fix PC test for LDM (exception return)
>  * Implement ARMv8.0-SB
>  * Implement ARMv8.0-PredInv
>  * Implement ARMv8.4-CondM
>  * Implement ARMv8.5-CondM
>  * Implement ARMv8.5-FRINT
>  * hw/arm/stellaris: Implement watchdog timer
>  * virt: support more than 255GB of RAM
>

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.0
for any user-visible changes.

-- PMM

Re: [Qemu-devel] [PULL 00/22] target-arm queue

2019-02-05 Thread no-reply 
Patchew URL: 
https://patchew.org/QEMU/20190205170510.21984-1-peter.mayd...@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [Qemu-devel] [PULL 00/22] target-arm queue
Type: series
Message-id: 20190205170510.21984-1-peter.mayd...@linaro.org

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
   68df0c30ed..9669c97562  master -> master
 t [tag update]patchew/20190129175403.18017-1-phi...@redhat.com -> 
patchew/20190129175403.18017-1-phi...@redhat.com
 t [tag update]
patchew/20190205170510.21984-1-peter.mayd...@linaro.org -> 
patchew/20190205170510.21984-1-peter.mayd...@linaro.org
Auto packing the repository in background for optimum performance.
See "git help gc" for manual housekeeping.
Switched to a new branch 'test'
66423fc523 target/arm: Make FPSCR/FPCR trapped-exception bits RAZ/WI
a61dad4237 hw/arm/boot: Support DTB autoload for firmware-only boots
7688aee282 hw/arm/boot: Clarify why arm_setup_firmware_boot() doesn't set 
env->boot_info
80cc07245c hw/arm/boot: Factor out "set up firmware boot" code
7151744025 hw/arm/boot: Factor out "direct kernel boot" code into its own 
function
c12bf1852c hw/arm/boot: Fix block comment style in arm_load_kernel()
ce81361fe5 gdbstub: allow killing QEMU via vKill command
93b4d61e49 target/arm: Enable TBI for user-only
61fd950037 target/arm: Compute TB_FLAGS for TBI for user-only
0f01045999 target/arm: Clean TBI for data operations in the translator
53da7d98c9 target/arm: Add TBFLAG_A64_TBID, split out gen_top_byte_ignore
1815ecd95b tests/tcg/aarch64: Add pauth smoke test
7d72b64304 linux-user: Implement PR_PAC_RESET_KEYS
3ace79750d target/arm: Enable BTI for -cpu max
30d7f17830 target/arm: Set btype for indirect branches
073d6dfba5 target/arm: Reset btype for direct branches
db8941f759 target/arm: Default handling of BTYPE during translation
81ac570579 target/arm: Cache the GP bit for a page in MemTxAttrs
f214b66195 exec: Add target-specific tlb bits to MemTxAttrs
61280f6f09 target/arm: Add BT and BTYPE to tb->flags
eee1d0b7f2 target/arm: Add PSTATE.BTYPE
45b2d8472f target/arm: Introduce isar_feature_aa64_bti

=== OUTPUT BEGIN ===
1/22 Checking commit 45b2d8472f6a (target/arm: Introduce isar_feature_aa64_bti)
2/22 Checking commit eee1d0b7f24a (target/arm: Add PSTATE.BTYPE)
3/22 Checking commit 61280f6f09c7 (target/arm: Add BT and BTYPE to tb->flags)
4/22 Checking commit f214b66195e4 (exec: Add target-specific tlb bits to 
MemTxAttrs)
ERROR: spaces prohibited around that ':' (ctx:WxW)
#31: FILE: include/exec/memattrs.h:47:
+unsigned int target_tlb_bit0 : 1;
  ^

ERROR: spaces prohibited around that ':' (ctx:WxW)
#32: FILE: include/exec/memattrs.h:48:
+unsigned int target_tlb_bit1 : 1;
  ^

ERROR: spaces prohibited around that ':' (ctx:WxW)
#33: FILE: include/exec/memattrs.h:49:
+unsigned int target_tlb_bit2 : 1;
  ^

total: 3 errors, 0 warnings, 16 lines checked

Patch 4/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

5/22 Checking commit 81ac57057995 (target/arm: Cache the GP bit for a page in 
MemTxAttrs)
6/22 Checking commit db8941f759b6 (target/arm: Default handling of BTYPE during 
translation)
ERROR: return is not a function, parentheses are not required
#99: FILE: target/arm/translate-a64.c:13796:
+return (tlb_hit(entry->addr_code, addr) &&

total: 1 errors, 0 warnings, 196 lines checked

Patch 6/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

7/22 Checking commit 073d6dfba51c (target/arm: Reset btype for direct branches)
8/22 Checking commit 30d7f17830ae (target/arm: Set btype for indirect branches)
9/22 Checking commit 3ace79750d7a (target/arm: Enable BTI for -cpu max)
10/22 Checking commit 7d72b6430427 (linux-user: Implement PR_PAC_RESET_KEYS)
11/22 Checking commit 1815ecd95bfc (tests/tcg/aarch64: Add pauth smoke test)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

total: 0 errors, 1 warnings, 38 lines checked

Patch 11/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
12/22 Checking commit 53da7d98c9f3 (target/arm: Add TBFLAG_A64_TBID, split out 
gen_top_byte_ignore)
13/22 Checking commit 0f01045999c8 (target/arm: Clean TBI for data operations 
in the translator)
WARNING: Block comments use a leading /* on a separate line
#514: FILE:

Re: [Qemu-devel] [PULL 00/22] target-arm queue

2019-02-05 Thread Peter Maydell 
On Tue, 5 Feb 2019 at 17:05, Peter Maydell  wrote:
>
> Arm stuff, mostly patches from RTH.
>
> thanks
> -- PMM
>
> The following changes since commit 01a9a51ffaf4699827ea6425cb2b834a356e159d:
>
>   Merge remote-tracking branch 'remotes/kraxel/tags/ui-20190205-pull-request' 
> into staging (2019-02-05 14:01:29 +)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20190205
>
> for you to fetch changes up to a15945d98d3a3390c3da344d1b47218e91e49d8b:
>
>   target/arm: Make FPSCR/FPCR trapped-exception bits RAZ/WI (2019-02-05 
> 16:52:42 +)
>
> 
> target-arm queue:
>  * Implement Armv8.5-BTI extension for system emulation mode
>  * Implement the PR_PAC_RESET_KEYS prctl() for linux-user mode's 
> Armv8.3-PAuth support
>  * Support TBI (top-byte-ignore) properly for linux-user mode
>  * gdbstub: allow killing QEMU via vKill command
>  * hw/arm/boot: Support DTB autoload for firmware-only boots
>  * target/arm: Make FPSCR/FPCR trapped-exception bits RAZ/WI
>

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.0
for any user-visible changes.

-- PMM

Re: [Qemu-devel] [PULL 00/22] target-arm queue

2019-02-05 Thread no-reply 
Patchew URL: 
https://patchew.org/QEMU/20190205170510.21984-1-peter.mayd...@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190205170510.21984-1-peter.mayd...@linaro.org
Subject: [Qemu-devel] [PULL 00/22] target-arm queue
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
   01a9a51..68df0c3  master -> master
 - [tag update]  patchew/20190205151810.571-1-peter.mayd...@linaro.org -> 
patchew/20190205151810.571-1-peter.mayd...@linaro.org
 * [new tag] 
patchew/20190205165927.26599-1-samuel.thiba...@ens-lyon.org -> 
patchew/20190205165927.26599-1-samuel.thiba...@ens-lyon.org
 * [new tag] patchew/20190205170510.21984-1-peter.mayd...@linaro.org -> 
patchew/20190205170510.21984-1-peter.mayd...@linaro.org
Switched to a new branch 'test'
6ffc7d7 target/arm: Make FPSCR/FPCR trapped-exception bits RAZ/WI
30bbbd5 hw/arm/boot: Support DTB autoload for firmware-only boots
7bd500b hw/arm/boot: Clarify why arm_setup_firmware_boot() doesn't set 
env->boot_info
25e1889 hw/arm/boot: Factor out "set up firmware boot" code
50de452 hw/arm/boot: Factor out "direct kernel boot" code into its own function
aca9c24 hw/arm/boot: Fix block comment style in arm_load_kernel()
78941d8 gdbstub: allow killing QEMU via vKill command
721a432 target/arm: Enable TBI for user-only
362b79a target/arm: Compute TB_FLAGS for TBI for user-only
1fc2220 target/arm: Clean TBI for data operations in the translator
0f5454a target/arm: Add TBFLAG_A64_TBID, split out gen_top_byte_ignore
959de98 tests/tcg/aarch64: Add pauth smoke test
642c759 linux-user: Implement PR_PAC_RESET_KEYS
39bd3e6 target/arm: Enable BTI for -cpu max
45c6a61 target/arm: Set btype for indirect branches
668e1ed target/arm: Reset btype for direct branches
d58c736 target/arm: Default handling of BTYPE during translation
a853f2b target/arm: Cache the GP bit for a page in MemTxAttrs
74d53e2 exec: Add target-specific tlb bits to MemTxAttrs
1f99e8c target/arm: Add BT and BTYPE to tb->flags
a95068b target/arm: Add PSTATE.BTYPE
a20e5cc target/arm: Introduce isar_feature_aa64_bti

=== OUTPUT BEGIN ===
1/22 Checking commit a20e5cc7a61e (target/arm: Introduce isar_feature_aa64_bti)
2/22 Checking commit a95068bf1254 (target/arm: Add PSTATE.BTYPE)
3/22 Checking commit 1f99e8c899f8 (target/arm: Add BT and BTYPE to tb->flags)
4/22 Checking commit 74d53e27f036 (exec: Add target-specific tlb bits to 
MemTxAttrs)
ERROR: spaces prohibited around that ':' (ctx:WxW)
#31: FILE: include/exec/memattrs.h:47:
+unsigned int target_tlb_bit0 : 1;
  ^

ERROR: spaces prohibited around that ':' (ctx:WxW)
#32: FILE: include/exec/memattrs.h:48:
+unsigned int target_tlb_bit1 : 1;
  ^

ERROR: spaces prohibited around that ':' (ctx:WxW)
#33: FILE: include/exec/memattrs.h:49:
+unsigned int target_tlb_bit2 : 1;
  ^

total: 3 errors, 0 warnings, 16 lines checked

Patch 4/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

5/22 Checking commit a853f2b383d2 (target/arm: Cache the GP bit for a page in 
MemTxAttrs)
6/22 Checking commit d58c736883d2 (target/arm: Default handling of BTYPE during 
translation)
ERROR: return is not a function, parentheses are not required
#99: FILE: target/arm/translate-a64.c:13796:
+return (tlb_hit(entry->addr_code, addr) &&

total: 1 errors, 0 warnings, 196 lines checked

Patch 6/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

7/22 Checking commit 668e1edaf5b8 (target/arm: Reset btype for direct branches)
8/22 Checking commit 45c6a616a907 (target/arm: Set btype for indirect branches)
9/22 Checking commit 39bd3e614f92 (target/arm: Enable BTI for -cpu max)
10/22 Checking commit 642c75987d31 (linux-user: Implement PR_PAC_RESET_KEYS)
11/22 Checking commit 959de989c7b4 (tests/tcg/aarch64: Add pauth smoke test)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

total: 0 errors, 1 warnings, 38 lines checked

Patch 11/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
12/22 Checking commit 0f5454a0fe1d (target/arm: Add TBFLAG_A64_TBID, split out 
gen_top_byte_ignore)
13/22 Checking commit 1fc2220bbf43 (target/arm: Clean TBI for data operations 
in the translator)
WARNING: Block comments use a leading /* on a separate line
#514: FILE: target/arm/translate-a64.c:3256:
+do_gpr_ld(s,

Re: [Qemu-devel] [PULL 00/22] target-arm queue

2019-02-05 Thread no-reply 
Patchew URL: 
https://patchew.org/QEMU/20190205170510.21984-1-peter.mayd...@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [Qemu-devel] [PULL 00/22] target-arm queue
Type: series
Message-id: 20190205170510.21984-1-peter.mayd...@linaro.org

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]   
patchew/20190205170510.21984-1-peter.mayd...@linaro.org -> 
patchew/20190205170510.21984-1-peter.mayd...@linaro.org
Switched to a new branch 'test'
6ffc7d7c6e target/arm: Make FPSCR/FPCR trapped-exception bits RAZ/WI
30bbbd5fe4 hw/arm/boot: Support DTB autoload for firmware-only boots
7bd500bd87 hw/arm/boot: Clarify why arm_setup_firmware_boot() doesn't set 
env->boot_info
25e1889da8 hw/arm/boot: Factor out "set up firmware boot" code
50de45269e hw/arm/boot: Factor out "direct kernel boot" code into its own 
function
aca9c240aa hw/arm/boot: Fix block comment style in arm_load_kernel()
78941d8842 gdbstub: allow killing QEMU via vKill command
721a4323d6 target/arm: Enable TBI for user-only
362b79acbb target/arm: Compute TB_FLAGS for TBI for user-only
1fc2220bbf target/arm: Clean TBI for data operations in the translator
0f5454a0fe target/arm: Add TBFLAG_A64_TBID, split out gen_top_byte_ignore
959de989c7 tests/tcg/aarch64: Add pauth smoke test
642c75987d linux-user: Implement PR_PAC_RESET_KEYS
39bd3e614f target/arm: Enable BTI for -cpu max
45c6a616a9 target/arm: Set btype for indirect branches
668e1edaf5 target/arm: Reset btype for direct branches
d58c736883 target/arm: Default handling of BTYPE during translation
a853f2b383 target/arm: Cache the GP bit for a page in MemTxAttrs
74d53e27f0 exec: Add target-specific tlb bits to MemTxAttrs
1f99e8c899 target/arm: Add BT and BTYPE to tb->flags
a95068bf12 target/arm: Add PSTATE.BTYPE
a20e5cc7a6 target/arm: Introduce isar_feature_aa64_bti

=== OUTPUT BEGIN ===
1/22 Checking commit a20e5cc7a61e (target/arm: Introduce isar_feature_aa64_bti)
2/22 Checking commit a95068bf1254 (target/arm: Add PSTATE.BTYPE)
3/22 Checking commit 1f99e8c899f8 (target/arm: Add BT and BTYPE to tb->flags)
4/22 Checking commit 74d53e27f036 (exec: Add target-specific tlb bits to 
MemTxAttrs)
ERROR: spaces prohibited around that ':' (ctx:WxW)
#31: FILE: include/exec/memattrs.h:47:
+unsigned int target_tlb_bit0 : 1;
  ^

ERROR: spaces prohibited around that ':' (ctx:WxW)
#32: FILE: include/exec/memattrs.h:48:
+unsigned int target_tlb_bit1 : 1;
  ^

ERROR: spaces prohibited around that ':' (ctx:WxW)
#33: FILE: include/exec/memattrs.h:49:
+unsigned int target_tlb_bit2 : 1;
  ^

total: 3 errors, 0 warnings, 16 lines checked

Patch 4/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

5/22 Checking commit a853f2b383d2 (target/arm: Cache the GP bit for a page in 
MemTxAttrs)
6/22 Checking commit d58c736883d2 (target/arm: Default handling of BTYPE during 
translation)
ERROR: return is not a function, parentheses are not required
#99: FILE: target/arm/translate-a64.c:13796:
+return (tlb_hit(entry->addr_code, addr) &&

total: 1 errors, 0 warnings, 196 lines checked

Patch 6/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

7/22 Checking commit 668e1edaf5b8 (target/arm: Reset btype for direct branches)
8/22 Checking commit 45c6a616a907 (target/arm: Set btype for indirect branches)
9/22 Checking commit 39bd3e614f92 (target/arm: Enable BTI for -cpu max)
10/22 Checking commit 642c75987d31 (linux-user: Implement PR_PAC_RESET_KEYS)
11/22 Checking commit 959de989c7b4 (tests/tcg/aarch64: Add pauth smoke test)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

total: 0 errors, 1 warnings, 38 lines checked

Patch 11/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
12/22 Checking commit 0f5454a0fe1d (target/arm: Add TBFLAG_A64_TBID, split out 
gen_top_byte_ignore)
13/22 Checking commit 1fc2220bbf43 (target/arm: Clean TBI for data operations 
in the translator)
WARNING: Block comments use a leading /* on a separate line
#514: FILE: target/arm/translate-a64.c:3256:
+do_gpr_ld(s, tcg_rt, clean_addr, size, /* is_signed */ false,

total: 0 errors, 1 warnings, 574 lines checked

Patch 13/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Re: [Qemu-devel] [PULL 00/22] target-arm queue

2017-01-30 Thread Peter Maydell 
On 27 January 2017 at 15:31, Peter Maydell  wrote:
> ARM queue; the bulk of this is M profile bugfixes.
>
> thanks
> -- PMM

Applied, thanks.

-- PMM

Re: [Qemu-devel] [PULL 00/22] target-arm queue

2017-01-27 Thread no-reply 
Hi,

Your series seems to have some coding style problems. See output below for
more information:

Type: series
Subject: [Qemu-devel] [PULL 00/22] target-arm queue
Message-id: 1485531137-2362-1-git-send-email-peter.mayd...@linaro.org

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

# Useful git options
git config --local diff.renamelimit 0
git config --local diff.renames True

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 - [tag update]  patchew/1485447262-27014-1-git-send-email-...@redhat.com 
-> patchew/1485447262-27014-1-git-send-email-...@redhat.com
 * [new tag] 
patchew/1485531137-2362-1-git-send-email-peter.mayd...@linaro.org -> 
patchew/1485531137-2362-1-git-send-email-peter.mayd...@linaro.org
Switched to a new branch 'test'
51b769b dma: omap: check dma channel data_type
f9f7f1b arm_gicv3: Fix broken logic in ELRSR calculation
55b3d0c hw/char/exynos4210_uart: Drop unused local variable frame_size
a18e1b9 arm: stellaris: make MII accesses complete immediately
19ff761 armv7m: R14 should reset to 0x
c825a48 armv7m: FAULTMASK should be 0 on reset
44c8660 armv7m: Honour CCR.USERSETMPEND
a868e15 armv7m: Report no-coprocessor faults correctly
f76a2fa armv7m: set CFSR.UNDEFINSTR on undefined instructions
7b16c2e armv7m: honour CCR.STACKALIGN on exception entry
5b10d87 armv7m: implement CCR, CFSR, HFSR, DFSR, BFAR, and MMFAR
275e822 armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR
16dcdc1 armv7m_nvic: keep a pointer to the CPU
3dc52da target/arm: Drop IS_M() macro
e6c3816 pflash_cfi01: fix per-device sector length in CFI table
f83ac4e armv7m: Clear FAULTMASK on return from non-NMI exceptions
b62c642 armv7m: Fix reads of CONTROL register bit 1
698250d hw/registerfields.h: Pull FIELD etc macros out of hw/register.h
07c53ea armv7m: Explicit error for bad vector table
7acb50c armv7m: Replace armv7m.hack with unassigned_access handler
eb2c228 armv7m: MRS/MSR: handle unprivileged access
c1d24d5 aspeed/smc: handle dummy bytes when doing fast reads in command mode

=== OUTPUT BEGIN ===
Checking PATCH 1/22: aspeed/smc: handle dummy bytes when doing fast reads in 
command mode...
Checking PATCH 2/22: armv7m: MRS/MSR: handle unprivileged access...
Checking PATCH 3/22: armv7m: Replace armv7m.hack with unassigned_access 
handler...
Checking PATCH 4/22: armv7m: Explicit error for bad vector table...
Checking PATCH 5/22: hw/registerfields.h: Pull FIELD etc macros out of 
hw/register.h...
ERROR: Macros with multiple statements should be enclosed in a do - while loop
#112: FILE: include/hw/registerfields.h:19:
+#define REG32(reg, addr)  \
+enum { A_ ## reg = (addr) };  \
+enum { R_ ## reg = (addr) / 4 };

ERROR: trailing whitespace
#118: FILE: include/hw/registerfields.h:25:
+/* This macro will define FOO_BAR_MASK, FOO_BAR_SHIFT and FOO_BAR_LENGTH $

ERROR: Macros with multiple statements should be enclosed in a do - while loop
#121: FILE: include/hw/registerfields.h:28:
+#define FIELD(reg, field, shift, length)  \
+enum { R_ ## reg ## _ ## field ## _SHIFT = (shift)};  \
+enum { R_ ## reg ## _ ## field ## _LENGTH = (length)};\
+enum { R_ ## reg ## _ ## field ## _MASK = \
+MAKE_64BIT_MASK(shift, length)};

total: 3 errors, 0 warnings, 117 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 6/22: armv7m: Fix reads of CONTROL register bit 1...
Checking PATCH 7/22: armv7m: Clear FAULTMASK on return from non-NMI 
exceptions...
Checking PATCH 8/22: pflash_cfi01: fix per-device sector length in CFI table...
Checking PATCH 9/22: target/arm: Drop IS_M() macro...
Checking PATCH 10/22: armv7m_nvic: keep a pointer to the CPU...
Checking PATCH 11/22: armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, 
BFAR...
Checking PATCH 12/22: armv7m: implement CCR, CFSR, HFSR, DFSR, BFAR, and 
MMFAR...
Checking PATCH 13/22: armv7m: honour CCR.STACKALIGN on exception entry...
Checking PATCH 14/22: armv7m: set CFSR.UNDEFINSTR on undefined instructions...
Checking PATCH 15/22: armv7m: Report no-coprocessor faults correctly...
Checking PATCH 16/22: armv7m: Honour CCR.USERSETMPEND...
Checking PATCH 17/22: armv7m: FAULTMASK should be 0 on reset...
Checking PATCH 18/22: armv7m: R14 should reset to 0x...
Checking PATCH 19/22:

Re: [Qemu-devel] [PULL 00/22] target-arm queue

2016-06-17 Thread Peter Maydell 
On 17 June 2016 at 15:25, Peter Maydell  wrote:
> Nothing here except the GICv3 emulation, but I wanted to get it into
> master this week, and nothing else has made it into target-arm.next.
>
> thanks
> -- PMM
>
>
> The following changes since commit 98b5b7422fe1813040b499a4be415a9f514f1c10:
>
>   Merge remote-tracking branch 
> 'remotes/amit-migration/tags/migration-for-2.7-5' into staging (2016-06-17 
> 14:09:46 +0100)
>
> are available in the git repository at:
>
>
>   git://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20160617
>
> for you to fetch changes up to f06765a94a31bdd8b65fc83fd91a6c3f8e8a1195:
>
>   ACPI: ARM: Present GIC version in MADT table (2016-06-17 15:23:51 +0100)
>
> 
> target-arm queue:
>  * GICv3 emulation

Applied, thanks.

-- PMM

Re: [Qemu-devel] [PULL 00/22] target-arm queue

2015-06-04 Thread Peter Maydell 
On 2 June 2015 at 17:33, Peter Maydell peter.mayd...@linaro.org wrote:

 There's more stuff in the pipeline for ARM, but 22 patches
 is a respectable number, so let's drain the queue.

 -- PMM


 The following changes since commit 3fc827d591679f3e262b9d1f8b34528eabfca8c0:

   target-arm: Correct check for non-EL3 (2015-06-02 13:22:29 +0100)

 are available in the git repository at:

   git://git.linaro.org/people/pmaydell/qemu-arm.git 
 tags/pull-target-arm-20150602

 for you to fetch changes up to 94edf02c4c94781fa777c459fe86b52131b83cb6:

   hw/arm/virt: change indentation in a15memmap (2015-06-02 16:31:18 +0100)

 
 target-arm queue:
  * more EL2 preparation patches
  * revert a no-longer-necessary workaround for old glib versions
  * add GICv2m support to virt board (MSI support)
  * pl061: fix wrong calculation of GPIOMIS register
  * support MSI via irqfd
  * remove a confusing v8_ prefix from some variable names
  * add dynamic sysbus device support to the virt board

Applied, thanks.

-- PMM