Re: [Qemu-devel] [Xen-devel] Re: [PATCH 4/5] xen: Fix the memory registration to reflect of what is done by Xen.
On Fri, 15 Jul 2011, Anthony PERARD wrote: On Fri, Jul 15, 2011 at 18:05, Stefano Stabellini stefano.stabell...@eu.citrix.com wrote: Shouldn't we avoid registering any memory for the whole video ram area? I mean: 0xa - 0x10 No, because SeaBIOS load the Options ROM (VGA Bios, PXE) to the area between 0xc and 0x10, and this go through QEMU. The area between 0xa and 0xc is registred later by the cirrus_vga bits, as IO. OK. Can you please expand your comment in the code with the same explanation?
Re: [Qemu-devel] [Xen-devel] Re: [PATCH 4/5] xen: Fix the memory registration to reflect of what is done by Xen.
On Mon, Jul 18, 2011 at 12:14, Stefano Stabellini stefano.stabell...@eu.citrix.com wrote: On Fri, 15 Jul 2011, Anthony PERARD wrote: On Fri, Jul 15, 2011 at 18:05, Stefano Stabellini stefano.stabell...@eu.citrix.com wrote: Shouldn't we avoid registering any memory for the whole video ram area? I mean: 0xa - 0x10 No, because SeaBIOS load the Options ROM (VGA Bios, PXE) to the area between 0xc and 0x10, and this go through QEMU. The area between 0xa and 0xc is registred later by the cirrus_vga bits, as IO. OK. Can you please expand your comment in the code with the same explanation? Yes, I will do that. -- Anthony PERARD
Re: [Qemu-devel] [Xen-devel] Re: [PATCH 4/5] xen: Fix the memory registration to reflect of what is done by Xen.
On Fri, Jul 15, 2011 at 18:05, Stefano Stabellini stefano.stabell...@eu.citrix.com wrote: Shouldn't we avoid registering any memory for the whole video ram area? I mean: 0xa - 0x10 No, because SeaBIOS load the Options ROM (VGA Bios, PXE) to the area between 0xc and 0x10, and this go through QEMU. The area between 0xa and 0xc is registred later by the cirrus_vga bits, as IO. -- Anthony PERARD
