[SeaBIOS] Clearer and more informative error messages
"Boot failed: could not read the boot disk" Happend when I started 'qemu' as just that without parameters. So the reason it cant read it is that no such disk exists. So it should tell me "could not find any disk" instead of "could not read the boot disk" which suggest it found one but was unable to read it. ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
[SeaBIOS] Add colored output
Other BIOS such as Award and AMI can use colors in text. Example "Press F12 for boot menu", then "F12" is in highlighted color. ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
[SeaBIOS] [PATCH] Added entries to do
>From c3d7007f073b2038a575c9b3b385c7413b7bdeb2 Mon Sep 17 00:00:00 2001 From: anonymous Date: Sun, 4 Dec 2011 17:14:29 +0100 Subject: [PATCH] Added entries to do --- TODO | 14 ++ 1 files changed, 14 insertions(+), 0 deletions(-) diff --git a/TODO b/TODO index 0ac187e..bfad87d 100644 --- a/TODO +++ b/TODO @@ -19,3 +19,17 @@ extensions? Possibly add option to eliminate TSC-based delays on emulators. Possibly support sending debug information over EHCI debug port. + +== ACPI == +* Persistent System Description Table (PSDT) +* Smart Battery Specification Table (SBST) +* Embedded Controller Boot Resources Table (ECDT) +* Alert Standard Format table (ASF!) +* DMA Remapping table (DMAR) +* PCI Memory Mapped Configuration table (MCFG) +* Software Licensing Description Table (SLDT) + +== Miscellaneous == +* Extended System Configuration Data (ESCD) +* GUID Partition Table (GPT) +* Password protection -- 1.7.7.3 From c3d7007f073b2038a575c9b3b385c7413b7bdeb2 Mon Sep 17 00:00:00 2001 From: anonymous Date: Sun, 4 Dec 2011 17:14:29 +0100 Subject: [PATCH] Added entries to do --- TODO | 14 ++ 1 files changed, 14 insertions(+), 0 deletions(-) diff --git a/TODO b/TODO index 0ac187e..bfad87d 100644 --- a/TODO +++ b/TODO @@ -19,3 +19,17 @@ extensions? Possibly add option to eliminate TSC-based delays on emulators. Possibly support sending debug information over EHCI debug port. + +== ACPI == +* Persistent System Description Table (PSDT) +* Smart Battery Specification Table (SBST) +* Embedded Controller Boot Resources Table (ECDT) +* Alert Standard Format table (ASF!) +* DMA Remapping table (DMAR) +* PCI Memory Mapped Configuration table (MCFG) +* Software Licensing Description Table (SLDT) + +== Miscellaneous == +* Extended System Configuration Data (ESCD) +* GUID Partition Table (GPT) +* Password protection -- 1.7.7.3 ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
[SeaBIOS] [PATCH 1/2] Fixed comments and output
>From b751e48de6f7b38c757824e67f11537376b63888 Mon Sep 17 00:00:00 2001
From: anonymous
Date: Sun, 4 Dec 2011 16:57:49 +0100
Subject: [PATCH 1/2] Fixed comments and output
---
src/apm.c | 40
1 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/src/apm.c b/src/apm.c
index c497dbe..02dc023 100644
--- a/src/apm.c
+++ b/src/apm.c
@@ -1,23 +1,23 @@
// Basic support for apmbios callbacks.
//
// Copyright (C) 2008 Kevin O'Connor
-// Copyright (C) 2005 Struan Bartlett
-// Copyright (C) 2004 Fabrice Bellard
+// Copyright (C) 2005 Struan Bartlett
+// Copyright (C) 2004 Fabrice Bellard
//
// This file may be distributed under the terms of the GNU LGPLv3 license.
-#include "farptr.h" // GET_VAR
-#include "bregs.h" // struct bregs
-#include "ioport.h" // outb
-#include "util.h" // wait_irq
-#include "config.h" // CONFIG_*
+#include "farptr.h" // GET_VAR
+#include "bregs.h" // struct bregs
+#include "ioport.h" // outb
+#include "util.h"// wait_irq
+#include "config.h" // CONFIG_*
#include "biosvar.h" // GET_GLOBAL
static void
out_str(const char *str_cs)
{
if (CONFIG_COREBOOT) {
-dprintf(1, "APM request '%s'\n", str_cs);
+dprintf(1, "APM request: '%s'\n", str_cs);
return;
}
@@ -39,8 +39,8 @@ handle_155300(struct bregs *regs)
regs->al = 2; // APM minor version
regs->bh = 'P';
regs->bl = 'M';
-// bit 0 : 16 bit interface supported
-// bit 1 : 32 bit interface supported
+// bit 0 : 16-bit interface supported
+// bit 1 : 32-bit interface supported
regs->cx = 0x03;
set_success(regs);
}
@@ -56,30 +56,30 @@ handle_155301(struct bregs *regs)
extern void entry_apm16(void);
extern void entry_apm32(void);
-// APM 16 bit protected mode interface connect
+// APM 16-bit protected mode interface connect
static void
handle_155302(struct bregs *regs)
{
regs->bx = (u32)entry_apm16;
-regs->ax = SEG_BIOS; // 16 bit code segment base
-regs->si = 0xfff0; // 16 bit code segment size
+regs->ax = SEG_BIOS; // 16-bit code segment base
+regs->si = 0xfff0; // 16-bit code segment size
regs->cx = SEG_BIOS; // data segment address
regs->di = 0xfff0; // data segment length
set_success(regs);
}
-// APM 32 bit protected mode interface connect
+// APM 32-bit protected mode interface connect
static void
handle_155303(struct bregs *regs)
{
-regs->ax = SEG_BIOS; // 32 bit code segment base
+regs->ax = SEG_BIOS; // 32-bit code segment base
regs->ebx = (u32)entry_apm32;
-regs->cx = SEG_BIOS; // 16 bit code segment base
-// 32 bit code segment size (low 16 bits)
-// 16 bit code segment size (high 16 bits)
+regs->cx = SEG_BIOS; // 16-bit code segment base
+// 32-bit code segment size (low 16 bits)
+// 16-bit code segment size (high 16 bits)
regs->esi = 0xfff0fff0;
regs->dx = SEG_BIOS; // data segment address
-regs->di = 0xfff0; // data segment length
+regs->di = 0xfff0; // data segment length
set_success(regs);
}
@@ -198,7 +198,7 @@ handle_1553XX(struct bregs *regs)
void
handle_1553(struct bregs *regs)
{
-if (! CONFIG_APMBIOS) {
+if (!CONFIG_APMBIOS) {
set_code_invalid(regs, RET_EUNSUPPORTED);
return;
}
--
1.7.7.3
From b751e48de6f7b38c757824e67f11537376b63888 Mon Sep 17 00:00:00 2001
From: anonymous
Date: Sun, 4 Dec 2011 16:57:49 +0100
Subject: [PATCH 1/2] Fixed comments and output
---
src/apm.c | 40
1 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/src/apm.c b/src/apm.c
index c497dbe..02dc023 100644
--- a/src/apm.c
+++ b/src/apm.c
@@ -1,23 +1,23 @@
// Basic support for apmbios callbacks.
//
// Copyright (C) 2008 Kevin O'Connor
-// Copyright (C) 2005 Struan Bartlett
-// Copyright (C) 2004 Fabrice Bellard
+// Copyright (C) 2005 Struan Bartlett
+// Copyright (C) 2004 Fabrice Bellard
//
// This file may be distributed under the terms of the GNU LGPLv3 license.
-#include "farptr.h" // GET_VAR
-#include "bregs.h" // struct bregs
-#include "ioport.h" // outb
-#include "util.h" // wait_irq
-#include "config.h" // CONFIG_*
+#include "farptr.h" // GET_VAR
+#include "bregs.h" // struct bregs
+#include "ioport.h" // outb
+#include "util.h"// wait_irq
+#include "config.h" // CONFIG_*
#include "biosvar.h" // GET_GLOBAL
static void
out_str(const char *str_cs)
{
if (CONFIG_COREBOOT) {
-dprintf(1, "APM request '%s'\n", str_cs);
+dprintf(1, "APM request: '%s'\n", str_cs);
return;
}
@@ -39,8 +39,8 @@ handle_155300(struct bregs *regs)
regs->al = 2; // APM minor version
regs->bh = 'P';
regs->bl = 'M';
-// bit 0 : 16 bit interface supported
-// bit 1 : 32 bit interface supported
+// bit 0 : 16-bit interface supported
+// bit 1 : 32-bit interface supported
regs->cx = 0x03;
set_success(regs);
}
@@ -56,30 +56,30 @@
[SeaBIOS] [PATCH 1/6] Improvements without changing content.
>From 679784bb134c4e84531e64de6727b4bc8d0f4d6b Mon Sep 17 00:00:00 2001 From: anonymous Date: Sun, 4 Dec 2011 15:52:07 +0100 Subject: [PATCH 1/6] Improvements without changing content. --- README | 78 1 files changed, 39 insertions(+), 39 deletions(-) diff --git a/README b/README index 1f40433..b74681e 100644 --- a/README +++ b/README @@ -1,5 +1,5 @@ -This code implements an X86 legacy bios. It is intended to be -compiled using standard gnu tools (eg, gas and gcc). +This code implements an x86 legacy bios. It is intended to be +compiled using standard GNU tools (eg, gas and gcc). To build, one should be able to run "make" in the main directory. The resulting file "out/bios.bin" contains the processed bios image. @@ -7,27 +7,27 @@ resulting file "out/bios.bin" contains the processed bios image. Testing of images: -To test the bios under bochs, one will need to instruct bochs to use -the new bios image. Use the 'romimage' option - for example: +To test the BIOS under Bochs, one will need to instruct Bochs to use +the new BIOS image. Use the 'romimage' option - for example: bochs -q 'floppya: 1_44=myfdimage.img' 'romimage: file=out/bios.bin' -To test under qemu, one will need to create a directory with all the -bios images and then overwrite the main bios image. For example: +To test under QEMU, one will need to create a directory with all the +BIOS images and then overwrite the main BIOS image. For example: cp /usr/share/qemu/*.bin mybiosdir/ cp out/bios.bin mybiosdir/ -Once this is setup, one can instruct qemu to use the newly created -directory for rom images. For example: +Once this is setup, one can instruct QEMU to use the newly created +directory for ROM images. For example: qemu -L mybiosdir/ -fda myfdimage.img Overview of files: -The src/ directory contains the bios source code. Several of the -files are compiled twice - once for 16bit mode and once for 32bit +The src/ directory contains the BIOS source code. Several of the +files are compiled twice - once for 16-bit mode and once for 32-bit mode. (The build system will remove code that is not needed for a particular mode.) @@ -40,33 +40,33 @@ temporary and final files. Build overview: -The 16bit code is compiled via gcc to assembler (file out/ccode.16.s). +The 16-bit code is compiled via gcc to assembler (file out/ccode.16.s). The gcc "-fwhole-program" and "-ffunction-sections -fdata-sections" options are used to optimize the process so that gcc can efficiently compile and discard unneeded code. (In the code, one can use the macros 'VISIBLE16' and 'VISIBLE32FLAT' to instruct a symbol to be -outputted in 16bit and 32bit mode respectively.) +outputted in 16-bit and 32-bit mode respectively.) This resulting assembler code is pulled into romlayout.S. The gas option ".code16gcc" is used prior to including the gcc generated -assembler - this option enables gcc to generate valid 16 bit code. +assembler - this option enables gcc to generate valid 16-bit code. The post code (post.c) is entered, via the function handle_post(), in -32bit mode. The 16bit post vector (in romlayout.S) transitions the +32-bit mode. The 16bit post vector (in romlayout.S) transitions the cpu into 32 bit mode before calling the post.c code. -In the last step of compilation, the 32 bit code is merged into the 16 +In the last step of compilation, the 32-bit code is merged into the 16 bit code so that one binary file contains both. Currently, both 16bit -and 32bit code will be located in the memory at 0xe-0xf. +and 32-bit code will be located in the memory at 0xe-0xf. -GCC 16 bit limitations: +GCC 16-bit limitations: -Although the 16bit code is compiled with gcc, developers need to be +Although the 16-bit code is compiled with gcc, developers need to be aware of the environment. In particular, global variables _must_ be treated specially. -The code has full access to stack variables and general purpose +The code has full access to stack variables and general-purpose registers. The entry code in romlayout.S will push the original registers on the stack before calling the C code and then pop them off (including any required changes) before returning from the interrupt. @@ -79,7 +79,7 @@ normally do in standard C code. However, variables stored outside the stack need to be accessed via the GET_VAR and SET_VAR macros (or one of the helper macros described -below). This is due to the 16bit segment nature of the X86 cpu when +below). This is due to the 16-bit segment nature of the x86 CPU when it is in "real mode". The C entry code will set DS and SS to point to the stack segment. Variables not on the stack need to be accessed via an explicit segment register. Any other access requires altering one @@ -99,23 +99,23 @@ Most BIOS variables are stored in global variables, the "BDA", or macros (GET/SET_GLOBAL, GET/SET_BDA, and GET/SET
[SeaBIOS] [PATCH 2/6] Fixed capitalization
>From 4976cedfde3dd04125a05b4ae9b8eb0944c0985e Mon Sep 17 00:00:00 2001 From: anonymous Date: Sun, 4 Dec 2011 16:00:54 +0100 Subject: [PATCH 2/6] Fixed capitalization --- TODO |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/TODO b/TODO index 23f26c0..0ac187e 100644 --- a/TODO +++ b/TODO @@ -16,6 +16,6 @@ is unnecessary. Support PCIv3 roms? Add support for PCI "configuration code" extensions? -Possibly add option to eliminate tsc based delays on emulators. +Possibly add option to eliminate TSC-based delays on emulators. Possibly support sending debug information over EHCI debug port. -- 1.7.7.3 From 4976cedfde3dd04125a05b4ae9b8eb0944c0985e Mon Sep 17 00:00:00 2001 From: anonymous Date: Sun, 4 Dec 2011 16:00:54 +0100 Subject: [PATCH 2/6] Fixed capitalization --- TODO |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/TODO b/TODO index 23f26c0..0ac187e 100644 --- a/TODO +++ b/TODO @@ -16,6 +16,6 @@ is unnecessary. Support PCIv3 roms? Add support for PCI "configuration code" extensions? -Possibly add option to eliminate tsc based delays on emulators. +Possibly add option to eliminate TSC-based delays on emulators. Possibly support sending debug information over EHCI debug port. -- 1.7.7.3 ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
Re: [SeaBIOS] [BUG] [Seabios] PCI 64bit BARs on Win2008 - unable to start the device. (ACPI lacks the _DSM method)
Hi Michael, Thank you for good advice, you are right. When I added new range above 4GB in _CRS the problem has gone. QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x, // Address Space Granularity 0x1,// Address Range Minimum 0x3,// Address Range Maximum 0x, // Address Translation Offset 0x4,// Address Length ,, , AddressRangeMemory, TypeStatic) The only big problem with this range - as soon as I have more than 3GB of RAM, windows will boot in BSOD. The problem relates to memory range intersection. Unfortunately it is not possible to predict how many GB of RAM the virtual machine could have - so it's difficult to specify a particular region. Do you have any ideas what can be done to solve this problem? Regards, Alexey On Thu, Dec 01, 2011 at 06:49:54PM +1300, Alexey Korolev wrote: Isaku san, I've just added you to discussion. There are some issues with PCI 64bit support in Windows. Windows fails to assign the resource if it doesn't fit in first 4GB window. I really don't know why it happens. One of the possibilities is related to lack of _DSM method in ACPI. Another guesse could be related to the fact that 440FX only supports 32bit PCI bus interface and windows may limit PCI address range to first 4GB for PCI devices under this bridge. I remember you were working on Q35 chipset simulation, I wonder if it is working and would it be possible to try? Thanks, Alexey Maybe the range above 4G needs to be declared in the _CRS resource? ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
Re: [SeaBIOS] [Qemu-devel] [BUG] [Seabios] PCI 64bit BARs on Win2008 - unable to start the device. (ACPI lacks the _DSM method)
Hi Gerd, We have very early prototype of data acquisition device, with quite large MMIO buffer. It is an emulated device. We are running the 0.15 release. 0.15 doesn't work correctly with 64bit BARs so I've already added some hacks to Seabios to let OS to choose the memory region. Thus you see bar 1, addr 0 in seabios log. Sorry that I haven't specified all this initially. I just want to make 64bit PCI bar working properly. Linux guests works correctly (except early versions - not investigated this yet). At the moment I have some issues with windows which relies on ACPI _CRS. Thanks, Alexey Hi, PCI: map device bus 0, bfd 0x28 bar 0, addr febe, size 1 [mem] bar 1, addr 0, size 2000 [mem] Somehow seabios didn't recognise the bar correctly it seems (both 512 and 256 MB cases look the same). For the 256 MB case seabios should have mapped the bar @ 0xe000. ... and it should also have figured it is prefetchable memory. Was pci config space messed up somehow? What does 'lspci -v' say once you've booted the machine with linux? What qemu version you are running? What kind of device is this? Emulated? Code somewhere? Or a real device passed through to the guest? cheers, Gerd ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
Re: [SeaBIOS] [BUG] [Seabios] PCI 64bit BARs on Win2008 - unable to start the device. (ACPI lacks the _DSM method)
On Mon, Dec 05, 2011 at 05:20:32PM +1300, Alexey Korolev wrote: > Hi Michael, > > Thank you for good advice, you are right. When I added new range > above 4GB in _CRS the problem has gone. > QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, > NonCacheable, ReadWrite, >0x, // Address Space Granularity >0x1,// Address Range Minimum >0x3,// Address Range Maximum >0x, // Address Translation Offset >0x4,// Address Length >,, , AddressRangeMemory, TypeStatic) > > The only big problem with this range - as soon as I have more than > 3GB of RAM, windows will boot in BSOD. The problem relates to memory > range intersection. > Unfortunately it is not possible to predict how many GB of RAM the > virtual machine could have - so it's difficult to specify a > particular region. > Do you have any ideas what can be done to solve this problem? > > Regards, > Alexey Two possible ideas: 1. Pass the value in from qemu 2. Get a range toward the upper end of the memory, around 1<<40 > >On Thu, Dec 01, 2011 at 06:49:54PM +1300, Alexey Korolev wrote: > >>Isaku san, > >> > >>I've just added you to discussion. > >>There are some issues with PCI 64bit support in Windows. Windows > >>fails to assign the resource if it doesn't fit in first 4GB window. > >> > >>I really don't know why it happens. > >>One of the possibilities is related to lack of _DSM method in ACPI. > >> > >>Another guesse could be related to the fact that 440FX only supports > >>32bit PCI bus interface and windows may limit PCI address range to > >>first 4GB for PCI devices under this bridge. > >>I remember you were working on Q35 chipset simulation, I wonder if > >>it is working and would it be possible to try? > >> > >>Thanks, > >>Alexey > >Maybe the range above 4G needs to be declared in the _CRS > >resource? ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
