Re: [SeaBIOS] [QEMU v6 PATCH 00/17] SMBIOS: build full tables in QEMU
Hi, > Command line options are processed before machine types are > initialized. acpi is pretty much in the same boat ... /me looks ... Ah, there is a notifier where you (hopefully) can hook in easily: pc_guest_info_machine_done (see hw/i386/pc.c). cheers, Gerd ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
[SeaBIOS] [QEMU v7 PATCH 7/7] SMBIOS: Build aggregate smbios tables and entry point
Build an aggregate set of smbios tables and an entry point structure.
Insert tables and entry point into fw_cfg respectively under
"etc/smbios/smbios-tables" and "etc/smbios/smbios-anchor".
Machine types <= 2.0 will for now continue using field-by-field
overrides to SeaBIOS defaults, but for machine types 2.1 and up we
expect the BIOS to look for and use the aggregate tables generated
by this patch.
Signed-off-by: Gabriel Somlo
---
hw/i386/pc.c | 24 +-
hw/i386/pc_piix.c| 4 +-
hw/i386/pc_q35.c | 4 +-
hw/i386/smbios.c | 708 +--
include/hw/i386/smbios.h | 5 +-
5 files changed, 720 insertions(+), 25 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 7155269..07de238 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -642,8 +642,8 @@ static unsigned int pc_apic_id_limit(unsigned int max_cpus)
static FWCfgState *bochs_bios_init(void)
{
FWCfgState *fw_cfg;
-uint8_t *smbios_table;
-size_t smbios_len;
+uint8_t *smbios_tables, *smbios_anchor;
+size_t smbios_tables_len, smbios_anchor_len;
uint64_t *numa_fw_cfg;
int i, j;
unsigned int apic_id_limit = pc_apic_id_limit(max_cpus);
@@ -670,10 +670,21 @@ static FWCfgState *bochs_bios_init(void)
acpi_tables, acpi_tables_len);
fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
-smbios_table = smbios_get_table_legacy(&smbios_len);
-if (smbios_table)
+smbios_tables = smbios_get_table_legacy(&smbios_tables_len);
+if (smbios_tables) {
fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
- smbios_table, smbios_len);
+ smbios_tables, smbios_tables_len);
+}
+
+smbios_get_tables(&smbios_tables, &smbios_tables_len,
+ &smbios_anchor, &smbios_anchor_len);
+if (smbios_anchor) {
+fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables",
+smbios_tables, smbios_tables_len);
+fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor",
+smbios_anchor, smbios_anchor_len);
+}
+
fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
&e820_reserve, sizeof(e820_reserve));
fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
@@ -1042,6 +1053,9 @@ void pc_cpus_init(const char *cpu_model, DeviceState
*icc_bridge)
sysbus_mmio_map_overlap(SYS_BUS_DEVICE(icc_bridge), 0,
APIC_DEFAULT_ADDRESS, 0x1000);
}
+
+/* tell smbios about cpuid version and features */
+smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
}
/* pci-info ROM file. Little endian format */
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 3d3f4b7..f3e2c4e 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -61,6 +61,7 @@ static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
static bool has_pci_info;
static bool has_acpi_build = true;
static bool smbios_defaults = true;
+static bool smbios_legacy_mode;
/* Make sure that guest addresses aligned at 1Gbyte boundaries get mapped to
* host addresses aligned at 1Gbyte boundaries. This way we can use 1GByte
* pages in the host.
@@ -146,7 +147,7 @@ static void pc_init1(QEMUMachineInitArgs *args,
if (smbios_defaults) {
/* These values are guest ABI, do not change */
smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
-args->machine->name);
+args->machine->name, smbios_legacy_mode);
}
/* allocate ram and load rom/bios */
@@ -264,6 +265,7 @@ static void pc_init_pci(QEMUMachineInitArgs *args)
static void pc_compat_2_0(QEMUMachineInitArgs *args)
{
+smbios_legacy_mode = true;
}
static void pc_compat_1_7(QEMUMachineInitArgs *args)
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 4e40196..2b565cb 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -51,6 +51,7 @@
static bool has_pci_info;
static bool has_acpi_build = true;
static bool smbios_defaults = true;
+static bool smbios_legacy_mode;
/* Make sure that guest addresses aligned at 1Gbyte boundaries get mapped to
* host addresses aligned at 1Gbyte boundaries. This way we can use 1GByte
* pages in the host.
@@ -133,7 +134,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
if (smbios_defaults) {
/* These values are guest ABI, do not change */
smbios_set_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)",
-args->machine->name);
+args->machine->name, smbios_legacy_mode);
}
/* allocate ram and load rom/bios */
@@ -242,6 +243,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
static void pc_compat_2_0(QEMUMachineInitArgs *args)
{
+smbios_legacy_mode = true;
}
static void pc_compat_1_7(QEMUMachineInitArgs *args)
diff --git a/hw/i386/smbios.c b/hw/i386/smbios.c
[SeaBIOS] [QEMU v7 PATCH 1/7] SMBIOS: Rename symbols to better reflect future use
Rename the following symbols:
- smbios_set_type1_defaults() to the more general smbios_set_defaults();
- bool smbios_type1_defaults to the more general smbios_defaults;
- smbios_get_table() to smbios_get_table_legacy();
This patch contains no functional changes.
Signed-off-by: Gabriel Somlo
---
hw/i386/pc.c | 2 +-
hw/i386/pc_piix.c| 14 +++---
hw/i386/pc_q35.c | 10 +-
hw/i386/smbios.c | 18 --
include/hw/i386/smbios.h | 6 +++---
5 files changed, 28 insertions(+), 22 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 14f0d91..f95814b 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -655,7 +655,7 @@ static FWCfgState *bochs_bios_init(void)
acpi_tables, acpi_tables_len);
fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
-smbios_table = smbios_get_table(&smbios_len);
+smbios_table = smbios_get_table_legacy(&smbios_len);
if (smbios_table)
fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
smbios_table, smbios_len);
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 7930a26..cca310b 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -60,7 +60,7 @@ static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
static bool has_pci_info;
static bool has_acpi_build = true;
-static bool smbios_type1_defaults = true;
+static bool smbios_defaults = true;
/* Make sure that guest addresses aligned at 1Gbyte boundaries get mapped to
* host addresses aligned at 1Gbyte boundaries. This way we can use 1GByte
* pages in the host.
@@ -143,10 +143,10 @@ static void pc_init1(QEMUMachineInitArgs *args,
guest_info->has_pci_info = has_pci_info;
guest_info->isapc_ram_fw = !pci_enabled;
-if (smbios_type1_defaults) {
+if (smbios_defaults) {
/* These values are guest ABI, do not change */
-smbios_set_type1_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
- args->machine->name);
+smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
+args->machine->name);
}
/* allocate ram and load rom/bios */
@@ -264,7 +264,7 @@ static void pc_init_pci(QEMUMachineInitArgs *args)
static void pc_compat_1_7(QEMUMachineInitArgs *args)
{
-smbios_type1_defaults = false;
+smbios_defaults = false;
gigabyte_align = false;
option_rom_has_mr = true;
x86_cpu_compat_disable_kvm_features(FEAT_1_ECX, CPUID_EXT_X2APIC);
@@ -345,7 +345,7 @@ static void pc_init_pci_no_kvmclock(QEMUMachineInitArgs
*args)
{
has_pci_info = false;
has_acpi_build = false;
-smbios_type1_defaults = false;
+smbios_defaults = false;
x86_cpu_compat_disable_kvm_features(FEAT_KVM, KVM_FEATURE_PV_EOI);
enable_compat_apic_id_mode();
pc_init1(args, 1, 0);
@@ -355,7 +355,7 @@ static void pc_init_isa(QEMUMachineInitArgs *args)
{
has_pci_info = false;
has_acpi_build = false;
-smbios_type1_defaults = false;
+smbios_defaults = false;
if (!args->cpu_model) {
args->cpu_model = "486";
}
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index c844dc2..b2b80c9 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -50,7 +50,7 @@
static bool has_pci_info;
static bool has_acpi_build = true;
-static bool smbios_type1_defaults = true;
+static bool smbios_defaults = true;
/* Make sure that guest addresses aligned at 1Gbyte boundaries get mapped to
* host addresses aligned at 1Gbyte boundaries. This way we can use 1GByte
* pages in the host.
@@ -130,10 +130,10 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
guest_info->isapc_ram_fw = false;
guest_info->has_acpi_build = has_acpi_build;
-if (smbios_type1_defaults) {
+if (smbios_defaults) {
/* These values are guest ABI, do not change */
-smbios_set_type1_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)",
- args->machine->name);
+smbios_set_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)",
+args->machine->name);
}
/* allocate ram and load rom/bios */
@@ -242,7 +242,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
static void pc_compat_1_7(QEMUMachineInitArgs *args)
{
-smbios_type1_defaults = false;
+smbios_defaults = false;
gigabyte_align = false;
option_rom_has_mr = true;
x86_cpu_compat_disable_kvm_features(FEAT_1_ECX, CPUID_EXT_X2APIC);
diff --git a/hw/i386/smbios.c b/hw/i386/smbios.c
index e8f41ad..e734d4c 100644
--- a/hw/i386/smbios.c
+++ b/hw/i386/smbios.c
@@ -21,9 +21,8 @@
#include "hw/i386/smbios.h"
#include "hw/loader.h"
-/*
- * Structures shared with the BIOS
- */
+
+/* legacy structures and constants for <= 2.0 machines */
struct smbios_header {
uint16_t length;
uint8_t type;
@@ -46,6 +45,9 @@ struct smbios_table {
static uint8_t *smbios_entries;
[SeaBIOS] [QEMU v7 PATCH 6/7] PC: Add (empty) compat functions for machine version 2.0
This patch contains no functional changes.
Signed-off-by: Gabriel Somlo
---
hw/i386/pc_piix.c | 13 -
hw/i386/pc_q35.c | 13 -
2 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index cca310b..3d3f4b7 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -262,8 +262,13 @@ static void pc_init_pci(QEMUMachineInitArgs *args)
pc_init1(args, 1, 1);
}
+static void pc_compat_2_0(QEMUMachineInitArgs *args)
+{
+}
+
static void pc_compat_1_7(QEMUMachineInitArgs *args)
{
+pc_compat_2_0(args);
smbios_defaults = false;
gigabyte_align = false;
option_rom_has_mr = true;
@@ -303,6 +308,12 @@ static void pc_compat_1_2(QEMUMachineInitArgs *args)
x86_cpu_compat_disable_kvm_features(FEAT_KVM, KVM_FEATURE_PV_EOI);
}
+static void pc_init_pci_2_0(QEMUMachineInitArgs *args)
+{
+pc_compat_2_0(args);
+pc_init_pci(args);
+}
+
static void pc_init_pci_1_7(QEMUMachineInitArgs *args)
{
pc_compat_1_7(args);
@@ -391,7 +402,7 @@ static QEMUMachine pc_i440fx_machine_v2_0 = {
PC_I440FX_2_0_MACHINE_OPTIONS,
.name = "pc-i440fx-2.0",
.alias = "pc",
-.init = pc_init_pci,
+.init = pc_init_pci_2_0,
.is_default = 1,
};
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index b2b80c9..4e40196 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -240,8 +240,13 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
}
}
+static void pc_compat_2_0(QEMUMachineInitArgs *args)
+{
+}
+
static void pc_compat_1_7(QEMUMachineInitArgs *args)
{
+pc_compat_2_0(args);
smbios_defaults = false;
gigabyte_align = false;
option_rom_has_mr = true;
@@ -268,6 +273,12 @@ static void pc_compat_1_4(QEMUMachineInitArgs *args)
x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0,
CPUID_EXT_PCLMULQDQ);
}
+static void pc_q35_init_2_0(QEMUMachineInitArgs *args)
+{
+pc_compat_2_0(args);
+pc_q35_init(args);
+}
+
static void pc_q35_init_1_7(QEMUMachineInitArgs *args)
{
pc_compat_1_7(args);
@@ -305,7 +316,7 @@ static QEMUMachine pc_q35_machine_v2_0 = {
PC_Q35_2_0_MACHINE_OPTIONS,
.name = "pc-q35-2.0",
.alias = "q35",
-.init = pc_q35_init,
+.init = pc_q35_init_2_0,
};
#define PC_Q35_1_7_MACHINE_OPTIONS PC_Q35_MACHINE_OPTIONS
--
1.9.0
___
SeaBIOS mailing list
SeaBIOS@seabios.org
http://www.seabios.org/mailman/listinfo/seabios
[SeaBIOS] [QEMU v7 PATCH 4/7] SMBIOS: Use bitmaps to prevent incompatible comand line options
Replace existing smbios_check_collision() functionality with
a pair of bitmaps: have_binfile_bitmap and have_fields_bitmap.
Bits corresponding to each smbios type are set by smbios_entry_add(),
which also uses the bitmaps to ensure that binary blobs and field
values are never accepted for the same type.
These bitmaps will also be used in the future to decide whether
or not to build a full table for a given smbios type.
Signed-off-by: Gabriel Somlo
---
hw/i386/smbios.c | 50 +++-
include/hw/i386/smbios.h | 2 ++
2 files changed, 22 insertions(+), 30 deletions(-)
diff --git a/hw/i386/smbios.c b/hw/i386/smbios.c
index 9f83bfb..6bbfd15 100644
--- a/hw/i386/smbios.c
+++ b/hw/i386/smbios.c
@@ -51,11 +51,8 @@ static size_t smbios_entries_len;
static int smbios_type4_count = 0;
static bool smbios_immutable;
-static struct {
-bool seen;
-int headertype;
-Location loc;
-} first_opt[2];
+static DECLARE_BITMAP(have_binfile_bitmap, SMBIOS_MAX_TYPE+1);
+static DECLARE_BITMAP(have_fields_bitmap, SMBIOS_MAX_TYPE+1);
static struct {
const char *vendor, *version, *date;
@@ -166,29 +163,6 @@ static void smbios_validate_table(void)
}
}
-/*
- * To avoid unresolvable overlaps in data, don't allow both
- * tables and fields for the same smbios type.
- */
-static void smbios_check_collision(int type, int entry)
-{
-if (type < ARRAY_SIZE(first_opt)) {
-if (first_opt[type].seen) {
-if (first_opt[type].headertype != entry) {
-error_report("Can't mix file= and type= for same type");
-loc_push_restore(&first_opt[type].loc);
-error_report("This is the conflicting setting");
-loc_pop(&first_opt[type].loc);
-exit(1);
-}
-} else {
-first_opt[type].seen = true;
-first_opt[type].headertype = entry;
-loc_save(&first_opt[type].loc);
-}
-}
-}
-
/* legacy setup functions for <= 2.0 machines */
static void smbios_add_field(int type, int offset, const void *data, size_t
len)
@@ -337,7 +311,14 @@ void smbios_entry_add(QemuOpts *opts)
}
header = (struct smbios_structure_header *)(table->data);
-smbios_check_collision(header->type, SMBIOS_TABLE_ENTRY);
+
+if (test_bit(header->type, have_fields_bitmap)) {
+error_report("can't load type %d struct, fields already
specified!",
+ header->type);
+exit(1);
+}
+set_bit(header->type, have_binfile_bitmap);
+
if (header->type == 4) {
smbios_type4_count++;
}
@@ -352,7 +333,16 @@ void smbios_entry_add(QemuOpts *opts)
if (val) {
unsigned long type = strtoul(val, NULL, 0);
-smbios_check_collision(type, SMBIOS_FIELD_ENTRY);
+if (type > SMBIOS_MAX_TYPE) {
+error_report("out of range!");
+exit(1);
+}
+
+if (test_bit(type, have_binfile_bitmap)) {
+error_report("can't add fields, binary file already loaded!");
+exit(1);
+}
+set_bit(type, have_fields_bitmap);
switch (type) {
case 0:
diff --git a/include/hw/i386/smbios.h b/include/hw/i386/smbios.h
index 777e025..3a9361d 100644
--- a/include/hw/i386/smbios.h
+++ b/include/hw/i386/smbios.h
@@ -15,6 +15,8 @@
#include "qemu/option.h"
+#define SMBIOS_MAX_TYPE 127
+
void smbios_entry_add(QemuOpts *opts);
void smbios_set_defaults(const char *manufacturer, const char *product,
const char *version);
--
1.9.0
___
SeaBIOS mailing list
SeaBIOS@seabios.org
http://www.seabios.org/mailman/listinfo/seabios
[SeaBIOS] [QEMU v7 PATCH 2/7] SMBIOS: Update header file definitions
Add definitions for smbios entry point (anchor), and for type 2
(base board) structure which is required by some versions of OS X.
Remove definition for type 20 (memory device mapped address)
structure, which is no longer required as of smbios spec v2.5.
Update all other structure definitions to bring them into
compliance with smbios spec v2.8.
This patch contains no functional changes.
Signed-off-by: Gabriel Somlo
---
include/hw/i386/smbios.h | 88
1 file changed, 66 insertions(+), 22 deletions(-)
diff --git a/include/hw/i386/smbios.h b/include/hw/i386/smbios.h
index f808199..777e025 100644
--- a/include/hw/i386/smbios.h
+++ b/include/hw/i386/smbios.h
@@ -24,6 +24,26 @@ uint8_t *smbios_get_table_legacy(size_t *length);
* SMBIOS spec defined tables
*/
+/* SMBIOS entry point (anchor).
+ * BIOS must place this at a 16-bit-aligned address between 0xf and
0xf.
+ */
+struct smbios_entry_point {
+uint8_t anchor_string[4];
+uint8_t checksum;
+uint8_t length;
+uint8_t smbios_major_version;
+uint8_t smbios_minor_version;
+uint16_t max_structure_size;
+uint8_t entry_point_revision;
+uint8_t formatted_area[5];
+uint8_t intermediate_anchor_string[5];
+uint8_t intermediate_checksum;
+uint16_t structure_table_length;
+uint32_t structure_table_address;
+uint16_t number_of_structures;
+uint8_t smbios_bcd_revision;
+} QEMU_PACKED;
+
/* This goes at the beginning of every SMBIOS structure. */
struct smbios_structure_header {
uint8_t type;
@@ -60,7 +80,23 @@ struct smbios_type_1 {
uint8_t family_str;
} QEMU_PACKED;
-/* SMBIOS type 3 - System Enclosure (v2.3) */
+/* SMBIOS type 2 - Base Board */
+struct smbios_type_2 {
+struct smbios_structure_header header;
+uint8_t manufacturer_str;
+uint8_t product_str;
+uint8_t version_str;
+uint8_t serial_number_str;
+uint8_t asset_tag_number_str;
+uint8_t feature_flags;
+uint8_t location_str;
+uint16_t chassis_handle;
+uint8_t board_type;
+uint8_t contained_element_count;
+/* contained elements follow */
+} QEMU_PACKED;
+
+/* SMBIOS type 3 - System Enclosure (v2.7) */
struct smbios_type_3 {
struct smbios_structure_header header;
uint8_t manufacturer_str;
@@ -76,10 +112,11 @@ struct smbios_type_3 {
uint8_t height;
uint8_t number_of_power_cords;
uint8_t contained_element_count;
-// contained elements follow
+uint8_t sku_number_str;
+/* contained elements follow */
} QEMU_PACKED;
-/* SMBIOS type 4 - Processor Information (v2.0) */
+/* SMBIOS type 4 - Processor Information (v2.6) */
struct smbios_type_4 {
struct smbios_structure_header header;
uint8_t socket_designation_str;
@@ -97,11 +134,17 @@ struct smbios_type_4 {
uint16_t l1_cache_handle;
uint16_t l2_cache_handle;
uint16_t l3_cache_handle;
+uint8_t serial_number_str;
+uint8_t asset_tag_number_str;
+uint8_t part_number_str;
+uint8_t core_count;
+uint8_t core_enabled;
+uint8_t thread_count;
+uint16_t processor_characteristics;
+uint16_t processor_family2;
} QEMU_PACKED;
-/* SMBIOS type 16 - Physical Memory Array
- * Associated with one type 17 (Memory Device).
- */
+/* SMBIOS type 16 - Physical Memory Array (v2.7) */
struct smbios_type_16 {
struct smbios_structure_header header;
uint8_t location;
@@ -110,10 +153,10 @@ struct smbios_type_16 {
uint32_t maximum_capacity;
uint16_t memory_error_information_handle;
uint16_t number_of_memory_devices;
+uint64_t extended_maximum_capacity;
} QEMU_PACKED;
-/* SMBIOS type 17 - Memory Device
- * Associated with one type 19
- */
+
+/* SMBIOS type 17 - Memory Device (v2.8) */
struct smbios_type_17 {
struct smbios_structure_header header;
uint16_t physical_memory_array_handle;
@@ -127,27 +170,28 @@ struct smbios_type_17 {
uint8_t bank_locator_str;
uint8_t memory_type;
uint16_t type_detail;
+uint16_t speed;
+uint8_t manufacturer_str;
+uint8_t serial_number_str;
+uint8_t asset_tag_number_str;
+uint8_t part_number_str;
+uint8_t attributes;
+uint32_t extended_size;
+uint32_t configured_clock_speed;
+uint32_t minimum_voltage;
+uint32_t maximum_voltage;
+uint32_t configured_voltage;
} QEMU_PACKED;
-/* SMBIOS type 19 - Memory Array Mapped Address */
+/* SMBIOS type 19 - Memory Array Mapped Address (v2.7) */
struct smbios_type_19 {
struct smbios_structure_header header;
uint32_t starting_address;
uint32_t ending_address;
uint16_t memory_array_handle;
uint8_t partition_width;
-} QEMU_PACKED;
-
-/* SMBIOS type 20 - Memory Device Mapped Address */
-struct smbios_type_20 {
-struct smbios_structure_header header;
-uint32_t starting_address;
-uint32_t ending_address;
-uint16_t memory_device_handle;
-uint16_t memory_array_mapped_address_handle;
-uint8_t partition_row_position;
[SeaBIOS] [QEMU v7 PATCH 5/7] E820: Add interface for accessing e820 table
Add the following two functions:
- e820_get_num_entries() - query the size of the e820 table
- e820_get_entry() - grab an entry matching a given set of criteria
This interface is currently necessary for creating type 19
(memory array mapped address) structures in smbios.
Signed-off-by: Gabriel Somlo
---
hw/i386/pc.c | 15 +++
include/hw/i386/pc.h | 2 ++
2 files changed, 17 insertions(+)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index f95814b..7155269 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -612,6 +612,21 @@ int e820_add_entry(uint64_t address, uint64_t length,
uint32_t type)
return e820_entries;
}
+int e820_get_num_entries(void)
+{
+return e820_entries;
+}
+
+bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t
*length)
+{
+if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {
+*address = le64_to_cpu(e820_table[idx].address);
+*length = le64_to_cpu(e820_table[idx].length);
+return true;
+}
+return false;
+}
+
/* Calculates the limit to CPU APIC ID values
*
* This function returns the limit for the APIC ID value, so that all
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 9010246..9f26e14 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -239,6 +239,8 @@ uint16_t pvpanic_port(void);
#define E820_UNUSABLE 5
int e820_add_entry(uint64_t, uint64_t, uint32_t);
+int e820_get_num_entries(void);
+bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
#define PC_Q35_COMPAT_1_7 \
PC_COMPAT_1_7, \
--
1.9.0
___
SeaBIOS mailing list
SeaBIOS@seabios.org
http://www.seabios.org/mailman/listinfo/seabios
[SeaBIOS] [QEMU v7 PATCH 3/7] SMBIOS: Use macro to set smbios defaults
The function smbios_set_defaults() uses a repeating code pattern
for each field. This patch replaces that pattern with a macro.
This patch contains no functional changes.
Signed-off-by: Gabriel Somlo
---
hw/i386/smbios.c | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/hw/i386/smbios.c b/hw/i386/smbios.c
index e734d4c..9f83bfb 100644
--- a/hw/i386/smbios.c
+++ b/hw/i386/smbios.c
@@ -260,20 +260,6 @@ static void smbios_build_type_1_fields(void)
}
}
-void smbios_set_defaults(const char *manufacturer, const char *product,
- const char *version)
-{
-if (!type1.manufacturer) {
-type1.manufacturer = manufacturer;
-}
-if (!type1.product) {
-type1.product = product;
-}
-if (!type1.version) {
-type1.version = version;
-}
-}
-
uint8_t *smbios_get_table_legacy(size_t *length)
{
if (!smbios_immutable) {
@@ -288,6 +274,19 @@ uint8_t *smbios_get_table_legacy(size_t *length)
/* end: legacy setup functions for <= 2.0 machines */
+#define SMBIOS_SET_DEFAULT(field, value) \
+if (!field) { \
+field = value;\
+}
+
+void smbios_set_defaults(const char *manufacturer, const char *product,
+ const char *version)
+{
+SMBIOS_SET_DEFAULT(type1.manufacturer, manufacturer);
+SMBIOS_SET_DEFAULT(type1.product, product);
+SMBIOS_SET_DEFAULT(type1.version, version);
+}
+
static void save_opt(const char **dest, QemuOpts *opts, const char *name)
{
const char *val = qemu_opt_get(opts, name);
--
1.9.0
___
SeaBIOS mailing list
SeaBIOS@seabios.org
http://www.seabios.org/mailman/listinfo/seabios
[SeaBIOS] [QEMU v7 PATCH 0/7] SMBIOS: build full tables in QEMU
New in version 7 of the patch set: - patch set now down to only 7 patches; - machine versions 2.0 and older currently unaffected by this patch set, will continue using field overrides as before - patches 1..6 are very small and simple, and set the stage for patch #7 - patch 7 introduces the new aggregate-table functionality; it consists mostly of insertions, and should therefore be relatively easy to follow. - "-smbios file=" functionality happens before we know whether we're in legacy or new/aggregate-table mode, so we insert the file blob(s) into both the legacy and the aggregate tables, and keep the one we need once we know which one that is. For those interested, the code is also structured for easy subsequent removal of the legacy mode, if/when that becomes applicable ;) Thanks again for any feedback and comments (or for just applying the patch) ! Gabriel Gabriel L. Somlo (7): SMBIOS: Rename symbols to better reflect future use SMBIOS: Update header file definitions SMBIOS: Use macro to set smbios defaults SMBIOS: Use bitmaps to prevent incompatible comand line options E820: Add interface for accessing e820 table PC: Add (empty) compat functions for machine version 2.0 SMBIOS: Build aggregate smbios tables and entry point hw/i386/pc.c | 39 ++- hw/i386/pc_piix.c| 29 +- hw/i386/pc_q35.c | 25 +- hw/i386/smbios.c | 789 +++ include/hw/i386/pc.h | 2 + include/hw/i386/smbios.h | 99 -- 6 files changed, 879 insertions(+), 104 deletions(-) -- 1.9.0 ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
[SeaBIOS] ASL: Warning 3104 - Reserved method should not return a value ^ (_EJ0)
Dear SeaBIOS folks, building SeaBIOS from commit 0784d04cb6f6e5c893aaf368091f20326fb847fe Author: Marcel Apfelbaum Date: Thu Apr 10 21:55:22 2014 +0300 hw/pci: check if pci2pci bridges implement optional limit registers with IASL 20140325 (from Debian Sid/unstable) and the attached config, the following warning is shown. Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations Compiling IASL out/src/fw/ssdt-pcihp.hex out/src/fw/ssdt-pcihp.dsl.i 30: Return (PCEJ(_SUN)) Warning 3104 - Reserved method should not return a value ^ (_EJ0) Thanks, Paul # # Automatically generated file; DO NOT EDIT. # SeaBIOS Configuration # # # General Features # CONFIG_COREBOOT=y # CONFIG_QEMU is not set # CONFIG_CSM is not set # CONFIG_QEMU_HARDWARE is not set CONFIG_THREADS=y CONFIG_RELOCATE_INIT=y CONFIG_BOOTMENU=y CONFIG_BOOTSPLASH=y CONFIG_BOOTORDER=y CONFIG_COREBOOT_FLASH=y CONFIG_LZMA=y CONFIG_CBFS_LOCATION=0 CONFIG_FLASH_FLOPPY=y CONFIG_ENTRY_EXTRASTACK=y CONFIG_MALLOC_UPPERMEMORY=y CONFIG_ROM_SIZE=0 # # Hardware support # # CONFIG_ATA is not set CONFIG_AHCI=y # CONFIG_MEGASAS is not set # CONFIG_FLOPPY is not set CONFIG_PS2PORT=y CONFIG_USB=y CONFIG_USB_UHCI=y CONFIG_USB_OHCI=y CONFIG_USB_EHCI=y CONFIG_USB_XHCI=y CONFIG_USB_MSC=y # CONFIG_USB_UAS is not set CONFIG_USB_HUB=y CONFIG_USB_KEYBOARD=y CONFIG_SERIAL=y # CONFIG_LPT is not set CONFIG_PMTIMER=y # # BIOS interfaces # CONFIG_DRIVES=y CONFIG_CDROM_BOOT=y CONFIG_CDROM_EMU=y CONFIG_PCIBIOS=y CONFIG_APMBIOS=y CONFIG_PNPBIOS=y CONFIG_OPTIONROMS=y CONFIG_PMM=y CONFIG_BOOT=y CONFIG_KEYBOARD=y CONFIG_KBD_CALL_INT15_4F=y # CONFIG_MOUSE is not set CONFIG_S3_RESUME=y CONFIG_VGAHOOKS=y # CONFIG_DISABLE_A20 is not set # # VGA ROM # CONFIG_NO_VGABIOS=y # CONFIG_VGA_GEODEGX2 is not set # CONFIG_VGA_GEODELX is not set # CONFIG_VGA_COREBOOT is not set # CONFIG_BUILD_VGABIOS is not set CONFIG_VGA_EXTRA_STACK_SIZE=512 # # Debugging # CONFIG_DEBUG_LEVEL=8 # CONFIG_DEBUG_SERIAL is not set CONFIG_DEBUG_COREBOOT=y signature.asc Description: This is a digitally signed message part ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios
