[SeaBIOS] Re: [PATCH 3/3] kvm: add support for reading tsc frequency via cpuid.

2020-03-06 Thread Kevin O'Connor
On Fri, Mar 06, 2020 at 04:44:16PM +0100, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann 
> ---
>  src/fw/paravirt.c | 5 +
>  1 file changed, 5 insertions(+)
> 
> diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c
> index 4fcd8f570673..8b463af96c3e 100644
> --- a/src/fw/paravirt.c
> +++ b/src/fw/paravirt.c
> @@ -67,6 +67,11 @@ static void kvm_detect(void)
>  if (strcmp(signature, "KVMKVMKVM") == 0) {
>  dprintf(1, "Running on KVM\n");
>  PlatformRunningOn |= PF_KVM;
> +if (eax >= KVM_CPUID_SIGNATURE + 0x10) {
> +cpuid(KVM_CPUID_SIGNATURE + 0x10, &eax, &ebx, &ecx, &edx);
> +dprintf(1, "kvm: have invtsc, freq %u kHz\n", eax);
> +tsctimer_setfreq(eax);
> +}
>  }
>  }

That's odd that a khz value is being passed as eax.  Is this a recent
change?

-Kevin
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[SeaBIOS] Re: [PATCH 1/3] timer: factor out tsctimer_configure()

2020-03-06 Thread Kevin O'Connor
On Fri, Mar 06, 2020 at 04:44:14PM +0100, Gerd Hoffmann wrote:
> Factor out TimerKHz and ShiftTSC calculation to tsctimer_configure().
> 
> Signed-off-by: Gerd Hoffmann 
> ---
>  src/hw/timer.c | 21 +
>  1 file changed, 13 insertions(+), 8 deletions(-)
> 
> diff --git a/src/hw/timer.c b/src/hw/timer.c
> index bdcb3bfca211..ce3d63cd75f6 100644
> --- a/src/hw/timer.c
> +++ b/src/hw/timer.c
> @@ -58,6 +58,18 @@ u8 ShiftTSC VARFSEG;
>   * Internal timer setup
>   /
>  
> +static void
> +tsctimer_configure(u64 t)
> +{
> +while (t >= (1<<24)) {
> +ShiftTSC++;
> +t = (t + 1) >> 1;
> +}
> +TimerKHz = DIV_ROUND_UP((u32)t, 1000 * PMTIMER_TO_PIT);
> +TimerPort = 0;
> +dprintf(1, "CPU Mhz=%u\n", (TimerKHz << ShiftTSC) / 1000);
> +}
> +
>  #define CALIBRATE_COUNT 0x800   // Approx 1.7ms
>  
>  // Calibrate the CPU time-stamp-counter
> @@ -87,14 +99,7 @@ tsctimer_setup(void)
>  dprintf(6, "tsc calibrate start=%u end=%u diff=%u\n"
>  , (u32)start, (u32)end, (u32)diff);
>  u64 t = DIV_ROUND_UP(diff * PMTIMER_HZ, CALIBRATE_COUNT);
> -while (t >= (1<<24)) {
> -ShiftTSC++;
> -t = (t + 1) >> 1;
> -}
> -TimerKHz = DIV_ROUND_UP((u32)t, 1000 * PMTIMER_TO_PIT);
> -TimerPort = 0;
> -
> -dprintf(1, "CPU Mhz=%u\n", (TimerKHz << ShiftTSC) / 1000);
> +tsctimer_configure(t);
>  }

The PMTIMER_TO_PIT in DIV_ROUND_UP((u32)t, 1000 * PMTIMER_TO_PIT) is
directly tied to the measurement interval performed in
tsctimer_setup().  Specifically, the code calculates the number of tsc
ticks in n PIT intervals and then calculates
"tsc_hz=pit_hz*elapsed_tsc/n".  The complicated math is to avoid 64bit
divides.  I recommend against moving that low-level math to another
function, as I fear the relationship would then be harder to
understand.

-Kevin
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[SeaBIOS] Check if Wikipedia is correct and not outdated

2020-03-06 Thread Fred .Flintstone
Hi

Please check if Wikipedia is correct and not outdated.

The SeaBIOS article.
https://en.wikipedia.org/wiki/SeaBIOS

The BIOS comparison which includes SeaBIOS.
https://en.wikipedia.org/wiki/BIOS#Vendors_and_products

Thanks!
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[SeaBIOS] Re: [PATCH v2] std/tcg: Replace zero-length array with flexible-array member

2020-03-06 Thread Stefan Berger

On 3/6/20 8:33 AM, Kevin O'Connor wrote:

On Wed, Mar 04, 2020 at 02:51:27PM +0100, Paul Menzel wrote:

Date: Tue, 3 Mar 2020 16:24:46 +0100

GCC 10 gives the warnings below:

 In file included from out/ccode32flat.o.tmp.c:54:
 ./src/tcgbios.c: In function 'tpm20_write_EfiSpecIdEventStruct':
 ./src/tcgbios.c:290:30: warning: array subscript '() + 
4294967295' is outside the bounds of an interior zero-length array 'struct 
TCG_EfiSpecIdEventAlgorithmSize[0]' [-Wzero-length-bounds]
   290 | event.hdr.digestSizes[count].algorithmId = 
be16_to_cpu(sel->hashAlg);
   | ~^~~

Thanks.  It looks fine to me.  Stefan - do you have any comments on this?


Looks good to me, too.


   Stefan

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[SeaBIOS] Re: [PATCH] std/tcg: Replace zero-length array with flexible-array member

2020-03-06 Thread Stefan Berger

On 3/3/20 11:50 AM, Paul Menzel wrote:

Date: Tue, 3 Mar 2020 16:24:46 +0100

GCC 10 gives the warnings below:

 In file included from out/ccode32flat.o.tmp.c:54:
 ./src/tcgbios.c: In function 'tpm20_write_EfiSpecIdEventStruct':
 ./src/tcgbios.c:290:30: warning: array subscript '() + 
4294967295' is outside the bounds of an interior zero-length array 'struct 
TCG_EfiSpecIdEventAlgorithmSize[0]' [-Wzero-length-bounds]
   290 | event.hdr.digestSizes[count].algorithmId = 
be16_to_cpu(sel->hashAlg);
   | ~^~~
 In file included from ./src/tcgbios.c:22,
  from out/ccode32flat.o.tmp.c:54:
 ./src/std/tcg.h:527:7: note: while referencing 'digestSizes'
   527 | } digestSizes[0];
   |   ^~~
 In file included from out/ccode32flat.o.tmp.c:54:
 ./src/tcgbios.c:291:30: warning: array subscript '() + 
4294967295' is outside the bounds of an interior zero-length array 'struct 
TCG_EfiSpecIdEventAlgorithmSize[0]' [-Wzero-length-bounds]
   291 | event.hdr.digestSizes[count].digestSize = hsize;
   | ~^~~
 In file included from ./src/tcgbios.c:22,
  from out/ccode32flat.o.tmp.c:54:
 ./src/std/tcg.h:527:7: note: while referencing 'digestSizes'
   527 | } digestSizes[0];
   |   ^~~

[Description copied from Gustavo A. R. Silva 
from his Linux kernel commits.]

The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array
member [1], introduced in C99:

 struct foo {
 int stuff;
 struct boo array[];
 };

By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on.

Also, notice that, dynamic memory allocations won't be affected by
this change:

"Flexible array members have incomplete type, and so the sizeof operator
may not be applied. As a quirk of the original implementation of
zero-length arrays, sizeof evaluates to zero."[1]

This issue was found with the help of Coccinelle.

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html

Signed-off-by: Paul Menzel 


It gives the same size of structure either way.

Reviewed-by: Stefan Berger 



---
  src/std/tcg.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/std/tcg.h b/src/std/tcg.h
index 1cc1c92..1c9eeb4 100644
--- a/src/std/tcg.h
+++ b/src/std/tcg.h
@@ -524,7 +524,7 @@ struct TCG_EfiSpecIdEventStruct {
  struct TCG_EfiSpecIdEventAlgorithmSize {
  u16 algorithmId;
  u16 digestSize;
-} digestSizes[0];
+} digestSizes[];
  /*
  u8 vendorInfoSize;
  u8 vendorInfo[0];

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[SeaBIOS] Re: [PATCH 3/3] kvm: add support for reading tsc frequency via cpuid.

2020-03-06 Thread Philippe Mathieu-Daudé

On 3/6/20 4:44 PM, Gerd Hoffmann wrote:

Signed-off-by: Gerd Hoffmann 
---
  src/fw/paravirt.c | 5 +
  1 file changed, 5 insertions(+)

diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c
index 4fcd8f570673..8b463af96c3e 100644
--- a/src/fw/paravirt.c
+++ b/src/fw/paravirt.c
@@ -67,6 +67,11 @@ static void kvm_detect(void)
  if (strcmp(signature, "KVMKVMKVM") == 0) {
  dprintf(1, "Running on KVM\n");
  PlatformRunningOn |= PF_KVM;
+if (eax >= KVM_CPUID_SIGNATURE + 0x10) {
+cpuid(KVM_CPUID_SIGNATURE + 0x10, &eax, &ebx, &ecx, &edx);
+dprintf(1, "kvm: have invtsc, freq %u kHz\n", eax);


What is "invtsc"? "tsc" alone maybe?

Reviewed-by: Philippe Mathieu-Daudé 


+tsctimer_setfreq(eax);
+}
  }
  }
  


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[SeaBIOS] Re: [PATCH 1/3] timer: factor out tsctimer_configure()

2020-03-06 Thread Philippe Mathieu-Daudé

On 3/6/20 4:44 PM, Gerd Hoffmann wrote:

Factor out TimerKHz and ShiftTSC calculation to tsctimer_configure().

Signed-off-by: Gerd Hoffmann 
---
  src/hw/timer.c | 21 +
  1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/src/hw/timer.c b/src/hw/timer.c
index bdcb3bfca211..ce3d63cd75f6 100644
--- a/src/hw/timer.c
+++ b/src/hw/timer.c
@@ -58,6 +58,18 @@ u8 ShiftTSC VARFSEG;
   * Internal timer setup
   /
  
+static void

+tsctimer_configure(u64 t)
+{
+while (t >= (1<<24)) {
+ShiftTSC++;
+t = (t + 1) >> 1;
+}
+TimerKHz = DIV_ROUND_UP((u32)t, 1000 * PMTIMER_TO_PIT);
+TimerPort = 0;
+dprintf(1, "CPU Mhz=%u\n", (TimerKHz << ShiftTSC) / 1000);
+}
+
  #define CALIBRATE_COUNT 0x800   // Approx 1.7ms
  
  // Calibrate the CPU time-stamp-counter

@@ -87,14 +99,7 @@ tsctimer_setup(void)
  dprintf(6, "tsc calibrate start=%u end=%u diff=%u\n"
  , (u32)start, (u32)end, (u32)diff);
  u64 t = DIV_ROUND_UP(diff * PMTIMER_HZ, CALIBRATE_COUNT);
-while (t >= (1<<24)) {
-ShiftTSC++;
-t = (t + 1) >> 1;
-}
-TimerKHz = DIV_ROUND_UP((u32)t, 1000 * PMTIMER_TO_PIT);
-TimerPort = 0;
-
-dprintf(1, "CPU Mhz=%u\n", (TimerKHz << ShiftTSC) / 1000);
+tsctimer_configure(t);
  }
  
  // Setup internal timers.




Reviewed-by: Philippe Mathieu-Daudé 
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[SeaBIOS] [PATCH 3/3] kvm: add support for reading tsc frequency via cpuid.

2020-03-06 Thread Gerd Hoffmann
Signed-off-by: Gerd Hoffmann 
---
 src/fw/paravirt.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c
index 4fcd8f570673..8b463af96c3e 100644
--- a/src/fw/paravirt.c
+++ b/src/fw/paravirt.c
@@ -67,6 +67,11 @@ static void kvm_detect(void)
 if (strcmp(signature, "KVMKVMKVM") == 0) {
 dprintf(1, "Running on KVM\n");
 PlatformRunningOn |= PF_KVM;
+if (eax >= KVM_CPUID_SIGNATURE + 0x10) {
+cpuid(KVM_CPUID_SIGNATURE + 0x10, &eax, &ebx, &ecx, &edx);
+dprintf(1, "kvm: have invtsc, freq %u kHz\n", eax);
+tsctimer_setfreq(eax);
+}
 }
 }
 
-- 
2.18.2
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[SeaBIOS] [PATCH 2/3] timer: add tsctimer_setfreq()

2020-03-06 Thread Gerd Hoffmann
Add function to set tsc frequency directly, without calibration.
Also tweak timer setup functions a bit: skip setup in case TimerPort
has not the default value any more, i.e. another timer has been setup
already.

Signed-off-by: Gerd Hoffmann 
---
 src/util.h |  1 +
 src/hw/timer.c | 18 +-
 2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/src/util.h b/src/util.h
index d96db788d1b8..0a75a6e96c95 100644
--- a/src/util.h
+++ b/src/util.h
@@ -171,6 +171,7 @@ void sdcard_setup(void);
 // hw/timer.c
 void timer_setup(void);
 void pmtimer_setup(u16 ioport);
+void tsctimer_setfreq(u32 khz);
 u32 timer_calc(u32 msecs);
 u32 timer_calc_usec(u32 usecs);
 int timer_check(u32 end);
diff --git a/src/hw/timer.c b/src/hw/timer.c
index ce3d63cd75f6..a13f363b45a6 100644
--- a/src/hw/timer.c
+++ b/src/hw/timer.c
@@ -106,8 +106,10 @@ tsctimer_setup(void)
 void
 timer_setup(void)
 {
-if (!CONFIG_TSC_TIMER || (CONFIG_PMTIMER && TimerPort != 
PORT_PIT_COUNTER0))
+if (!CONFIG_TSC_TIMER)
 return;
+if (TimerPort != PORT_PIT_COUNTER0)
+return; // have timer already
 
 // Check if CPU has a timestamp counter
 u32 eax, ebx, ecx, edx, cpuid_features = 0;
@@ -118,11 +120,25 @@ timer_setup(void)
 tsctimer_setup();
 }
 
+void
+tsctimer_setfreq(u32 khz)
+{
+if (!CONFIG_TSC_TIMER)
+return;
+if (TimerPort != PORT_PIT_COUNTER0)
+return; // have timer already
+
+tsctimer_configure((u64)khz * PMTIMER_TO_PIT * 1000);
+}
+
 void
 pmtimer_setup(u16 ioport)
 {
 if (!CONFIG_PMTIMER)
 return;
+if (TimerPort != PORT_PIT_COUNTER0)
+return; // have timer already
+
 dprintf(1, "Using pmtimer, ioport 0x%x\n", ioport);
 TimerPort = ioport;
 TimerKHz = DIV_ROUND_UP(PMTIMER_HZ, 1000);
-- 
2.18.2
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[SeaBIOS] [PATCH 1/3] timer: factor out tsctimer_configure()

2020-03-06 Thread Gerd Hoffmann
Factor out TimerKHz and ShiftTSC calculation to tsctimer_configure().

Signed-off-by: Gerd Hoffmann 
---
 src/hw/timer.c | 21 +
 1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/src/hw/timer.c b/src/hw/timer.c
index bdcb3bfca211..ce3d63cd75f6 100644
--- a/src/hw/timer.c
+++ b/src/hw/timer.c
@@ -58,6 +58,18 @@ u8 ShiftTSC VARFSEG;
  * Internal timer setup
  /
 
+static void
+tsctimer_configure(u64 t)
+{
+while (t >= (1<<24)) {
+ShiftTSC++;
+t = (t + 1) >> 1;
+}
+TimerKHz = DIV_ROUND_UP((u32)t, 1000 * PMTIMER_TO_PIT);
+TimerPort = 0;
+dprintf(1, "CPU Mhz=%u\n", (TimerKHz << ShiftTSC) / 1000);
+}
+
 #define CALIBRATE_COUNT 0x800   // Approx 1.7ms
 
 // Calibrate the CPU time-stamp-counter
@@ -87,14 +99,7 @@ tsctimer_setup(void)
 dprintf(6, "tsc calibrate start=%u end=%u diff=%u\n"
 , (u32)start, (u32)end, (u32)diff);
 u64 t = DIV_ROUND_UP(diff * PMTIMER_HZ, CALIBRATE_COUNT);
-while (t >= (1<<24)) {
-ShiftTSC++;
-t = (t + 1) >> 1;
-}
-TimerKHz = DIV_ROUND_UP((u32)t, 1000 * PMTIMER_TO_PIT);
-TimerPort = 0;
-
-dprintf(1, "CPU Mhz=%u\n", (TimerKHz << ShiftTSC) / 1000);
+tsctimer_configure(t);
 }
 
 // Setup internal timers.
-- 
2.18.2
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[SeaBIOS] Re: [PATCH] sercon: vbe modeset is int 10h function 4f02 not 4f00

2020-03-06 Thread Ottavio Caruso
On 06/03/2020 09:03, Gerd Hoffmann wrote:
> Fixes console redirection for NetBSD primary bootloader.
>
> https://bugs.launchpad.net/bugs/1743191
> Signed-off-by: Gerd Hoffmann 
> ---
> src/sercon.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/sercon.c b/src/sercon.c
> index a5dadb7261af..66a1f2412e77 100644
> --- a/src/sercon.c
> +++ b/src/sercon.c
> @@ -464,7 +464,7 @@ static void sercon_104f(struct bregs *regs)
> regs->ax = 0x0100;
> } else {
> // Disable sercon entry point on any vesa modeset
> - if (regs->al == 0x00)
> + if (regs->al == 0x02)
> SET_LOW(sercon_enable, 0);
> }
> }
>

Unfortunately, this patch doesn't sort it for me. It also slightly
messes up with the console, see:

https://i.imgur.com/3ANAQC7.png

-- 
Ottavio Caruso
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[SeaBIOS] Re: [PATCH] sercon: vbe modeset is int 10h function 4f02 not 4f00

2020-03-06 Thread Kevin O'Connor
On Fri, Mar 06, 2020 at 10:03:21AM +0100, Gerd Hoffmann wrote:
> Fixes console redirection for NetBSD primary bootloader.
> 
> https://bugs.launchpad.net/bugs/1743191
> Signed-off-by: Gerd Hoffmann 
> ---
>  src/sercon.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/sercon.c b/src/sercon.c
> index a5dadb7261af..66a1f2412e77 100644
> --- a/src/sercon.c
> +++ b/src/sercon.c
> @@ -464,7 +464,7 @@ static void sercon_104f(struct bregs *regs)
>  regs->ax = 0x0100;
>  } else {
>  // Disable sercon entry point on any vesa modeset
> -if (regs->al == 0x00)
> +if (regs->al == 0x02)
>  SET_LOW(sercon_enable, 0);
>  }
>  }

Reviewed-by: Kevin O'Connor 

-Kevin
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[SeaBIOS] Re: [PATCH v2] std/tcg: Replace zero-length array with flexible-array member

2020-03-06 Thread Kevin O'Connor
On Wed, Mar 04, 2020 at 02:51:27PM +0100, Paul Menzel wrote:
> Date: Tue, 3 Mar 2020 16:24:46 +0100
> 
> GCC 10 gives the warnings below:
> 
> In file included from out/ccode32flat.o.tmp.c:54:
> ./src/tcgbios.c: In function 'tpm20_write_EfiSpecIdEventStruct':
> ./src/tcgbios.c:290:30: warning: array subscript '() + 
> 4294967295' is outside the bounds of an interior zero-length array 'struct 
> TCG_EfiSpecIdEventAlgorithmSize[0]' [-Wzero-length-bounds]
>   290 | event.hdr.digestSizes[count].algorithmId = 
> be16_to_cpu(sel->hashAlg);
>   | ~^~~

Thanks.  It looks fine to me.  Stefan - do you have any comments on this?

-Kevin



> In file included from ./src/tcgbios.c:22,
>  from out/ccode32flat.o.tmp.c:54:
> ./src/std/tcg.h:527:7: note: while referencing 'digestSizes'
>   527 | } digestSizes[0];
>   |   ^~~
> In file included from out/ccode32flat.o.tmp.c:54:
> ./src/tcgbios.c:291:30: warning: array subscript '() + 
> 4294967295' is outside the bounds of an interior zero-length array 'struct 
> TCG_EfiSpecIdEventAlgorithmSize[0]' [-Wzero-length-bounds]
>   291 | event.hdr.digestSizes[count].digestSize = hsize;
>   | ~^~~
> In file included from ./src/tcgbios.c:22,
>  from out/ccode32flat.o.tmp.c:54:
> ./src/std/tcg.h:527:7: note: while referencing 'digestSizes'
>   527 | } digestSizes[0];
>   |   ^~~
> 
> [Description copied from Gustavo A. R. Silva 
> from his Linux kernel commits.]
> 
> The current codebase makes use of the zero-length array language
> extension to the C90 standard, but the preferred mechanism to declare
> variable-length types such as these ones is a flexible array
> member [1][2], introduced in C99:
> 
> struct foo {
> int stuff;
> struct boo array[];
> };
> 
> By making use of the mechanism above, we will get a compiler warning
> in case the flexible array does not occur last in the structure, which
> will help us prevent some kind of undefined behavior bugs from being
> inadvertently introduced[3] to the codebase from now on.
> 
> Also, notice that, dynamic memory allocations won't be affected by
> this change:
> 
> "Flexible array members have incomplete type, and so the sizeof operator
> may not be applied. As a quirk of the original implementation of
> zero-length arrays, sizeof evaluates to zero."[1]
> 
> This issue was found with the help of Coccinelle.
> 
> [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
> [2] https://github.com/KSPP/linux/issues/21
> [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour")
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=76497732932f15e7323dc805e8ea8dc11bb587cf
> 
> Signed-off-by: Paul Menzel 
> Reviewed-by: Philippe Mathieu-Daudé 
> ---
> v2: Cite all references, add Reviewed-by line
> 
>  src/std/tcg.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/std/tcg.h b/src/std/tcg.h
> index 1cc1c92..1c9eeb4 100644
> --- a/src/std/tcg.h
> +++ b/src/std/tcg.h
> @@ -524,7 +524,7 @@ struct TCG_EfiSpecIdEventStruct {
>  struct TCG_EfiSpecIdEventAlgorithmSize {
>  u16 algorithmId;
>  u16 digestSize;
> -} digestSizes[0];
> +} digestSizes[];
>  /*
>  u8 vendorInfoSize;
>  u8 vendorInfo[0];
> -- 
> 2.25.0
> 



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[SeaBIOS] Re: [PATCH v3] hw/usb-hid: handle devices with illegal max packet size

2020-03-06 Thread Kevin O'Connor
On Sun, Dec 15, 2019 at 09:26:17PM -0600, Matt DeVillier wrote:
> On Sun, Dec 15, 2019 at 6:26 PM Kevin O'Connor  wrote:
> >
> > On Sat, Dec 14, 2019 at 11:26:17AM -0600, Matt DeVillier wrote:
> > > Some USB keyboards report 9 or 10-byte max packet sizes, instead
> > > of the 8-byte max specified by the USB HID spec. Handle this by
> > > increasing the size of the keyevent struct to 10 bytes, and using the key
> > > array size of the usbkeyinfo struct as loop bounds rather than that of the
> > > keyevent struct (since the former will always be smaller, and within 
> > > spec).
> > >
> > > Test: built/boot on Google Pixel Slate, observe keyboard functional
> >
> > Thanks.  I think it would be good if the relationship between the test
> > and the struct sizes was more clear.  What about the below (totally
> > untested)?
> >
> > -Kevin
> 
> your version produces a working keyboard on the Pixel Slate (when used
> in conjunction with my other patch),
> but unsure how to test the mouse TBH.

Thanks.  I committed this change.

-Kevin
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[SeaBIOS] Re: [PATCH 2/2] hw/usb-hid: Don't abort if setting key repeat rate fails

2020-03-06 Thread Kevin O'Connor
On Thu, Dec 12, 2019 at 09:51:19PM -0600, Matt DeVillier wrote:
> Since the USB stack doesn't handle stalled pipes,
> don't abort keyboard setup if the set_idle command fails,
> since it's a non-critical feature. Instead, log a warning.
> 
> Test: build/boot Google Pixel Slate, observe keyboard functional
> 
> Signed-off-by: Matt DeVillier 

Thanks.  I committed this change.

-Kevin
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[SeaBIOS] Re: [PATCH] sercon: vbe modeset is int 10h function 4f02 not 4f00

2020-03-06 Thread Paul Menzel
Dear Gerd,


Maybe in imperative mood:

> Correct VBE modeset to int 10h function 4f02 not 4f00

On 2020-03-06 10:03, Gerd Hoffmann wrote:
> Fixes console redirection for NetBSD primary bootloader.

Add how to reproduce this:

wget 
http://ftp.netbsd.org/pub/NetBSD/NetBSD-7.1.1/amd64/installation/cdrom/boot-com.iso
qemu-system-x86_64 -nographic -cdrom boot-com.iso

For backports add:

Fixes: d6728f30 ("add serial console support")

> https://bugs.launchpad.net/bugs/1743191
> Signed-off-by: Gerd Hoffmann 
> ---
>  src/sercon.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/sercon.c b/src/sercon.c
> index a5dadb7261af..66a1f2412e77 100644
> --- a/src/sercon.c
> +++ b/src/sercon.c
> @@ -464,7 +464,7 @@ static void sercon_104f(struct bregs *regs)
>  regs->ax = 0x0100;
>  } else {
>  // Disable sercon entry point on any vesa modeset
> -if (regs->al == 0x00)
> +if (regs->al == 0x02)
>  SET_LOW(sercon_enable, 0);
>  }
>  }

Reviewed-by: Paul Menzel 


Kind regards,

Paul



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[SeaBIOS] [PATCH] sercon: vbe modeset is int 10h function 4f02 not 4f00

2020-03-06 Thread Gerd Hoffmann
Fixes console redirection for NetBSD primary bootloader.

https://bugs.launchpad.net/bugs/1743191
Signed-off-by: Gerd Hoffmann 
---
 src/sercon.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sercon.c b/src/sercon.c
index a5dadb7261af..66a1f2412e77 100644
--- a/src/sercon.c
+++ b/src/sercon.c
@@ -464,7 +464,7 @@ static void sercon_104f(struct bregs *regs)
 regs->ax = 0x0100;
 } else {
 // Disable sercon entry point on any vesa modeset
-if (regs->al == 0x00)
+if (regs->al == 0x02)
 SET_LOW(sercon_enable, 0);
 }
 }
-- 
2.18.2
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