CVS commit: [matt-nb6-plus] src/sys/arch/arm/arm32

2013-02-14 Thread Matt Thomas 
Module Name:src
Committed By:   matt
Date:   Thu Feb 14 08:08:18 UTC 2013

Modified Files:
src/sys/arch/arm/arm32 [matt-nb6-plus]: bus_dma.c

Log Message:
Sync with HEAD


To generate a diff of this commit:
cvs rdiff -u -r1.54.10.3 -r1.54.10.4 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/bus_dma.c
diff -u src/sys/arch/arm/arm32/bus_dma.c:1.54.10.3 src/sys/arch/arm/arm32/bus_dma.c:1.54.10.4
--- src/sys/arch/arm/arm32/bus_dma.c:1.54.10.3	Thu Feb 14 01:12:53 2013
+++ src/sys/arch/arm/arm32/bus_dma.c	Thu Feb 14 08:08:18 2013
@@ -1,4 +1,4 @@
-/*	$NetBSD: bus_dma.c,v 1.54.10.3 2013/02/14 01:12:53 matt Exp $	*/
+/*	$NetBSD: bus_dma.c,v 1.54.10.4 2013/02/14 08:08:18 matt Exp $	*/
 
 /*-
  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -33,7 +33,7 @@
 #define _ARM32_BUS_DMA_PRIVATE
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: bus_dma.c,v 1.54.10.3 2013/02/14 01:12:53 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: bus_dma.c,v 1.54.10.4 2013/02/14 08:08:18 matt Exp $);
 
 #include sys/param.h
 #include sys/systm.h
@@ -55,6 +55,7 @@ __KERNEL_RCSID(0, $NetBSD: bus_dma.c,v 
 
 #include arm/cpufunc.h
 
+#ifdef BUSDMA_COUNTERS
 static struct evcnt bus_dma_creates =
 	EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, busdma, creates);
 static struct evcnt bus_dma_bounced_creates =
@@ -75,6 +76,22 @@ static struct evcnt bus_dma_bounced_dest
 	EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, busdma, bounced destroys);
 static struct evcnt bus_dma_destroys =
 	EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, busdma, destroys);
+static struct evcnt bus_dma_sync_prereadwrite = 
+	EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, busdma, sync prereadwrite);
+static struct evcnt bus_dma_sync_preread_begin =
+	EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, busdma, sync preread begin);
+static struct evcnt bus_dma_sync_preread =
+	EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, busdma, sync preread);
+static struct evcnt bus_dma_sync_preread_tail =
+	EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, busdma, sync preread tail);
+static struct evcnt bus_dma_sync_prewrite = 
+	EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, busdma, sync prewrite);
+static struct evcnt bus_dma_sync_postread = 
+	EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, busdma, sync postread);
+static struct evcnt bus_dma_sync_postreadwrite = 
+	EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, busdma, sync postreadwrite);
+static struct evcnt bus_dma_sync_postwrite = 
+	EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, busdma, sync postwrite);
 
 EVCNT_ATTACH_STATIC(bus_dma_creates);
 EVCNT_ATTACH_STATIC(bus_dma_bounced_creates);
@@ -86,8 +103,19 @@ EVCNT_ATTACH_STATIC(bus_dma_unloads);
 EVCNT_ATTACH_STATIC(bus_dma_bounced_unloads);
 EVCNT_ATTACH_STATIC(bus_dma_destroys);
 EVCNT_ATTACH_STATIC(bus_dma_bounced_destroys);
+EVCNT_ATTACH_STATIC(bus_dma_sync_prereadwrite);
+EVCNT_ATTACH_STATIC(bus_dma_sync_preread_begin);
+EVCNT_ATTACH_STATIC(bus_dma_sync_preread);
+EVCNT_ATTACH_STATIC(bus_dma_sync_preread_tail);
+EVCNT_ATTACH_STATIC(bus_dma_sync_prewrite);
+EVCNT_ATTACH_STATIC(bus_dma_sync_postread);
+EVCNT_ATTACH_STATIC(bus_dma_sync_postreadwrite);
+EVCNT_ATTACH_STATIC(bus_dma_sync_postwrite);
 
 #define	STAT_INCR(x)	(bus_dma_ ## x.ev_count++)
+#else
+#define	STAT_INCR(x)	/*(bus_dma_ ## x.ev_count++)*/
+#endif
 
 int	_bus_dmamap_load_buffer(bus_dma_tag_t, bus_dmamap_t, void *,
 	bus_size_t, struct vmspace *, int);
@@ -724,6 +752,7 @@ _bus_dmamap_sync_segment(vaddr_t va, pad
 	switch (ops) {
 	case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
 		if (!readonly_p) {
+			STAT_INCR(sync_prereadwrite);
 			cpu_dcache_wbinv_range(va, len);
 			cpu_sdcache_wbinv_range(va, pa, len);
 			break;
@@ -734,6 +763,7 @@ _bus_dmamap_sync_segment(vaddr_t va, pad
 		const size_t line_size = arm_dcache_align;
 		const size_t line_mask = arm_dcache_align_mask;
 		vsize_t misalignment = va  line_mask;
+		STAT_INCR(sync_preread);
 		if (misalignment) {
 			va -= misalignment;
 			pa -= misalignment;
@@ -762,6 +792,7 @@ _bus_dmamap_sync_segment(vaddr_t va, pad
 	}
 
 	case BUS_DMASYNC_PREWRITE:
+		STAT_INCR(sync_prewrite);
 		cpu_dcache_wb_range(va, len);
 		cpu_sdcache_wb_range(va, pa, len);
 		break;
@@ -774,7 +805,12 @@ _bus_dmamap_sync_segment(vaddr_t va, pad
 	 * have to worry about having to write back their contents.
 	 */
 	case BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE:
+		STAT_INCR(sync_postreadwrite);
+		cpu_dcache_inv_range(va, len);
+		cpu_sdcache_inv_range(va, pa, len);
+		break;
 	case BUS_DMASYNC_POSTREAD:
+		STAT_INCR(sync_postread);
 		cpu_dcache_inv_range(va, len);
 		cpu_sdcache_inv_range(va, pa, len);
 		break;
@@ -975,6 +1011,7 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm
 	const int post_ops = 0;
 #endif
 	if (!bouncing  pre_ops == 0  post_ops == BUS_DMASYNC_POSTWRITE) {
+		STAT_INCR(sync_postwrite);
 		return;
 	}
 	KASSERTMSG(bouncing || pre_ops != 0 || (post_ops

CVS commit: [matt-nb6-plus] src/sys/arch/arm/arm32

2013-02-14 Thread Matt Thomas 
Module Name:src
Committed By:   matt
Date:   Thu Feb 14 08:24:59 UTC 2013

Modified Files:
src/sys/arch/arm/arm32 [matt-nb6-plus]: bus_dma.c

Log Message:
Sync with HEAD.


To generate a diff of this commit:
cvs rdiff -u -r1.54.10.4 -r1.54.10.5 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/bus_dma.c
diff -u src/sys/arch/arm/arm32/bus_dma.c:1.54.10.4 src/sys/arch/arm/arm32/bus_dma.c:1.54.10.5
--- src/sys/arch/arm/arm32/bus_dma.c:1.54.10.4	Thu Feb 14 08:08:18 2013
+++ src/sys/arch/arm/arm32/bus_dma.c	Thu Feb 14 08:24:58 2013
@@ -1,4 +1,4 @@
-/*	$NetBSD: bus_dma.c,v 1.54.10.4 2013/02/14 08:08:18 matt Exp $	*/
+/*	$NetBSD: bus_dma.c,v 1.54.10.5 2013/02/14 08:24:58 matt Exp $	*/
 
 /*-
  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -33,7 +33,7 @@
 #define _ARM32_BUS_DMA_PRIVATE
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: bus_dma.c,v 1.54.10.4 2013/02/14 08:08:18 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: bus_dma.c,v 1.54.10.5 2013/02/14 08:24:58 matt Exp $);
 
 #include sys/param.h
 #include sys/systm.h
@@ -763,11 +763,11 @@ _bus_dmamap_sync_segment(vaddr_t va, pad
 		const size_t line_size = arm_dcache_align;
 		const size_t line_mask = arm_dcache_align_mask;
 		vsize_t misalignment = va  line_mask;
-		STAT_INCR(sync_preread);
 		if (misalignment) {
 			va -= misalignment;
 			pa -= misalignment;
 			len += misalignment;
+			STAT_INCR(sync_preread_begin);
 			cpu_dcache_wbinv_range(va, line_size);
 			cpu_sdcache_wbinv_range(va, pa, line_size);
 			if (len = line_size)
@@ -779,12 +779,14 @@ _bus_dmamap_sync_segment(vaddr_t va, pad
 		misalignment = len  line_mask;
 		len -= misalignment;
 		if (len  0) {
+			STAT_INCR(sync_preread);
 			cpu_dcache_inv_range(va, len);
 			cpu_sdcache_inv_range(va, pa, len);
 		}
 		if (misalignment) {
 			va += len;
 			pa += len;
+			STAT_INCR(sync_preread_tail);
 			cpu_dcache_wbinv_range(va, line_size);
 			cpu_sdcache_wbinv_range(va, pa, line_size);
 		}

CVS commit: [matt-nb6-plus] src/sys/arch/arm/arm32

2013-02-14 Thread Matt Thomas 
Module Name:src
Committed By:   matt
Date:   Fri Feb 15 01:02:59 UTC 2013

Modified Files:
src/sys/arch/arm/arm32 [matt-nb6-plus]: bus_dma.c

Log Message:
Actually use the calculated uboundary


To generate a diff of this commit:
cvs rdiff -u -r1.54.10.5 -r1.54.10.6 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/bus_dma.c
diff -u src/sys/arch/arm/arm32/bus_dma.c:1.54.10.5 src/sys/arch/arm/arm32/bus_dma.c:1.54.10.6
--- src/sys/arch/arm/arm32/bus_dma.c:1.54.10.5	Thu Feb 14 08:24:58 2013
+++ src/sys/arch/arm/arm32/bus_dma.c	Fri Feb 15 01:02:59 2013
@@ -1,4 +1,4 @@
-/*	$NetBSD: bus_dma.c,v 1.54.10.5 2013/02/14 08:24:58 matt Exp $	*/
+/*	$NetBSD: bus_dma.c,v 1.54.10.6 2013/02/15 01:02:59 matt Exp $	*/
 
 /*-
  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -33,7 +33,7 @@
 #define _ARM32_BUS_DMA_PRIVATE
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: bus_dma.c,v 1.54.10.5 2013/02/14 08:24:58 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: bus_dma.c,v 1.54.10.6 2013/02/15 01:02:59 matt Exp $);
 
 #include sys/param.h
 #include sys/systm.h
@@ -1562,7 +1562,7 @@ _bus_dmamem_alloc_range(bus_dma_tag_t t,
 	/*
 	 * Allocate pages from the VM system.
 	 */
-	error = uvm_pglistalloc(size, low, high, alignment, boundary,
+	error = uvm_pglistalloc(size, low, high, alignment, uboundary,
 	mlist, nsegs, (flags  BUS_DMA_NOWAIT) == 0);
 	if (error)
 		return (error);

CVS commit: [matt-nb6-plus] src/sys/arch/arm/arm32

2013-02-14 Thread Matt Thomas 
Module Name:src
Committed By:   matt
Date:   Thu Feb 14 08:24:59 UTC 2013

Modified Files:
src/sys/arch/arm/arm32 [matt-nb6-plus]: bus_dma.c

Log Message:
Sync with HEAD.


To generate a diff of this commit:
cvs rdiff -u -r1.54.10.4 -r1.54.10.5 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

CVS commit: [matt-nb6-plus] src/sys/arch/arm/arm32

2013-02-13 Thread Matt Thomas 
Module Name:src
Committed By:   matt
Date:   Wed Feb 13 23:52:03 UTC 2013

Modified Files:
src/sys/arch/arm/arm32 [matt-nb6-plus]: pmap.c

Log Message:
Sync with HEAD


To generate a diff of this commit:
cvs rdiff -u -r1.228.2.1.2.2 -r1.228.2.1.2.3 src/sys/arch/arm/arm32/pmap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/pmap.c
diff -u src/sys/arch/arm/arm32/pmap.c:1.228.2.1.2.2 src/sys/arch/arm/arm32/pmap.c:1.228.2.1.2.3
--- src/sys/arch/arm/arm32/pmap.c:1.228.2.1.2.2	Thu Feb  7 06:52:53 2013
+++ src/sys/arch/arm/arm32/pmap.c	Wed Feb 13 23:52:02 2013
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.c,v 1.228.2.1.2.2 2013/02/07 06:52:53 matt Exp $	*/
+/*	$NetBSD: pmap.c,v 1.228.2.1.2.3 2013/02/13 23:52:02 matt Exp $	*/
 
 /*
  * Copyright 2003 Wasabi Systems, Inc.
@@ -212,7 +212,7 @@
 #include arm/cpuconf.h
 #include arm/arm32/katelib.h
 
-__KERNEL_RCSID(0, $NetBSD: pmap.c,v 1.228.2.1.2.2 2013/02/07 06:52:53 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: pmap.c,v 1.228.2.1.2.3 2013/02/13 23:52:02 matt Exp $);
 
 #ifdef PMAP_DEBUG
 
@@ -605,14 +605,32 @@ struct pv_entry {
  * Macro to determine if a mapping might be resident in the
  * instruction cache and/or TLB
  */
+#if ARM_MMU_V7  0
+/*
+ * Speculative loads by Cortex cores can cause TLB entries to be filled even if
+ * there are no explicit accesses, so there may be always be TLB entries to
+ * flush.  If we used ASIDs then this would not be a problem.
+ */
+#define	PV_BEEN_EXECD(f)  (((f)  PVF_EXEC) == PVF_EXEC)
+#else
 #define	PV_BEEN_EXECD(f)  (((f)  (PVF_REF | PVF_EXEC)) == (PVF_REF | PVF_EXEC))
+#endif
 #define	PV_IS_EXEC_P(f)   (((f)  PVF_EXEC) != 0)
 
 /*
  * Macro to determine if a mapping might be resident in the
  * data cache and/or TLB
  */
+#if ARM_MMU_V7  0
+/*
+ * Speculative loads by Cortex cores can cause TLB entries to be filled even if
+ * there are no explicit accesses, so there may be always be TLB entries to
+ * flush.  If we used ASIDs then this would not be a problem.
+ */
+#define	PV_BEEN_REFD(f)   (1)
+#else
 #define	PV_BEEN_REFD(f)   (((f)  PVF_REF) != 0)
+#endif
 
 /*
  * Local prototypes
@@ -726,7 +744,16 @@ pmap_tlb_flushID(pmap_t pm)
 
 	if (pm-pm_cstate.cs_tlb_id) {
 		cpu_tlb_flushID();
+#if ARM_MMU_V7 == 0
+		/*
+		 * Speculative loads by Cortex cores can cause TLB entries to
+		 * be filled even if there are no explicit accesses, so there
+		 * may be always be TLB entries to flush.  If we used ASIDs
+		 * then it would not be a problem.
+		 * This is not true for other CPUs.
+		 */
 		pm-pm_cstate.cs_tlb = 0;
+#endif
 	}
 }
 
@@ -736,7 +763,16 @@ pmap_tlb_flushD(pmap_t pm)
 
 	if (pm-pm_cstate.cs_tlb_d) {
 		cpu_tlb_flushD();
+#if ARM_MMU_V7 == 0
+		/*
+		 * Speculative loads by Cortex cores can cause TLB entries to
+		 * be filled even if there are no explicit accesses, so there
+		 * may be always be TLB entries to flush.  If we used ASIDs
+		 * then it would not be a problem.
+		 * This is not true for other CPUs.
+		 */
 		pm-pm_cstate.cs_tlb_d = 0;
+#endif
 	}
 }

CVS commit: [matt-nb6-plus] src/sys/arch/arm/arm32

2013-02-13 Thread Matt Thomas 
Module Name:src
Committed By:   matt
Date:   Thu Feb 14 01:12:53 UTC 2013

Modified Files:
src/sys/arch/arm/arm32 [matt-nb6-plus]: bus_dma.c

Log Message:
sync with HEAD


To generate a diff of this commit:
cvs rdiff -u -r1.54.10.2 -r1.54.10.3 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/bus_dma.c
diff -u src/sys/arch/arm/arm32/bus_dma.c:1.54.10.2 src/sys/arch/arm/arm32/bus_dma.c:1.54.10.3
--- src/sys/arch/arm/arm32/bus_dma.c:1.54.10.2	Wed Jan 16 22:44:18 2013
+++ src/sys/arch/arm/arm32/bus_dma.c	Thu Feb 14 01:12:53 2013
@@ -1,4 +1,4 @@
-/*	$NetBSD: bus_dma.c,v 1.54.10.2 2013/01/16 22:44:18 matt Exp $	*/
+/*	$NetBSD: bus_dma.c,v 1.54.10.3 2013/02/14 01:12:53 matt Exp $	*/
 
 /*-
  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -33,7 +33,7 @@
 #define _ARM32_BUS_DMA_PRIVATE
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: bus_dma.c,v 1.54.10.2 2013/01/16 22:44:18 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: bus_dma.c,v 1.54.10.3 2013/02/14 01:12:53 matt Exp $);
 
 #include sys/param.h
 #include sys/systm.h
@@ -169,16 +169,17 @@ _bus_dmamap_load_paddr(bus_dma_tag_t t, 
 		 * If this region is coherent, mark the segment as coherent.
 		 */
 		_ds_flags |= dr-dr_flags  _BUS_DMAMAP_COHERENT;
-#if 0
-		printf(%p: %#lx: range %#lx/%#lx/%#lx/%#x: %#x\n,
-		t, paddr, dr-dr_sysbase, dr-dr_busbase,
-		dr-dr_len, dr-dr_flags, _ds_flags);
-#endif
+
 		/*
 		 * In a valid DMA range.  Translate the physical
 		 * memory address to an address in the DMA window.
 		 */
 		curaddr = (paddr - dr-dr_sysbase) + dr-dr_busbase;
+#if 0
+		printf(%p: %#lx: range %#lx/%#lx/%#lx/%#x: %#x -- %#lx\n,
+		t, paddr, dr-dr_sysbase, dr-dr_busbase,
+		dr-dr_len, dr-dr_flags, _ds_flags, curaddr);
+#endif
 	} else
 		curaddr = paddr;
 
@@ -450,7 +451,9 @@ _bus_dmamap_load(bus_dma_tag_t t, bus_dm
 	map-dm_mapsize = 0;
 	map-dm_nsegs = 0;
 	map-_dm_buftype = _BUS_DMA_BUFTYPE_INVALID;
-	KASSERT(map-dm_maxsegsz = map-_dm_maxmaxsegsz);
+	KASSERTMSG(map-dm_maxsegsz = map-_dm_maxmaxsegsz,
+	dm_maxsegsz %lu _dm_maxmaxsegsz %lu,
+	map-dm_maxsegsz, map-_dm_maxmaxsegsz);
 
 	if (buflen  map-_dm_size)
 		return (EINVAL);
@@ -517,7 +520,9 @@ _bus_dmamap_load_mbuf(bus_dma_tag_t t, b
 	map-dm_mapsize = 0;
 	map-dm_nsegs = 0;
 	map-_dm_buftype = _BUS_DMA_BUFTYPE_INVALID;
-	KASSERT(map-dm_maxsegsz = map-_dm_maxmaxsegsz);
+	KASSERTMSG(map-dm_maxsegsz = map-_dm_maxmaxsegsz,
+	dm_maxsegsz %lu _dm_maxmaxsegsz %lu,
+	map-dm_maxsegsz, map-_dm_maxmaxsegsz);
 
 #ifdef DIAGNOSTIC
 	if ((m0-m_flags  M_PKTHDR) == 0)
@@ -639,7 +644,9 @@ _bus_dmamap_load_uio(bus_dma_tag_t t, bu
 	 */
 	map-dm_mapsize = 0;
 	map-dm_nsegs = 0;
-	KASSERT(map-dm_maxsegsz = map-_dm_maxmaxsegsz);
+	KASSERTMSG(map-dm_maxsegsz = map-_dm_maxmaxsegsz,
+	dm_maxsegsz %lu _dm_maxmaxsegsz %lu,
+	map-dm_maxsegsz, map-_dm_maxmaxsegsz);
 
 	resid = uio-uio_resid;
 	iov = uio-uio_iov;
@@ -956,7 +963,7 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm
 	 *	POSTWRITE -- Nothing.
 	 */
 #ifdef _ARM32_NEED_BUS_DMA_BOUNCE
-	const bool bouncing = (map-_dm_flags  _BUS_DMA_IS_BOUNCING);
+	const bool bouncing = (map-_dm_flags  _BUS_DMAMAP_IS_BOUNCING);
 #else
 	const bool bouncing = false;
 #endif
@@ -970,7 +977,8 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm
 	if (!bouncing  pre_ops == 0  post_ops == BUS_DMASYNC_POSTWRITE) {
 		return;
 	}
-
+	KASSERTMSG(bouncing || pre_ops != 0 || (post_ops  BUS_DMASYNC_POSTREAD),
+	pre_ops %#x post_ops %#x, pre_ops, post_ops);
 #ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 	if (bouncing  (ops  BUS_DMASYNC_PREWRITE)) {
 		struct arm32_bus_dma_cookie * const cookie = map-_dm_cookie;
@@ -1010,7 +1018,8 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm
 	/* Skip cache frobbing if mapping was COHERENT. */
 	if (!bouncing  (map-_dm_flags  _BUS_DMAMAP_COHERENT)) {
 		/* Drain the write buffer. */
-		cpu_drain_writebuf();
+		if (pre_ops  BUS_DMASYNC_PREWRITE)
+			cpu_drain_writebuf();
 		return;
 	}
 
@@ -1132,7 +1141,8 @@ _bus_dmamem_alloc(bus_dma_tag_t t, bus_s
 	if ((dr = t-_ranges) != NULL) {
 		error = ENOMEM;
 		for (i = 0; i  t-_nranges; i++, dr++) {
-			if (dr-dr_len == 0)
+			if (dr-dr_len == 0
+			|| (dr-dr_flags  _BUS_DMAMAP_NOALLOC))
 continue;
 			error = _bus_dmamem_alloc_range(t, size, alignment,
 			boundary, segs, nsegs, rsegs, flags,
@@ -1213,34 +1223,32 @@ _bus_dmamem_map(bus_dma_tag_t t, bus_dma
 	 * avoid having a separate mapping for it.
 	 */
 	if (nsegs == 1) {
-		paddr_t paddr = segs[0].ds_addr;
 		/*
 		 * If this is a non-COHERENT mapping, then the existing kernel
 		 * mapping is already compatible with it.
 		 */
-		if ((flags  BUS_DMA_COHERENT) == 0) {
-#ifdef DEBUG_DMA
-			printf(dmamem_map: =%p\n, *kvap);
-#endif	/* DEBUG_DMA */
-			*kvap = (void *)PMAP_MAP_POOLPAGE(paddr);
-			return 0;
-		}
+		bool direct_mapable = (flags  BUS_DMA_COHERENT)

CVS commit: [matt-nb6-plus] src/sys/arch/arm/arm32

2013-02-13 Thread Matt Thomas 
Module Name:src
Committed By:   matt
Date:   Wed Feb 13 23:52:03 UTC 2013

Modified Files:
src/sys/arch/arm/arm32 [matt-nb6-plus]: pmap.c

Log Message:
Sync with HEAD


To generate a diff of this commit:
cvs rdiff -u -r1.228.2.1.2.2 -r1.228.2.1.2.3 src/sys/arch/arm/arm32/pmap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

CVS commit: [matt-nb6-plus] src/sys/arch/arm/arm32

2013-02-13 Thread Matt Thomas 
Module Name:src
Committed By:   matt
Date:   Thu Feb 14 01:12:53 UTC 2013

Modified Files:
src/sys/arch/arm/arm32 [matt-nb6-plus]: bus_dma.c

Log Message:
sync with HEAD


To generate a diff of this commit:
cvs rdiff -u -r1.54.10.2 -r1.54.10.3 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

CVS commit: [matt-nb6-plus] src/sys/arch/arm/arm32

2013-01-16 Thread Matt Thomas 
Module Name:src
Committed By:   matt
Date:   Wed Jan 16 22:44:18 UTC 2013

Modified Files:
src/sys/arch/arm/arm32 [matt-nb6-plus]: bus_dma.c

Log Message:
Pullup from HEAD:
On Cortex, speculative loads can cache lines to be populated after then they've
been invalidated for a DMA read.  So after the DMA read we have to reinvalidate
them again.  We have to both invalidates since the former prevents dirty lines
overwriting just DMAed data.


To generate a diff of this commit:
cvs rdiff -u -r1.54.10.1 -r1.54.10.2 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/bus_dma.c
diff -u src/sys/arch/arm/arm32/bus_dma.c:1.54.10.1 src/sys/arch/arm/arm32/bus_dma.c:1.54.10.2
--- src/sys/arch/arm/arm32/bus_dma.c:1.54.10.1	Wed Nov 28 22:40:17 2012
+++ src/sys/arch/arm/arm32/bus_dma.c	Wed Jan 16 22:44:18 2013
@@ -1,4 +1,4 @@
-/*	$NetBSD: bus_dma.c,v 1.54.10.1 2012/11/28 22:40:17 matt Exp $	*/
+/*	$NetBSD: bus_dma.c,v 1.54.10.2 2013/01/16 22:44:18 matt Exp $	*/
 
 /*-
  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -33,7 +33,7 @@
 #define _ARM32_BUS_DMA_PRIVATE
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: bus_dma.c,v 1.54.10.1 2012/11/28 22:40:17 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: bus_dma.c,v 1.54.10.2 2013/01/16 22:44:18 matt Exp $);
 
 #include sys/param.h
 #include sys/systm.h
@@ -758,6 +758,20 @@ _bus_dmamap_sync_segment(vaddr_t va, pad
 		cpu_dcache_wb_range(va, len);
 		cpu_sdcache_wb_range(va, pa, len);
 		break;
+
+#ifdef CPU_CORTEX
+	/*
+	 * Cortex CPUs can do speculative loads so we need to clean the cache
+	 * after a DMA read to deal with any speculatively loaded cache lines.
+	 * Since these can't be dirty, we can just invalidate them and don't
+	 * have to worry about having to write back their contents.
+	 */
+	case BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE:
+	case BUS_DMASYNC_POSTREAD:
+		cpu_dcache_inv_range(va, len);
+		cpu_sdcache_inv_range(va, pa, len);
+		break;
+#endif
 	}
 }
 
@@ -786,7 +800,7 @@ _bus_dmamap_sync_linear(bus_dma_tag_t t,
 
 		if ((ds-_ds_flags  _BUS_DMAMAP_COHERENT) == 0)
 			_bus_dmamap_sync_segment(va + offset, pa, seglen, ops,
-			 false);
+			false);
 
 		offset += seglen;
 		len -= seglen;
@@ -935,7 +949,9 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm
 	 *	we are doing a PREREAD|PREWRITE, we can collapse
 	 *	the whole thing into a single Wb-Inv.
 	 *
-	 *	POSTREAD -- Nothing.
+	 *	POSTREAD -- Re-invalidate the D-cache in case speculative
+	 *	memory accesses caused cachelines to become valid with now
+	 *	invalid data.
 	 *
 	 *	POSTWRITE -- Nothing.
 	 */
@@ -946,7 +962,12 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm
 #endif
 
 	const int pre_ops = ops  (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-	if (!bouncing  pre_ops == 0) {
+#ifdef CPU_CORTEX
+	const int post_ops = ops  (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
+#else
+	const int post_ops = 0;
+#endif
+	if (!bouncing  pre_ops == 0  post_ops == BUS_DMASYNC_POSTWRITE) {
 		return;
 	}

CVS commit: [matt-nb6-plus] src/sys/arch/arm/arm32

2013-01-16 Thread Matt Thomas 
Module Name:src
Committed By:   matt
Date:   Wed Jan 16 22:44:18 UTC 2013

Modified Files:
src/sys/arch/arm/arm32 [matt-nb6-plus]: bus_dma.c

Log Message:
Pullup from HEAD:
On Cortex, speculative loads can cache lines to be populated after then they've
been invalidated for a DMA read.  So after the DMA read we have to reinvalidate
them again.  We have to both invalidates since the former prevents dirty lines
overwriting just DMAed data.


To generate a diff of this commit:
cvs rdiff -u -r1.54.10.1 -r1.54.10.2 src/sys/arch/arm/arm32/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.