Re: CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Matt Thomas wrote: Module Name: src Committed By: matt Date: Tue May 11 21:51:34 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: locore.h Log Message: Need to turn KX for N32 kernels with mips3_lw_a64 and mips3_sw_a64 +#elif defined(__mips_n32) + uint32_t sr = mips_cp0_status_read(); + mips_cp0_status_write((sr ~MIPS_SR_INT_IE) | MIPS3_SR_KX); + rv = *(const uint32_t *)addr; Erm, doesn't that cast toss away the high 32-bits of the address you're try to load/store from/to? Cheers, Simon.
Re: CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Matt Thomas wrote: Module Name: src Committed By: matt Date: Tue May 11 22:08:02 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: locore.h Log Message: Use assembly since deref a 64bit value as a pointer does not make a 32bit compiler happy. Dang, ignore my previous because this code is a little different. + __asm volatile(lw %0, 0(%1) : =r(rv) : d(addr)); d is listed as General-purpose integer register in the gcc docs. Does the new code pass the full 64-bits of addr in when compiled on an ABI where an int is 32-bits even though a full register is 64-bits? Cheers, Simon.
Re: CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
On May 12, 2010, at 5:19 AM, Simon Burge wrote: Matt Thomas wrote: Module Name: src Committed By:matt Date:Tue May 11 22:08:02 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: locore.h Log Message: Use assembly since deref a 64bit value as a pointer does not make a 32bit compiler happy. Dang, ignore my previous because this code is a little different. + __asm volatile(lw %0, 0(%1) : =r(rv) : d(addr)); d is listed as General-purpose integer register in the gcc docs. Does the new code pass the full 64-bits of addr in when compiled on an ABI where an int is 32-bits even though a full register is 64-bits? Yes.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sun Feb 28 03:26:25 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: intr.h Log Message: Now that we use stubs for the spl* calls, we no longer need to export struct splsw or struct ipl_sr_map to the world. So we protect those with __INTR_PRIVATE. To generate a diff of this commit: cvs rdiff -u -r1.3.96.5 -r1.3.96.6 src/sys/arch/mips/include/intr.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Sun Feb 28 03:26:25 UTC 2010
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: intr.h
Log Message:
Now that we use stubs for the spl* calls, we no longer need to export
struct splsw or struct ipl_sr_map to the world. So we protect those with
__INTR_PRIVATE.
To generate a diff of this commit:
cvs rdiff -u -r1.3.96.5 -r1.3.96.6 src/sys/arch/mips/include/intr.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/intr.h
diff -u src/sys/arch/mips/include/intr.h:1.3.96.5 src/sys/arch/mips/include/intr.h:1.3.96.6
--- src/sys/arch/mips/include/intr.h:1.3.96.5 Tue Feb 23 20:24:36 2010
+++ src/sys/arch/mips/include/intr.h Sun Feb 28 03:26:25 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.h,v 1.3.96.5 2010/02/23 20:24:36 matt Exp $ */
+/* $NetBSD: intr.h,v 1.3.96.6 2010/02/28 03:26:25 matt Exp $ */
/*-
* Copyright (c) 2009, 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -61,6 +61,7 @@
#define IPI_ISYNC __BIT(4) /* sync icache for pages */
#define IPI_KPREEMPT __BIT(5) /* schedule a kernel preemption */
+#ifdef __INTR_PRIVATE
struct splsw {
int (*splsw_splhigh)(void);
int (*splsw_splsched)(void);
@@ -74,108 +75,52 @@
void (*splsw_splx)(int);
int (*splsw_splhigh_noprof)(void);
void (*splsw_splx_noprof)(int);
- void (*splsw_setsoftintr)(uint32_t);
- void (*splsw_clrsoftintr)(uint32_t);
+ void (*splsw__setsoftintr)(uint32_t);
+ void (*splsw__clrsoftintr)(uint32_t);
int (*splsw_splintr)(uint32_t *);
void (*splsw_splcheck)(void);
};
+struct ipl_sr_map {
+ uint32_t sr_bits[_IPL_N];
+};
+#endif /* __INTR_PRIVATE */
+
typedef int ipl_t;
typedef struct {
ipl_t _spl;
} ipl_cookie_t;
-struct ipl_sr_map {
- uint32_t sr_bits[_IPL_N];
-};
-
#ifdef _KERNEL
#ifdef MULTIPROCESSOR
#define __HAVE_PREEMPTION
#define SOFTINT_KPREEMPT (SOFTINT_COUNT+0)
#endif
+#ifdef __INTR_PRIVATE
extern struct splsw mips_splsw;
extern struct ipl_sr_map ipl_sr_map;
+#endif /* __INTR_PRIVATE */
-static inline int
-splhigh(void)
-{
- return (*mips_splsw.splsw_splhigh)();
-}
-
-static inline int
-splhigh_noprof(void)
-{
- return (*mips_splsw.splsw_splhigh_noprof)();
-}
-
-static inline int
-splsched(void)
-{
- return (*mips_splsw.splsw_splsched)();
-}
-
-static inline int
-splvm(void)
-{
- return (*mips_splsw.splsw_splvm)();
-}
-
-static inline int
-splsoftserial(void)
-{
- return (*mips_splsw.splsw_splsoftserial)();
-}
-
-static inline int
-splsoftnet(void)
-{
- return (*mips_splsw.splsw_splsoftnet)();
-}
-
-static inline int
-splsoftbio(void)
-{
- return (*mips_splsw.splsw_splsoftbio)();
-}
-
-static inline int
-splsoftclock(void)
-{
- return (*mips_splsw.splsw_splsoftclock)();
-}
-
-static inline void
-spl0(void)
-{
- (*mips_splsw.splsw_spl0)();
-}
-
-static inline void
-splx(int s)
-{
- (*mips_splsw.splsw_splx)(s);
-}
-
-static inline void
-splx_noprof(int s)
-{
- (*mips_splsw.splsw_splx_noprof)(s);
-}
-
-static inline void
-_setsoftintr(uint32_t m)
-{
- (*mips_splsw.splsw_setsoftintr)(m);
-}
-
-static inline void
-_clrsoftintr(uint32_t m)
-{
- (*mips_splsw.splsw_clrsoftintr)(m);
-}
+int splhigh(void);
+int splhigh_noprof(void);
+int splsched(void);
+int splvm(void);
+int splsoftserial(void);
+int splsoftnet(void);
+int splsoftbio(void);
+int splsoftclock(void);
+int splraise(int);
+void splx(int);
+void splx_noprof(int);
+void spl0(void);
+int splintr(uint32_t *);
+void _setsoftintr(uint32_t);
+void _clrsoftintr(uint32_t);
+/*
+ * These make no sense *NOT* to be inlined.
+ */
static inline ipl_cookie_t
makeiplcookie(ipl_t s)
{
@@ -183,22 +128,10 @@
}
static inline int
-splraise(int s)
-{
-return (*mips_splsw.splsw_splraise)(s);
-}
-
-static inline int
splraiseipl(ipl_cookie_t icookie)
{
return splraise(icookie._spl);
}
-static inline int
-splintr(uint32_t *p)
-{
- return (*mips_splsw.splsw_splintr)(p);
-}
-
#endif /* _KERNEL */
#endif /* _MIPS_INTR_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sat Feb 27 07:52:25 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h Log Message: Add the RMI COP0 OSSCRATCH register To generate a diff of this commit: cvs rdiff -u -r1.74.28.14 -r1.74.28.15 src/sys/arch/mips/include/cpuregs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Thu Feb 25 05:24:53 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h Log Message: Remove ci_curpm since it isn't used. To generate a diff of this commit: cvs rdiff -u -r1.90.16.21 -r1.90.16.22 src/sys/arch/mips/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Mon Feb 22 20:14:07 UTC 2010
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpu_counter.h
Log Message:
Don't include mips/locore.h. Rely on the weak alias in locore_mips3.S
To generate a diff of this commit:
cvs rdiff -u -r1.3.90.1 -r1.3.90.2 src/sys/arch/mips/include/cpu_counter.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpu_counter.h
diff -u src/sys/arch/mips/include/cpu_counter.h:1.3.90.1 src/sys/arch/mips/include/cpu_counter.h:1.3.90.2
--- src/sys/arch/mips/include/cpu_counter.h:1.3.90.1 Wed Jan 20 06:58:35 2010
+++ src/sys/arch/mips/include/cpu_counter.h Mon Feb 22 20:14:07 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_counter.h,v 1.3.90.1 2010/01/20 06:58:35 matt Exp $ */
+/* $NetBSD: cpu_counter.h,v 1.3.90.2 2010/02/22 20:14:07 matt Exp $ */
/*
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
@@ -33,7 +33,6 @@
*/
#include machine/cpu.h
-#include mips/locore.h
#ifdef _KERNEL
@@ -51,12 +50,7 @@
#define cpu_counter() cpu_counter32()
-static __inline uint32_t
-cpu_counter32(void)
-{
-
- return mips3_cp0_count_read();
-}
+uint32_t cpu_counter32(void); /* weak alias of mips3_cp0_count_read */
static __inline uint64_t
cpu_frequency(struct cpu_info *ci)
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Mon Feb 15 03:11:58 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: lock.h Log Message: In SIMPLELOCK_LOCKED_P check against != UNLOCKED instead of == LOCKED. This is so the compiler can emit a bnez instead of loading 1 into a register and then doing beq. To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.16.16.1 src/sys/arch/mips/include/lock.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Mon Feb 15 03:12:17 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: asm.h Log Message: Fix a comment. To generate a diff of this commit: cvs rdiff -u -r1.40.38.11 -r1.40.38.12 src/sys/arch/mips/include/asm.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Tue Jan 26 21:09:54 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: elf_machdep.h Log Message: If ELFSIZE == 64, define ELF64_MACHDEP_ID_CASES regardless of _LP64 To generate a diff of this commit: cvs rdiff -u -r1.10.96.7 -r1.10.96.8 src/sys/arch/mips/include/elf_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Re: CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
On Aug 21, 2009, at 10:29 AM, Matt Thomas wrote:
Module Name:src
Committed By: matt
Date: Fri Aug 21 17:29:42 UTC 2009
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: types.h
Log Message:
Adapt to ABI variations. Make sure mips_reg_t == register_t.
Add PRIx{{P,V}{ADDR,SIZE}} and PRIxREGISTER{,32} macros to assist
printing out above types.
What's the point of having both? Why not just register_t and be done
with it
To generate a diff of this commit:
cvs rdiff -u -r1.43.36.1 -r1.43.36.2 src/sys/arch/mips/include/types.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
-- thorpej
Re: CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
On Aug 22, 2009, at 4:30 PM, Matt Thomas wrote:
On Aug 22, 2009, at 4:25 PM, Jason Thorpe wrote:
On Aug 21, 2009, at 10:29 AM, Matt Thomas wrote:
Module Name:src
Committed By: matt
Date: Fri Aug 21 17:29:42 UTC 2009
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: types.h
Log Message:
Adapt to ABI variations. Make sure mips_reg_t == register_t.
Add PRIx{{P,V}{ADDR,SIZE}} and PRIxREGISTER{,32} macros to assist
printing out above types.
What's the point of having both? Why not just register_t and be
done with it
Mostly to avoid casting. If it's X, use PRIxX and don't worry.
No, what's the point of having mips_reg_t ???
-- thorpej
