CVS commit: src/sys/arch/evbmips/mipssim

2022-12-28 Thread Havard Eidnes
Module Name:src
Committed By:   he
Date:   Wed Dec 28 11:50:25 UTC 2022

Modified Files:
src/sys/arch/evbmips/mipssim: machdep.c mipssimreg.h

Log Message:
evbmips/mipssim: on mips64, probe for additional memory.

Probe for memory from above the ISA I/O hole and up to 16GB,
which acording to simonb@ is a somewhat arbitrary limit.

This makes it possible to specify e.g. "-m 2g" to qemu, and have
that memory be probed instead of being clamped to 508MB.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/evbmips/mipssim/machdep.c \
src/sys/arch/evbmips/mipssim/mipssimreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/evbmips/mipssim/machdep.c
diff -u src/sys/arch/evbmips/mipssim/machdep.c:1.3 src/sys/arch/evbmips/mipssim/machdep.c:1.4
--- src/sys/arch/evbmips/mipssim/machdep.c:1.3	Tue Nov 16 06:44:40 2021
+++ src/sys/arch/evbmips/mipssim/machdep.c	Wed Dec 28 11:50:25 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.3 2021/11/16 06:44:40 simonb Exp $ */
+/* $NetBSD: machdep.c,v 1.4 2022/12/28 11:50:25 he Exp $ */
 
 /*-
  * Copyright (c) 2001,2021 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.3 2021/11/16 06:44:40 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.4 2022/12/28 11:50:25 he Exp $");
 
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
@@ -229,6 +229,9 @@ mach_init_memory(void)
 	size_t addr;
 	uint32_t *memptr;
 	extern char end[];	/* XXX */
+#ifdef MIPS64
+	size_t highaddr;
+#endif
 
 	l->l_addr = &dummypcb;
 	memsize = roundup2(MIPS_KSEG0_TO_PHYS((uintptr_t)(end)), 1024 * 1024);
@@ -246,13 +249,43 @@ mach_init_memory(void)
 	}
 	l->l_addr = NULL;
 
-	printf("Memory size: 0x%" PRIxPSIZE " (%" PRIdPSIZE " MB)\n",
-	memsize, memsize / 1024 / 1024);
 	physmem = btoc(memsize);
 
 	mem_clusters[0].start = PAGE_SIZE;
 	mem_clusters[0].size = memsize - PAGE_SIZE;
 	mem_cluster_cnt = 1;
+
+#ifdef _LP64
+	/* probe for more memory above ISA I/O "hole" */
+	l->l_addr = &dummypcb;
+
+	for (highaddr = addr = MIPSSIM_MORE_MEM_BASE;
+	addr < MIPSSIM_MORE_MEM_END;
+	addr += 1024 * 1024) {
+		memptr = (void *)MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE,
+		addr - sizeof(*memptr));
+		if (badaddr(memptr, sizeof(uint32_t)) < 0)
+			break;
+
+		highaddr = addr;
+#ifdef MEM_DEBUG
+		printf("probed %zd MB\n", (addr - MIPSSIM_MORE_MEM_BASE)
+	/ 1024 * 1024);
+#endif
+	}
+	l->l_addr = NULL;
+
+	if (highaddr != MIPSSIM_MORE_MEM_BASE) {
+		mem_clusters[1].start = MIPSSIM_MORE_MEM_BASE;
+		mem_clusters[1].size = highaddr - MIPSSIM_MORE_MEM_BASE;
+		mem_cluster_cnt++;
+		physmem += btoc(mem_clusters[1].size);
+		memsize += mem_clusters[1].size;
+	}
+#endif /* _LP64 */
+
+	printf("Memory size: 0x%" PRIxPSIZE " (%" PRIdPSIZE " MB)\n",
+	memsize, memsize / 1024 / 1024);
 }
 
 void
Index: src/sys/arch/evbmips/mipssim/mipssimreg.h
diff -u src/sys/arch/evbmips/mipssim/mipssimreg.h:1.3 src/sys/arch/evbmips/mipssim/mipssimreg.h:1.4
--- src/sys/arch/evbmips/mipssim/mipssimreg.h:1.3	Tue Feb 16 15:06:30 2021
+++ src/sys/arch/evbmips/mipssim/mipssimreg.h	Wed Dec 28 11:50:25 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: mipssimreg.h,v 1.3 2021/02/16 15:06:30 simonb Exp $ */
+/* $NetBSD: mipssimreg.h,v 1.4 2022/12/28 11:50:25 he Exp $ */
 
 /*-
  * Copyright (c) 2021 The NetBSD Foundation, Inc.
@@ -37,6 +37,11 @@
  *	1fd0.	 64kB	ISA IO space
  *	1fd1.	 64kB	'ISA' VirtIO IO space (non standard)
  *
+ *	Additionally, mips64 probes for memory up to 16G:
+ *
+ *	  2000.	memory, probed, up to
+ *	4..	16GB somewhat arbitrarily, could probably be higher
+ *
  *	CPU interrupts
  *
  *	 0	mipsnet
@@ -56,5 +61,8 @@
 #define MIPSSIM_DMA_PHYSBASE	0x
 #define MIPSSIM_DMA_SIZE	(MIPSSIM_ISA_IO_BASE - MIPSSIM_DMA_BASE)
 
+#define MIPSSIM_MORE_MEM_BASE	0x2000
+#define MIPSSIM_MORE_MEM_END	(16ULL * 1024 * 1024 * 1024) /* 16GB */
+
 #define VIRTIO_NUM_TRANSPORTS	32
 #define VIRTIO_STRIDE		512



CVS commit: src/sys/arch/evbmips/mipssim

2022-12-28 Thread Havard Eidnes
Module Name:src
Committed By:   he
Date:   Wed Dec 28 11:50:25 UTC 2022

Modified Files:
src/sys/arch/evbmips/mipssim: machdep.c mipssimreg.h

Log Message:
evbmips/mipssim: on mips64, probe for additional memory.

Probe for memory from above the ISA I/O hole and up to 16GB,
which acording to simonb@ is a somewhat arbitrary limit.

This makes it possible to specify e.g. "-m 2g" to qemu, and have
that memory be probed instead of being clamped to 508MB.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/evbmips/mipssim/machdep.c \
src/sys/arch/evbmips/mipssim/mipssimreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/evbmips/mipssim

2022-12-28 Thread Havard Eidnes
Module Name:src
Committed By:   he
Date:   Wed Dec 28 11:40:35 UTC 2022

Modified Files:
src/sys/arch/evbmips/mipssim: mipssim_dma.c

Log Message:
mipssim_dma.c: set _bounce_thresh so that bounce buffering works.

Suggested by jmcneill@, thanks!


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/evbmips/mipssim/mipssim_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/evbmips/mipssim/mipssim_dma.c
diff -u src/sys/arch/evbmips/mipssim/mipssim_dma.c:1.1 src/sys/arch/evbmips/mipssim/mipssim_dma.c:1.2
--- src/sys/arch/evbmips/mipssim/mipssim_dma.c:1.1	Mon Feb 15 22:39:46 2021
+++ src/sys/arch/evbmips/mipssim/mipssim_dma.c	Wed Dec 28 11:40:35 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: mipssim_dma.c,v 1.1 2021/02/15 22:39:46 reinoud Exp $	*/
+/*	$NetBSD: mipssim_dma.c,v 1.2 2022/12/28 11:40:35 he Exp $	*/
 
 /*-
  * Copyright (c) 2021 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: mipssim_dma.c,v 1.1 2021/02/15 22:39:46 reinoud Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mipssim_dma.c,v 1.2 2022/12/28 11:40:35 he Exp $");
 
 #include 
 #include 
@@ -57,6 +57,7 @@ mipssim_dma_init(struct mipssim_config *
 	t->_wbase = MIPSSIM_DMA_BASE;
 	t->_bounce_alloc_lo = MIPSSIM_DMA_PHYSBASE;
 	t->_bounce_alloc_hi = MIPSSIM_DMA_PHYSBASE + MIPSSIM_DMA_SIZE;
+	t->_bounce_thresh = t->_bounce_alloc_hi; /* as an approximation */
 	t->_dmamap_ops = mips_bus_dmamap_ops;
 	t->_dmamem_ops = mips_bus_dmamem_ops;
 	t->_dmatag_ops = mips_bus_dmatag_ops;



CVS commit: src/sys/arch/evbmips/mipssim

2022-12-28 Thread Havard Eidnes
Module Name:src
Committed By:   he
Date:   Wed Dec 28 11:40:35 UTC 2022

Modified Files:
src/sys/arch/evbmips/mipssim: mipssim_dma.c

Log Message:
mipssim_dma.c: set _bounce_thresh so that bounce buffering works.

Suggested by jmcneill@, thanks!


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/evbmips/mipssim/mipssim_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/evbmips/mipssim

2021-11-15 Thread Simon Burge
Module Name:src
Committed By:   simonb
Date:   Tue Nov 16 06:44:40 UTC 2021

Modified Files:
src/sys/arch/evbmips/mipssim: machdep.c

Log Message:
Use CPU frequencies defined in QEMU for mipssim - 6 MHz for 64-bit
guests and 12 MHz for 32-bit guests.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/evbmips/mipssim/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/evbmips/mipssim/machdep.c
diff -u src/sys/arch/evbmips/mipssim/machdep.c:1.2 src/sys/arch/evbmips/mipssim/machdep.c:1.3
--- src/sys/arch/evbmips/mipssim/machdep.c:1.2	Mon Feb 15 22:39:46 2021
+++ src/sys/arch/evbmips/mipssim/machdep.c	Tue Nov 16 06:44:40 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.2 2021/02/15 22:39:46 reinoud Exp $ */
+/* $NetBSD: machdep.c,v 1.3 2021/11/16 06:44:40 simonb Exp $ */
 
 /*-
  * Copyright (c) 2001,2021 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.2 2021/02/15 22:39:46 reinoud Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.3 2021/11/16 06:44:40 simonb Exp $");
 
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
@@ -73,6 +73,16 @@ __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 
 #define	COMCNRATE	115200		/* not important, emulated device */
 #define	COM_FREQ	1843200		/* not important, emulated device */
 
+/*
+ * QEMU/mipssim sets the CPU frequency to 6 MHz for 64-bit guests and
+ * 12 MHz for 32-bit guests.
+ */
+#ifdef _LP64
+#define	CPU_FREQ	6	/* MHz */
+#else
+#define	CPU_FREQ	12	/* MHz */
+#endif
+
 /* XXX move phys map decl to a general mips location */
 /* Maps for VM objects. */
 struct vm_map *phys_map = NULL;
@@ -113,11 +123,7 @@ cal_timer(void)
 {
 	uint32_t cntfreq;
 
-	/*
-	 * Qemu seems to default to 200 MHz; wall clock looks the right speed
-	 * but we don't have an RTC to check.
-	 */
-	cntfreq = curcpu()->ci_cpu_freq = 200 * 1000 * 1000;
+	cntfreq = curcpu()->ci_cpu_freq = CPU_FREQ * 1000 * 1000;
 
 	if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
 		cntfreq /= 2;
@@ -147,13 +153,14 @@ mach_init(u_long arg0, u_long arg1, u_lo
 	/* enough of a console for printf() to work */
 	cn_tab = &early_console;
 
-	cal_timer();
-
 	/* set CPU model info for sysctl_hw */
 	cpu_setmodel("MIPSSIM");
 
 	mips_vector_init(NULL, false);
 
+	/* must be after CPU is identified in mips_vector_init() */
+	cal_timer();
+
 	uvm_md_init();
 
 	/*



CVS commit: src/sys/arch/evbmips/mipssim

2021-11-15 Thread Simon Burge
Module Name:src
Committed By:   simonb
Date:   Tue Nov 16 06:44:40 UTC 2021

Modified Files:
src/sys/arch/evbmips/mipssim: machdep.c

Log Message:
Use CPU frequencies defined in QEMU for mipssim - 6 MHz for 64-bit
guests and 12 MHz for 32-bit guests.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/evbmips/mipssim/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/evbmips/mipssim

2021-11-03 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Wed Nov  3 07:53:56 UTC 2021

Modified Files:
src/sys/arch/evbmips/mipssim: virtio_mainbus.c

Log Message:
Catch up with member renaming


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/evbmips/mipssim/virtio_mainbus.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/evbmips/mipssim/virtio_mainbus.c
diff -u src/sys/arch/evbmips/mipssim/virtio_mainbus.c:1.3 src/sys/arch/evbmips/mipssim/virtio_mainbus.c:1.4
--- src/sys/arch/evbmips/mipssim/virtio_mainbus.c:1.3	Sat Aug  7 16:18:51 2021
+++ src/sys/arch/evbmips/mipssim/virtio_mainbus.c	Wed Nov  3 07:53:56 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: virtio_mainbus.c,v 1.3 2021/08/07 16:18:51 thorpej Exp $ */
+/* $NetBSD: virtio_mainbus.c,v 1.4 2021/11/03 07:53:56 skrll Exp $ */
 
 /*
  * Copyright (c) 2021 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: virtio_mainbus.c,v 1.3 2021/08/07 16:18:51 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: virtio_mainbus.c,v 1.4 2021/11/03 07:53:56 skrll Exp $");
 
 #include 
 #include 
@@ -48,7 +48,7 @@ static void	virtio_mainbus_attach(device
 static int	virtio_mainbus_rescan(device_t, const char *, const int *);
 static int	virtio_mainbus_detach(device_t, int);
 
-static int	virtio_mainbus_setup_interrupts(struct virtio_mmio_softc *);
+static int	virtio_mainbus_alloc_interrupts(struct virtio_mmio_softc *);
 static void	virtio_mainbus_free_interrupts(struct virtio_mmio_softc *);
 
 struct virtio_mainbus_softc {
@@ -100,7 +100,7 @@ virtio_mainbus_attach(device_t parent, d
 	msc->sc_iot = ma->ma_iot;
 	msc->sc_ioh = ioh;
 	msc->sc_iosize = VIRTIO_STRIDE;
-	msc->sc_setup_interrupts = virtio_mainbus_setup_interrupts;
+	msc->sc_alloc_interrupts = virtio_mainbus_alloc_interrupts;
 	msc->sc_free_interrupts  = virtio_mainbus_free_interrupts;
 
 	vsc->sc_dev = self;
@@ -146,7 +146,7 @@ virtio_mainbus_detach(device_t self, int
 
 
 static int
-virtio_mainbus_setup_interrupts(struct virtio_mmio_softc *msc)
+virtio_mainbus_alloc_interrupts(struct virtio_mmio_softc *msc)
 {
 	struct virtio_mainbus_softc *sc = (struct virtio_mainbus_softc *) msc;
 	struct virtio_softc * const vsc = &msc->sc_sc;



CVS commit: src/sys/arch/evbmips/mipssim

2021-11-03 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Wed Nov  3 07:53:56 UTC 2021

Modified Files:
src/sys/arch/evbmips/mipssim: virtio_mainbus.c

Log Message:
Catch up with member renaming


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/evbmips/mipssim/virtio_mainbus.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.