Re: PCI domains

2009-07-10 Thread M. Warner Losh
In message: 20090710024528.ec36959...@thoreau.thistledown.com.au
Simon Burge sim...@netbsd.org writes:
: Christoph Egger wrote:
: 
:  Michael Lorenz wrote:
: 
:   +/*
:   + * NetBSD's userland has a /dev/pci* entry for each bus but userland has 
no way
:   + * to tell if a bus is a subordinate of another one or if it's on a 
different
:   + * host bridge.
:  
:  I have a patch which introduces support for PCI domains. It allows the
:  userland to distinguish between them by checking if the pci bus belongs
:  to the same PCI domain.
: 
: What exactly is a PCI domain?  A quick google seems to suggest that
: this is a Linux concept as opposed to a PCI concept.  In a previous
: life we used NetBSD on a number of different machines of various
: architectures that had multiple PCI host bridges, although admittedly we
: didn't need to know the topology of the PCI bus layout.

PCI domains, as implemented by Linux and FreeBSD are separate host
bridges.  Each bus complex behind the host bridge has independent
numbering.  Each of these bus complexes are in a different domain.

Not all systems with multiple host bridges have separate numbering
domains, but many do.

Warner


PCI domains [Was: CVS commit: xsrc/external/mit/libpciaccess/dist/src]

2009-07-09 Thread Simon Burge
Christoph Egger wrote:

 Michael Lorenz wrote:

  +/*
  + * NetBSD's userland has a /dev/pci* entry for each bus but userland has 
  no way
  + * to tell if a bus is a subordinate of another one or if it's on a 
  different
  + * host bridge.
 
 I have a patch which introduces support for PCI domains. It allows the
 userland to distinguish between them by checking if the pci bus belongs
 to the same PCI domain.

What exactly is a PCI domain?  A quick google seems to suggest that
this is a Linux concept as opposed to a PCI concept.  In a previous
life we used NetBSD on a number of different machines of various
architectures that had multiple PCI host bridges, although admittedly we
didn't need to know the topology of the PCI bus layout.

Cheers,
Simon.