CVS commit: [matt-nb6-plus] src/sys/arch/arm/include
Module Name:src Committed By: matt Date: Thu Jan 17 01:33:34 UTC 2013 Modified Files: src/sys/arch/arm/include [matt-nb6-plus]: bus_funcs.h Log Message: Pullup from HEAD: Cortex needs ._dmamap_sync_post for BUS_DMASYNC_POSTREAD To generate a diff of this commit: cvs rdiff -u -r1.1.10.1 -r1.1.10.2 src/sys/arch/arm/include/bus_funcs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/bus_funcs.h diff -u src/sys/arch/arm/include/bus_funcs.h:1.1.10.1 src/sys/arch/arm/include/bus_funcs.h:1.1.10.2 --- src/sys/arch/arm/include/bus_funcs.h:1.1.10.1 Wed Nov 28 22:40:28 2012 +++ src/sys/arch/arm/include/bus_funcs.h Thu Jan 17 01:33:34 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: bus_funcs.h,v 1.1.10.1 2012/11/28 22:40:28 matt Exp $ */ +/* $NetBSD: bus_funcs.h,v 1.1.10.2 2013/01/17 01:33:34 matt Exp $ */ /*- * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. @@ -64,6 +64,10 @@ #ifndef _ARM32_BUS_FUNCS_H_ #define _ARM32_BUS_FUNCS_H_ +#ifdef _KERNEL_OPT +#include "opt_cputypes.h" +#endif + /* * Utility macros; INTERNAL USE ONLY. */ @@ -635,7 +639,7 @@ void _bus_dmamap_unload(bus_dma_tag_t, b void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, bus_size_t, int); -#ifdef _ARM32_NEED_BUS_DMA_BOUNCE +#if defined(_ARM32_NEED_BUS_DMA_BOUNCE) || defined(CPU_CORTEX) #define _BUS_DMAMAP_SYNC_FUNCS \ ._dmamap_sync_pre = _bus_dmamap_sync, \ ._dmamap_sync_post = _bus_dmamap_sync
CVS commit: [matt-nb6-plus] src/sys/arch/arm/include
Module Name:src
Committed By: matt
Date: Wed Nov 28 22:45:22 UTC 2012
Modified Files:
src/sys/arch/arm/include [matt-nb6-plus]: lock.h types.h
Log Message:
Make __swp for the kernel return unsigned char and restore __cpu_simple_lock_t
(match what -HEAD has).
To generate a diff of this commit:
cvs rdiff -u -r1.17.42.1 -r1.17.42.2 src/sys/arch/arm/include/lock.h
cvs rdiff -u -r1.21.8.1 -r1.21.8.2 src/sys/arch/arm/include/types.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/lock.h
diff -u src/sys/arch/arm/include/lock.h:1.17.42.1 src/sys/arch/arm/include/lock.h:1.17.42.2
--- src/sys/arch/arm/include/lock.h:1.17.42.1 Wed Nov 28 22:40:29 2012
+++ src/sys/arch/arm/include/lock.h Wed Nov 28 22:45:21 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.17.42.1 2012/11/28 22:40:29 matt Exp $ */
+/* $NetBSD: lock.h,v 1.17.42.2 2012/11/28 22:45:21 matt Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@@ -74,7 +74,7 @@ __cpu_simple_lock_set(__cpu_simple_lock_
#endif
#if defined(_KERNEL)
-static __inline __cpu_simple_lock_t
+static __inline unsigned char
__swp(__cpu_simple_lock_t __val, volatile __cpu_simple_lock_t *__ptr)
{
#ifdef _ARM_ARCH_6
Index: src/sys/arch/arm/include/types.h
diff -u src/sys/arch/arm/include/types.h:1.21.8.1 src/sys/arch/arm/include/types.h:1.21.8.2
--- src/sys/arch/arm/include/types.h:1.21.8.1 Wed Nov 28 22:40:30 2012
+++ src/sys/arch/arm/include/types.h Wed Nov 28 22:45:22 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: types.h,v 1.21.8.1 2012/11/28 22:40:30 matt Exp $ */
+/* $NetBSD: types.h,v 1.21.8.2 2012/11/28 22:45:22 matt Exp $ */
/*
* Copyright (c) 1990 The Regents of the University of California.
@@ -73,17 +73,9 @@ typedef unsigned long pmc_ctr_t;
* to user-space, we don't want ABI breakage there.
*/
#if defined(_KERNEL)
-typedef
-#if __GNUC_PREREQ__(4,5)
- volatile
-#endif
- unsigned char __cpu_simple_lock_t;
+typedef volatile unsigned char __cpu_simple_lock_t;
#else
-typedef
-#if __GNUC_PREREQ__(4,5)
- volatile
-#endif
- int __cpu_simple_lock_t;
+typedef volatile int __cpu_simple_lock_t;
#endif /* _KERNEL */
#define __SIMPLELOCK_LOCKED 1
CVS commit: [matt-nb6-plus] src/sys/arch/arm/include
Module Name:src Committed By: matt Date: Wed Nov 21 00:00:10 UTC 2012 Modified Files: src/sys/arch/arm/include [matt-nb6-plus]: Makefile vfpreg.h Added Files: src/sys/arch/arm/include [matt-nb6-plus]: aeabi.h Log Message: Add aeabi.h, cpuconf.h, and vfpreg.h To generate a diff of this commit: cvs rdiff -u -r1.40 -r1.40.10.1 src/sys/arch/arm/include/Makefile cvs rdiff -u -r0 -r1.2.6.2 src/sys/arch/arm/include/aeabi.h cvs rdiff -u -r1.1 -r1.1.56.1 src/sys/arch/arm/include/vfpreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/Makefile diff -u src/sys/arch/arm/include/Makefile:1.40 src/sys/arch/arm/include/Makefile:1.40.10.1 --- src/sys/arch/arm/include/Makefile:1.40 Sun Jul 17 23:52:12 2011 +++ src/sys/arch/arm/include/Makefile Wed Nov 21 00:00:10 2012 @@ -1,10 +1,10 @@ -# $NetBSD: Makefile,v 1.40 2011/07/17 23:52:12 dyoung Exp $ +# $NetBSD: Makefile,v 1.40.10.1 2012/11/21 00:00:10 matt Exp $ INCSDIR= /usr/include/arm -INCS= ansi.h aout_machdep.h armreg.h asm.h atomic.h \ +INCS= aeabi.h ansi.h aout_machdep.h armreg.h asm.h atomic.h \ bswap.h byte_swap.h \ - cdefs.h cpu.h \ + cdefs.h cpu.h cpuconf.h \ disklabel.h \ elf_machdep.h endian.h endian_machdep.h \ float.h fp.h frame.h \ @@ -18,6 +18,7 @@ INCS= ansi.h aout_machdep.h armreg.h asm reg.h rwlock.h \ setjmp.h signal.h swi.h sysarch.h \ trap.h types.h \ + vfpreg.h \ wchar_limits.h .include Index: src/sys/arch/arm/include/vfpreg.h diff -u src/sys/arch/arm/include/vfpreg.h:1.1 src/sys/arch/arm/include/vfpreg.h:1.1.56.1 --- src/sys/arch/arm/include/vfpreg.h:1.1 Sat Mar 15 10:16:43 2008 +++ src/sys/arch/arm/include/vfpreg.h Wed Nov 21 00:00:10 2012 @@ -1,4 +1,4 @@ -/* $NetBSD: vfpreg.h,v 1.1 2008/03/15 10:16:43 rearnsha Exp $ */ +/* $NetBSD: vfpreg.h,v 1.1.56.1 2012/11/21 00:00:10 matt Exp $ */ /* * Copyright (c) 2008 ARM Ltd @@ -45,20 +45,60 @@ #define VFP_FPSID_ARCH_MSK 0x000f /* Architecture */ #define VFP_FPSID_ARCH_V1 0x /* Arch VFPv1 */ #define VFP_FPSID_ARCH_V2 0x0001 /* Arch VFPv2 */ +#define VFP_FPSID_ARCH_V3_2 0x0002 /* Arch VFPv3 (subarch v2) */ +#define VFP_FPSID_ARCH_V3 0x0003 /* Arch VFPv3 (no subarch) */ +#define VFP_FPSID_ARCH_V3_3 0x0004 /* Arch VFPv3 (subarch v3) */ #define VFP_FPSID_PART_MSK 0xff00 /* Part number */ #define VFP_FPSID_PART_VFP10 0x1000 /* VFP10 */ +#define VFP_FPSID_PART_VFP11 0x2000 /* VFP11 */ +#define VFP_FPSID_PART_VFP30 0x3000 /* VFP30 */ #define VFP_FPSID_VAR_MSK 0x00f0 /* Variant */ #define VFP_FPSID_VAR_ARM10 0x00a0 /* Variant ARM10 */ +#define VFP_FPSID_VAR_ARM11 0x00b0 /* Variant ARM11 */ #define VFP_FPSID_REV_MSK 0x000f /* Revision */ -#define VFP_FPEXC_EX 0x8000 /* Exception status bit */ -#define VFP_FPEXC_EN 0x4000 /* Enable bit */ - -#define VFP_FPSCR_DN 0x0200 /* Default NaN mode */ -#define VFP_FPSCR_FZ 0x0100 /* Flush-to-zero mode */ - - #define FPU_VFP10_ARM10E 0x410001a0 /* Really a VFPv2 part */ #define FPU_VFP11_ARM11 0x410120b0 +#define FPU_VFP_CORTEXA5 0x41023050 +#define FPU_VFP_CORTEXA7 0x41023070 +#define FPU_VFP_CORTEXA8 0x410330c0 +#define FPU_VFP_CORTEXA9 0x41033090 + +#define VFP_FPEXC_EX 0x8000 /* Exception status bit */ +#define VFP_FPEXC_EN 0x4000 /* VFP Enable bit */ +#define VFP_FPEXC_FP2V 0x1000 /* FPINST2 instruction valid */ +#define VFP_FPEXC_VECITR 0x0700 /* Vector iteration count */ +#define VFP_FPEXC_INV 0x0080 /* Input exception flag */ +#define VFP_FPEXC_UFC 0x0080 /* Potential underflow flag */ +#define VFP_FPEXC_OFC 0x0080 /* Potential overflow flag */ +#define VFP_FPEXC_IOC 0x0080 /* Potential inv. op. flag */ + +#define VFP_FPSCR_N 0x8000 /* set if compare <= result */ +#define VFP_FPSCR_Z 0x4000 /* set if compare = result */ +#define VFP_FPSCR_C 0x2000 /* set if compare (=,>=,UNORD) result */ +#define VFP_FPSCR_V 0x1000 /* set if compare UNORD result */ +#define VFP_FPSCR_DN 0x0200 /* Default NaN mode */ +#define VFP_FPSCR_FZ 0x0100 /* Flush-to-zero mode */ +#define VFP_FPSCR_RMODE 0x00c0 /* Rounding Mode */ +#define VFP_FPSCR_RZ 0x00c0 /* round towards zero (RZ) */ +#define VFP_FPSCR_RM 0x0080 /* round towards +INF (RP) */ +#define VFP_FPSCR_RP 0x0040 /* round towards -INF (RM) */ +#define VFP_FPSCR_RN 0x /* round to nearest (RN) */ +#define VFP_FPSCR_STRIDE 0x0030 /* Vector Stride */ +#define VFP_FPSCR_LEN 0x0007 /* Vector Length */ +#define VFP_FPSCR_IDE 0x8000 /* Inout Subnormal Exception Enable */ +#define VFP_FPSCR_ESUM 0x1f00 /* IXE|UFE|OFE|DZE|IOE */ +#define VFP_FPSCR_IXE 0x1000 /* Inexact Exception Enable */ +#define VFP_FPSCR_UFE 0x0800 /* Underflow Exception Enable */ +#define VFP_FPSCR_OFE 0x0400 /* Overflow Exception Enable */ +#define VFP_FPSCR_DZE 0x0200 /* Inexact
