CVS commit: [netbsd-7] src/sys/arch/arm/arm32
Module Name:src Committed By: snj Date: Sat Jun 3 17:01:31 UTC 2017 Modified Files: src/sys/arch/arm/arm32 [netbsd-7]: pmap.c Log Message: Pull up following revision(s) (requested by skrll in ticket #1424): sys/arch/arm/arm32/pmap.c: revision 1.345 Perform icache syncs for ARM_MMU_EXTENDED as well. This helps the PT_STEP code in pr/52119 and probably other things. To generate a diff of this commit: cvs rdiff -u -r1.295.2.10 -r1.295.2.11 src/sys/arch/arm/arm32/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm32/pmap.c diff -u src/sys/arch/arm/arm32/pmap.c:1.295.2.10 src/sys/arch/arm/arm32/pmap.c:1.295.2.11 --- src/sys/arch/arm/arm32/pmap.c:1.295.2.10 Sat Mar 11 16:03:54 2017 +++ src/sys/arch/arm/arm32/pmap.c Sat Jun 3 17:01:30 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.295.2.10 2017/03/11 16:03:54 snj Exp $ */ +/* $NetBSD: pmap.c,v 1.295.2.11 2017/06/03 17:01:30 snj Exp $ */ /* * Copyright 2003 Wasabi Systems, Inc. @@ -217,7 +217,7 @@ #include //#include -__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.295.2.10 2017/03/11 16:03:54 snj Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.295.2.11 2017/06/03 17:01:30 snj Exp $"); //#define PMAP_DEBUG #ifdef PMAP_DEBUG @@ -424,13 +424,13 @@ static struct evcnt pmap_ev_exec_synced PMAP_EVCNT_INITIALIZER("exec pages synced"); static struct evcnt pmap_ev_exec_synced_map = PMAP_EVCNT_INITIALIZER("exec pages synced (MP)"); -#ifndef ARM_MMU_EXTENDED static struct evcnt pmap_ev_exec_synced_unmap = PMAP_EVCNT_INITIALIZER("exec pages synced (UM)"); static struct evcnt pmap_ev_exec_synced_remap = PMAP_EVCNT_INITIALIZER("exec pages synced (RM)"); static struct evcnt pmap_ev_exec_synced_clearbit = PMAP_EVCNT_INITIALIZER("exec pages synced (DG)"); +#ifndef ARM_MMU_EXTENDED static struct evcnt pmap_ev_exec_synced_kremove = PMAP_EVCNT_INITIALIZER("exec pages synced (KU)"); #endif @@ -1066,12 +1066,10 @@ pmap_enter_pv(struct vm_page_md *md, pad * for this page, make sure to sync the I-cache. */ if (PV_IS_EXEC_P(flags)) { -#ifndef ARM_MMU_EXTENDED if (!PV_IS_EXEC_P(md->pvh_attrs)) { pmap_syncicache_page(md, pa); PMAPCOUNT(exec_synced_map); } -#endif PMAPCOUNT(exec_mappings); } #endif @@ -1145,26 +1143,19 @@ pmap_remove_pv(struct vm_page_md *md, pa PMAPCOUNT(unmappings); #ifdef PMAP_CACHE_VIPT - if (!(pv->pv_flags & PVF_WRITE)) -break; /* * If this page has had an exec mapping, then if * this was the last mapping, discard the contents, * otherwise sync the i-cache for this page. */ if (PV_IS_EXEC_P(md->pvh_attrs)) { -#ifdef ARM_MMU_EXTENDED -md->pvh_attrs &= ~PVF_EXEC; -PMAPCOUNT(exec_discarded_unmap); -#else if (SLIST_EMPTY(>pvh_list)) { md->pvh_attrs &= ~PVF_EXEC; PMAPCOUNT(exec_discarded_unmap); -} else { +} else if (pv->pv_flags & PVF_WRITE) { pmap_syncicache_page(md, pa); PMAPCOUNT(exec_synced_unmap); } -#endif /* ARM_MMU_EXTENDED */ } #endif /* PMAP_CACHE_VIPT */ break; @@ -1276,7 +1267,6 @@ pmap_modify_pv(struct vm_page_md *md, pa md->pvh_attrs |= PVF_WRITE; } } -#ifndef ARM_MMU_EXTENDED /* * We have two cases here: the first is from enter_pv (new exec * page), the second is a combined pmap_remove_pv/pmap_enter_pv. @@ -1289,6 +1279,7 @@ pmap_modify_pv(struct vm_page_md *md, pa pmap_syncicache_page(md, pa); PMAPCOUNT(exec_synced_remap); } +#ifndef ARM_MMU_EXTENDED KASSERT((md->pvh_attrs & PVF_DMOD) == 0 || (md->pvh_attrs & (PVF_DIRTY|PVF_NC))); #endif /* !ARM_MMU_EXTENDED */ #endif /* PMAP_CACHE_VIPT */ @@ -2338,12 +2329,12 @@ pmap_clearbit(struct vm_page_md *md, pad struct pv_entry *pv; #ifdef PMAP_CACHE_VIPT const bool want_syncicache = PV_IS_EXEC_P(md->pvh_attrs); + bool need_syncicache = false; #ifdef ARM_MMU_EXTENDED const u_int execbits = (maskbits & PVF_EXEC) ? L2_XS_XN : 0; #else const u_int execbits = 0; bool need_vac_me_harder = false; - bool need_syncicache = false; #endif #else const u_int execbits = 0; @@ -2359,12 +2350,9 @@ pmap_clearbit(struct vm_page_md *md, pad * then we know we definitely need to sync or discard it. */ if (want_syncicache) { -#ifdef ARM_MMU_EXTENDED - if (md->pvh_attrs & PVF_MOD) - md->pvh_attrs &= ~PVF_EXEC; -#else - need_syncicache = md->pvh_attrs & PVF_MOD; -#endif + if (md->pvh_attrs & PVF_MOD) { + need_syncicache = true; + } } #endif KASSERT(pmap_page_locked_p(md)); @@ -2375,7 +2363,7 @@ pmap_clearbit(struct vm_page_md *md, pad md->pvh_attrs &= ~(maskbits & (PVF_MOD | PVF_REF)); if (SLIST_EMPTY(>pvh_list)) { -#if defined(PMAP_CACHE_VIPT) && !defined(ARM_MMU_EXTENDED) +#if defined(PMAP_CACHE_VIPT) if (need_syncicache) { /* * No one has it mapped, so just discard it. The next @@ -2484,9 +2472,9 @@ pmap_clearbit(struct vm_page_md *md, pad
CVS commit: [netbsd-7] src/sys/arch/arm/arm32
Module Name:src Committed By: snj Date: Fri Feb 26 22:31:06 UTC 2016 Modified Files: src/sys/arch/arm/arm32 [netbsd-7]: pmap.c Log Message: Pull up following revision(s) (requested by skrll in ticket #1106): sys/arch/arm/arm32/pmap.c: revision 1.332 Delete pmap_pmaps and its only user pmap_dump_all. The list wasn't being updated in an MP-safe manner. To generate a diff of this commit: cvs rdiff -u -r1.295.2.7 -r1.295.2.8 src/sys/arch/arm/arm32/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm32/pmap.c diff -u src/sys/arch/arm/arm32/pmap.c:1.295.2.7 src/sys/arch/arm/arm32/pmap.c:1.295.2.8 --- src/sys/arch/arm/arm32/pmap.c:1.295.2.7 Wed May 27 05:33:29 2015 +++ src/sys/arch/arm/arm32/pmap.c Fri Feb 26 22:31:06 2016 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.295.2.7 2015/05/27 05:33:29 msaitoh Exp $ */ +/* $NetBSD: pmap.c,v 1.295.2.8 2016/02/26 22:31:06 snj Exp $ */ /* * Copyright 2003 Wasabi Systems, Inc. @@ -217,7 +217,7 @@ #include //#include -__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.295.2.7 2015/05/27 05:33:29 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.295.2.8 2016/02/26 22:31:06 snj Exp $"); //#define PMAP_DEBUG #ifdef PMAP_DEBUG @@ -281,7 +281,6 @@ int arm_poolpage_vmfreelist = VM_FREEL * in pmap_create(). */ static struct pool_cache pmap_cache; -static LIST_HEAD(, pmap) pmap_pmaps; /* * Pool of PV structures @@ -3035,8 +3034,6 @@ pmap_create(void) pmap_pinit(pm); - LIST_INSERT_HEAD(_pmaps, pm, pm_list); - return (pm); } @@ -5102,8 +5099,6 @@ pmap_destroy(pmap_t pm) } #endif - LIST_REMOVE(pm, pm_list); - pmap_free_l1(pm); #ifdef ARM_MMU_EXTENDED @@ -6240,8 +6235,6 @@ pmap_bootstrap(vaddr_t vstart, vaddr_t v */ pool_cache_bootstrap(_cache, sizeof(struct pmap), 0, 0, 0, "pmappl", NULL, IPL_NONE, pmap_pmap_ctor, NULL, NULL); - LIST_INIT(_pmaps); - LIST_INSERT_HEAD(_pmaps, pm, pm_list); /* * Initialize the pv pool. @@ -7486,22 +7479,8 @@ pmap_kernel_L1_addr(void) /* * A couple of ddb-callable functions for dumping pmaps */ -void pmap_dump_all(void); void pmap_dump(pmap_t); -void -pmap_dump_all(void) -{ - pmap_t pm; - - LIST_FOREACH(pm, _pmaps, pm_list) { - if (pm == pmap_kernel()) - continue; - pmap_dump(pm); - printf("\n"); - } -} - static pt_entry_t ncptes[64]; static void pmap_dump_ncpg(pmap_t);
CVS commit: [netbsd-7] src/sys/arch/arm/arm32
Module Name:src Committed By: martin Date: Fri Sep 4 14:48:57 UTC 2015 Modified Files: src/sys/arch/arm/arm32 [netbsd-7]: cortex_pmc.c Log Message: Pull up following revision(s) (requested by skrll in ticket #953): sys/arch/arm/arm32/cortex_pmc.c: revision 1.4 fix: Cortex delay() shorten rarely. To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.2.16.1 src/sys/arch/arm/arm32/cortex_pmc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm32/cortex_pmc.c diff -u src/sys/arch/arm/arm32/cortex_pmc.c:1.2 src/sys/arch/arm/arm32/cortex_pmc.c:1.2.16.1 --- src/sys/arch/arm/arm32/cortex_pmc.c:1.2 Wed Aug 29 19:10:15 2012 +++ src/sys/arch/arm/arm32/cortex_pmc.c Fri Sep 4 14:48:57 2015 @@ -33,7 +33,7 @@ */ #include -/* __KERNEL_RCSID(0, "$NetBSD: cortex_pmc.c,v 1.2 2012/08/29 19:10:15 matt Exp $"); */ +/* __KERNEL_RCSID(0, "$NetBSD: cortex_pmc.c,v 1.2.16.1 2015/09/04 14:48:57 martin Exp $"); */ #include "opt_perfctrs.h" #include #include @@ -101,7 +101,7 @@ delay(u_int arg) if (ctrl & CORTEX_CNTOFL_C) { /* Reset overflow flag for cycle counter in overflow register */ armreg_pmovsr_write(CORTEX_CNTOFL_C); - delta += (last + (counts_per_wrap - cur)); + delta += (cur + (counts_per_wrap - last)); } else { delta += (cur - last); }
CVS commit: [netbsd-7] src/sys/arch/arm/arm32
Module Name:src Committed By: snj Date: Fri Jul 17 03:48:01 UTC 2015 Modified Files: src/sys/arch/arm/arm32 [netbsd-7]: arm32_reboot.c Log Message: Pull up following revision(s) (requested by christos in ticket #876): sys/arch/arm/arm32/arm32_reboot.c: revisions 1.7, 1.8 - print a warning about powerdown not supported like other ports do - merge duplicated code - if halt is requested and there is no console, keep looping instead of rebooting. -- Mark end of cpu_reboot as unreachable. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.6.6.1 src/sys/arch/arm/arm32/arm32_reboot.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm32/arm32_reboot.c diff -u src/sys/arch/arm/arm32/arm32_reboot.c:1.6 src/sys/arch/arm/arm32/arm32_reboot.c:1.6.6.1 --- src/sys/arch/arm/arm32/arm32_reboot.c:1.6 Sun Aug 18 06:28:18 2013 +++ src/sys/arch/arm/arm32/arm32_reboot.c Fri Jul 17 03:48:00 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: arm32_reboot.c,v 1.6 2013/08/18 06:28:18 matt Exp $ */ +/* $NetBSD: arm32_reboot.c,v 1.6.6.1 2015/07/17 03:48:00 snj Exp $ */ /* * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. @@ -122,7 +122,7 @@ */ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: arm32_reboot.c,v 1.6 2013/08/18 06:28:18 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: arm32_reboot.c,v 1.6.6.1 2015/07/17 03:48:00 snj Exp $); #include sys/param.h #include sys/device.h @@ -136,6 +136,29 @@ __KERNEL_RCSID(0, $NetBSD: arm32_reboot #include arm/locore.h #include arm/arm32/machdep.h +static int +docpureset(int howto) +{ + if (howto RB_POWERDOWN) + printf(WARNING: powerdown not supported\r\n); + + if (howto RB_HALT) { + printf(The operating system has halted.\r\n); + printf(Please press any key to reboot.\r\n); + cnpollc(true); /* for proper keyboard command handling */ + /* If there is no keyboard, cngetc() returns 0, so loop */ + while (cngetc() == 0) + delay(10); + cnpollc(false); + } + + printf(rebooting...\r\n); + if (cpu_reset_address) + (*cpu_reset_address)(); + cpu_reset(); + /*NOTREACHED*/ +} + void cpu_reboot(int howto, char *bootstr) { @@ -146,15 +169,7 @@ cpu_reboot(int howto, char *bootstr) */ if (cold) { doshutdownhooks(); - printf(The operating system has halted.\r\n); - printf(Please press any key to reboot.\r\n); - cnpollc(true); /* for proper keyboard command handling */ - cngetc(); - cnpollc(false); - printf(rebooting...\r\n); - if (cpu_reset_address) - (*cpu_reset_address)(); - cpu_reset(); + docpureset(RB_HALT | howto); } /* @@ -187,17 +202,6 @@ cpu_reboot(int howto, char *bootstr) /* Make sure IRQ's are disabled */ IRQdisable; - if (howto RB_HALT) { - printf(The operating system has halted.\r\n); - printf(Please press any key to reboot.\r\n); - cnpollc(true); /* for proper keyboard command handling */ - cngetc(); - cnpollc(false); - } - - printf(rebooting...\r\n); - if (cpu_reset_address) - (*cpu_reset_address)(); - cpu_reset(); - /*NOTREACHED*/ + docpureset(howto); + __unreachable(); }
CVS commit: [netbsd-7] src/sys/arch/arm/arm32
Module Name:src Committed By: msaitoh Date: Tue May 26 01:34:40 UTC 2015 Modified Files: src/sys/arch/arm/arm32 [netbsd-7]: pmap.c Log Message: Pull up following revision(s) (requested by skrll in ticket #800): sys/arch/arm/arm32/pmap.c: revision 1.320 sys/arch/arm/arm32/pmap.c: revision 1.321 sys/arch/arm/arm32/pmap.c: revision 1.322 sys/arch/arm/arm32/pmap.c: revision 1.319 - include opt_arm_debug.h for VERBOSE_INIT_ARM - Add pmap locking to pmap_kenter_pa/kremove - Make sure nptes is a multiple of PAGE_SIZE / L2_S_SIZE. - Use PDE_SYNC when syncing pdeps To generate a diff of this commit: cvs rdiff -u -r1.295.2.5 -r1.295.2.6 src/sys/arch/arm/arm32/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm32/pmap.c diff -u src/sys/arch/arm/arm32/pmap.c:1.295.2.5 src/sys/arch/arm/arm32/pmap.c:1.295.2.6 --- src/sys/arch/arm/arm32/pmap.c:1.295.2.5 Tue May 19 04:58:31 2015 +++ src/sys/arch/arm/arm32/pmap.c Tue May 26 01:34:40 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.295.2.5 2015/05/19 04:58:31 snj Exp $ */ +/* $NetBSD: pmap.c,v 1.295.2.6 2015/05/26 01:34:40 msaitoh Exp $ */ /* * Copyright 2003 Wasabi Systems, Inc. @@ -186,6 +186,7 @@ /* Include header files */ +#include opt_arm_debug.h #include opt_cpuoptions.h #include opt_pmap_debug.h #include opt_ddb.h @@ -216,7 +217,7 @@ #include arm/locore.h //#include arm/arm32/katelib.h -__KERNEL_RCSID(0, $NetBSD: pmap.c,v 1.295.2.5 2015/05/19 04:58:31 snj Exp $); +__KERNEL_RCSID(0, $NetBSD: pmap.c,v 1.295.2.6 2015/05/26 01:34:40 msaitoh Exp $); //#define PMAP_DEBUG #ifdef PMAP_DEBUG @@ -1582,7 +1583,7 @@ pmap_alloc_l2_bucket(pmap_t pm, vaddr_t | L1_C_DOM(pmap_domain(pm)); KASSERT(*pdep == 0); l1pte_setone(pdep, npde); - PTE_SYNC(pdep); + PDE_SYNC(pdep); #endif } @@ -3370,7 +3371,7 @@ pmap_enter(pmap_t pm, vaddr_t va, paddr_ | L1_C_DOM(pmap_domain(pm)); if (*pdep != pde) { l1pte_setone(pdep, pde); - PTE_SYNC(pdep); + PDE_SYNC(pdep); } } } @@ -3682,6 +3683,7 @@ pmap_kenter_pa(vaddr_t va, paddr_t pa, v } pmap_t kpm = pmap_kernel(); + pmap_acquire_pmap_lock(kpm); struct l2_bucket * const l2b = pmap_get_l2_bucket(kpm, va); const size_t l1slot __diagused = l1pte_index(va); KASSERTMSG(l2b != NULL, @@ -3729,6 +3731,7 @@ pmap_kenter_pa(vaddr_t va, paddr_t pa, v cpu_cpwait(); } } + pmap_release_pmap_lock(kpm); pt_entry_t npte = L2_S_PROTO | pa | L2_S_PROT(PTE_KERNEL, prot) | ((flags PMAP_NOCACHE) @@ -3823,6 +3826,8 @@ pmap_kremove(vaddr_t va, vsize_t len) const vaddr_t eva = va + len; + pmap_acquire_pmap_lock(pmap_kernel()); + while (va eva) { vaddr_t next_bucket = L2_NEXT_BUCKET_VA(va); if (next_bucket eva) @@ -3884,6 +3889,7 @@ pmap_kremove(vaddr_t va, vsize_t len) total_mappings += mappings; #endif } + pmap_release_pmap_lock(pmap_kernel()); cpu_cpwait(); UVMHIST_LOG(maphist, --- done (%u mappings removed), total_mappings, 0, 0, 0); @@ -4550,7 +4556,7 @@ pmap_fault_fixup(pmap_t pm, vaddr_t va, pd_entry_t pde = L1_C_PROTO | l2b-l2b_pa | L1_C_DOM(pmap_domain(pm)); if (*pdep != pde) { l1pte_setone(pdep, pde); - PTE_SYNC(pdep); + PDE_SYNC(pdep); rv = 1; PMAPCOUNT(fixup_pdes); } @@ -6163,9 +6169,11 @@ pmap_bootstrap(vaddr_t vstart, vaddr_t v */ virtual_avail = (virtual_avail + arm_cache_prefer_mask) ~arm_cache_prefer_mask; nptes = (arm_cache_prefer_mask L2_S_SHIFT) + 1; + nptes = roundup(nptes, PAGE_SIZE / L2_S_SIZE); if (arm_pcache.icache_type != CACHE_TYPE_PIPT arm_pcache.icache_way_size nptes * L2_S_SIZE) { nptes = arm_pcache.icache_way_size L2_S_SHIFT; + nptes = roundup(nptes, PAGE_SIZE / L2_S_SIZE); } #else nptes = PAGE_SIZE / L2_S_SIZE;
CVS commit: [netbsd-7] src/sys/arch/arm/arm32
Module Name:src Committed By: snj Date: Tue May 19 04:58:31 UTC 2015 Modified Files: src/sys/arch/arm/arm32 [netbsd-7]: pmap.c Log Message: Pull up following revision(s) (requested by joerg in ticket #777): sys/arch/arm/arm32/pmap.c: revision 1.308 pmap_tlb_flushD is for !ARM_MMU_EXTENDED only now To generate a diff of this commit: cvs rdiff -u -r1.295.2.4 -r1.295.2.5 src/sys/arch/arm/arm32/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm32/pmap.c diff -u src/sys/arch/arm/arm32/pmap.c:1.295.2.4 src/sys/arch/arm/arm32/pmap.c:1.295.2.5 --- src/sys/arch/arm/arm32/pmap.c:1.295.2.4 Fri Apr 10 20:17:52 2015 +++ src/sys/arch/arm/arm32/pmap.c Tue May 19 04:58:31 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.295.2.4 2015/04/10 20:17:52 snj Exp $ */ +/* $NetBSD: pmap.c,v 1.295.2.5 2015/05/19 04:58:31 snj Exp $ */ /* * Copyright 2003 Wasabi Systems, Inc. @@ -216,7 +216,7 @@ #include arm/locore.h //#include arm/arm32/katelib.h -__KERNEL_RCSID(0, $NetBSD: pmap.c,v 1.295.2.4 2015/04/10 20:17:52 snj Exp $); +__KERNEL_RCSID(0, $NetBSD: pmap.c,v 1.295.2.5 2015/05/19 04:58:31 snj Exp $); //#define PMAP_DEBUG #ifdef PMAP_DEBUG @@ -850,12 +850,10 @@ pmap_tlb_flushID(pmap_t pm) #endif /* ARM_MMU_EXTENDED */ } +#ifndef ARM_MMU_EXTENDED static inline void pmap_tlb_flushD(pmap_t pm) { -#ifdef ARM_MMU_EXTENDED - pmap_tlb_asid_release_all(pm); -#else if (pm-pm_cstate.cs_tlb_d) { cpu_tlb_flushD(); #if ARM_MMU_V7 == 0 @@ -869,8 +867,8 @@ pmap_tlb_flushD(pmap_t pm) pm-pm_cstate.cs_tlb_d = 0; #endif /* ARM_MMU_V7 */ } -#endif /* ARM_MMU_EXTENDED */ } +#endif /* ARM_MMU_EXTENDED */ #ifdef PMAP_CACHE_VIVT static inline void
CVS commit: [netbsd-7] src/sys/arch/arm/arm32
Module Name:src Committed By: snj Date: Fri Apr 10 20:17:52 UTC 2015 Modified Files: src/sys/arch/arm/arm32 [netbsd-7]: pmap.c Log Message: Pull up following revision(s) (requested by skrll in ticket #669): sys/arch/arm/arm32/pmap.c: revision 1.318 Fix two bugs. pmap_is_cached fix for MULTIPROCESSOR (not just ASID on local cpu - any valid ASID on any cpu). pmap_deactivate: update curcpu()-ci_pmap_cur_asid to KERNEL_PID too. To generate a diff of this commit: cvs rdiff -u -r1.295.2.3 -r1.295.2.4 src/sys/arch/arm/arm32/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm32/pmap.c diff -u src/sys/arch/arm/arm32/pmap.c:1.295.2.3 src/sys/arch/arm/arm32/pmap.c:1.295.2.4 --- src/sys/arch/arm/arm32/pmap.c:1.295.2.3 Mon Nov 10 19:57:26 2014 +++ src/sys/arch/arm/arm32/pmap.c Fri Apr 10 20:17:52 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.295.2.3 2014/11/10 19:57:26 martin Exp $ */ +/* $NetBSD: pmap.c,v 1.295.2.4 2015/04/10 20:17:52 snj Exp $ */ /* * Copyright 2003 Wasabi Systems, Inc. @@ -216,7 +216,7 @@ #include arm/locore.h //#include arm/arm32/katelib.h -__KERNEL_RCSID(0, $NetBSD: pmap.c,v 1.295.2.3 2014/11/10 19:57:26 martin Exp $); +__KERNEL_RCSID(0, $NetBSD: pmap.c,v 1.295.2.4 2015/04/10 20:17:52 snj Exp $); //#define PMAP_DEBUG #ifdef PMAP_DEBUG @@ -938,9 +938,18 @@ static inline bool pmap_is_cached(pmap_t pm) { #ifdef ARM_MMU_EXTENDED + if (pm == pmap_kernel()) + return true; +#ifdef MULTIPROCESSOR + // Is this pmap active on any CPU? + if (!kcpuset_iszero(pm-pm_active)) + return true; +#else struct pmap_tlb_info * const ti = cpu_tlb_info(curcpu()); - if (pm == pmap_kernel() || PMAP_PAI_ASIDVALID_P(PMAP_PAI(pm, ti), ti)) + // Is this pmap active? + if (PMAP_PAI_ASIDVALID_P(PMAP_PAI(pm, ti), ti)) return true; +#endif #else struct cpu_info * const ci = curcpu(); if (pm == pmap_kernel() || ci-ci_pmap_lastuser == NULL @@ -4949,6 +4958,7 @@ pmap_deactivate(struct lwp *l) pmap_tlb_asid_deactivate(pm); cpu_setttb(pmap_kernel()-pm_l1_pa, KERNEL_PID); ci-ci_pmap_cur = pmap_kernel(); + ci-ci_pmap_asid_cur = KERNEL_PID; kpreempt_enable(); #else /*
CVS commit: [netbsd-7] src/sys/arch/arm/arm32
Module Name:src Committed By: snj Date: Mon Apr 6 01:57:57 UTC 2015 Modified Files: src/sys/arch/arm/arm32 [netbsd-7]: cpu.c Log Message: Pull up following revision(s) (requested by jmcneill in ticket #663): sys/arch/arm/arm32/cpu.c: revision 1.105 Increase the `freqbuf' buffer that holds the result of humanize_number(). Now it prints 1600 Mhz instead of 1 Ghz. Pitty enough humanize_number(9) doesn't do 1.6 Ghz type output. To generate a diff of this commit: cvs rdiff -u -r1.104 -r1.104.4.1 src/sys/arch/arm/arm32/cpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm32/cpu.c diff -u src/sys/arch/arm/arm32/cpu.c:1.104 src/sys/arch/arm/arm32/cpu.c:1.104.4.1 --- src/sys/arch/arm/arm32/cpu.c:1.104 Fri Mar 28 21:39:09 2014 +++ src/sys/arch/arm/arm32/cpu.c Mon Apr 6 01:57:57 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.c,v 1.104 2014/03/28 21:39:09 matt Exp $ */ +/* $NetBSD: cpu.c,v 1.104.4.1 2015/04/06 01:57:57 snj Exp $ */ /* * Copyright (c) 1995 Mark Brinicombe. @@ -46,7 +46,7 @@ #include sys/param.h -__KERNEL_RCSID(0, $NetBSD: cpu.c,v 1.104 2014/03/28 21:39:09 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: cpu.c,v 1.104.4.1 2015/04/06 01:57:57 snj Exp $); #include sys/systm.h #include sys/conf.h @@ -651,7 +651,7 @@ identify_arm_cpu(device_t dv, struct cpu } if (ci-ci_data.cpu_cc_freq != 0) { - char freqbuf[8]; + char freqbuf[10]; humanize_number(freqbuf, sizeof(freqbuf), ci-ci_data.cpu_cc_freq, Hz, 1000);
CVS commit: [netbsd-7] src/sys/arch/arm/arm32
Module Name:src Committed By: martin Date: Fri Mar 27 11:27:40 UTC 2015 Modified Files: src/sys/arch/arm/arm32 [netbsd-7]: cpuswitch.S genassym.cf Log Message: Pull up following revision(s) (requested by skrll in ticket #646): sys/arch/arm/arm32/genassym.cf: revision 1.70 sys/arch/arm/arm32/cpuswitch.S: revision 1.86-1.89 Only set vfp tpid registers and do ras lookups if new lwp is not LW_SYSTEM. To generate a diff of this commit: cvs rdiff -u -r1.84 -r1.84.2.1 src/sys/arch/arm/arm32/cpuswitch.S cvs rdiff -u -r1.69 -r1.69.2.1 src/sys/arch/arm/arm32/genassym.cf Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm32/cpuswitch.S diff -u src/sys/arch/arm/arm32/cpuswitch.S:1.84 src/sys/arch/arm/arm32/cpuswitch.S:1.84.2.1 --- src/sys/arch/arm/arm32/cpuswitch.S:1.84 Sun Jun 15 02:27:15 2014 +++ src/sys/arch/arm/arm32/cpuswitch.S Fri Mar 27 11:27:39 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: cpuswitch.S,v 1.84 2014/06/15 02:27:15 ozaki-r Exp $ */ +/* $NetBSD: cpuswitch.S,v 1.84.2.1 2015/03/27 11:27:39 martin Exp $ */ /* * Copyright 2003 Wasabi Systems, Inc. @@ -87,7 +87,7 @@ #include arm/asm.h #include arm/locore.h - RCSID($NetBSD: cpuswitch.S,v 1.84 2014/06/15 02:27:15 ozaki-r Exp $) + RCSID($NetBSD: cpuswitch.S,v 1.84.2.1 2015/03/27 11:27:39 martin Exp $) /* LINTSTUB: include sys/param.h */ @@ -137,18 +137,18 @@ ENTRY(cpu_switchto) mov r4, r0 #ifdef TPIDRPRW_IS_CURCPU - GET_CURCPU(r3) + GET_CURCPU(r5) #elif defined(TPIDRPRW_IS_CURLWP) mrc p15, 0, r0, c13, c0, 4 /* get old lwp (r4 maybe 0) */ - ldr r3, [r0, #(L_CPU)] /* get cpu from old lwp */ + ldr r5, [r0, #(L_CPU)] /* get cpu from old lwp */ #elif !defined(MULTIPROCESSOR) - ldr r3, [r6, #L_CPU] /* get cpu from new lwp */ + ldr r5, [r6, #L_CPU] /* get cpu from new lwp */ #else #error curcpu() method not defined #endif - /* rem: r3 = curcpu() */ /* rem: r4 = old lwp */ + /* rem: r5 = curcpu() */ /* rem: r6 = new lwp */ #ifndef __HAVE_UNNESTED_INTRS @@ -156,7 +156,7 @@ ENTRY(cpu_switchto) #endif #ifdef MULTIPROCESSOR - str r3, [r6, #(L_CPU)] + str r5, [r6, #(L_CPU)] #else /* l-l_cpu initialized in fork1() for single-processor */ #endif @@ -165,20 +165,16 @@ ENTRY(cpu_switchto) mcr p15, 0, r6, c13, c0, 4 /* set current lwp */ #endif /* We have a new curlwp now so make a note it */ - str r6, [r3, #(CI_CURLWP)] - - /* Get the new pcb */ - ldr r7, [r6, #(L_PCB)] + str r6, [r5, #(CI_CURLWP)] /* At this point we can allow IRQ's again. */ #ifndef __HAVE_UNNESTED_INTRS IRQenable #endif - /* rem: r3 = curcpu() */ /* rem: r4 = old lwp */ + /* rem: r5 = curcpu() */ /* rem: r6 = new lwp */ - /* rem: r7 = new pcb */ /* rem: interrupts are enabled */ /* @@ -190,24 +186,23 @@ ENTRY(cpu_switchto) teq r4, #0 beq .Ldo_switch - /* rem: r3 = curcpu() */ /* rem: r4 = old lwp */ + /* rem: r5 = curcpu() */ /* rem: r6 = new lwp */ - /* rem: r7 = new pcb */ /* rem: interrupts are enabled */ /* Save old context */ /* Get the user structure for the old lwp. */ - ldr r5, [r4, #(L_PCB)] + ldr r7, [r4, #(L_PCB)] /* Save all the registers in the old lwp's pcb */ #if defined(_ARM_ARCH_DWORD_OK) - strd r8, r9, [r5, #(PCB_R8)] - strd r10, r11, [r5, #(PCB_R10)] - strd r12, r13, [r5, #(PCB_R12)] + strd r8, r9, [r7, #(PCB_R8)] + strd r10, r11, [r7, #(PCB_R10)] + strd r12, r13, [r7, #(PCB_R12)] #else - add r0, r5, #(PCB_R8) + add r0, r7, #(PCB_R8) stmia r0, {r8-r13} #endif @@ -216,29 +211,38 @@ ENTRY(cpu_switchto) * Save user read/write thread/process id register */ mrc p15, 0, r0, c13, c0, 2 - str r0, [r5, #(PCB_USER_PID_RW)] + str r0, [r7, #(PCB_USER_PID_RW)] #endif /* * NOTE: We can now use r8-r13 until it is time to restore * them for the new process. */ - /* rem: r3 = curcpu() */ /* rem: r4 = old lwp */ - /* rem: r5 = old pcb */ + /* rem: r5 = curcpu() */ /* rem: r6 = new lwp */ - /* rem: r7 = new pcb */ /* rem: interrupts are enabled */ /* Restore saved context */ .Ldo_switch: - /* rem: r3 = curcpu() */ + /* Get the new pcb */ + ldr r7, [r6, #(L_PCB)] + /* rem: r4 = old lwp */ + /* rem: r5 = curcpu() */ /* rem: r6 = new lwp */ /* rem: r7 = new pcb */ /* rem: interrupts are enabled */ + /* + * If we are switching to a system lwp, don't bother restoring + * thread or vfp registers and skip the ras check. + */ + ldr r0, [r6, #(L_FLAG)] + tst r0, #(LW_SYSTEM) + bne .Lswitch_do_restore + #ifdef _ARM_ARCH_6 /* * Restore user thread/process id registers @@ -253,14 +257,34 @@ ENTRY(cpu_switchto) /* * If we have a VFP, we need to load FPEXC. */ - ldr r0, [r3, #(CI_VFP_ID)] + ldr r0, [r5, #(CI_VFP_ID)] cmp r0, #0 ldrne r0, [r7, #(PCB_VFP_FPEXC)] vmsrne fpexc, r0 #endif - ldr r5, [r6, #(L_PROC)] /* fetch the proc for below */ + /* + * Check for restartable atomic sequences (RAS). + */ +
CVS commit: [netbsd-7] src/sys/arch/arm/arm32
Module Name:src Committed By: snj Date: Mon Jan 12 21:00:29 UTC 2015 Modified Files: src/sys/arch/arm/arm32 [netbsd-7]: arm32_boot.c Log Message: Pull up following revision(s) (requested by jmcneill in ticket #412): sys/arch/arm/arm32/arm32_boot.c: revision 1.12 use IPL_NONE for CPU attach message serialization mutex To generate a diff of this commit: cvs rdiff -u -r1.7.4.2 -r1.7.4.3 src/sys/arch/arm/arm32/arm32_boot.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm32/arm32_boot.c diff -u src/sys/arch/arm/arm32/arm32_boot.c:1.7.4.2 src/sys/arch/arm/arm32/arm32_boot.c:1.7.4.3 --- src/sys/arch/arm/arm32/arm32_boot.c:1.7.4.2 Sat Dec 13 19:32:43 2014 +++ src/sys/arch/arm/arm32/arm32_boot.c Mon Jan 12 21:00:29 2015 @@ -1,4 +1,4 @@ -/* $NetBSD: arm32_boot.c,v 1.7.4.2 2014/12/13 19:32:43 martin Exp $ */ +/* $NetBSD: arm32_boot.c,v 1.7.4.3 2015/01/12 21:00:29 snj Exp $ */ /* * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. @@ -123,7 +123,7 @@ #include sys/cdefs.h -__KERNEL_RCSID(1, $NetBSD: arm32_boot.c,v 1.7.4.2 2014/12/13 19:32:43 martin Exp $); +__KERNEL_RCSID(1, $NetBSD: arm32_boot.c,v 1.7.4.3 2015/01/12 21:00:29 snj Exp $); #include opt_ddb.h #include opt_kgdb.h @@ -305,7 +305,7 @@ initarm_common(vaddr_t kvm_base, vsize_t #endif #ifdef MULTIPROCESSOR - mutex_init(cpu_hatch_lock, MUTEX_DEFAULT, IPL_HIGH); + mutex_init(cpu_hatch_lock, MUTEX_DEFAULT, IPL_NONE); #endif #ifdef VERBOSE_INIT_ARM
CVS commit: [netbsd-7] src/sys/arch/arm/arm32
Module Name:src Committed By: martin Date: Sat Dec 13 19:32:43 UTC 2014 Modified Files: src/sys/arch/arm/arm32 [netbsd-7]: arm32_boot.c Log Message: Pull up following revision(s) (requested by jmcneill in ticket #319): sys/arch/arm/arm32/arm32_boot.c: revision 1.11 serialize printing of secondary cpu info To generate a diff of this commit: cvs rdiff -u -r1.7.4.1 -r1.7.4.2 src/sys/arch/arm/arm32/arm32_boot.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm32/arm32_boot.c diff -u src/sys/arch/arm/arm32/arm32_boot.c:1.7.4.1 src/sys/arch/arm/arm32/arm32_boot.c:1.7.4.2 --- src/sys/arch/arm/arm32/arm32_boot.c:1.7.4.1 Sun Nov 9 16:05:25 2014 +++ src/sys/arch/arm/arm32/arm32_boot.c Sat Dec 13 19:32:43 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: arm32_boot.c,v 1.7.4.1 2014/11/09 16:05:25 martin Exp $ */ +/* $NetBSD: arm32_boot.c,v 1.7.4.2 2014/12/13 19:32:43 martin Exp $ */ /* * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. @@ -123,7 +123,7 @@ #include sys/cdefs.h -__KERNEL_RCSID(1, $NetBSD: arm32_boot.c,v 1.7.4.1 2014/11/09 16:05:25 martin Exp $); +__KERNEL_RCSID(1, $NetBSD: arm32_boot.c,v 1.7.4.2 2014/12/13 19:32:43 martin Exp $); #include opt_ddb.h #include opt_kgdb.h @@ -151,6 +151,10 @@ __KERNEL_RCSID(1, $NetBSD: arm32_boot.c #include sys/kgdb.h #endif +#ifdef MULTIPROCESSOR +static kmutex_t cpu_hatch_lock; +#endif + vaddr_t initarm_common(vaddr_t kvm_base, vsize_t kvm_size, const struct boot_physmem *bp, size_t nbp) @@ -300,6 +304,10 @@ initarm_common(vaddr_t kvm_base, vsize_t Debugger(); #endif +#ifdef MULTIPROCESSOR + mutex_init(cpu_hatch_lock, MUTEX_DEFAULT, IPL_HIGH); +#endif + #ifdef VERBOSE_INIT_ARM printf(done.\n); #endif @@ -383,6 +391,8 @@ cpu_hatch(struct cpu_info *ci, cpuid_t c } #endif + mutex_enter(cpu_hatch_lock); + aprint_naive(%s, device_xname(ci-ci_dev)); aprint_normal(%s, device_xname(ci-ci_dev)); identify_arm_cpu(ci-ci_dev, ci); @@ -391,6 +401,8 @@ cpu_hatch(struct cpu_info *ci, cpuid_t c #endif vfp_attach(ci); + mutex_exit(cpu_hatch_lock); + #ifdef VERBOSE_INIT_ARM printf( interrupts); #endif
CVS commit: [netbsd-7] src/sys/arch/arm/arm32
Module Name:src Committed By: snj Date: Fri Nov 14 08:16:56 UTC 2014 Modified Files: src/sys/arch/arm/arm32 [netbsd-7]: kobj_machdep.c Log Message: Pull up following revision(s) (requested by martin in ticket #228): sys/arch/arm/arm32/kobj_machdep.c: revision 1.10 PR port-arm/49299: add support for BE8 byte swapped instructions. To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.9.4.1 src/sys/arch/arm/arm32/kobj_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm32/kobj_machdep.c diff -u src/sys/arch/arm/arm32/kobj_machdep.c:1.9 src/sys/arch/arm/arm32/kobj_machdep.c:1.9.4.1 --- src/sys/arch/arm/arm32/kobj_machdep.c:1.9 Tue Aug 27 06:41:05 2013 +++ src/sys/arch/arm/arm32/kobj_machdep.c Fri Nov 14 08:16:56 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: kobj_machdep.c,v 1.9 2013/08/27 06:41:05 skrll Exp $ */ +/* $NetBSD: kobj_machdep.c,v 1.9.4.1 2014/11/14 08:16:56 snj Exp $ */ /*- * Copyright (c) 2008 The NetBSD Foundation, Inc. @@ -52,7 +52,7 @@ */ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: kobj_machdep.c,v 1.9 2013/08/27 06:41:05 skrll Exp $); +__KERNEL_RCSID(0, $NetBSD: kobj_machdep.c,v 1.9.4.1 2014/11/14 08:16:56 snj Exp $); #define ELFSIZE ARCH_ELFSIZE @@ -61,8 +61,12 @@ __KERNEL_RCSID(0, $NetBSD: kobj_machdep #include sys/kobj.h #include sys/exec.h #include sys/exec_elf.h +#include sys/kmem.h +#include sys/ksyms.h +#include sys/kobj_impl.h #include arm/cpufunc.h +#include arm/locore.h int kobj_reloc(kobj_t ko, uintptr_t relocbase, const void *data, @@ -203,11 +207,201 @@ kobj_reloc(kobj_t ko, uintptr_t relocbas return -1; } +#if __ARMEB__ + +enum be8_magic_sym_type { + Other, ArmStart, ThumbStart, DataStart +}; + +struct be8_marker { + enum be8_magic_sym_type type; + void *addr; +}; + +struct be8_marker_list { + size_t cnt; + struct be8_marker *markers; +}; + +/* + * See ELF for the ARM Architecture, Section 4.5.5: Mapping Symbols + * ARM reserves $a/$d/$t (and variants like $a.2) to mark start of + * arm/thumb code sections to allow conversion from ARM32-EB to -BE8 + * format. + */ +static enum be8_magic_sym_type +be8_sym_type(const char *name, int info) +{ + if (ELF_ST_BIND(info) != STB_LOCAL) + return Other; + if (ELF_ST_TYPE(info) != STT_NOTYPE) + return Other; + if (name[0] != '$' || name[1] == '\0' || + (name[2] != '\0' name[2] != '.')) + return Other; + + switch (name[1]) { + case 'a': + return ArmStart; + case 'd': + return DataStart; + case 't': + return ThumbStart; + default: + return Other; + } +} + +static int +be8_ksym_count(const char *name, int symindex, void *value, uint32_t size, + int info, void *cookie) +{ + size_t *res = cookie; + enum be8_magic_sym_type t = be8_sym_type(name, info); + + if (t != Other) + (*res)++; + return 0; +} + +static int +be8_ksym_add(const char *name, int symindex, void *value, uint32_t size, + int info, void *cookie) +{ + size_t ndx; + struct be8_marker_list *list = cookie; + enum be8_magic_sym_type t = be8_sym_type(name, info); + + if (t == Other) + return 0; + + ndx = list-cnt++; + list-markers[ndx].type = t; + list-markers[ndx].addr = value; + + return 0; +} + +static int +be8_ksym_comp(const void *a, const void *b) +{ + const struct be8_marker *ma = a, *mb = b; + uintptr_t va = (uintptr_t)ma-addr, vb = (uintptr_t)mb-addr; + + if (va == vb) + return 0; + if (va vb) + return -1; + return 1; +} + +static void +be8_ksym_swap(void *start, size_t size, const struct be8_marker_list *list) +{ + uintptr_t va_end = (uintptr_t)start + size; + size_t i; + uint32_t *p32, *p32_end, v32; + uint16_t *p16, *p16_end, v16; + + /* find first relevant list entry */ + for (i = 0; i list-cnt; i++) + if (start = list-markers[i].addr) + break; + + /* swap all arm and thumb code parts of this section */ + for ( ; i list-cnt; i++) { + switch (list-markers[i].type) { + case ArmStart: + p32 = (uint32_t*)list-markers[i].addr; + p32_end = (uint32_t*)va_end; + if (i+1 list-cnt) { +if ((uintptr_t)list-markers[i+1].addr + va_end) + p32_end = (uint32_t*) + list-markers[i+1].addr; + } + while (p32 p32_end) { +v32 = bswap32(*p32); +*p32++ = v32; + } + break; + case ThumbStart: + p16 = (uint16_t*)list-markers[i].addr; + p16_end = (uint16_t*)va_end; + if (i+1 list-cnt) { +if ((uintptr_t)list-markers[i+1].addr + va_end) + p16_end = (uint16_t*) + list-markers[i+1].addr; + } + while (p16 p16_end) { +v16 = bswap16(*p16); +*p16++ = v16; + } + break; + default: + break; + } + } +} + +static void +kobj_be8_fixup(kobj_t ko) +{ + size_t relsym_cnt = 0, i, msize; + struct be8_marker_list list; + struct be8_marker tmp; + + /* + * Count all special relocations symbols + */ + ksyms_mod_foreach(ko-ko_name, be8_ksym_count, relsym_cnt); + + /* + * Provide storage for the address list and add the symbols +
CVS commit: [netbsd-7] src/sys/arch/arm/arm32
Module Name:src Committed By: martin Date: Fri Nov 14 07:29:13 UTC 2014 Modified Files: src/sys/arch/arm/arm32 [netbsd-7]: bus_dma.c locore.S Log Message: Pull up the following revisions, requested by skrll in ticket #222: src/sys/arch/arm/arm32/locore.S 1.37 src/sys/arch/arm/arm32/bus_dma.c 1.87 Make the initial svcstack is doubleword aligned if EABI. With PMAP_NEED_ALLOC_POOLPAGE, before using pmap_map_poolpage make sure the page comes from the same freelist that pmap_map_poolpage uses. To generate a diff of this commit: cvs rdiff -u -r1.86.2.1 -r1.86.2.2 src/sys/arch/arm/arm32/bus_dma.c cvs rdiff -u -r1.36 -r1.36.2.1 src/sys/arch/arm/arm32/locore.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm32/bus_dma.c diff -u src/sys/arch/arm/arm32/bus_dma.c:1.86.2.1 src/sys/arch/arm/arm32/bus_dma.c:1.86.2.2 --- src/sys/arch/arm/arm32/bus_dma.c:1.86.2.1 Mon Nov 10 19:57:26 2014 +++ src/sys/arch/arm/arm32/bus_dma.c Fri Nov 14 07:29:13 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: bus_dma.c,v 1.86.2.1 2014/11/10 19:57:26 martin Exp $ */ +/* $NetBSD: bus_dma.c,v 1.86.2.2 2014/11/14 07:29:13 martin Exp $ */ /*- * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. @@ -35,7 +35,7 @@ #include opt_arm_bus_space.h #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: bus_dma.c,v 1.86.2.1 2014/11/10 19:57:26 martin Exp $); +__KERNEL_RCSID(0, $NetBSD: bus_dma.c,v 1.86.2.2 2014/11/14 07:29:13 martin Exp $); #include sys/param.h #include sys/systm.h @@ -1307,6 +1307,19 @@ _bus_dmamem_map(bus_dma_tag_t t, bus_dma } } +#ifdef PMAP_NEED_ALLOC_POOLPAGE + /* + * The page can only be direct mapped if was allocated out + * of the arm poolpage vm freelist. + */ + int lcv = vm_physseg_find(atop(pa), NULL); + KASSERT(lcv != -1); + if (direct_mapable) { + direct_mapable = + (arm_poolpage_vmfreelist == VM_PHYSMEM_PTR(lcv)-free_list); + } +#endif + if (direct_mapable) { *kvap = (void *)PMAP_MAP_POOLPAGE(pa); #ifdef DEBUG_DMA Index: src/sys/arch/arm/arm32/locore.S diff -u src/sys/arch/arm/arm32/locore.S:1.36 src/sys/arch/arm/arm32/locore.S:1.36.2.1 --- src/sys/arch/arm/arm32/locore.S:1.36 Fri Apr 11 16:34:29 2014 +++ src/sys/arch/arm/arm32/locore.S Fri Nov 14 07:29:13 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: locore.S,v 1.36 2014/04/11 16:34:29 matt Exp $ */ +/* $NetBSD: locore.S,v 1.36.2.1 2014/11/14 07:29:13 martin Exp $ */ /* * Copyright (C) 1994-1997 Mark Brinicombe @@ -40,7 +40,7 @@ /* What size should this really be ? It is only used by init_arm() */ #define INIT_ARM_STACK_SIZE 2048 - RCSID($NetBSD: locore.S,v 1.36 2014/04/11 16:34:29 matt Exp $) + RCSID($NetBSD: locore.S,v 1.36.2.1 2014/11/14 07:29:13 martin Exp $) /* * This is for kvm_mkdb, and should be the address of the beginning @@ -115,6 +115,9 @@ ASENTRY_NP(start) ASEND(start) .bss +#ifdef __ARM_EABI__ + .align 3 +#endif svcstk: .space INIT_ARM_STACK_SIZE
CVS commit: [netbsd-7] src/sys/arch/arm/arm32
Module Name:src Committed By: martin Date: Mon Nov 10 16:32:56 UTC 2014 Modified Files: src/sys/arch/arm/arm32 [netbsd-7]: arm32_tlb.c Log Message: Revision 1.7 got somehow lost in the merge from -current To generate a diff of this commit: cvs rdiff -u -r1.2.6.1 -r1.2.6.2 src/sys/arch/arm/arm32/arm32_tlb.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm32/arm32_tlb.c diff -u src/sys/arch/arm/arm32/arm32_tlb.c:1.2.6.1 src/sys/arch/arm/arm32/arm32_tlb.c:1.2.6.2 --- src/sys/arch/arm/arm32/arm32_tlb.c:1.2.6.1 Sun Nov 9 16:05:25 2014 +++ src/sys/arch/arm/arm32/arm32_tlb.c Mon Nov 10 16:32:56 2014 @@ -30,7 +30,7 @@ #include opt_multiprocessor.h #include sys/cdefs.h -__KERNEL_RCSID(1, $NetBSD: arm32_tlb.c,v 1.2.6.1 2014/11/09 16:05:25 martin Exp $); +__KERNEL_RCSID(1, $NetBSD: arm32_tlb.c,v 1.2.6.2 2014/11/10 16:32:56 martin Exp $); #include sys/param.h #include sys/types.h @@ -122,6 +122,7 @@ tlb_invalidate_addr(vaddr_t va, tlb_asid #endif //armreg_tlbiall_write(asid); } + arm_dsb(); arm_isb(); }