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[spi-devel-general] [patch 3/6] spi_s3c24xx; Fix transfer setup code
Since the changes to the bitbang driver, there is the possibility we
will be called with either the speed_hz or bpw values zero. We take
these to mean that the default values (8 bits per word, or maximum
bus speed).
Signed-off-by: Ben Dooks b...@simtec.co.uk
---
Index: b/drivers/spi/spi_s3c24xx.c
===
--- a/drivers/spi/spi_s3c24xx.c 2009-07-27 18:55:16.0 +0100
+++ b/drivers/spi/spi_s3c24xx.c 2009-07-27 18:56:08.0 +0100
@@ -116,6 +116,12 @@ static int s3c24xx_spi_setupxfer(struct
bpw = t ? t-bits_per_word : spi-bits_per_word;
hz = t ? t-speed_hz : spi-max_speed_hz;
+ if (!bpw)
+ bpw = 8;
+
+ if (!hz)
+ hz = spi-max_speed_hz;
+
if (bpw != 8) {
dev_err(spi-dev, invalid bits-per-word (%d)\n, bpw);
return -EINVAL;
--
--
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[spi-devel-general] [patch 1/6] spi: fix spelling of automatically in documentation
Fix spelling of automatically in Documentation/spi/spi-summary. Signed-off-by: Ben Dooks b...@simtec.co.uk --- Documentation/spi/spi-summary |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Index: b/Documentation/spi/spi-summary === --- a/Documentation/spi/spi-summary 2009-07-09 15:07:37.0 +0100 +++ b/Documentation/spi/spi-summary 2009-07-09 15:09:41.0 +0100 @@ -350,7 +350,7 @@ SPI protocol drivers somewhat resemble p .resume = CHIP_resume, }; -The driver core will autmatically attempt to bind this driver to any SPI +The driver core will automatically attempt to bind this driver to any SPI device whose board_info gave a modalias of CHIP. Your probe() code might look like this unless you're creating a device which is managing a bus (appearing under /sys/class/spi_master). -- -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [patch 5/6] spi_s3c24xx: use dev_pm_ops
Change the spi_s3c24xx driver to use dev_pm_ops to avoid the
following warning during probe:
Platform driver 's3c2410-spi' needs updating - please use dev_pm_ops
Signed-off-by: Ben Dooks b...@simtec.co.uk
---
---
drivers/spi/spi_s3c24xx.c | 22 +-
1 file changed, 13 insertions(+), 9 deletions(-)
Index: b/drivers/spi/spi_s3c24xx.c
===
--- a/drivers/spi/spi_s3c24xx.c 2009-07-28 15:20:16.0 +0100
+++ b/drivers/spi/spi_s3c24xx.c 2009-07-28 15:20:22.0 +0100
@@ -418,9 +418,9 @@ static int __exit s3c24xx_spi_remove(str
#ifdef CONFIG_PM
-static int s3c24xx_spi_suspend(struct platform_device *pdev, pm_message_t msg)
+static int s3c24xx_spi_suspend(struct device *dev)
{
- struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
+ struct s3c24xx_spi *hw = platform_get_drvdata(to_platform_device(dev));
if (hw-pdata hw-pdata-gpio_setup)
hw-pdata-gpio_setup(hw-pdata, 0);
@@ -429,27 +429,31 @@ static int s3c24xx_spi_suspend(struct pl
return 0;
}
-static int s3c24xx_spi_resume(struct platform_device *pdev)
+static int s3c24xx_spi_resume(struct device *dev)
{
- struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
+ struct s3c24xx_spi *hw = platform_get_drvdata(to_platform_device(dev));
s3c24xx_spi_initialsetup(hw);
return 0;
}
+static struct dev_pm_ops s3c24xx_spi_pmops = {
+ .suspend= s3c24xx_spi_suspend,
+ .resume = s3c24xx_spi_resume,
+};
+
+#define S3C24XX_SPI_PMOPS s3c24xx_spi_pmops
#else
-#define s3c24xx_spi_suspend NULL
-#define s3c24xx_spi_resume NULL
-#endif
+#define S3C24XX_SPI_PMOPS NULL
+#endif /* CONFIG_PM */
MODULE_ALIAS(platform:s3c2410-spi);
static struct platform_driver s3c24xx_spi_driver = {
.remove = __exit_p(s3c24xx_spi_remove),
- .suspend= s3c24xx_spi_suspend,
- .resume = s3c24xx_spi_resume,
.driver = {
.name = s3c2410-spi,
.owner = THIS_MODULE,
+ .pm = S3C24XX_SPI_PMOPS,
},
};
--
--
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[spi-devel-general] [patch 6/6] spi_s3c24xx: cache device setup data
With the update to the spi_bitbang driver, the transfer setup code is
being called more often, and thus is often re-doing calculations that
have been done before. The SPI layer allows our driver to add its
own data to each device so add a result cache to each device.
This should also remove the problem where we where directly setting up
registers in the setup call which meant we might overwrite the state of
an extant transfer.,
Signed-off-by: Ben Dooks b...@simtec.co.uk
---
drivers/spi/spi_s3c24xx.c | 126 --
1 file changed, 89 insertions(+), 37 deletions(-)
Index: b/drivers/spi/spi_s3c24xx.c
===
--- a/drivers/spi/spi_s3c24xx.c 2009-07-28 15:20:22.0 +0100
+++ b/drivers/spi/spi_s3c24xx.c 2009-07-28 15:20:28.0 +0100
@@ -28,6 +28,20 @@
#include plat/regs-spi.h
#include mach/spi.h
+/**
+ * s3c24xx_spi_devstate - per device data
+ * @hz: Last frequency calculated for @sppre field.
+ * @mode: Last mode setting for the @spcon field.
+ * @spcon: Value to write to the SPCON register.
+ * @sppre: Value to write to the SPPRE register.
+ */
+struct s3c24xx_spi_devstate {
+ unsigned inthz;
+ unsigned intmode;
+ u8 spcon;
+ u8 sppre;
+};
+
struct s3c24xx_spi {
/* bitbang has to be first */
struct spi_bitbang bitbang;
@@ -68,43 +82,31 @@ static void s3c24xx_spi_gpiocs(struct s3
static void s3c24xx_spi_chipsel(struct spi_device *spi, int value)
{
+ struct s3c24xx_spi_devstate *cs = spi-controller_state;
struct s3c24xx_spi *hw = to_hw(spi);
unsigned int cspol = spi-mode SPI_CS_HIGH ? 1 : 0;
- unsigned int spcon;
+
+ /* change the chipselect state and the state of the spi engine clock */
switch (value) {
case BITBANG_CS_INACTIVE:
hw-set_cs(hw-pdata, spi-chip_select, cspol^1);
+ writeb(cs-spcon, hw-regs + S3C2410_SPCON);
break;
case BITBANG_CS_ACTIVE:
- spcon = readb(hw-regs + S3C2410_SPCON);
-
- if (spi-mode SPI_CPHA)
- spcon |= S3C2410_SPCON_CPHA_FMTB;
- else
- spcon = ~S3C2410_SPCON_CPHA_FMTB;
-
- if (spi-mode SPI_CPOL)
- spcon |= S3C2410_SPCON_CPOL_HIGH;
- else
- spcon = ~S3C2410_SPCON_CPOL_HIGH;
-
- spcon |= S3C2410_SPCON_ENSCK;
-
- /* write new configration */
-
- writeb(spcon, hw-regs + S3C2410_SPCON);
+ writeb(cs-spcon | S3C2410_SPCON_ENSCK,
+ hw-regs + S3C2410_SPCON);
hw-set_cs(hw-pdata, spi-chip_select, cspol);
-
break;
}
}
-static int s3c24xx_spi_setupxfer(struct spi_device *spi,
-struct spi_transfer *t)
+static int s3c24xx_spi_update_state(struct spi_device *spi,
+ struct spi_transfer *t)
{
struct s3c24xx_spi *hw = to_hw(spi);
+ struct s3c24xx_spi_devstate *cs = spi-controller_state;
unsigned int bpw;
unsigned int hz;
unsigned int div;
@@ -124,41 +126,89 @@ static int s3c24xx_spi_setupxfer(struct
return -EINVAL;
}
- clk = clk_get_rate(hw-clk);
- div = DIV_ROUND_UP(clk, hz * 2) - 1;
+ if (spi-mode != cs-mode) {
+ u8 spcon = SPCON_DEFAULT;
- if (div 255)
- div = 255;
+ if (spi-mode SPI_CPHA)
+ spcon |= S3C2410_SPCON_CPHA_FMTB;
- dev_dbg(spi-dev, setting pre-scaler to %d (wanted %d, got %ld)\n,
- div, hz, clk / (2 * (div + 1)));
+ if (spi-mode SPI_CPOL)
+ spcon |= S3C2410_SPCON_CPOL_HIGH;
+ cs-mode = spi-mode;
+ cs-spcon = spcon;
+ }
- writeb(div, hw-regs + S3C2410_SPPRE);
+ if (cs-hz != hz) {
+ clk = clk_get_rate(hw-clk);
+ div = DIV_ROUND_UP(clk, hz * 2) - 1;
- spin_lock(hw-bitbang.lock);
- if (!hw-bitbang.busy) {
- hw-bitbang.chipselect(spi, BITBANG_CS_INACTIVE);
- /* need to ndelay for 0.5 clocktick ? */
+ if (div 255)
+ div = 255;
+
+ dev_dbg(spi-dev, pre-scaler=%d (wanted %d, got %ld)\n,
+ div, hz, clk / (2 * (div + 1)));
+
+ cs-hz = hz;
+ cs-sppre = div;
}
- spin_unlock(hw-bitbang.lock);
return 0;
}
+static int s3c24xx_spi_setupxfer(struct spi_device *spi,
+struct spi_transfer *t)
+{
+ struct s3c24xx_spi_devstate *cs = spi-controller_state;
+ struct s3c24xx_spi *hw = to_hw(spi);
+ int ret;
+
+ ret = s3c24xx_spi_update_state(spi, t);
+
[spi-devel-general] [patch 2/6] spi_s3c24xx: fix clock rate calculation
Currently the clock rate calculation may round as pleased, which means that it is possible that we will round down and end up with a faster clock rate than intended. Change the calculation to use DIV_ROUND_UP() to ensure that we end up with a clock rate either the same as or lower than the user requested one. Signed-off-by: Ben Dooks b...@simtec.co.uk --- drivers/spi/spi_s3c24xx.c | 17 +++-- 1 file changed, 7 insertions(+), 10 deletions(-) Index: b/drivers/spi/spi_s3c24xx.c === --- a/drivers/spi/spi_s3c24xx.c 2009-07-14 13:56:07.0 +0100 +++ b/drivers/spi/spi_s3c24xx.c 2009-07-14 14:08:45.0 +0100 @@ -111,6 +111,7 @@ static int s3c24xx_spi_setupxfer(struct unsigned int bpw; unsigned int hz; unsigned int div; + unsigned long clk; bpw = t ? t-bits_per_word : spi-bits_per_word; hz = t ? t-speed_hz : spi-max_speed_hz; @@ -120,20 +121,16 @@ static int s3c24xx_spi_setupxfer(struct return -EINVAL; } - div = clk_get_rate(hw-clk) / hz; - - /* is clk = pclk / (2 * (pre+1)), or is it -*clk = (pclk * 2) / ( pre + 1) */ - - div /= 2; - - if (div 0) - div -= 1; + clk = clk_get_rate(hw-clk); + div = DIV_ROUND_UP(clk, hz * 2) - 1; if (div 255) div = 255; - dev_dbg(spi-dev, setting pre-scaler to %d (hz %d)\n, div, hz); + dev_dbg(spi-dev, setting pre-scaler to %d (wanted %d, got %ld)\n, + div, hz, clk / (2 * (div + 1))); + + writeb(div, hw-regs + S3C2410_SPPRE); spin_lock(hw-bitbang.lock); -- -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
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