[PATCH] SPI: MIPS: lantiq: adds spi-xway
This patch adds support for the SPI core found on several Lantiq SoCs. The Driver has been runtime tested in combination with m25p80 Flash Devices on Amazon_SE and VR9. Signed-off-by: Daniel Schwierzeck daniel.schwierz...@googlemail.com Signed-off-by: John Crispin blo...@openwrt.org --- drivers/spi/Kconfig|8 + drivers/spi/Makefile |1 + drivers/spi/spi-xway.c | 977 3 files changed, 986 insertions(+), 0 deletions(-) create mode 100644 drivers/spi/spi-xway.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 5f84b55..2f6a726 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -419,6 +419,14 @@ config SPI_NUC900 help SPI driver for Nuvoton NUC900 series ARM SoCs +config SPI_XWAY + tristate Lantiq XWAY SPI controller + depends on LANTIQ SOC_TYPE_XWAY + select SPI_BITBANG + help + This driver supports the Lantiq SoC SPI controller in master + mode. + # # Add new SPI master controllers in alphabetical order above this line # diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 3920dcf..5189bf5 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -64,4 +64,5 @@ obj-$(CONFIG_SPI_TOPCLIFF_PCH)+= spi-topcliff-pch.o obj-$(CONFIG_SPI_TXX9) += spi-txx9.o obj-$(CONFIG_SPI_XCOMM)+= spi-xcomm.o obj-$(CONFIG_SPI_XILINX) += spi-xilinx.o +obj-$(CONFIG_SPI_XWAY) += spi-xway.o diff --git a/drivers/spi/spi-xway.c b/drivers/spi/spi-xway.c new file mode 100644 index 000..8441085 --- /dev/null +++ b/drivers/spi/spi-xway.c @@ -0,0 +1,977 @@ +/* + * Lantiq SoC SPI controller + * + * Copyright (C) 2011 Daniel Schwierzeck daniel.schwierz...@googlemail.com + * Copyright (C) 2012 John Crispin blo...@openwrt.org + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + */ + +#include linux/init.h +#include linux/module.h +#include linux/workqueue.h +#include linux/platform_device.h +#include linux/io.h +#include linux/sched.h +#include linux/delay.h +#include linux/interrupt.h +#include linux/completion.h +#include linux/spinlock.h +#include linux/err.h +#include linux/clk.h +#include linux/spi/spi.h +#include linux/spi/spi_bitbang.h +#include linux/of_irq.h + +#include lantiq_soc.h + +#define LTQ_SPI_CLC0x00/* Clock control */ +#define LTQ_SPI_PISEL 0x04/* Port input select */ +#define LTQ_SPI_ID 0x08/* Identification */ +#define LTQ_SPI_CON0x10/* Control */ +#define LTQ_SPI_STAT 0x14/* Status */ +#define LTQ_SPI_WHBSTATE 0x18/* Write HW modified state */ +#define LTQ_SPI_TB 0x20/* Transmit buffer */ +#define LTQ_SPI_RB 0x24/* Receive buffer */ +#define LTQ_SPI_RXFCON 0x30/* Receive FIFO control */ +#define LTQ_SPI_TXFCON 0x34/* Transmit FIFO control */ +#define LTQ_SPI_FSTAT 0x38/* FIFO status */ +#define LTQ_SPI_BRT0x40/* Baudrate timer */ +#define LTQ_SPI_BRSTAT 0x44/* Baudrate timer status */ +#define LTQ_SPI_SFCON 0x60/* Serial frame control */ +#define LTQ_SPI_SFSTAT 0x64/* Serial frame status */ +#define LTQ_SPI_GPOCON 0x70/* General purpose output control */ +#define LTQ_SPI_GPOSTAT0x74/* General purpose output status */ +#define LTQ_SPI_FGPO 0x78/* Forced general purpose output */ +#define LTQ_SPI_RXREQ 0x80/* Receive request */ +#define LTQ_SPI_RXCNT 0x84/* Receive count */ +#define LTQ_SPI_DMACON 0xEC/* DMA control */ +#define LTQ_SPI_IRNEN 0xF4/* Interrupt node enable */ +#define LTQ_SPI_IRNICR 0xF8/* Interrupt node interrupt capture */ +#define LTQ_SPI_IRNCR 0xFC/* Interrupt node control */ + +#define LTQ_SPI_CLC_SMC_SHIFT 16 /* Clock divider for sleep mode */ +#define LTQ_SPI_CLC_SMC_MASK 0xFF +#define LTQ_SPI_CLC_RMC_SHIFT 8 /* Clock divider for normal run mode */ +#define LTQ_SPI_CLC_RMC_MASK 0xFF +#define LTQ_SPI_CLC_DISS BIT(1) /* Disable status bit */ +#define LTQ_SPI_CLC_DISR BIT(0) /* Disable request bit */ + +#define LTQ_SPI_ID_TXFS_SHIFT 24 /* Implemented TX FIFO size */ +#define LTQ_SPI_ID_TXFS_MASK 0x3F +#define LTQ_SPI_ID_RXFS_SHIFT 16 /* Implemented RX FIFO size */ +#define LTQ_SPI_ID_RXFS_MASK 0x3F +#define LTQ_SPI_ID_REV_MASK0x1F/* Hardware revision number */ +#define LTQ_SPI_ID_CFG BIT(5) /* DMA interface support */ + +#define LTQ_SPI_CON_BM_SHIFT 16 /* Data width selection */ +#define LTQ_SPI_CON_BM_MASK0x1F +#define LTQ_SPI_CON_EM BIT(24) /* Echo mode */ +#define LTQ_SPI_CON_IDLE BIT(23) /* Idle bit value */
Re: Unbalanced calls to spi_master_get in coldfire-qspi and s3c64xx SPI master drivers
On 14 August 2012 03:14, Guenter Roeck li...@roeck-us.net wrote: Hi all, looking through SPI master drivers, I noticed that the following drivers call spi_master_get() in their suspend and resume functions. Yet, there is no matching call to spi_master_put(), meaning the reference count will increase with each suspend/resume cycle. spi-coldfire-qspi.c spi-s3c64xx.c Other SPI master drivers also support suspend and resume, but do not call spi_master_get() in the suspend/resume functions. The spi-pl022 driver calls spi_master_suspend() and spi_master_resume() like the above, but does not call spi_master_get() either. This leads me to believe that the above drivers will hang on unload after a suspend/resume cycle due to the extra references. Can someone please have a look and confirm if my understanding is correct ? If so I'll send a set of patches to fix the problems. For spi-s3c64xx.c, yes it does seem that the spi_master_get() and spi_master_put() calls are not balanced. The probable change could be - struct spi_master *master = spi_master_get(dev_get_drvdata(dev)); + struct spi_master *master = dev_get_drvdata(dev); Thanks, Thomas. -- Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[PATCH] spi: spi-bcm63xx: Pass NULL to platform_set_drvdata
platform_set_drvdata expects a void *, so pass NULL instead of 0. Signed-off-by: Tobias Klauser tklau...@distanz.ch --- drivers/spi/spi-bcm63xx.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/spi/spi-bcm63xx.c b/drivers/spi/spi-bcm63xx.c index 6d97047..fc357e2 100644 --- a/drivers/spi/spi-bcm63xx.c +++ b/drivers/spi/spi-bcm63xx.c @@ -463,7 +463,7 @@ static int __devexit bcm63xx_spi_remove(struct platform_device *pdev) clk_disable(bs-clk); clk_put(bs-clk); - platform_set_drvdata(pdev, 0); + platform_set_drvdata(pdev, NULL); spi_master_put(master); -- 1.7.5.4 -- Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[PATCH] spi: spi-xilinx: Pass NULL to platform_set_drvdata
platform_set_drvdata expects a void *, so pass NULL instead of 0.
Signed-off-by: Tobias Klauser tklau...@distanz.ch
---
drivers/spi/spi-xilinx.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
index 4c5a663..2501700 100644
--- a/drivers/spi/spi-xilinx.c
+++ b/drivers/spi/spi-xilinx.c
@@ -521,7 +521,7 @@ static int __devinit xilinx_spi_probe(struct
platform_device *dev)
static int __devexit xilinx_spi_remove(struct platform_device *dev)
{
xilinx_spi_deinit(platform_get_drvdata(dev));
- platform_set_drvdata(dev, 0);
+ platform_set_drvdata(dev, NULL);
return 0;
}
--
1.7.5.4
--
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Exclusive live event will cover all the ways today's security and
threat landscape has changed and how IT managers can respond. Discussions
will include endpoint security, mobile security and the latest in malware
threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/
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Re: [PATCH] spi: spi-bcm63xx: Pass NULL to platform_set_drvdata
On Thu, Aug 16, 2012 at 12:44:38PM +0200, Tobias Klauser wrote: platform_set_drvdata expects a void *, so pass NULL instead of 0. Signed-off-by: Tobias Klauser tklau...@distanz.ch Better yet, remove these calls - they're completely redundant. -- Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[PATCH 1/5] ARM: tegra: config: enable dmaengine based APB DMA driver
Enable config for dmaengine based Tegra APB DMA driver and disable the legacy APB DMA driver (SYSTEM_DMA). Signed-off-by: Laxman Dewangan ldewan...@nvidia.com --- arch/arm/configs/tegra_defconfig |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig index 4f078e0..40f7a87 100644 --- a/arch/arm/configs/tegra_defconfig +++ b/arch/arm/configs/tegra_defconfig @@ -29,6 +29,7 @@ CONFIG_ARCH_TEGRA_2x_SOC=y CONFIG_ARCH_TEGRA_3x_SOC=y CONFIG_TEGRA_PCI=y CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA=y +# CONFIG_TEGRA_SYSTEM_DMA is not set CONFIG_TEGRA_EMC_SCALING_ENABLE=y CONFIG_SMP=y CONFIG_PREEMPT=y @@ -148,6 +149,8 @@ CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_MAX8907=y CONFIG_RTC_DRV_EM3027=y CONFIG_RTC_DRV_TEGRA=y +CONFIG_DMADEVICES=y +CONFIG_TEGRA20_APB_DMA=y CONFIG_STAGING=y CONFIG_SENSORS_ISL29018=y CONFIG_SENSORS_ISL29028=y -- 1.7.1.1 -- Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[PATCH 0/5] ARM: tegra: move all APB DMA client to dmaengine based driver
This patch series enable the dmaengine based Tegra APB DMA driver and remove the support code for the legacy dma driver from different APB DMA clients. Patch 1 enable the dmaengine based dma drie and disable the legacy dma driver in config file. Patch 2 remove the legacy dma driver. Patch 3,4, 5 remove the support code from different APB DMA clients to support legacy dma driver. Please note that this series will depends on patch dma: tegra: enable/disable dma clock which is not in 3.6-rc1 but will be available in next RC (rc2) of 3.6 as part of fixes. Laxman Dewangan (5): ARM: tegra: config: enable dmaengine based APB DMA driver ARM: tegra: dma: remove legacy APB DMA driver ARM: tegra: apbio: remove support of legacy DMA driver based access spi: tegra: remove support of legacy DMA driver based access ASoC: tegra: remove support of legacy DMA driver based access arch/arm/configs/tegra_defconfig |3 + arch/arm/mach-tegra/Kconfig|7 - arch/arm/mach-tegra/Makefile |1 - arch/arm/mach-tegra/apbio.c| 118 +- arch/arm/mach-tegra/dma.c | 823 arch/arm/mach-tegra/include/mach/dma.h | 97 drivers/spi/Kconfig|2 +- drivers/spi/spi-tegra.c| 55 +-- sound/soc/tegra/Kconfig|2 +- sound/soc/tegra/tegra_pcm.c| 232 - sound/soc/tegra/tegra_pcm.h| 14 - 11 files changed, 7 insertions(+), 1347 deletions(-) delete mode 100644 arch/arm/mach-tegra/dma.c -- Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[PATCH 5/5] ASoC: tegra: remove support of legacy DMA driver based access
Remove the support code which uses the legacy APB DMA driver
for accessing the I2S FIFO.
The driver will use the dmaengine based APB DMA driver for
accessing reqding/writing to I2S FIFO.
Signed-off-by: Laxman Dewangan ldewan...@nvidia.com
---
sound/soc/tegra/Kconfig |2 +-
sound/soc/tegra/tegra_pcm.c | 232 ---
sound/soc/tegra/tegra_pcm.h | 14 ---
3 files changed, 1 insertions(+), 247 deletions(-)
diff --git a/sound/soc/tegra/Kconfig b/sound/soc/tegra/Kconfig
index 02bcd30..19e5fe7 100644
--- a/sound/soc/tegra/Kconfig
+++ b/sound/soc/tegra/Kconfig
@@ -1,6 +1,6 @@
config SND_SOC_TEGRA
tristate SoC Audio for the Tegra System-on-Chip
- depends on ARCH_TEGRA (TEGRA_SYSTEM_DMA || TEGRA20_APB_DMA)
+ depends on ARCH_TEGRA TEGRA20_APB_DMA
select REGMAP_MMIO
select SND_SOC_DMAENGINE_PCM if TEGRA20_APB_DMA
help
diff --git a/sound/soc/tegra/tegra_pcm.c b/sound/soc/tegra/tegra_pcm.c
index 5658bce..1cab2cd 100644
--- a/sound/soc/tegra/tegra_pcm.c
+++ b/sound/soc/tegra/tegra_pcm.c
@@ -57,237 +57,6 @@ static const struct snd_pcm_hardware tegra_pcm_hardware = {
.fifo_size = 4,
};
-#if defined(CONFIG_TEGRA_SYSTEM_DMA)
-static void tegra_pcm_queue_dma(struct tegra_runtime_data *prtd)
-{
- struct snd_pcm_substream *substream = prtd-substream;
- struct snd_dma_buffer *buf = substream-dma_buffer;
- struct tegra_dma_req *dma_req;
- unsigned long addr;
-
- dma_req = prtd-dma_req[prtd-dma_req_idx];
- prtd-dma_req_idx = 1 - prtd-dma_req_idx;
-
- addr = buf-addr + prtd-dma_pos;
- prtd-dma_pos += dma_req-size;
- if (prtd-dma_pos = prtd-dma_pos_end)
- prtd-dma_pos = 0;
-
- if (substream-stream == SNDRV_PCM_STREAM_PLAYBACK)
- dma_req-source_addr = addr;
- else
- dma_req-dest_addr = addr;
-
- tegra_dma_enqueue_req(prtd-dma_chan, dma_req);
-}
-
-static void dma_complete_callback(struct tegra_dma_req *req)
-{
- struct tegra_runtime_data *prtd = (struct tegra_runtime_data *)req-dev;
- struct snd_pcm_substream *substream = prtd-substream;
- struct snd_pcm_runtime *runtime = substream-runtime;
-
- spin_lock(prtd-lock);
-
- if (!prtd-running) {
- spin_unlock(prtd-lock);
- return;
- }
-
- if (++prtd-period_index = runtime-periods)
- prtd-period_index = 0;
-
- tegra_pcm_queue_dma(prtd);
-
- spin_unlock(prtd-lock);
-
- snd_pcm_period_elapsed(substream);
-}
-
-static void setup_dma_tx_request(struct tegra_dma_req *req,
- struct tegra_pcm_dma_params * dmap)
-{
- req-complete = dma_complete_callback;
- req-to_memory = false;
- req-dest_addr = dmap-addr;
- req-dest_wrap = dmap-wrap;
- req-source_bus_width = 32;
- req-source_wrap = 0;
- req-dest_bus_width = dmap-width;
- req-req_sel = dmap-req_sel;
-}
-
-static void setup_dma_rx_request(struct tegra_dma_req *req,
- struct tegra_pcm_dma_params * dmap)
-{
- req-complete = dma_complete_callback;
- req-to_memory = true;
- req-source_addr = dmap-addr;
- req-dest_wrap = 0;
- req-source_bus_width = dmap-width;
- req-source_wrap = dmap-wrap;
- req-dest_bus_width = 32;
- req-req_sel = dmap-req_sel;
-}
-
-static int tegra_pcm_open(struct snd_pcm_substream *substream)
-{
- struct snd_pcm_runtime *runtime = substream-runtime;
- struct tegra_runtime_data *prtd;
- struct snd_soc_pcm_runtime *rtd = substream-private_data;
- struct tegra_pcm_dma_params * dmap;
- int ret = 0;
-
- prtd = kzalloc(sizeof(struct tegra_runtime_data), GFP_KERNEL);
- if (prtd == NULL)
- return -ENOMEM;
-
- runtime-private_data = prtd;
- prtd-substream = substream;
-
- spin_lock_init(prtd-lock);
-
- if (substream-stream == SNDRV_PCM_STREAM_PLAYBACK) {
- dmap = snd_soc_dai_get_dma_data(rtd-cpu_dai, substream);
- setup_dma_tx_request(prtd-dma_req[0], dmap);
- setup_dma_tx_request(prtd-dma_req[1], dmap);
- } else {
- dmap = snd_soc_dai_get_dma_data(rtd-cpu_dai, substream);
- setup_dma_rx_request(prtd-dma_req[0], dmap);
- setup_dma_rx_request(prtd-dma_req[1], dmap);
- }
-
- prtd-dma_req[0].dev = prtd;
- prtd-dma_req[1].dev = prtd;
-
- prtd-dma_chan = tegra_dma_allocate_channel(TEGRA_DMA_MODE_ONESHOT);
- if (prtd-dma_chan == NULL) {
- ret = -ENOMEM;
- goto err;
- }
-
- /* Set HW params now that initialization is complete */
- snd_soc_set_runtime_hwparams(substream, tegra_pcm_hardware);
-
- /* Ensure that buffer size is a multiple of period size */
- ret =
[PATCH 4/5] spi: tegra: remove support of legacy DMA driver based access
Remove the support code which uses the legacy APB DMA driver
for accessing the SPI FIFO.
The driver will use the dmaengine based APB DMA driver for
accessing reqding/writing to SPI FIFO.
Signed-off-by: Laxman Dewangan ldewan...@nvidia.com
---
drivers/spi/Kconfig |2 +-
drivers/spi/spi-tegra.c | 55 +--
2 files changed, 2 insertions(+), 55 deletions(-)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 5f84b55..2d198a0 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -366,7 +366,7 @@ config SPI_STMP3XXX
config SPI_TEGRA
tristate Nvidia Tegra SPI controller
- depends on ARCH_TEGRA (TEGRA_SYSTEM_DMA || TEGRA20_APB_DMA)
+ depends on ARCH_TEGRA TEGRA20_APB_DMA
help
SPI driver for NVidia Tegra SoCs
diff --git a/drivers/spi/spi-tegra.c b/drivers/spi/spi-tegra.c
index ef52c1c..488d9b6 100644
--- a/drivers/spi/spi-tegra.c
+++ b/drivers/spi/spi-tegra.c
@@ -164,23 +164,15 @@ struct spi_tegra_data {
* for the generic case.
*/
int dma_req_len;
-#if defined(CONFIG_TEGRA_SYSTEM_DMA)
- struct tegra_dma_reqrx_dma_req;
- struct tegra_dma_channel *rx_dma;
-#else
struct dma_chan *rx_dma;
struct dma_slave_config sconfig;
struct dma_async_tx_descriptor *rx_dma_desc;
dma_cookie_trx_cookie;
-#endif
u32 *rx_bb;
dma_addr_t rx_bb_phys;
};
-#if !defined(CONFIG_TEGRA_SYSTEM_DMA)
static void tegra_spi_rx_dma_complete(void *args);
-#endif
-
static inline unsigned long spi_tegra_readl(struct spi_tegra_data *tspi,
unsigned long reg)
{
@@ -204,10 +196,6 @@ static void spi_tegra_go(struct spi_tegra_data *tspi)
val = ~SLINK_DMA_BLOCK_SIZE(~0) ~SLINK_DMA_EN;
val |= SLINK_DMA_BLOCK_SIZE(tspi-dma_req_len / 4 - 1);
spi_tegra_writel(tspi, val, SLINK_DMA_CTL);
-#if defined(CONFIG_TEGRA_SYSTEM_DMA)
- tspi-rx_dma_req.size = tspi-dma_req_len;
- tegra_dma_enqueue_req(tspi-rx_dma, tspi-rx_dma_req);
-#else
tspi-rx_dma_desc = dmaengine_prep_slave_single(tspi-rx_dma,
tspi-rx_bb_phys, tspi-dma_req_len,
DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT);
@@ -219,7 +207,6 @@ static void spi_tegra_go(struct spi_tegra_data *tspi)
tspi-rx_dma_desc-callback_param = tspi;
tspi-rx_cookie = dmaengine_submit(tspi-rx_dma_desc);
dma_async_issue_pending(tspi-rx_dma);
-#endif
val |= SLINK_DMA_EN;
spi_tegra_writel(tspi, val, SLINK_DMA_CTL);
@@ -405,19 +392,12 @@ static void handle_spi_rx_dma_complete(struct
spi_tegra_data *tspi)
spin_unlock_irqrestore(tspi-lock, flags);
}
-#if defined(CONFIG_TEGRA_SYSTEM_DMA)
-static void tegra_spi_rx_dma_complete(struct tegra_dma_req *req)
-{
- struct spi_tegra_data *tspi = req-dev;
- handle_spi_rx_dma_complete(tspi);
-}
-#else
+
static void tegra_spi_rx_dma_complete(void *args)
{
struct spi_tegra_data *tspi = args;
handle_spi_rx_dma_complete(tspi);
}
-#endif
static int spi_tegra_setup(struct spi_device *spi)
{
@@ -509,9 +489,7 @@ static int __devinit spi_tegra_probe(struct platform_device
*pdev)
struct spi_tegra_data *tspi;
struct resource *r;
int ret;
-#if !defined(CONFIG_TEGRA_SYSTEM_DMA)
dma_cap_mask_t mask;
-#endif
master = spi_alloc_master(pdev-dev, sizeof *tspi);
if (master == NULL) {
@@ -563,14 +541,6 @@ static int __devinit spi_tegra_probe(struct
platform_device *pdev)
INIT_LIST_HEAD(tspi-queue);
-#if defined(CONFIG_TEGRA_SYSTEM_DMA)
- tspi-rx_dma = tegra_dma_allocate_channel(TEGRA_DMA_MODE_ONESHOT);
- if (!tspi-rx_dma) {
- dev_err(pdev-dev, can not allocate rx dma channel\n);
- ret = -ENODEV;
- goto err3;
- }
-#else
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
tspi-rx_dma = dma_request_channel(mask, NULL, NULL);
@@ -580,8 +550,6 @@ static int __devinit spi_tegra_probe(struct platform_device
*pdev)
goto err3;
}
-#endif
-
tspi-rx_bb = dma_alloc_coherent(pdev-dev, sizeof(u32) * BB_LEN,
tspi-rx_bb_phys, GFP_KERNEL);
if (!tspi-rx_bb) {
@@ -590,17 +558,6 @@ static int __devinit spi_tegra_probe(struct
platform_device *pdev)
goto err4;
}
-#if defined(CONFIG_TEGRA_SYSTEM_DMA)
- tspi-rx_dma_req.complete = tegra_spi_rx_dma_complete;
- tspi-rx_dma_req.to_memory = 1;
- tspi-rx_dma_req.dest_addr = tspi-rx_bb_phys;
- tspi-rx_dma_req.dest_bus_width = 32;
- tspi-rx_dma_req.source_addr = tspi-phys + SLINK_RX_FIFO;
- tspi-rx_dma_req.source_bus_width = 32;
- tspi-rx_dma_req.source_wrap = 4;
- tspi-rx_dma_req.req_sel =
[PATCH] spi: omap2-mcspi: Remove the call to platform_set_drvdata(pdev, NULL)
Remove the call of platform_set_drvdata(pdev, NULL) as they are not needed anymore. Signed-off-by: Shubhrajyoti D shubhrajy...@ti.com --- drivers/spi/spi-omap2-mcspi.c |2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c index bc47781..84aeaf0 100644 --- a/drivers/spi/spi-omap2-mcspi.c +++ b/drivers/spi/spi-omap2-mcspi.c @@ -1240,7 +1240,6 @@ dma_chnl_free: kfree(mcspi-dma_channels); free_master: kfree(master); - platform_set_drvdata(pdev, NULL); return status; } @@ -1259,7 +1258,6 @@ static int __devexit omap2_mcspi_remove(struct platform_device *pdev) spi_unregister_master(master); kfree(dma_channels); - platform_set_drvdata(pdev, NULL); return 0; } -- 1.7.5.4 -- Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [PATCH 1/5] ARM: tegra: config: enable dmaengine based APB DMA driver
On 08/16/2012 08:13 AM, Laxman Dewangan wrote: Enable config for dmaengine based Tegra APB DMA driver and disable the legacy APB DMA driver (SYSTEM_DMA). Laxman, if I apply this series to next-20120816 (plus a few patches in my local work branch plus the CPU hotplug patches from Joseph, although I suspect none of that matters), then audio playback on Tegra20 is broken; the pitch is far too high. Audio playback on Tegra30 works as expected. -- Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[PATCH 0/3] DaVinci DMA engine conversion
This series begins the conversion of the DaVinci private EDMA API implementation to a DMA engine driver and converts two of the three in-kernel users of the private EDMA API to DMA engine. The approach taken is similar to the recent OMAP DMA Engine conversion. The EDMA DMA Engine driver is a wrapper around the existing private EDMA implementation and registers the platform device within the driver. This allows the conversion series to stand alone with just the drivers and no changes to platform code. It also allows peripheral drivers to continue to use the private EDMA implementation until they are converted. The EDMA DMA Engine driver supports slave transfers only at this time. It is planned to add cyclic transfers in support of audio peripherals. There are three users of the private EDMA API in the kernel now: davinci_mmc, spi-davinci, and davinci-mcasp. This series provides DMA Engine conversions for the davinci_mmc and spi-davinci drivers which use the supported slave transfers. This series has been tested on an AM18x EVM and performance is comparable with the private EDMA API implementations. I do not have a Wifi module for the AM18x EVM to test the MMC1 instance which has DMA channels on the second EDMA channel controller instance. Testing is needed on all DaVinci platforms including DM355/365, DM644x/6x, DA830/OMAP-L137/AM17x, and DA850/OMAP-L138/AM18x. After this series, the current plan is to complete the mcasp driver conversion which includes adding cyclic dma support. This will then enable the removal and refactoring of the private EDMA API functionality into the EDMA DMA Engine driver. Since EDMA is also used on the AM33xx family of parts in mach-omap2/, the plan is to enable this driver on that platform as well. Matt Porter (3): dmaengine: add TI EDMA DMA engine driver mmc: davinci_mmc: convert to DMA engine API spi: spi-davinci: convert to DMA engine API drivers/dma/Kconfig|9 + drivers/dma/Makefile |1 + drivers/dma/edma.c | 729 drivers/mmc/host/davinci_mmc.c | 271 +-- drivers/spi/spi-davinci.c | 292 +++- include/linux/edma.h | 29 ++ 6 files changed, 980 insertions(+), 351 deletions(-) create mode 100644 drivers/dma/edma.c create mode 100644 include/linux/edma.h -- 1.7.9.5 -- Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[PATCH 1/3] dmaengine: add TI EDMA DMA engine driver
Add a DMA engine driver for the TI EDMA controller. This driver
is implemented as a wrapper around the existing DaVinci private
DMA implementation. This approach allows for incremental conversion
of each peripheral driver to the DMA engine API. The EDMA driver
supports slave transfers but does not yet support cyclic transfers.
Signed-off-by: Matt Porter mpor...@ti.com
---
drivers/dma/Kconfig |9 +
drivers/dma/Makefile |1 +
drivers/dma/edma.c | 729 ++
include/linux/edma.h | 29 ++
4 files changed, 768 insertions(+)
create mode 100644 drivers/dma/edma.c
create mode 100644 include/linux/edma.h
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index d06ea29..d9f17d4 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -208,6 +208,15 @@ config SIRF_DMA
help
Enable support for the CSR SiRFprimaII DMA engine.
+config TI_EDMA
+ tristate TI EDMA support
+ depends on ARCH_DAVINCI
+ select DMA_ENGINE
+ default y
+ help
+ Enable support for the TI EDMA controller. This DMA
+ engine is found on TI DaVinci and AM33xx parts.
+
config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
bool
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index 4cf6b12..f5cf310 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_IMX_DMA) += imx-dma.o
obj-$(CONFIG_MXS_DMA) += mxs-dma.o
obj-$(CONFIG_TIMB_DMA) += timb_dma.o
obj-$(CONFIG_SIRF_DMA) += sirf-dma.o
+obj-$(CONFIG_TI_EDMA) += edma.o
obj-$(CONFIG_STE_DMA40) += ste_dma40.o ste_dma40_ll.o
obj-$(CONFIG_TEGRA20_APB_DMA) += tegra20-apb-dma.o
obj-$(CONFIG_PL330_DMA) += pl330.o
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
new file mode 100644
index 000..ba4de75
--- /dev/null
+++ b/drivers/dma/edma.c
@@ -0,0 +1,729 @@
+/*
+ * TI EDMA DMA engine driver
+ *
+ * Copyright 2012 Texas Instruments
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/module.h
+#include linux/dmaengine.h
+#include linux/dma-mapping.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/slab.h
+#include linux/platform_device.h
+
+#include mach/edma.h
+
+#include dmaengine.h
+
+#define EDMA_MAX_CHANNELS 64
+#define EDMA_DESCRIPTORS 16
+/* Max of 16 segments per channel to conserve PaRAM slots */
+#define MAX_NR_SG 16
+#define EDMA_MAX_SLOTS MAX_NR_SG
+
+struct edma_desc {
+ struct dma_async_tx_descriptor txd;
+ struct list_headnode;
+
+ struct edmacc_param pset[EDMA_MAX_SLOTS];
+ int pset_nr;
+ int absync;
+};
+
+struct edma_cc;
+
+struct edma_chan {
+ struct dma_chan chan;
+ struct list_headfree;
+ struct list_headprepared;
+ struct list_headqueued;
+ struct list_headactive;
+ struct list_headcompleted;
+ struct tasklet_struct work;
+
+ struct edma_cc *ecc;
+ int ch_num;
+ boolalloced;
+ int slot[EDMA_MAX_SLOTS];
+
+ dma_addr_t addr;
+ int addr_width;
+ int maxburst;
+
+ /* Lock for this structure */
+ spinlock_t lock;
+};
+
+/* EDMA channel controller */
+struct edma_cc {
+ struct dma_device dma_slave;
+ struct edma_chanslave_chans[EDMA_MAX_CHANNELS];
+ int num_slave_chans;
+ int dummy_slot[2];
+};
+
+/* Convert struct dma_chan to struct edma_chan */
+static inline
+struct edma_chan *to_edma_chan(struct dma_chan *c)
+{
+ return container_of(c, struct edma_chan, chan);
+}
+
+/* Dispatch a queued descriptor to the controller (caller holds lock) */
+static void edma_execute(struct edma_chan *echan)
+{
+ struct edma_desc *edesc = NULL;
+ int i;
+
+ /* Move the first queued descriptor to active list */
+ edesc = list_first_entry(echan-queued, struct edma_desc,
+ node);
+ list_move_tail(edesc-node, echan-active);
+
+ /* Write descriptor PaRAM set(s) */
+ for (i = 0; i edesc-pset_nr; i++) {
+ edma_write_slot(echan-slot[i], edesc-pset[i]);
+
[PATCH 2/3] mmc: davinci_mmc: convert to DMA engine API
Removes use of the DaVinci EDMA private DMA API and replaces
it with use of the DMA engine API.
Signed-off-by: Matt Porter mpor...@ti.com
---
drivers/mmc/host/davinci_mmc.c | 271
1 file changed, 82 insertions(+), 189 deletions(-)
diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c
index 7cf6c62..c5e1eeb 100644
--- a/drivers/mmc/host/davinci_mmc.c
+++ b/drivers/mmc/host/davinci_mmc.c
@@ -30,11 +30,12 @@
#include linux/io.h
#include linux/irq.h
#include linux/delay.h
+#include linux/dmaengine.h
#include linux/dma-mapping.h
+#include linux/edma.h
#include linux/mmc/mmc.h
#include mach/mmc.h
-#include mach/edma.h
/*
* Register Definitions
@@ -200,21 +201,13 @@ struct mmc_davinci_host {
u32 bytes_left;
u32 rxdma, txdma;
+ struct dma_chan *dma_tx;
+ struct dma_chan *dma_rx;
bool use_dma;
bool do_dma;
bool sdio_int;
bool active_request;
- /* Scatterlist DMA uses one or more parameter RAM entries:
-* the main one (associated with rxdma or txdma) plus zero or
-* more links. The entries for a given transfer differ only
-* by memory buffer (address, length) and link field.
-*/
- struct edmacc_param tx_template;
- struct edmacc_param rx_template;
- unsignedn_link;
- u32 links[MAX_NR_SG - 1];
-
/* For PIO we walk scatterlists one segment at a time. */
unsigned intsg_len;
struct scatterlist *sg;
@@ -410,153 +403,74 @@ static void mmc_davinci_start_command(struct
mmc_davinci_host *host,
static void davinci_abort_dma(struct mmc_davinci_host *host)
{
- int sync_dev;
+ struct dma_chan *sync_dev;
if (host-data_dir == DAVINCI_MMC_DATADIR_READ)
- sync_dev = host-rxdma;
+ sync_dev = host-dma_rx;
else
- sync_dev = host-txdma;
-
- edma_stop(sync_dev);
- edma_clean_channel(sync_dev);
-}
-
-static void
-mmc_davinci_xfer_done(struct mmc_davinci_host *host, struct mmc_data *data);
-
-static void mmc_davinci_dma_cb(unsigned channel, u16 ch_status, void *data)
-{
- if (DMA_COMPLETE != ch_status) {
- struct mmc_davinci_host *host = data;
-
- /* Currently means: DMA Event Missed, or null transfer
-* request was seen. In the future, TC errors (like bad
-* addresses) might be presented too.
-*/
- dev_warn(mmc_dev(host-mmc), DMA %s error\n,
- (host-data-flags MMC_DATA_WRITE)
- ? write : read);
- host-data-error = -EIO;
- mmc_davinci_xfer_done(host, host-data);
- }
-}
-
-/* Set up tx or rx template, to be modified and updated later */
-static void __init mmc_davinci_dma_setup(struct mmc_davinci_host *host,
- bool tx, struct edmacc_param *template)
-{
- unsignedsync_dev;
- const u16 acnt = 4;
- const u16 bcnt = rw_threshold 2;
- const u16 ccnt = 0;
- u32 src_port = 0;
- u32 dst_port = 0;
- s16 src_bidx, dst_bidx;
- s16 src_cidx, dst_cidx;
-
- /*
-* A-B Sync transfer: each DMA request is for one frame of
-* rw_threshold bytes, broken into acnt-size chunks repeated
-* bcnt times. Each segment needs ccnt such frames; since
-* we tell the block layer our mmc-max_seg_size limit, we can
-* trust (later) that it's within bounds.
-*
-* The FIFOs are read/written in 4-byte chunks (acnt == 4) and
-* EDMA will optimize memory operations to use larger bursts.
-*/
- if (tx) {
- sync_dev = host-txdma;
-
- /* src_prt, ccnt, and link to be set up later */
- src_bidx = acnt;
- src_cidx = acnt * bcnt;
-
- dst_port = host-mem_res-start + DAVINCI_MMCDXR;
- dst_bidx = 0;
- dst_cidx = 0;
- } else {
- sync_dev = host-rxdma;
-
- src_port = host-mem_res-start + DAVINCI_MMCDRR;
- src_bidx = 0;
- src_cidx = 0;
-
- /* dst_prt, ccnt, and link to be set up later */
- dst_bidx = acnt;
- dst_cidx = acnt * bcnt;
- }
-
- /*
-* We can't use FIFO mode for the FIFOs because MMC FIFO addresses
-* are not 256-bit (32-byte) aligned. So we use INCR, and the W8BIT
-* parameter is ignored.
-*/
- edma_set_src(sync_dev, src_port, INCR, W8BIT);
- edma_set_dest(sync_dev, dst_port, INCR, W8BIT);
+ sync_dev = host-dma_tx;
- edma_set_src_index(sync_dev, src_bidx, src_cidx);
- edma_set_dest_index(sync_dev, dst_bidx, dst_cidx);
-
-
[PATCH 3/3] spi: spi-davinci: convert to DMA engine API
Removes use of the DaVinci EDMA private DMA API and replaces
it with use of the DMA engine API.
Signed-off-by: Matt Porter mpor...@ti.com
---
drivers/spi/spi-davinci.c | 292 -
1 file changed, 130 insertions(+), 162 deletions(-)
diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c
index 9b2901f..c1ec52d 100644
--- a/drivers/spi/spi-davinci.c
+++ b/drivers/spi/spi-davinci.c
@@ -25,13 +25,14 @@
#include linux/platform_device.h
#include linux/err.h
#include linux/clk.h
+#include linux/dmaengine.h
#include linux/dma-mapping.h
+#include linux/edma.h
#include linux/spi/spi.h
#include linux/spi/spi_bitbang.h
#include linux/slab.h
#include mach/spi.h
-#include mach/edma.h
#define SPI_NO_RESOURCE((resource_size_t)-1)
@@ -113,14 +114,6 @@
#define SPIDEF 0x4c
#define SPIFMT00x50
-/* We have 2 DMA channels per CS, one for RX and one for TX */
-struct davinci_spi_dma {
- int tx_channel;
- int rx_channel;
- int dummy_param_slot;
- enum dma_event_qeventq;
-};
-
/* SPI Controller driver's private data. */
struct davinci_spi {
struct spi_bitbang bitbang;
@@ -134,11 +127,14 @@ struct davinci_spi {
const void *tx;
void*rx;
-#define SPI_TMP_BUFSZ (SMP_CACHE_BYTES + 1)
- u8 rx_tmp_buf[SPI_TMP_BUFSZ];
int rcount;
int wcount;
- struct davinci_spi_dma dma;
+
+ struct dma_chan *dma_rx;
+ struct dma_chan *dma_tx;
+ int dma_rx_chnum;
+ int dma_tx_chnum;
+
struct davinci_spi_platform_data *pdata;
void(*get_rx)(u32 rx_data, struct davinci_spi *);
@@ -496,21 +492,23 @@ out:
return errors;
}
-static void davinci_spi_dma_callback(unsigned lch, u16 status, void *data)
+static void davinci_spi_dma_rx_callback(void *data)
{
- struct davinci_spi *dspi = data;
- struct davinci_spi_dma *dma = dspi-dma;
+ struct davinci_spi *dspi = (struct davinci_spi *)data;
- edma_stop(lch);
+ dspi-rcount = 0;
- if (status == DMA_COMPLETE) {
- if (lch == dma-rx_channel)
- dspi-rcount = 0;
- if (lch == dma-tx_channel)
- dspi-wcount = 0;
- }
+ if (!dspi-wcount !dspi-rcount)
+ complete(dspi-done);
+}
- if ((!dspi-wcount !dspi-rcount) || (status != DMA_COMPLETE))
+static void davinci_spi_dma_tx_callback(void *data)
+{
+ struct davinci_spi *dspi = (struct davinci_spi *)data;
+
+ dspi-wcount = 0;
+
+ if (!dspi-wcount !dspi-rcount)
complete(dspi-done);
}
@@ -526,20 +524,20 @@ static void davinci_spi_dma_callback(unsigned lch, u16
status, void *data)
static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
{
struct davinci_spi *dspi;
- int data_type, ret;
+ int data_type, ret = -ENOMEM;
u32 tx_data, spidat1;
u32 errors = 0;
struct davinci_spi_config *spicfg;
struct davinci_spi_platform_data *pdata;
unsigned uninitialized_var(rx_buf_count);
- struct device *sdev;
+ void *dummy_buf = NULL;
+ struct scatterlist sg_rx, sg_tx;
dspi = spi_master_get_devdata(spi-master);
pdata = dspi-pdata;
spicfg = (struct davinci_spi_config *)spi-controller_data;
if (!spicfg)
spicfg = davinci_spi_default_cfg;
- sdev = dspi-bitbang.master-dev.parent;
/* convert len to words based on bits_per_word */
data_type = dspi-bytes_per_word[spi-chip_select];
@@ -567,112 +565,83 @@ static int davinci_spi_bufs(struct spi_device *spi,
struct spi_transfer *t)
spidat1 |= tx_data 0x;
iowrite32(spidat1, dspi-base + SPIDAT1);
} else {
- struct davinci_spi_dma *dma;
- unsigned long tx_reg, rx_reg;
- struct edmacc_param param;
- void *rx_buf;
- int b, c;
-
- dma = dspi-dma;
-
- tx_reg = (unsigned long)dspi-pbase + SPIDAT1;
- rx_reg = (unsigned long)dspi-pbase + SPIBUF;
-
- /*
-* Transmit DMA setup
-*
-* If there is transmit data, map the transmit buffer, set it
-* as the source of data and set the source B index to data
-* size. If there is no transmit data, set the transmit register
-* as the source of data, and set the source B index to zero.
-*
-* The destination is always the transmit register itself. And
-* the destination never increments.
-
Re: [PATCH 1/3] dmaengine: add TI EDMA DMA engine driver
On Thu, Aug 16, 2012 at 05:44:29PM -0400, Matt Porter wrote: Add a DMA engine driver for the TI EDMA controller. This driver is implemented as a wrapper around the existing DaVinci private DMA implementation. This approach allows for incremental conversion of each peripheral driver to the DMA engine API. The EDMA driver supports slave transfers but does not yet support cyclic transfers. Have you looked at the virt-dma support? That should allow you to avoid some common errors, like forgetting that stuff submitted but not issued should not be started even if the channel is currently running. -- Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[PATCH] spi/s3c64xx: Drop extra calls to spi_master_get in suspend/remove functions
Suspend and resume functions call spi_master_get() without matching
spi_master_put(). The extra references are unnecessary and cause subsequent
module unload attempts to fail. Drop the calls.
Signed-off-by: Guenter Roeck li...@roeck-us.net
---
drivers/spi/spi-s3c64xx.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 646a765..d7a87df 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -1409,7 +1409,7 @@ static int s3c64xx_spi_remove(struct platform_device
*pdev)
#ifdef CONFIG_PM
static int s3c64xx_spi_suspend(struct device *dev)
{
- struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct spi_master *master = dev_get_drvdata(dev);
struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
spi_master_suspend(master);
@@ -1428,7 +1428,7 @@ static int s3c64xx_spi_suspend(struct device *dev)
static int s3c64xx_spi_resume(struct device *dev)
{
- struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct spi_master *master = dev_get_drvdata(dev);
struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
struct s3c64xx_spi_info *sci = sdd-cntrlr_info;
@@ -1452,7 +1452,7 @@ static int s3c64xx_spi_resume(struct device *dev)
#ifdef CONFIG_PM_RUNTIME
static int s3c64xx_spi_runtime_suspend(struct device *dev)
{
- struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct spi_master *master = dev_get_drvdata(dev);
struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
clk_disable(sdd-clk);
@@ -1463,7 +1463,7 @@ static int s3c64xx_spi_runtime_suspend(struct device *dev)
static int s3c64xx_spi_runtime_resume(struct device *dev)
{
- struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct spi_master *master = dev_get_drvdata(dev);
struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
clk_enable(sdd-src_clk);
--
1.7.9.7
--
Live Security Virtual Conference
Exclusive live event will cover all the ways today's security and
threat landscape has changed and how IT managers can respond. Discussions
will include endpoint security, mobile security and the latest in malware
threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/
___
spi-devel-general mailing list
spi-devel-general@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[PATCH 1/2] spi: spi-coldfire-qspi: Drop extra spi_master_put in device remove function
The call sequence spi_alloc_master/spi_register_master/spi_unregister_master is complete; it reduces the device reference count to zero, which and results in device memory being freed. The subsequent call to spi_master_put is unnecessary and results in an access to free memory. Drop it. Signed-off-by: Guenter Roeck li...@roeck-us.net --- drivers/spi/spi-coldfire-qspi.c |1 - 1 file changed, 1 deletion(-) diff --git a/drivers/spi/spi-coldfire-qspi.c b/drivers/spi/spi-coldfire-qspi.c index b2d4b9e..1a30b47 100644 --- a/drivers/spi/spi-coldfire-qspi.c +++ b/drivers/spi/spi-coldfire-qspi.c @@ -533,7 +533,6 @@ static int __devexit mcfqspi_remove(struct platform_device *pdev) iounmap(mcfqspi-iobase); release_mem_region(res-start, resource_size(res)); spi_unregister_master(master); - spi_master_put(master); return 0; } -- 1.7.9.7 -- Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[PATCH 2/2] spi/coldfire-qspi: Drop extra calls to spi_master_get in suspend/resume functions
Suspend and resume functions call spi_master_get() without matching
spi_master_put(). The extra references are unnecessary and cause
subsequent module unload attempts to fail, so drop the calls.
Signed-off-by: Guenter Roeck li...@roeck-us.net
---
drivers/spi/spi-coldfire-qspi.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-coldfire-qspi.c b/drivers/spi/spi-coldfire-qspi.c
index 1a30b47..764bfee 100644
--- a/drivers/spi/spi-coldfire-qspi.c
+++ b/drivers/spi/spi-coldfire-qspi.c
@@ -540,7 +540,7 @@ static int __devexit mcfqspi_remove(struct platform_device
*pdev)
#ifdef CONFIG_PM_SLEEP
static int mcfqspi_suspend(struct device *dev)
{
- struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct spi_master *master = dev_get_drvdata(dev);
struct mcfqspi *mcfqspi = spi_master_get_devdata(master);
spi_master_suspend(master);
@@ -552,7 +552,7 @@ static int mcfqspi_suspend(struct device *dev)
static int mcfqspi_resume(struct device *dev)
{
- struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct spi_master *master = dev_get_drvdata(dev);
struct mcfqspi *mcfqspi = spi_master_get_devdata(master);
spi_master_resume(master);
--
1.7.9.7
--
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threat landscape has changed and how IT managers can respond. Discussions
will include endpoint security, mobile security and the latest in malware
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Re: [PATCH] spi/s3c64xx: Drop extra calls to spi_master_get in suspend/remove functions
Sigh.
s/remove/resume/ in headline.
Guenter
On Thu, Aug 16, 2012 at 08:14:25PM -0700, Guenter Roeck wrote:
Suspend and resume functions call spi_master_get() without matching
spi_master_put(). The extra references are unnecessary and cause subsequent
module unload attempts to fail. Drop the calls.
Signed-off-by: Guenter Roeck li...@roeck-us.net
---
drivers/spi/spi-s3c64xx.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 646a765..d7a87df 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -1409,7 +1409,7 @@ static int s3c64xx_spi_remove(struct platform_device
*pdev)
#ifdef CONFIG_PM
static int s3c64xx_spi_suspend(struct device *dev)
{
- struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct spi_master *master = dev_get_drvdata(dev);
struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
spi_master_suspend(master);
@@ -1428,7 +1428,7 @@ static int s3c64xx_spi_suspend(struct device *dev)
static int s3c64xx_spi_resume(struct device *dev)
{
- struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct spi_master *master = dev_get_drvdata(dev);
struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
struct s3c64xx_spi_info *sci = sdd-cntrlr_info;
@@ -1452,7 +1452,7 @@ static int s3c64xx_spi_resume(struct device *dev)
#ifdef CONFIG_PM_RUNTIME
static int s3c64xx_spi_runtime_suspend(struct device *dev)
{
- struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct spi_master *master = dev_get_drvdata(dev);
struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
clk_disable(sdd-clk);
@@ -1463,7 +1463,7 @@ static int s3c64xx_spi_runtime_suspend(struct device
*dev)
static int s3c64xx_spi_runtime_resume(struct device *dev)
{
- struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct spi_master *master = dev_get_drvdata(dev);
struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
clk_enable(sdd-src_clk);
--
1.7.9.7
--
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threat landscape has changed and how IT managers can respond. Discussions
will include endpoint security, mobile security and the latest in malware
threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/
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