Re: [PATCH v2 0/7] spi: spi-fsl-spi: Make spi-fsl-spi usable in cpu mode outside of FSL SOC environments and add a grlib variant normally running on sparc
On Thu, Feb 07, 2013 at 02:12:04PM +0100, Andreas Larsson wrote: This makes the cpu mode of the driver available outside of an FSL SOC and even powerpc environment. Furthermore, this adds support for the mostly register-compatible SPICTRL core from the GRLIB VHDL IP core library normally running on SPARC. The patches look clean and neat, I don't see anything obviously wrong with them... so, Acked-by: Anton Vorontsov an...@enomsg.org Thanks! Anton -- Free Next-Gen Firewall Hardware Offer Buy your Sophos next-gen firewall before the end March 2013 and get the hardware for free! Learn more. http://p.sf.net/sfu/sophos-d2d-feb ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [PATCH v3 3/7] eSPI: add eSPI controller support
);' is sufficient.
Also, I think there's no need for this wrapper nowadays (but
splitting OF and real probe() stuff is still appropriate).
+}
+
+static const struct of_device_id of_fsl_espi_match[] = {
+ { .compatible = fsl,mpc8536-espi },
+ {}
+};
+MODULE_DEVICE_TABLE(of, of_fsl_espi_match);
+
+static struct of_platform_driver fsl_espi_driver = {
+ .driver = {
+ .name = fsl_espi,
+ .owner = THIS_MODULE,
+ .of_match_table = of_fsl_espi_match,
+ },
+ .probe = of_fsl_espi_probe,
+ .remove = __devexit_p(of_fsl_espi_remove),
+};
+
+static int __init fsl_espi_init(void)
+{
+ return of_register_platform_driver(fsl_espi_driver);
+}
+module_init(fsl_espi_init);
+
+static void __exit fsl_espi_exit(void)
+{
+ of_unregister_platform_driver(fsl_espi_driver);
+}
+module_exit(fsl_espi_exit);
+
+MODULE_AUTHOR(Mingkai Hu);
+MODULE_DESCRIPTION(Enhanced Freescale SPI Driver);
This sounds like that this is an enhanced version of the
Freescale SPI driver, which it is not. ;-)
+MODULE_LICENSE(GPL);
diff --git a/drivers/spi/spi_fsl_lib.h b/drivers/spi/spi_fsl_lib.h
index 6ae8949..9c81498 100644
--- a/drivers/spi/spi_fsl_lib.h
+++ b/drivers/spi/spi_fsl_lib.h
@@ -26,6 +26,7 @@ struct mpc8xxx_spi {
/* rx tx bufs from the spi_transfer */
const void *tx;
void *rx;
+ int len;
I'd place the #ifdef CONFIG_SPI_ESPI, for documentation purposes.
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Re: [PATCH v3 2/7] spi/mpc8xxx: refactor the common code for SPI/eSPI controller
On Thu, Sep 30, 2010 at 04:00:41PM +0800, Mingkai Hu wrote:
[...]
-static void mpc8xxx_spi_change_mode(struct spi_device *spi)
+static void fsl_spi_change_mode(struct spi_device *spi)
{
struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi-master);
struct spi_mpc8xxx_cs *cs = spi-controller_state;
- __be32 __iomem *mode = mspi-base-mode;
+ struct fsl_spi_reg *reg_base = (struct fsl_spi_reg *)mspi-reg_base;
No need for these type casts (the same is for the whole patch).
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Re: [PATCH v3 6/7] mtd: m25p80: add a read function to read page by page
On Thu, Sep 30, 2010 at 11:41:40PM +0900, Grant Likely wrote: On Thu, Sep 30, 2010 at 11:16 PM, Grant Likely grant.lik...@secretlab.ca wrote: On Thu, Sep 30, 2010 at 7:46 PM, David Brownell davi...@pacbell.net wrote: --- On Thu, 9/30/10, Mingkai Hu mingkai...@freescale.com wrote: From: Mingkai Hu mingkai...@freescale.com Subject: [PATCH v3 6/7] mtd: m25p80: add a read function to read page by page NAK. We went over this before. Yes, I agree with David on this. If large transfers don't work, then it is the SPI master driver that is buggy. By the way, does this fix your problem? https://patchwork.kernel.org/patch/184752/ It shouldn't. AFAIK, eSPI is PIO-only controller, and the overrun fix is for the DMA mode. Thanks, p.s. Btw, in patch 3/7, is_dma_mapped argument of fsl_espi_bufs() is unneeded. -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 -- Start uncovering the many advantages of virtual appliances and start using them to simplify application deployment and accelerate your shift to cloud computing. http://p.sf.net/sfu/novell-sfdev2dev ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [PATCH] spi_mpc8xxx: issue with using definition of pram in Device Tree
Hello,
On Fri, Sep 24, 2010 at 09:20:27AM +0200, LEROY Christophe wrote:
The issue is that cpm_muram_alloc_fixed() allocates memory from the
general purpose muram area (from 0x0 to 0x1bff).
Here we need to return a pointer to the parameter RAM, which is
located somewhere starting at 0x1c00. It is not a dynamic allocation
that is required here but only to point on the correct location in
the parameter RAM.
For the CPM2, I don't know. I'm working with a MPC866.
Attached is a previous discussion on the subject where I explain a
bit more in details the issue.
The patch looks OK, I think.
Doesn't explain why that worked on MPC8272 (CPM2) and MPC8560
(also CPM2) machines though. But here's my guess (I no longer
have these boards to test it):
On 8272 I used this node:
+ s...@4c0 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = fsl,cpm2-spi, fsl,spi;
+ reg = 0x11a80 0x40 0x89fc 0x2;
On that SOC there are two muram data regions 0x0..0x2000 and
0x9000..0x9100. Note that we actually don't want data regions,
and the only reason why that worked is that sysdev/cpm_common.c
maps muram(0)..muram(max).
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Re: [spi-devel-general] [PATCH v2 3/6] mtd: m25p80: add support to parse the SPI flash's partitions
On Tue, Aug 10, 2010 at 08:56:42AM -0600, Grant Likely wrote: [...] The suggestion has been raised to use something like bus notifiers to get a hook onto the device registration before the driver is probed so that the platform_data can be translated in an separate chuck of code, but down that path lies insanity. There are all kinds of ordering issues (like making sure the translation code is called before the driver probe code), and it is a lot of complexity for what is really a simple thing. There's another option: platform data handlers (they could be chained, in case if we want to use several methods of obtaining platform data, i.e. try raw data, then ACPI, then OF). See include/linux/spi/mmc_spi.h (mmc_spi_get_pdata) and drivers/mmc/host/of_mmc_spi.c. I think we might implement some library to make these handlers more generic, but even the simple implementation as in mmc_spi case proves that it is possible to separate OF/ACPI/DMI/whatever handling from the generic code. -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 -- This SF.net email is sponsored by Make an app they can't live without Enter the BlackBerry Developer Challenge http://p.sf.net/sfu/RIM-dev2dev ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [PATCH] spi: spi_mpc8xxx.c: Do not use map_tx_dma to unmap rx_dma
On Mon, May 17, 2010 at 03:17:10PM +0200, Joakim Tjernlund wrote: This fixes a typo were map_tx_dma is used instead of map_rx_dma, casing the driver to unmap rx_dma when it shouldn't. Signed-off-by: Joakim Tjernlund joakim.tjernl...@transmode.se Acked-by: Anton Vorontsov cbouatmai...@gmail.com Thanks! --- drivers/spi/spi_mpc8xxx.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c index c85dbbb..2d54020 100644 --- a/drivers/spi/spi_mpc8xxx.c +++ b/drivers/spi/spi_mpc8xxx.c @@ -514,7 +514,7 @@ static void mpc8xxx_spi_cpm_bufs_complete(struct mpc8xxx_spi *mspi) if (mspi-map_tx_dma) dma_unmap_single(dev, mspi-tx_dma, t-len, DMA_TO_DEVICE); - if (mspi-map_tx_dma) + if (mspi-map_rx_dma) dma_unmap_single(dev, mspi-rx_dma, t-len, DMA_FROM_DEVICE); mspi-xfer_in_progress = NULL; } -- 1.6.4.4 -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 -- ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [PATCH] spi: spidev_test.c: Make transfer size suitable for wordsize 32
On Fri, May 14, 2010 at 11:14:27AM +0200, Joakim Tjernlund wrote:
Signed-off-by: Joakim Tjernlund joakim.tjernl...@transmode.se
Acked-by: Anton Vorontsov cbouatmai...@gmail.com
Thanks!
---
Documentation/spi/spidev_test.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/Documentation/spi/spidev_test.c b/Documentation/spi/spidev_test.c
index 10abd37..3978e69 100644
--- a/Documentation/spi/spidev_test.c
+++ b/Documentation/spi/spidev_test.c
@@ -45,7 +45,6 @@ static void transfer(int fd)
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0xDE, 0xAD, 0xBE, 0xEF, 0xBA, 0xAD,
- 0xF0, 0x0D,
};
uint8_t rx[ARRAY_SIZE(tx)] = {0, };
struct spi_ioc_transfer tr = {
--
1.6.4.4
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Re: [spi-devel-general] [PATCH] spi: spi_mpc8xxx.c: Fix QE mode Litte Endian
On Fri, May 14, 2010 at 11:14:26AM +0200, Joakim Tjernlund wrote: QE mode uses Little Endian so words 8 bits are byte swapped. Workaround this by always enforcing wordsize 8 for words 8 bits. Unfortunately this will not work for LSB transfers where wordsize is 8 bits so disable these for now. Also move the different quirks into its own function to keep mpc8xxx_spi_setup_transfer() sane. Signed-off-by: Joakim Tjernlund joakim.tjernl...@transmode.se --- Looks OK, thanks! Acked-by: Anton Vorontsov cbouatmai...@gmail.com -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 -- ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [PATCH] spi: spi_mpc8xxx.c: fix potential memory corruption.
On Thu, May 13, 2010 at 05:55:22PM +0200, Joakim Tjernlund wrote:
Anton Vorontsov cbouatmai...@gmail.com wrote on 2010/05/13 11:55:45:
On Thu, May 13, 2010 at 11:36:15AM +0200, Joakim Tjernlund wrote:
[...]
The new QE mode is so broken :(
Notice how the byte order is swapped for word = 16, 32
*yawn*, it's not a news... :-) Remember QE-specific rx/tx_shift
stuff?
I'm sure the issue is related to how the QE SPI shift register
works. I.e. SDMA just feeds the shift register, and it's shift
register that is causing 8 bits words to misbehave, or the
issue is in how SDMA and shift registers connected.
Not even sure what is right to begin with :)
Can't see how one should fix this either.
I guess by copying the whole buffer, shifting bytes back and
forth, remapping it, doing transfer, and copying data back.
I think that'll work, but no idea how efficient that will be.
Also, I'd not do that for CPM hardware, I tend to believe
that it's not affected.
Anton, would you be happy with the following patch?
Sure.
Just a few cosmetic suggestions, feel free to ignore. ;-)
Basically it works around LE endian shift for !LSB
transfers.
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index c312d0e..c995aa5 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -315,41 +315,51 @@ int mpc8xxx_spi_setup_transfer(struct spi_device *spi,
struct spi_transfer *t)
if (!hz)
hz = spi-max_speed_hz;
- cs-rx_shift = 0;
- cs-tx_shift = 0;
- if (bits_per_word = 8) {
- cs-get_rx = mpc8xxx_spi_rx_buf_u8;
- cs-get_tx = mpc8xxx_spi_tx_buf_u8;
- if (mpc8xxx_spi-flags SPI_QE_CPU_MODE) {
- cs-rx_shift = 16;
- cs-tx_shift = 24;
- }
- } else if (bits_per_word = 16) {
- cs-get_rx = mpc8xxx_spi_rx_buf_u16;
- cs-get_tx = mpc8xxx_spi_tx_buf_u16;
- if (mpc8xxx_spi-flags SPI_QE_CPU_MODE) {
- cs-rx_shift = 16;
- cs-tx_shift = 16;
+ if (!(mpc8xxx_spi-flags SPI_CPM_MODE)) {
+ cs-rx_shift = 0;
+ cs-tx_shift = 0;
+ if (bits_per_word = 8) {
+ cs-get_rx = mpc8xxx_spi_rx_buf_u8;
+ cs-get_tx = mpc8xxx_spi_tx_buf_u8;
+ if (mpc8xxx_spi-flags SPI_QE_CPU_MODE) {
+ cs-rx_shift = 16;
+ cs-tx_shift = 24;
+ }
+ } else if (bits_per_word = 16) {
+ cs-get_rx = mpc8xxx_spi_rx_buf_u16;
+ cs-get_tx = mpc8xxx_spi_tx_buf_u16;
+ if (mpc8xxx_spi-flags SPI_QE_CPU_MODE) {
+ cs-rx_shift = 16;
+ cs-tx_shift = 16;
+ }
+ } else if (bits_per_word = 32) {
+ cs-get_rx = mpc8xxx_spi_rx_buf_u32;
+ cs-get_tx = mpc8xxx_spi_tx_buf_u32;
+ } else
+ return -EINVAL;
+
+ if (mpc8xxx_spi-flags SPI_QE_CPU_MODE
+ spi-mode SPI_LSB_FIRST) {
+ cs-tx_shift = 0;
+ if (bits_per_word = 8)
+ cs-rx_shift = 8;
+ else
+ cs-rx_shift = 0;
While you're at it, can you move this monstrous stuff to its
own function? That'll save one indent level, and will make the
patch nicier to read (let's hope), i.e.
if (!(mpc8xxx_spi-flags SPI_CPM_MODE))
rc = mspi_apply_cpu_mode_quirks(cs);
else if (mpc8xxx_spi-flags SPI_QE)
rc = mspi_apply_qe_mode_quirks(cs);
if (rc)
return rc;
}
- } else if (bits_per_word = 32) {
- cs-get_rx = mpc8xxx_spi_rx_buf_u32;
- cs-get_tx = mpc8xxx_spi_tx_buf_u32;
- } else
- return -EINVAL;
- if (mpc8xxx_spi-flags SPI_QE_CPU_MODE
- spi-mode SPI_LSB_FIRST) {
- cs-tx_shift = 0;
- if (bits_per_word = 8)
- cs-rx_shift = 8;
- else
- cs-rx_shift = 0;
- }
+ mpc8xxx_spi-rx_shift = cs-rx_shift;
+ mpc8xxx_spi-tx_shift = cs-tx_shift;
+ mpc8xxx_spi-get_rx = cs-get_rx;
+ mpc8xxx_spi-get_tx = cs-get_tx;
- mpc8xxx_spi-rx_shift = cs-rx_shift;
- mpc8xxx_spi-tx_shift = cs-tx_shift;
- mpc8xxx_spi-get_rx = cs-get_rx;
- mpc8xxx_spi-get_tx = cs-get_tx;
+ } else if (mpc8xxx_spi-flags SPI_QE) {
+ /* Note: 32 bits word, LSB works iff
+ * tfcr/rfcr is set to CPMFCR_GBL */
+ if (spi-mode SPI_LSB_FIRST
+ bits_per_word != 8)
^^^ one more tab here
Re: [spi-devel-general] [RESEND PATCH 5/5] spi/mpc8xxx: don't check platform_get_irq's return value against zero
On Wed, Jan 13, 2010 at 12:05:46PM +0100, Uwe Kleine-König wrote: platform_get_irq returns -ENXIO on failure, so !irq was probably always true. Make irq a signed variable and compare irq = 0. Note that a return value of zero is still handled as error even though this could mean irq0. This is a followup to 305b3228f9ff4d59f49e6d34a7034d44ee8ce2f0 that changed the return value of platform_get_irq from 0 to -ENXIO on error. Signed-off-by: Uwe Kleine-König u.kleine-koe...@pengutronix.de Cc: David Vrabel dvra...@arcom.com Cc: Greg Kroah-Hartman gre...@suse.de Cc: David Brownell dbrown...@users.sourceforge.net Cc: Grant Likely grant.lik...@secretlab.ca Cc: Kumar Gala ga...@kernel.crashing.org Cc: Anton Vorontsov avoront...@ru.mvista.com Cc: Andrew Morton a...@linux-foundation.org Cc: spi-devel-general@lists.sourceforge.net --- Acked-by: Anton Vorontsov avoront...@ru.mvista.com Thanks! -- This SF.Net email is sponsored by the Verizon Developer Community Take advantage of Verizon's best-in-class app development support A streamlined, 14 day to market process makes app distribution fast and easy Join now and get one step closer to millions of Verizon customers http://p.sf.net/sfu/verizon-dev2dev ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [PATCH 6/7] spi/mpc8xxx: don't check platform_get_irq's return value against zero
On Wed, Dec 16, 2009 at 05:10:08PM +0100, Uwe Kleine-König wrote: platform_get_irq returns -ENXIO on failure, so !irq was probably always true. Better use (int)irq = 0. Note that a return value of zero is still handled as error even though this could mean irq0. This is a followup to 305b3228f9ff4d59f49e6d34a7034d44ee8ce2f0 that changed the return value of platform_get_irq from 0 to -ENXIO on error. Signed-off-by: Uwe Kleine-König u.kleine-koe...@pengutronix.de Cc: David Vrabel dvra...@arcom.com Cc: Greg Kroah-Hartman gre...@suse.de Cc: David Brownell dbrown...@users.sourceforge.net Cc: Grant Likely grant.lik...@secretlab.ca Cc: Kumar Gala ga...@kernel.crashing.org Cc: Anton Vorontsov avoront...@ru.mvista.com Cc: Andrew Morton a...@linux-foundation.org Cc: spi-devel-general@lists.sourceforge.net --- drivers/spi/spi_mpc8xxx.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c index e9390d7..b13501a 100644 --- a/drivers/spi/spi_mpc8xxx.c +++ b/drivers/spi/spi_mpc8xxx.c @@ -1339,7 +1339,7 @@ static int __devinit plat_mpc8xxx_spi_probe(struct platform_device *pdev) return -EINVAL; irq = platform_get_irq(pdev, 0); - if (!irq) + if ((int)irq = 0) I tend to think that it's really hopeless to fix the platform_get_irq() in its current form, so can you get rid of this ugly cast and just make the irq signed? And I'll be fine with it. :-( -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 -- This SF.Net email is sponsored by the Verizon Developer Community Take advantage of Verizon's best-in-class app development support A streamlined, 14 day to market process makes app distribution fast and easy Join now and get one step closer to millions of Verizon customers http://p.sf.net/sfu/verizon-dev2dev ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] spi_mpc8xxx.c: chip select polarity problem
On Wed, Nov 25, 2009 at 03:11:57PM -0700, Grant Likely wrote: On Wed, Nov 25, 2009 at 1:41 PM, Torsten Fleischer to-fleisc...@t-online.de wrote: On Wen, Nov 25, 2009 at 01:33:57 Grant Likely wrote: Thanks. However, there needs to be a proper description of what this patch does to go in the commit header. Can you please write one? Thanks, g. [...] The initialization of the chip selects is removed from the probe() function of the spi_mpc8xxx driver, because the driver doesn't know the polarity of the chip selects of the SPI devices at the time of its initialization. For this reason the initialization of the several chip selects is postponed to the point of time when the very first SPI transfer to the associated device occurs. Signed-off-by: Torsten Fleischer to-fleisc...@t-online.de Ah. I understand what you're doing now. Hmmm. This approach concerns me because it relies on firmware or platform code to get CS gpios set up properly before the driver is probed. Yes, that was said at the very beginning of this thread. Firmware doesn't always get it right, and I prefer to avoid platform specific setups as much as possible. Why can't the CS polarity be encoded into the device tree so the driver *does* have the polarity data at probe time? We have the spi-cs-high property, but it duplicates compatible property. 'compatible' is enough to tell whether some device has cs-high or cs-low (device's driver knows that already). The problem is that SPI bus master doesn't know all the devices, so it can't extract that information from the compatible string. To workaround that we can use 'spi-cs-high', but that's ugly workaround. SPI modes (0,1,2,3) is another matter, some devices can work in several modes, so 'spi-cpol' and 'spi-cpha' are actually useful. -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] spi_mpc8xxx.c: chip select polarity problem
On Thu, Nov 26, 2009 at 11:50:05AM -0700, Grant Likely wrote: On Thu, Nov 26, 2009 at 11:41 AM, Anton Vorontsov avoront...@ru.mvista.com wrote: On Thu, Nov 26, 2009 at 11:16:34AM -0700, Grant Likely wrote: [...] The spi-cs-high property is defined in Documentation/powerpc/dts-bindings/spi-bus.txt, but it definitely was a mistake Yup. Currently the spi-cs-high property is parsed in the of_register_spi_devices() function, but the CS polarity needs to be known before registering devices. It needs to be factored out into another utility function callable by spi bus drivers so that it can get polarity data at probe time. Untill we have this, Torsten's patch is a real improvement, and works for non-broken hw/fw. So I think it should be applied. I disagree since it only band-aids the problem and uglifies the driver in the process. In the immediate term the driver needs to be changed to read the spi-cs-high property out of the child nodes before registering the devices. Hm. I thought we agreed that spi-cs-high is not good? Why do you encourage using it then? We'll have to uglify the driver with legacy device-tree handling code. -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [PATCH 7/8] spi_mpc8xxx: Turn qe_mode into flags
On Tue, Nov 24, 2009 at 04:03:36PM +1100, Benjamin Herrenschmidt wrote: [...] This patch breaks my 6xx config: /home/benh/linux-powerpc-test/arch/powerpc/platforms/83xx/mpc832x_rdb.c: In function ‘of_fsl_spi_probe’: /home/benh/linux-powerpc-test/arch/powerpc/platforms/83xx/mpc832x_rdb.c:77: error: ‘struct fsl_spi_platform_data’ has no member named ‘qe_ The reason is that the mpc832x_rdb.c code still uses the legacy probing method. The fix is not totally trivial as the new flags are defined inside spi_mpc8xxx.c Thanks for noticing. I indeed forgot about the legacy stuff. :-/ If you are going to keep the flags in the .c file you probably also want to remove the platform device definition from fsl_devices.h anyways as there's no point exposing to the world a structure with a flags member if the definition of those flags isn't also exposed. Yep. Though, IIRC Joakim asked to keep the legacy bindings for some time (until we implement SPI chip-select framework?)... so for now we'll have to leave we the exposed flags. Thanks again, -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [PATCH V2] gpio: add driver for MAX7300 I2C GPIO extender
On Thu, Nov 19, 2009 at 03:02:29PM +0100, Wolfram Sang wrote:
Add the MAX7300-I2C variant to the MAX7301-SPI version. They share most parts
of the driver (i.e. the logic) and the read/write-register functions get
encapsulated. It is thus possible to use both variants simultaneously.
Signed-off-by: Wolfram Sang w.s...@pengutronix.de
Cc: Juergen Beisert j.beis...@pengutronix.de
Cc: David Brownell dbrown...@users.sourceforge.net
Cc: Jean Delvare kh...@linux-fr.org
Cc: Anton Vorontsov avoront...@ru.mvista.com
Cc: Andrew Morton a...@linux-foundation.org
---
Wolfram, thanks for your work on this.
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 2ad0128..a1d2608 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -65,6 +65,24 @@ config GPIO_SYSFS
# put expanders in the right section, in alphabetical order
+comment GPIO expanders for multiple busses
+
+config GPIO_MAX7301
+ tristate Maxim MAX730x GPIO expander
I believe this should be 'depends on I2C || SPI_MASTER'.
+ help
+ GPIO driver for Maxim MAX7300/7301 GPIO expanders.
+ Also select which bus you want to use.
+
+if GPIO_MAX7301
+config GPIO_MAX7301_I2C
+ bool I2C support (for MAX7300)
+ depends on I2C
+
+config GPIO_MAX7301_SPI
+ bool SPI support (for MAX7301)
+ depends on SPI_MASTER
+endif
+
comment Memory mapped GPIO expanders:
[...]
+static int max7301_i2c_write(struct device *dev, unsigned int reg,
+ unsigned int val)
+{
+ struct i2c_client *client = to_i2c_client(dev);
This is a matter of taste, but I'd add an empty line here.
+ return i2c_smbus_write_byte_data(client, reg, val);
+}
+
+static int max7301_i2c_read(struct device *dev, unsigned int reg)
+{
+ struct i2c_client *client = to_i2c_client(dev);
And here.
+ return i2c_smbus_read_byte_data(client, reg);
+}
+
+static int __devinit max7300_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
[...]
+#endif /* CONFIG_GPIO_MAX7301_I2C */
+
static int __init max7301_init(void)
{
- return spi_register_driver(max7301_driver);
+ int ret;
+ ret = max7300_add_driver(max7300_driver);
Please add an empty line after 'int ret;'.
Thanks!
--
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email: cbouatmai...@gmail.com
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[spi-devel-general] [RESEND][PATCH 0/8] spi_mpc8xxx: Add support for DMA transfers
Hello Kumar, There are Acks from Greg KH and David Brownell to pass the whole patchset via PowerPC tree. Can you please apply it? Thanks, -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 -- Come build with us! The BlackBerry(R) Developer Conference in SF, CA is the only developer event you need to attend this year. Jumpstart your developing skills, take BlackBerry mobile applications to market and stay ahead of the curve. Join us from November 9 - 12, 2009. Register now! http://p.sf.net/sfu/devconference ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [PATCH 4/8] powerpc/qecpm: Implement static inline stubs for non-QE/CPM builds
This is needed to avoid ugly #ifdefs in drivers. Also update fsl_qe_udc
driver so that now it doesn't define its own versions that cause build
breakage when the generic stubs are used.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
Acked-by: Greg Kroah-Hartman gre...@suse.de
---
arch/powerpc/include/asm/cpm.h | 44 +++
arch/powerpc/include/asm/qe.h | 11 -
drivers/usb/gadget/fsl_qe_udc.h | 15 -
3 files changed, 54 insertions(+), 16 deletions(-)
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h
index ea3fdb9..0835eb9 100644
--- a/arch/powerpc/include/asm/cpm.h
+++ b/arch/powerpc/include/asm/cpm.h
@@ -3,6 +3,7 @@
#include linux/compiler.h
#include linux/types.h
+#include linux/errno.h
#include linux/of.h
/*
@@ -131,13 +132,56 @@ typedef struct cpm_buf_desc {
#define BD_I2C_START (0x0400)
int cpm_muram_init(void);
+
+#if defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE)
unsigned long cpm_muram_alloc(unsigned long size, unsigned long align);
int cpm_muram_free(unsigned long offset);
unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
void __iomem *cpm_muram_addr(unsigned long offset);
unsigned long cpm_muram_offset(void __iomem *addr);
dma_addr_t cpm_muram_dma(void __iomem *addr);
+#else
+static inline unsigned long cpm_muram_alloc(unsigned long size,
+ unsigned long align)
+{
+ return -ENOSYS;
+}
+
+static inline int cpm_muram_free(unsigned long offset)
+{
+ return -ENOSYS;
+}
+
+static inline unsigned long cpm_muram_alloc_fixed(unsigned long offset,
+ unsigned long size)
+{
+ return -ENOSYS;
+}
+
+static inline void __iomem *cpm_muram_addr(unsigned long offset)
+{
+ return NULL;
+}
+
+static inline unsigned long cpm_muram_offset(void __iomem *addr)
+{
+ return -ENOSYS;
+}
+
+static inline dma_addr_t cpm_muram_dma(void __iomem *addr)
+{
+ return 0;
+}
+#endif /* defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE) */
+
+#ifdef CONFIG_CPM
int cpm_command(u32 command, u8 opcode);
+#else
+static inline int cpm_command(u32 command, u8 opcode)
+{
+ return -ENOSYS;
+}
+#endif /* CONFIG_CPM */
int cpm2_gpiochip_add32(struct device_node *np);
diff --git a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h
index f388f0a..d013d7e 100644
--- a/arch/powerpc/include/asm/qe.h
+++ b/arch/powerpc/include/asm/qe.h
@@ -145,8 +145,17 @@ static inline void qe_pin_set_gpio(struct qe_pin *qe_pin)
{}
static inline void qe_pin_set_dedicated(struct qe_pin *pin) {}
#endif /* CONFIG_QE_GPIO */
-/* QE internal API */
+#ifdef CONFIG_QUICC_ENGINE
int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input);
+#else
+static inline int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol,
+ u32 cmd_input)
+{
+ return -ENOSYS;
+}
+#endif /* CONFIG_QUICC_ENGINE */
+
+/* QE internal API */
enum qe_clock qe_clock_source(const char *source);
unsigned int qe_get_brg_clk(void);
int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier);
diff --git a/drivers/usb/gadget/fsl_qe_udc.h b/drivers/usb/gadget/fsl_qe_udc.h
index 31b2710..bea5b82 100644
--- a/drivers/usb/gadget/fsl_qe_udc.h
+++ b/drivers/usb/gadget/fsl_qe_udc.h
@@ -419,19 +419,4 @@ struct qe_udc {
#define CPM_USB_RESTART_TX_OPCODE 0x0b
#define CPM_USB_EP_SHIFT 5
-#ifndef CONFIG_CPM
-inline int cpm_command(u32 command, u8 opcode)
-{
- return -EOPNOTSUPP;
-}
-#endif
-
-#ifndef CONFIG_QUICC_ENGINE
-inline int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol,
- u32 cmd_input)
-{
- return -EOPNOTSUPP;
-}
-#endif
-
#endif /* __FSL_QE_UDC_H */
--
1.6.3.3
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[spi-devel-general] [PATCH 2/8] powerpc/qecpm2: Avoid redefinitions in CPM2 and QE headers
struct mcc defined in both immap_qe.h and immap_cpm2.h, so they will
conflic when included in a single file. The mcc struct is easy to deal
with, since it isn't used in any driver (yet), so let's just rename QE
version to qe_mcc.
The ucb_ctlr is a bit trickier, since it is used by fsl_qe_udc driver,
and the driver supports both CPM and QE UDCs, plus the QE version is
used to form a bigger immap struct.
I don't want to touch too much of USB code in this series, so for now
let's just copy most generic version into the common cpm.h header,
later we'll create cpm_usb.h where we'll place common USB structs that
are used by QE/CPM UDC and QE Host drivers (FHCI).
And as for the structs in qe.h and cpm2.h, just prefix them with qe_
and cpm_.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
arch/powerpc/include/asm/cpm.h| 22 ++
arch/powerpc/include/asm/immap_cpm2.h |2 +-
arch/powerpc/include/asm/immap_qe.h |8
3 files changed, 27 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h
index 24d79e3..b5f1534 100644
--- a/arch/powerpc/include/asm/cpm.h
+++ b/arch/powerpc/include/asm/cpm.h
@@ -5,6 +5,28 @@
#include linux/types.h
#include linux/of.h
+/*
+ * USB Controller pram common to QE and CPM.
+ */
+struct usb_ctlr {
+ u8 usb_usmod;
+ u8 usb_usadr;
+ u8 usb_uscom;
+ u8 res1[1];
+ __be16 usb_usep[4];
+ u8 res2[4];
+ __be16 usb_usber;
+ u8 res3[2];
+ __be16 usb_usbmr;
+ u8 res4[1];
+ u8 usb_usbs;
+ /* Fields down below are QE-only */
+ __be16 usb_ussft;
+ u8 res5[2];
+ __be16 usb_usfrn;
+ u8 res6[0x22];
+} __attribute__ ((packed));
+
/* Opcodes common to CPM1 and CPM2
*/
#define CPM_CR_INIT_TRX((ushort)0x)
diff --git a/arch/powerpc/include/asm/immap_cpm2.h
b/arch/powerpc/include/asm/immap_cpm2.h
index d4f069b..7c64fda 100644
--- a/arch/powerpc/include/asm/immap_cpm2.h
+++ b/arch/powerpc/include/asm/immap_cpm2.h
@@ -549,7 +549,7 @@ typedef struct comm_proc {
/* USB Controller.
*/
-typedef struct usb_ctlr {
+typedef struct cpm_usb_ctlr {
u8 usb_usmod;
u8 usb_usadr;
u8 usb_uscom;
diff --git a/arch/powerpc/include/asm/immap_qe.h
b/arch/powerpc/include/asm/immap_qe.h
index c346d0b..4e10f50 100644
--- a/arch/powerpc/include/asm/immap_qe.h
+++ b/arch/powerpc/include/asm/immap_qe.h
@@ -210,7 +210,7 @@ struct sir {
} __attribute__ ((packed));
/* USB Controller */
-struct usb_ctlr {
+struct qe_usb_ctlr {
u8 usb_usmod;
u8 usb_usadr;
u8 usb_uscom;
@@ -229,7 +229,7 @@ struct usb_ctlr {
} __attribute__ ((packed));
/* MCC */
-struct mcc {
+struct qe_mcc {
__be32 mcce; /* MCC event register */
__be32 mccm; /* MCC mask register */
__be32 mccf; /* MCC configuration register */
@@ -431,9 +431,9 @@ struct qe_immap {
struct qe_mux qmx;/* QE Multiplexer */
struct qe_timersqet;/* QE Timers */
struct spi spi[0x2]; /* spi */
- struct mcc mcc;/* mcc */
+ struct qe_mcc mcc;/* mcc */
struct qe_brg brg;/* brg */
- struct usb_ctlr usb;/* USB */
+ struct qe_usb_ctlr usb;/* USB */
struct si1 si1;/* SI */
u8 res11[0x800];
struct sir sir;/* SI Routing Tables */
--
1.6.3.3
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[spi-devel-general] [PATCH 1/8] powerpc/cpm: Remove SPI defines and spi structs
When cpm2.h included into spi_mpc8xxx driver, the SPI defines
in the header conflict with defines in the driver.
We don't need them in the header file, so remove them. Plus
remove struct spi, we'll use a better version in the driver.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
arch/powerpc/include/asm/cpm1.h | 45 ---
arch/powerpc/include/asm/cpm2.h | 39 -
2 files changed, 0 insertions(+), 84 deletions(-)
diff --git a/arch/powerpc/include/asm/cpm1.h b/arch/powerpc/include/asm/cpm1.h
index 7685ffd..81b0119 100644
--- a/arch/powerpc/include/asm/cpm1.h
+++ b/arch/powerpc/include/asm/cpm1.h
@@ -478,51 +478,6 @@ typedef struct iic {
charres2[2];/* Reserved */
} iic_t;
-/* SPI parameter RAM.
-*/
-typedef struct spi {
- ushort spi_rbase; /* Rx Buffer descriptor base address */
- ushort spi_tbase; /* Tx Buffer descriptor base address */
- u_char spi_rfcr; /* Rx function code */
- u_char spi_tfcr; /* Tx function code */
- ushort spi_mrblr; /* Max receive buffer length */
- uintspi_rstate; /* Internal */
- uintspi_rdp;/* Internal */
- ushort spi_rbptr; /* Internal */
- ushort spi_rbc;/* Internal */
- uintspi_rxtmp; /* Internal */
- uintspi_tstate; /* Internal */
- uintspi_tdp;/* Internal */
- ushort spi_tbptr; /* Internal */
- ushort spi_tbc;/* Internal */
- uintspi_txtmp; /* Internal */
- uintspi_res;
- ushort spi_rpbase; /* Relocation pointer */
- ushort spi_res2;
-} spi_t;
-
-/* SPI Mode register.
-*/
-#define SPMODE_LOOP((ushort)0x4000)/* Loopback */
-#define SPMODE_CI ((ushort)0x2000)/* Clock Invert */
-#define SPMODE_CP ((ushort)0x1000)/* Clock Phase */
-#define SPMODE_DIV16 ((ushort)0x0800)/* BRG/16 mode */
-#define SPMODE_REV ((ushort)0x0400)/* Reversed Data */
-#define SPMODE_MSTR((ushort)0x0200)/* SPI Master */
-#define SPMODE_EN ((ushort)0x0100)/* Enable */
-#define SPMODE_LENMSK ((ushort)0x00f0)/* character length */
-#define SPMODE_LEN4((ushort)0x0030)/* 4 bits per char */
-#define SPMODE_LEN8((ushort)0x0070)/* 8 bits per char */
-#define SPMODE_LEN16 ((ushort)0x00f0)/* 16 bits per char */
-#define SPMODE_PMMSK ((ushort)0x000f)/* prescale modulus */
-
-/* SPIE fields */
-#define SPIE_MME 0x20
-#define SPIE_TXE 0x10
-#define SPIE_BSY 0x04
-#define SPIE_TXB 0x02
-#define SPIE_RXB 0x01
-
/*
* RISC Controller Configuration Register definitons
*/
diff --git a/arch/powerpc/include/asm/cpm2.h b/arch/powerpc/include/asm/cpm2.h
index 990ff19..236cfa3 100644
--- a/arch/powerpc/include/asm/cpm2.h
+++ b/arch/powerpc/include/asm/cpm2.h
@@ -654,45 +654,6 @@ typedef struct iic {
uintiic_txtmp; /* Internal */
} iic_t;
-/* SPI parameter RAM.
-*/
-typedef struct spi {
- ushort spi_rbase; /* Rx Buffer descriptor base address */
- ushort spi_tbase; /* Tx Buffer descriptor base address */
- u_char spi_rfcr; /* Rx function code */
- u_char spi_tfcr; /* Tx function code */
- ushort spi_mrblr; /* Max receive buffer length */
- uintspi_rstate; /* Internal */
- uintspi_rdp;/* Internal */
- ushort spi_rbptr; /* Internal */
- ushort spi_rbc;/* Internal */
- uintspi_rxtmp; /* Internal */
- uintspi_tstate; /* Internal */
- uintspi_tdp;/* Internal */
- ushort spi_tbptr; /* Internal */
- ushort spi_tbc;/* Internal */
- uintspi_txtmp; /* Internal */
- uintspi_res;/* Tx temp. */
- uintspi_res1[4];/* SDMA temp. */
-} spi_t;
-
-/* SPI Mode register.
-*/
-#define SPMODE_LOOP((ushort)0x4000)/* Loopback */
-#define SPMODE_CI ((ushort)0x2000)/* Clock Invert */
-#define SPMODE_CP ((ushort)0x1000)/* Clock Phase */
-#define SPMODE_DIV16 ((ushort)0x0800)/* BRG/16 mode */
-#define SPMODE_REV ((ushort)0x0400)/* Reversed Data */
-#define SPMODE_MSTR((ushort)0x0200)/* SPI Master */
-#define SPMODE_EN ((ushort)0x0100)/* Enable */
-#define SPMODE_LENMSK ((ushort)0x00f0)/* character length */
-#define SPMODE_PMMSK ((ushort)0x000f)/* prescale modulus */
-
-#define SPMODE_LEN(x) x)-1)0xF)4)
-#define SPMODE_PM(x) ((x) 0xF)
-
-#define SPI_EB ((u_char)0x10) /* big endian byte order */
-
/* IDMA parameter RAM
*/
typedef struct idma {
--
1.6.3.3
--
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[spi-devel-general] [PATCH 5/8] spi_mpc8xxx: Fix uninitialized variable
This patch fixes the following warning:
CC drivers/spi/spi_mpc8xxx.o
spi_mpc8xxx.c: In function 'of_mpc8xxx_spi_probe':
spi_mpc8xxx.c:681: warning: 'ret' may be used uninitialized in this function
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
Acked-by: David Brownell dbrown...@users.sourceforge.net
---
drivers/spi/spi_mpc8xxx.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index 0fd0ec4..518671b 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -709,6 +709,7 @@ static int of_mpc8xxx_spi_get_chipselects(struct device
*dev)
gpio = of_get_gpio_flags(np, i, flags);
if (!gpio_is_valid(gpio)) {
dev_err(dev, invalid gpio #%d: %d\n, i, gpio);
+ ret = gpio;
goto err_loop;
}
--
1.6.3.3
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[spi-devel-general] [PATCH 3/8] powerpc/cpm: Move CPMFCR_* defines into cpm.h
The bits are generic to CPM devices, so let's move them to the
common header file, so drivers won't need to privately reintroduce
another bunch of the same bits (as we can't include cpm2.h header
together with cpm1.h).
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
arch/powerpc/include/asm/cpm.h | 16
arch/powerpc/include/asm/cpm2.h |8
2 files changed, 16 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h
index b5f1534..ea3fdb9 100644
--- a/arch/powerpc/include/asm/cpm.h
+++ b/arch/powerpc/include/asm/cpm.h
@@ -27,6 +27,22 @@ struct usb_ctlr {
u8 res6[0x22];
} __attribute__ ((packed));
+/*
+ * Function code bits, usually generic to devices.
+ */
+#ifdef CONFIG_CPM1
+#define CPMFCR_GBL ((u_char)0x00) /* Flag doesn't exist in CPM1 */
+#define CPMFCR_TC2 ((u_char)0x00) /* Flag doesn't exist in CPM1 */
+#define CPMFCR_DTB ((u_char)0x00) /* Flag doesn't exist in CPM1 */
+#define CPMFCR_BDB ((u_char)0x00) /* Flag doesn't exist in CPM1 */
+#else
+#define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */
+#define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */
+#define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */
+#define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */
+#endif
+#define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */
+
/* Opcodes common to CPM1 and CPM2
*/
#define CPM_CR_INIT_TRX((ushort)0x)
diff --git a/arch/powerpc/include/asm/cpm2.h b/arch/powerpc/include/asm/cpm2.h
index 236cfa3..f42e9ba 100644
--- a/arch/powerpc/include/asm/cpm2.h
+++ b/arch/powerpc/include/asm/cpm2.h
@@ -124,14 +124,6 @@ static inline void cpm2_fastbrg(uint brg, uint rate, int
div16)
__cpm2_setbrg(brg, rate, CPM2_BRG_INT_CLK, div16, CPM_BRG_EXTC_INT);
}
-/* Function code bits, usually generic to devices.
-*/
-#define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */
-#define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */
-#define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */
-#define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */
-#define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */
-
/* Parameter RAM offsets from the base.
*/
#define PROFF_SCC1 ((uint)0x8000)
--
1.6.3.3
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[spi-devel-general] [PATCH 7/8] spi_mpc8xxx: Turn qe_mode into flags
Soon there will be more flags introduced in subsequent patches, so
let's turn qe_mode into flags.
Also introduce mpc8xxx_spi_strmode() and print current SPI mode.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
Acked-by: David Brownell dbrown...@users.sourceforge.net
---
drivers/spi/spi_mpc8xxx.c | 30 +++---
include/linux/fsl_devices.h |2 +-
2 files changed, 20 insertions(+), 12 deletions(-)
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index 4b119ea..80374df 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -96,7 +96,8 @@ struct mpc8xxx_spi {
u32 rx_shift; /* RX data reg shift when in qe mode */
u32 tx_shift; /* TX data reg shift when in qe mode */
- bool qe_mode;
+ unsigned int flags;
+#define SPI_QE_CPU_MODE(1 0) /* QE CPU (PIO) mode */
struct workqueue_struct *workqueue;
struct work_struct work;
@@ -235,14 +236,14 @@ int mpc8xxx_spi_setup_transfer(struct spi_device *spi,
struct spi_transfer *t)
if (bits_per_word = 8) {
cs-get_rx = mpc8xxx_spi_rx_buf_u8;
cs-get_tx = mpc8xxx_spi_tx_buf_u8;
- if (mpc8xxx_spi-qe_mode) {
+ if (mpc8xxx_spi-flags SPI_QE_CPU_MODE) {
cs-rx_shift = 16;
cs-tx_shift = 24;
}
} else if (bits_per_word = 16) {
cs-get_rx = mpc8xxx_spi_rx_buf_u16;
cs-get_tx = mpc8xxx_spi_tx_buf_u16;
- if (mpc8xxx_spi-qe_mode) {
+ if (mpc8xxx_spi-flags SPI_QE_CPU_MODE) {
cs-rx_shift = 16;
cs-tx_shift = 16;
}
@@ -252,7 +253,8 @@ int mpc8xxx_spi_setup_transfer(struct spi_device *spi,
struct spi_transfer *t)
} else
return -EINVAL;
- if (mpc8xxx_spi-qe_mode spi-mode SPI_LSB_FIRST) {
+ if (mpc8xxx_spi-flags SPI_QE_CPU_MODE
+ spi-mode SPI_LSB_FIRST) {
cs-tx_shift = 0;
if (bits_per_word = 8)
cs-rx_shift = 8;
@@ -518,6 +520,13 @@ static void mpc8xxx_spi_cleanup(struct spi_device *spi)
kfree(spi-controller_state);
}
+static const char *mpc8xxx_spi_strmode(unsigned int flags)
+{
+ if (flags SPI_QE_CPU_MODE)
+ return QE CPU;
+ return CPU;
+}
+
static struct spi_master * __devinit
mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
{
@@ -544,14 +553,14 @@ mpc8xxx_spi_probe(struct device *dev, struct resource
*mem, unsigned int irq)
master-cleanup = mpc8xxx_spi_cleanup;
mpc8xxx_spi = spi_master_get_devdata(master);
- mpc8xxx_spi-qe_mode = pdata-qe_mode;
mpc8xxx_spi-get_rx = mpc8xxx_spi_rx_buf_u8;
mpc8xxx_spi-get_tx = mpc8xxx_spi_tx_buf_u8;
+ mpc8xxx_spi-flags = pdata-flags;
mpc8xxx_spi-spibrg = pdata-sysclk;
mpc8xxx_spi-rx_shift = 0;
mpc8xxx_spi-tx_shift = 0;
- if (mpc8xxx_spi-qe_mode) {
+ if (mpc8xxx_spi-flags SPI_QE_CPU_MODE) {
mpc8xxx_spi-rx_shift = 16;
mpc8xxx_spi-tx_shift = 24;
}
@@ -584,7 +593,7 @@ mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
unsigned int irq)
/* Enable SPI interface */
regval = pdata-initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE;
- if (pdata-qe_mode)
+ if (mpc8xxx_spi-flags SPI_QE_CPU_MODE)
regval |= SPMODE_OP;
mpc8xxx_spi_write_reg(mpc8xxx_spi-base-mode, regval);
@@ -604,9 +613,8 @@ mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
unsigned int irq)
if (ret 0)
goto unreg_master;
- printk(KERN_INFO
- %s: MPC8xxx SPI Controller driver at 0x%p (irq = %d)\n,
- dev_name(dev), mpc8xxx_spi-base, mpc8xxx_spi-irq);
+ dev_info(dev, at 0x%p (irq = %d), %s mode\n, mpc8xxx_spi-base,
+mpc8xxx_spi-irq, mpc8xxx_spi_strmode(mpc8xxx_spi-flags));
return master;
@@ -797,7 +805,7 @@ static int __devinit of_mpc8xxx_spi_probe(struct of_device
*ofdev,
prop = of_get_property(np, mode, NULL);
if (prop !strcmp(prop, cpu-qe))
- pdata-qe_mode = 1;
+ pdata-flags = SPI_QE_CPU_MODE;
ret = of_mpc8xxx_spi_get_chipselects(dev);
if (ret)
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 43fc95d..39fd946 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -74,7 +74,7 @@ struct spi_device;
struct fsl_spi_platform_data {
u32 initial_spmode; /* initial SPMODE value */
s16 bus_num;
- boolqe_mode;
+ unsigned int flags;
/* board specific information */
u16 max_chipselect;
void(*cs_control)(struct spi_device *spi, bool
[spi-devel-general] [PATCH 8/8] spi_mpc8xxx: Add support for QE DMA mode and CPM1/CPM2 chips
This patch adds QE buffer descriptors mode support for the
spi_mpc8xxx driver, and as a side effect we now support CPM1
and CPM2 SPI controllers.
That means that today we support almost all MPC SPI controllers:
- MPC834x-style controllers (support PIO mode only);
- CPM1 and CPM2 controllers (support DMA mode only);
- QE SPI controllers in CPU mode (PIO mode with shift quirks);
- QE SPI controllers in buffer descriptors (DMA) mode;
The only controller we don't currently support is a newer eSPI
(with a dedicated chip selects and a bit different registers map).
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
Acked-by: David Brownell dbrown...@users.sourceforge.net
---
drivers/spi/Kconfig |3 -
drivers/spi/spi_mpc8xxx.c | 540 +
2 files changed, 500 insertions(+), 43 deletions(-)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 4b6f7cb..94058c6 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -147,9 +147,6 @@ config SPI_MPC8xxx
This enables using the Freescale MPC8xxx SPI controllers in master
mode.
- This driver uses a simple set of shift registers for data (opposed
- to the CPM based descriptor model).
-
config SPI_OMAP_UWIRE
tristate OMAP1 MicroWire
depends on ARCH_OMAP1
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index 80374df..394b658 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -5,6 +5,10 @@
*
* Copyright (C) 2006 Polycom, Inc.
*
+ * CPM SPI and QE buffer descriptors mode support:
+ * Copyright (c) 2009 MontaVista Software, Inc.
+ * Author: Anton Vorontsov avoront...@ru.mvista.com
+ *
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
@@ -27,6 +31,9 @@
#include linux/spi/spi_bitbang.h
#include linux/platform_device.h
#include linux/fsl_devices.h
+#include linux/dma-mapping.h
+#include linux/mm.h
+#include linux/mutex.h
#include linux/of.h
#include linux/of_platform.h
#include linux/gpio.h
@@ -34,8 +41,19 @@
#include linux/of_spi.h
#include sysdev/fsl_soc.h
+#include asm/cpm.h
+#include asm/qe.h
#include asm/irq.h
+/* CPM1 and CPM2 are mutually exclusive. */
+#ifdef CONFIG_CPM1
+#include asm/cpm1.h
+#define CPM_SPI_CMD mk_cr_cmd(CPM_CR_CH_SPI, 0)
+#else
+#include asm/cpm2.h
+#define CPM_SPI_CMD mk_cr_cmd(CPM_CR_SPI_PAGE, CPM_CR_SPI_SBLOCK, 0, 0)
+#endif
+
/* SPI Controller registers */
struct mpc8xxx_spi_reg {
u8 res1[0x20];
@@ -47,6 +65,28 @@ struct mpc8xxx_spi_reg {
__be32 receive;
};
+/* SPI Parameter RAM */
+struct spi_pram {
+ __be16 rbase; /* Rx Buffer descriptor base address */
+ __be16 tbase; /* Tx Buffer descriptor base address */
+ u8 rfcr; /* Rx function code */
+ u8 tfcr; /* Tx function code */
+ __be16 mrblr; /* Max receive buffer length */
+ __be32 rstate; /* Internal */
+ __be32 rdp;/* Internal */
+ __be16 rbptr; /* Internal */
+ __be16 rbc;/* Internal */
+ __be32 rxtmp; /* Internal */
+ __be32 tstate; /* Internal */
+ __be32 tdp;/* Internal */
+ __be16 tbptr; /* Internal */
+ __be16 tbc;/* Internal */
+ __be32 txtmp; /* Internal */
+ __be32 res;/* Tx temp. */
+ __be16 rpbase; /* Relocation pointer (CPM1 only) */
+ __be16 res1; /* Reserved */
+};
+
/* SPI Controller mode register definitions */
#defineSPMODE_LOOP (1 30)
#defineSPMODE_CI_INACTIVEHIGH (1 29)
@@ -75,14 +115,40 @@ struct mpc8xxx_spi_reg {
#defineSPIM_NE 0x0200 /* Not empty */
#defineSPIM_NF 0x0100 /* Not full */
+#defineSPIE_TXB0x0200 /* Last char is written to tx
fifo */
+#defineSPIE_RXB0x0100 /* Last char is written to rx
buf */
+
+/* SPCOM register values */
+#defineSPCOM_STR (1 23) /* Start transmit */
+
+#defineSPI_PRAM_SIZE 0x100
+#defineSPI_MRBLR ((unsigned int)PAGE_SIZE)
+
/* SPI Controller driver's private data. */
struct mpc8xxx_spi {
+ struct device *dev;
struct mpc8xxx_spi_reg __iomem *base;
/* rx tx bufs from the spi_transfer */
const void *tx;
void *rx;
+ int subblock;
+ struct spi_pram __iomem *pram;
+ struct cpm_buf_desc __iomem *tx_bd;
+ struct cpm_buf_desc __iomem *rx_bd;
+
+ struct spi_transfer *xfer_in_progress;
+
+ /* dma addresses for CPM transfers */
+ dma_addr_t tx_dma;
+ dma_addr_t rx_dma;
+ bool map_tx_dma;
+ bool map_rx_dma;
+
+ dma_addr_t dma_dummy_tx;
+ dma_addr_t dma_dummy_rx;
+
/* functions to deal with different
Re: [spi-devel-general] [PATCH 1/8] powerpc/cpm: Remove SPI defines and spi structs
On Fri, Aug 28, 2009 at 12:45:34AM -0500, Kumar Gala wrote: On Aug 18, 2009, at 5:04 PM, Anton Vorontsov wrote: When cpm2.h included into spi_mpc8xxx driver, the SPI defines in the header conflict with defines in the driver. We don't need them in the header file, so remove them. Plus remove struct spi, we'll use a better version in the driver. Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com --- arch/powerpc/include/asm/cpm1.h | 45 --- arch/powerpc/include/asm/cpm2.h | 39 - 2 files changed, 0 insertions(+), 84 deletions(-) applied to next I can't find it in 2.6.32-rc1. Somehow it got lost from your next tree? The same for all powerpc patches from this series. -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 -- Come build with us! The BlackBerryreg; Developer Conference in SF, CA is the only developer event you need to attend this year. Jumpstart your developing skills, take BlackBerry mobile applications to market and stay ahead of the curve. Join us from November 9#45;12, 2009. Register now#33; http://p.sf.net/sfu/devconf ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [PATCH v2 0/8] spi_mpc8xxx: Add support for DMA transfers
On Thu, Aug 27, 2009 at 09:41:59PM -0700, David Brownell wrote: On Tuesday 18 August 2009, Anton Vorontsov wrote: - Fix build issues in fsl_qe_udc; - Some minor cosmetic changes in Add support for QE DMA mode and CPM1/CPM2 chips patch. Hmm ... the first four of these are pure PPC stuff and thus not appropriate to send as SPI patches; but the second four depend on them. So I'll just say Acked-by: David Brownell dbrown...@users.sourceforge.net and ask you to merge via the PPC tree. (And hope that you verified these are bisectable...) Thanks David. Kumar, can you please merge the SPI part of this patch set? Thanks, -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [PATCH 2/8] powerpc/qecpm2: Avoid redefinitions in CPM2 and QE headers
struct mcc defined in both immap_qe.h and immap_cpm2.h, so they will
conflic when included in a single file. The mcc struct is easy to deal
with, since it isn't used in any driver (yet), so let's just rename QE
version to qe_mcc.
The ucb_ctlr is a bit trickier, since it is used by fsl_qe_udc driver,
and the driver supports both CPM and QE UDCs, plus the QE version is
used to form a bigger immap struct.
I don't want to touch too much of USB code in this series, so for now
let's just copy most generic version into the common cpm.h header,
later we'll create cpm_usb.h where we'll place common USB structs that
are used by QE/CPM UDC and QE Host drivers (FHCI).
And as for the structs in qe.h and cpm2.h, just prefix them with qe_
and cpm_.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
arch/powerpc/include/asm/cpm.h| 22 ++
arch/powerpc/include/asm/immap_cpm2.h |2 +-
arch/powerpc/include/asm/immap_qe.h |8
3 files changed, 27 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h
index 24d79e3..b5f1534 100644
--- a/arch/powerpc/include/asm/cpm.h
+++ b/arch/powerpc/include/asm/cpm.h
@@ -5,6 +5,28 @@
#include linux/types.h
#include linux/of.h
+/*
+ * USB Controller pram common to QE and CPM.
+ */
+struct usb_ctlr {
+ u8 usb_usmod;
+ u8 usb_usadr;
+ u8 usb_uscom;
+ u8 res1[1];
+ __be16 usb_usep[4];
+ u8 res2[4];
+ __be16 usb_usber;
+ u8 res3[2];
+ __be16 usb_usbmr;
+ u8 res4[1];
+ u8 usb_usbs;
+ /* Fields down below are QE-only */
+ __be16 usb_ussft;
+ u8 res5[2];
+ __be16 usb_usfrn;
+ u8 res6[0x22];
+} __attribute__ ((packed));
+
/* Opcodes common to CPM1 and CPM2
*/
#define CPM_CR_INIT_TRX((ushort)0x)
diff --git a/arch/powerpc/include/asm/immap_cpm2.h
b/arch/powerpc/include/asm/immap_cpm2.h
index d4f069b..7c64fda 100644
--- a/arch/powerpc/include/asm/immap_cpm2.h
+++ b/arch/powerpc/include/asm/immap_cpm2.h
@@ -549,7 +549,7 @@ typedef struct comm_proc {
/* USB Controller.
*/
-typedef struct usb_ctlr {
+typedef struct cpm_usb_ctlr {
u8 usb_usmod;
u8 usb_usadr;
u8 usb_uscom;
diff --git a/arch/powerpc/include/asm/immap_qe.h
b/arch/powerpc/include/asm/immap_qe.h
index c346d0b..4e10f50 100644
--- a/arch/powerpc/include/asm/immap_qe.h
+++ b/arch/powerpc/include/asm/immap_qe.h
@@ -210,7 +210,7 @@ struct sir {
} __attribute__ ((packed));
/* USB Controller */
-struct usb_ctlr {
+struct qe_usb_ctlr {
u8 usb_usmod;
u8 usb_usadr;
u8 usb_uscom;
@@ -229,7 +229,7 @@ struct usb_ctlr {
} __attribute__ ((packed));
/* MCC */
-struct mcc {
+struct qe_mcc {
__be32 mcce; /* MCC event register */
__be32 mccm; /* MCC mask register */
__be32 mccf; /* MCC configuration register */
@@ -431,9 +431,9 @@ struct qe_immap {
struct qe_mux qmx;/* QE Multiplexer */
struct qe_timersqet;/* QE Timers */
struct spi spi[0x2]; /* spi */
- struct mcc mcc;/* mcc */
+ struct qe_mcc mcc;/* mcc */
struct qe_brg brg;/* brg */
- struct usb_ctlr usb;/* USB */
+ struct qe_usb_ctlr usb;/* USB */
struct si1 si1;/* SI */
u8 res11[0x800];
struct sir sir;/* SI Routing Tables */
--
1.6.3.3
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[spi-devel-general] [PATCH 4/8] powerpc/qecpm: Implement static inline stubs for non-QE/CPM builds
This is needed to avoid ugly #ifdefs in drivers. Also update fsl_qe_udc
driver so that now it doesn't define its own versions that cause build
breakage when the generic stubs are used.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
arch/powerpc/include/asm/cpm.h | 44 +++
arch/powerpc/include/asm/qe.h | 11 -
drivers/usb/gadget/fsl_qe_udc.h | 15 -
3 files changed, 54 insertions(+), 16 deletions(-)
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h
index ea3fdb9..0835eb9 100644
--- a/arch/powerpc/include/asm/cpm.h
+++ b/arch/powerpc/include/asm/cpm.h
@@ -3,6 +3,7 @@
#include linux/compiler.h
#include linux/types.h
+#include linux/errno.h
#include linux/of.h
/*
@@ -131,13 +132,56 @@ typedef struct cpm_buf_desc {
#define BD_I2C_START (0x0400)
int cpm_muram_init(void);
+
+#if defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE)
unsigned long cpm_muram_alloc(unsigned long size, unsigned long align);
int cpm_muram_free(unsigned long offset);
unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
void __iomem *cpm_muram_addr(unsigned long offset);
unsigned long cpm_muram_offset(void __iomem *addr);
dma_addr_t cpm_muram_dma(void __iomem *addr);
+#else
+static inline unsigned long cpm_muram_alloc(unsigned long size,
+ unsigned long align)
+{
+ return -ENOSYS;
+}
+
+static inline int cpm_muram_free(unsigned long offset)
+{
+ return -ENOSYS;
+}
+
+static inline unsigned long cpm_muram_alloc_fixed(unsigned long offset,
+ unsigned long size)
+{
+ return -ENOSYS;
+}
+
+static inline void __iomem *cpm_muram_addr(unsigned long offset)
+{
+ return NULL;
+}
+
+static inline unsigned long cpm_muram_offset(void __iomem *addr)
+{
+ return -ENOSYS;
+}
+
+static inline dma_addr_t cpm_muram_dma(void __iomem *addr)
+{
+ return 0;
+}
+#endif /* defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE) */
+
+#ifdef CONFIG_CPM
int cpm_command(u32 command, u8 opcode);
+#else
+static inline int cpm_command(u32 command, u8 opcode)
+{
+ return -ENOSYS;
+}
+#endif /* CONFIG_CPM */
int cpm2_gpiochip_add32(struct device_node *np);
diff --git a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h
index 157c5ca..791c67a 100644
--- a/arch/powerpc/include/asm/qe.h
+++ b/arch/powerpc/include/asm/qe.h
@@ -145,8 +145,17 @@ static inline void qe_pin_set_gpio(struct qe_pin *qe_pin)
{}
static inline void qe_pin_set_dedicated(struct qe_pin *pin) {}
#endif /* CONFIG_QE_GPIO */
-/* QE internal API */
+#ifdef CONFIG_QUICC_ENGINE
int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input);
+#else
+static inline int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol,
+ u32 cmd_input)
+{
+ return -ENOSYS;
+}
+#endif /* CONFIG_QUICC_ENGINE */
+
+/* QE internal API */
enum qe_clock qe_clock_source(const char *source);
unsigned int qe_get_brg_clk(void);
int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier);
diff --git a/drivers/usb/gadget/fsl_qe_udc.h b/drivers/usb/gadget/fsl_qe_udc.h
index 31b2710..bea5b82 100644
--- a/drivers/usb/gadget/fsl_qe_udc.h
+++ b/drivers/usb/gadget/fsl_qe_udc.h
@@ -419,19 +419,4 @@ struct qe_udc {
#define CPM_USB_RESTART_TX_OPCODE 0x0b
#define CPM_USB_EP_SHIFT 5
-#ifndef CONFIG_CPM
-inline int cpm_command(u32 command, u8 opcode)
-{
- return -EOPNOTSUPP;
-}
-#endif
-
-#ifndef CONFIG_QUICC_ENGINE
-inline int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol,
- u32 cmd_input)
-{
- return -EOPNOTSUPP;
-}
-#endif
-
#endif /* __FSL_QE_UDC_H */
--
1.6.3.3
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[spi-devel-general] [PATCH 1/8] powerpc/cpm: Remove SPI defines and spi structs
When cpm2.h included into spi_mpc8xxx driver, the SPI defines
in the header conflict with defines in the driver.
We don't need them in the header file, so remove them. Plus
remove struct spi, we'll use a better version in the driver.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
arch/powerpc/include/asm/cpm1.h | 45 ---
arch/powerpc/include/asm/cpm2.h | 39 -
2 files changed, 0 insertions(+), 84 deletions(-)
diff --git a/arch/powerpc/include/asm/cpm1.h b/arch/powerpc/include/asm/cpm1.h
index 7685ffd..81b0119 100644
--- a/arch/powerpc/include/asm/cpm1.h
+++ b/arch/powerpc/include/asm/cpm1.h
@@ -478,51 +478,6 @@ typedef struct iic {
charres2[2];/* Reserved */
} iic_t;
-/* SPI parameter RAM.
-*/
-typedef struct spi {
- ushort spi_rbase; /* Rx Buffer descriptor base address */
- ushort spi_tbase; /* Tx Buffer descriptor base address */
- u_char spi_rfcr; /* Rx function code */
- u_char spi_tfcr; /* Tx function code */
- ushort spi_mrblr; /* Max receive buffer length */
- uintspi_rstate; /* Internal */
- uintspi_rdp;/* Internal */
- ushort spi_rbptr; /* Internal */
- ushort spi_rbc;/* Internal */
- uintspi_rxtmp; /* Internal */
- uintspi_tstate; /* Internal */
- uintspi_tdp;/* Internal */
- ushort spi_tbptr; /* Internal */
- ushort spi_tbc;/* Internal */
- uintspi_txtmp; /* Internal */
- uintspi_res;
- ushort spi_rpbase; /* Relocation pointer */
- ushort spi_res2;
-} spi_t;
-
-/* SPI Mode register.
-*/
-#define SPMODE_LOOP((ushort)0x4000)/* Loopback */
-#define SPMODE_CI ((ushort)0x2000)/* Clock Invert */
-#define SPMODE_CP ((ushort)0x1000)/* Clock Phase */
-#define SPMODE_DIV16 ((ushort)0x0800)/* BRG/16 mode */
-#define SPMODE_REV ((ushort)0x0400)/* Reversed Data */
-#define SPMODE_MSTR((ushort)0x0200)/* SPI Master */
-#define SPMODE_EN ((ushort)0x0100)/* Enable */
-#define SPMODE_LENMSK ((ushort)0x00f0)/* character length */
-#define SPMODE_LEN4((ushort)0x0030)/* 4 bits per char */
-#define SPMODE_LEN8((ushort)0x0070)/* 8 bits per char */
-#define SPMODE_LEN16 ((ushort)0x00f0)/* 16 bits per char */
-#define SPMODE_PMMSK ((ushort)0x000f)/* prescale modulus */
-
-/* SPIE fields */
-#define SPIE_MME 0x20
-#define SPIE_TXE 0x10
-#define SPIE_BSY 0x04
-#define SPIE_TXB 0x02
-#define SPIE_RXB 0x01
-
/*
* RISC Controller Configuration Register definitons
*/
diff --git a/arch/powerpc/include/asm/cpm2.h b/arch/powerpc/include/asm/cpm2.h
index 990ff19..236cfa3 100644
--- a/arch/powerpc/include/asm/cpm2.h
+++ b/arch/powerpc/include/asm/cpm2.h
@@ -654,45 +654,6 @@ typedef struct iic {
uintiic_txtmp; /* Internal */
} iic_t;
-/* SPI parameter RAM.
-*/
-typedef struct spi {
- ushort spi_rbase; /* Rx Buffer descriptor base address */
- ushort spi_tbase; /* Tx Buffer descriptor base address */
- u_char spi_rfcr; /* Rx function code */
- u_char spi_tfcr; /* Tx function code */
- ushort spi_mrblr; /* Max receive buffer length */
- uintspi_rstate; /* Internal */
- uintspi_rdp;/* Internal */
- ushort spi_rbptr; /* Internal */
- ushort spi_rbc;/* Internal */
- uintspi_rxtmp; /* Internal */
- uintspi_tstate; /* Internal */
- uintspi_tdp;/* Internal */
- ushort spi_tbptr; /* Internal */
- ushort spi_tbc;/* Internal */
- uintspi_txtmp; /* Internal */
- uintspi_res;/* Tx temp. */
- uintspi_res1[4];/* SDMA temp. */
-} spi_t;
-
-/* SPI Mode register.
-*/
-#define SPMODE_LOOP((ushort)0x4000)/* Loopback */
-#define SPMODE_CI ((ushort)0x2000)/* Clock Invert */
-#define SPMODE_CP ((ushort)0x1000)/* Clock Phase */
-#define SPMODE_DIV16 ((ushort)0x0800)/* BRG/16 mode */
-#define SPMODE_REV ((ushort)0x0400)/* Reversed Data */
-#define SPMODE_MSTR((ushort)0x0200)/* SPI Master */
-#define SPMODE_EN ((ushort)0x0100)/* Enable */
-#define SPMODE_LENMSK ((ushort)0x00f0)/* character length */
-#define SPMODE_PMMSK ((ushort)0x000f)/* prescale modulus */
-
-#define SPMODE_LEN(x) x)-1)0xF)4)
-#define SPMODE_PM(x) ((x) 0xF)
-
-#define SPI_EB ((u_char)0x10) /* big endian byte order */
-
/* IDMA parameter RAM
*/
typedef struct idma {
--
1.6.3.3
--
Let Crystal Reports handle
[spi-devel-general] [PATCH 7/8] spi_mpc8xxx: Turn qe_mode into flags
Soon there will be more flags introduced in subsequent patches, so
let's turn qe_mode into flags.
Also introduce mpc8xxx_spi_strmode() and print current SPI mode.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
drivers/spi/spi_mpc8xxx.c | 30 +++---
include/linux/fsl_devices.h |2 +-
2 files changed, 20 insertions(+), 12 deletions(-)
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index 4b119ea..80374df 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -96,7 +96,8 @@ struct mpc8xxx_spi {
u32 rx_shift; /* RX data reg shift when in qe mode */
u32 tx_shift; /* TX data reg shift when in qe mode */
- bool qe_mode;
+ unsigned int flags;
+#define SPI_QE_CPU_MODE(1 0) /* QE CPU (PIO) mode */
struct workqueue_struct *workqueue;
struct work_struct work;
@@ -235,14 +236,14 @@ int mpc8xxx_spi_setup_transfer(struct spi_device *spi,
struct spi_transfer *t)
if (bits_per_word = 8) {
cs-get_rx = mpc8xxx_spi_rx_buf_u8;
cs-get_tx = mpc8xxx_spi_tx_buf_u8;
- if (mpc8xxx_spi-qe_mode) {
+ if (mpc8xxx_spi-flags SPI_QE_CPU_MODE) {
cs-rx_shift = 16;
cs-tx_shift = 24;
}
} else if (bits_per_word = 16) {
cs-get_rx = mpc8xxx_spi_rx_buf_u16;
cs-get_tx = mpc8xxx_spi_tx_buf_u16;
- if (mpc8xxx_spi-qe_mode) {
+ if (mpc8xxx_spi-flags SPI_QE_CPU_MODE) {
cs-rx_shift = 16;
cs-tx_shift = 16;
}
@@ -252,7 +253,8 @@ int mpc8xxx_spi_setup_transfer(struct spi_device *spi,
struct spi_transfer *t)
} else
return -EINVAL;
- if (mpc8xxx_spi-qe_mode spi-mode SPI_LSB_FIRST) {
+ if (mpc8xxx_spi-flags SPI_QE_CPU_MODE
+ spi-mode SPI_LSB_FIRST) {
cs-tx_shift = 0;
if (bits_per_word = 8)
cs-rx_shift = 8;
@@ -518,6 +520,13 @@ static void mpc8xxx_spi_cleanup(struct spi_device *spi)
kfree(spi-controller_state);
}
+static const char *mpc8xxx_spi_strmode(unsigned int flags)
+{
+ if (flags SPI_QE_CPU_MODE)
+ return QE CPU;
+ return CPU;
+}
+
static struct spi_master * __devinit
mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
{
@@ -544,14 +553,14 @@ mpc8xxx_spi_probe(struct device *dev, struct resource
*mem, unsigned int irq)
master-cleanup = mpc8xxx_spi_cleanup;
mpc8xxx_spi = spi_master_get_devdata(master);
- mpc8xxx_spi-qe_mode = pdata-qe_mode;
mpc8xxx_spi-get_rx = mpc8xxx_spi_rx_buf_u8;
mpc8xxx_spi-get_tx = mpc8xxx_spi_tx_buf_u8;
+ mpc8xxx_spi-flags = pdata-flags;
mpc8xxx_spi-spibrg = pdata-sysclk;
mpc8xxx_spi-rx_shift = 0;
mpc8xxx_spi-tx_shift = 0;
- if (mpc8xxx_spi-qe_mode) {
+ if (mpc8xxx_spi-flags SPI_QE_CPU_MODE) {
mpc8xxx_spi-rx_shift = 16;
mpc8xxx_spi-tx_shift = 24;
}
@@ -584,7 +593,7 @@ mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
unsigned int irq)
/* Enable SPI interface */
regval = pdata-initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE;
- if (pdata-qe_mode)
+ if (mpc8xxx_spi-flags SPI_QE_CPU_MODE)
regval |= SPMODE_OP;
mpc8xxx_spi_write_reg(mpc8xxx_spi-base-mode, regval);
@@ -604,9 +613,8 @@ mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
unsigned int irq)
if (ret 0)
goto unreg_master;
- printk(KERN_INFO
- %s: MPC8xxx SPI Controller driver at 0x%p (irq = %d)\n,
- dev_name(dev), mpc8xxx_spi-base, mpc8xxx_spi-irq);
+ dev_info(dev, at 0x%p (irq = %d), %s mode\n, mpc8xxx_spi-base,
+mpc8xxx_spi-irq, mpc8xxx_spi_strmode(mpc8xxx_spi-flags));
return master;
@@ -797,7 +805,7 @@ static int __devinit of_mpc8xxx_spi_probe(struct of_device
*ofdev,
prop = of_get_property(np, mode, NULL);
if (prop !strcmp(prop, cpu-qe))
- pdata-qe_mode = 1;
+ pdata-flags = SPI_QE_CPU_MODE;
ret = of_mpc8xxx_spi_get_chipselects(dev);
if (ret)
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 43fc95d..39fd946 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -74,7 +74,7 @@ struct spi_device;
struct fsl_spi_platform_data {
u32 initial_spmode; /* initial SPMODE value */
s16 bus_num;
- boolqe_mode;
+ unsigned int flags;
/* board specific information */
u16 max_chipselect;
void(*cs_control)(struct spi_device *spi, bool on);
--
1.6.3.3
[spi-devel-general] [PATCH 3/8] powerpc/cpm: Move CPMFCR_* defines into cpm.h
The bits are generic to CPM devices, so let's move them to the
common header file, so drivers won't need to privately reintroduce
another bunch of the same bits (as we can't include cpm2.h header
together with cpm1.h).
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
arch/powerpc/include/asm/cpm.h | 16
arch/powerpc/include/asm/cpm2.h |8
2 files changed, 16 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h
index b5f1534..ea3fdb9 100644
--- a/arch/powerpc/include/asm/cpm.h
+++ b/arch/powerpc/include/asm/cpm.h
@@ -27,6 +27,22 @@ struct usb_ctlr {
u8 res6[0x22];
} __attribute__ ((packed));
+/*
+ * Function code bits, usually generic to devices.
+ */
+#ifdef CONFIG_CPM1
+#define CPMFCR_GBL ((u_char)0x00) /* Flag doesn't exist in CPM1 */
+#define CPMFCR_TC2 ((u_char)0x00) /* Flag doesn't exist in CPM1 */
+#define CPMFCR_DTB ((u_char)0x00) /* Flag doesn't exist in CPM1 */
+#define CPMFCR_BDB ((u_char)0x00) /* Flag doesn't exist in CPM1 */
+#else
+#define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */
+#define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */
+#define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */
+#define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */
+#endif
+#define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */
+
/* Opcodes common to CPM1 and CPM2
*/
#define CPM_CR_INIT_TRX((ushort)0x)
diff --git a/arch/powerpc/include/asm/cpm2.h b/arch/powerpc/include/asm/cpm2.h
index 236cfa3..f42e9ba 100644
--- a/arch/powerpc/include/asm/cpm2.h
+++ b/arch/powerpc/include/asm/cpm2.h
@@ -124,14 +124,6 @@ static inline void cpm2_fastbrg(uint brg, uint rate, int
div16)
__cpm2_setbrg(brg, rate, CPM2_BRG_INT_CLK, div16, CPM_BRG_EXTC_INT);
}
-/* Function code bits, usually generic to devices.
-*/
-#define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */
-#define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */
-#define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */
-#define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */
-#define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */
-
/* Parameter RAM offsets from the base.
*/
#define PROFF_SCC1 ((uint)0x8000)
--
1.6.3.3
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[spi-devel-general] [PATCH 8/8] spi_mpc8xxx: Add support for QE DMA mode and CPM1/CPM2 chips
This patch adds QE buffer descriptors mode support for the
spi_mpc8xxx driver, and as a side effect we now support CPM1
and CPM2 SPI controllers.
That means that today we support almost all MPC SPI controllers:
- MPC834x-style controllers (support PIO mode only);
- CPM1 and CPM2 controllers (support DMA mode only);
- QE SPI controllers in CPU mode (PIO mode with shift quirks);
- QE SPI controllers in buffer descriptors (DMA) mode;
The only controller we don't currently support is a newer eSPI
(with a dedicated chip selects and a bit different registers map).
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
drivers/spi/Kconfig |3 -
drivers/spi/spi_mpc8xxx.c | 540 +
2 files changed, 500 insertions(+), 43 deletions(-)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 2c733c2..b22a4b4 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -146,9 +146,6 @@ config SPI_MPC8xxx
This enables using the Freescale MPC8xxx SPI controllers in master
mode.
- This driver uses a simple set of shift registers for data (opposed
- to the CPM based descriptor model).
-
config SPI_OMAP_UWIRE
tristate OMAP1 MicroWire
depends on ARCH_OMAP1
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index 80374df..394b658 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -5,6 +5,10 @@
*
* Copyright (C) 2006 Polycom, Inc.
*
+ * CPM SPI and QE buffer descriptors mode support:
+ * Copyright (c) 2009 MontaVista Software, Inc.
+ * Author: Anton Vorontsov avoront...@ru.mvista.com
+ *
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
@@ -27,6 +31,9 @@
#include linux/spi/spi_bitbang.h
#include linux/platform_device.h
#include linux/fsl_devices.h
+#include linux/dma-mapping.h
+#include linux/mm.h
+#include linux/mutex.h
#include linux/of.h
#include linux/of_platform.h
#include linux/gpio.h
@@ -34,8 +41,19 @@
#include linux/of_spi.h
#include sysdev/fsl_soc.h
+#include asm/cpm.h
+#include asm/qe.h
#include asm/irq.h
+/* CPM1 and CPM2 are mutually exclusive. */
+#ifdef CONFIG_CPM1
+#include asm/cpm1.h
+#define CPM_SPI_CMD mk_cr_cmd(CPM_CR_CH_SPI, 0)
+#else
+#include asm/cpm2.h
+#define CPM_SPI_CMD mk_cr_cmd(CPM_CR_SPI_PAGE, CPM_CR_SPI_SBLOCK, 0, 0)
+#endif
+
/* SPI Controller registers */
struct mpc8xxx_spi_reg {
u8 res1[0x20];
@@ -47,6 +65,28 @@ struct mpc8xxx_spi_reg {
__be32 receive;
};
+/* SPI Parameter RAM */
+struct spi_pram {
+ __be16 rbase; /* Rx Buffer descriptor base address */
+ __be16 tbase; /* Tx Buffer descriptor base address */
+ u8 rfcr; /* Rx function code */
+ u8 tfcr; /* Tx function code */
+ __be16 mrblr; /* Max receive buffer length */
+ __be32 rstate; /* Internal */
+ __be32 rdp;/* Internal */
+ __be16 rbptr; /* Internal */
+ __be16 rbc;/* Internal */
+ __be32 rxtmp; /* Internal */
+ __be32 tstate; /* Internal */
+ __be32 tdp;/* Internal */
+ __be16 tbptr; /* Internal */
+ __be16 tbc;/* Internal */
+ __be32 txtmp; /* Internal */
+ __be32 res;/* Tx temp. */
+ __be16 rpbase; /* Relocation pointer (CPM1 only) */
+ __be16 res1; /* Reserved */
+};
+
/* SPI Controller mode register definitions */
#defineSPMODE_LOOP (1 30)
#defineSPMODE_CI_INACTIVEHIGH (1 29)
@@ -75,14 +115,40 @@ struct mpc8xxx_spi_reg {
#defineSPIM_NE 0x0200 /* Not empty */
#defineSPIM_NF 0x0100 /* Not full */
+#defineSPIE_TXB0x0200 /* Last char is written to tx
fifo */
+#defineSPIE_RXB0x0100 /* Last char is written to rx
buf */
+
+/* SPCOM register values */
+#defineSPCOM_STR (1 23) /* Start transmit */
+
+#defineSPI_PRAM_SIZE 0x100
+#defineSPI_MRBLR ((unsigned int)PAGE_SIZE)
+
/* SPI Controller driver's private data. */
struct mpc8xxx_spi {
+ struct device *dev;
struct mpc8xxx_spi_reg __iomem *base;
/* rx tx bufs from the spi_transfer */
const void *tx;
void *rx;
+ int subblock;
+ struct spi_pram __iomem *pram;
+ struct cpm_buf_desc __iomem *tx_bd;
+ struct cpm_buf_desc __iomem *rx_bd;
+
+ struct spi_transfer *xfer_in_progress;
+
+ /* dma addresses for CPM transfers */
+ dma_addr_t tx_dma;
+ dma_addr_t rx_dma;
+ bool map_tx_dma;
+ bool map_rx_dma;
+
+ dma_addr_t dma_dummy_tx;
+ dma_addr_t dma_dummy_rx;
+
/* functions to deal with different sized buffers */
void (*get_rx) (u32 rx_data
Re: [spi-devel-general] [PATCH 4/8] powerpc/qecpm: Implement static inline stubs for non-QE/CPM builds
On Sat, Aug 15, 2009 at 02:25:49AM +0400, Anton Vorontsov wrote:
[]
+#ifdef CONFIG_CPM
int cpm_command(u32 command, u8 opcode);
+#else
+static inline int cpm_command(u32 command, u8 opcode)
+{
+ return -ENOSYS;
+}
+#endif /* CONFIG_CPM */
It appers that fsl_qe_udc.h defines its own inlined version, and so
fsl_qe_udc.c's build breaks:
In file included from drivers/usb/gadget/fsl_qe_udc.c:44:
fsl_qe_udc.h:432: error: redefinition of ‘qe_issue_cmd’
arch/powerpc/include/asm/qe.h:153: error: previous definition of ‘qe_issue_cmd’
was here
I didn't notice that earlier because USB_GADGET_FSL_QE isn't enabled
in any defconfig.
I'll send v2 soon.
Thanks,
--
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email: cbouatmai...@gmail.com
irc://irc.freenode.net/bd2
--
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[spi-devel-general] [PATCH 5/8] spi_mpc8xxx: Fix uninitialized variable
This patch fixes the following warning:
CC drivers/spi/spi_mpc8xxx.o
spi_mpc8xxx.c: In function 'of_mpc8xxx_spi_probe':
spi_mpc8xxx.c:681: warning: 'ret' may be used uninitialized in this function
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
drivers/spi/spi_mpc8xxx.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index 0fd0ec4..518671b 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -709,6 +709,7 @@ static int of_mpc8xxx_spi_get_chipselects(struct device
*dev)
gpio = of_get_gpio_flags(np, i, flags);
if (!gpio_is_valid(gpio)) {
dev_err(dev, invalid gpio #%d: %d\n, i, gpio);
+ ret = gpio;
goto err_loop;
}
--
1.6.3.3
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[spi-devel-general] [PATCH 0/8] spi_mpc8xxx: Add support for DMA transfers
Hi all, Here are some patches that add DMA support for spi_mpc8xxx driver, which means that we now support QE BD mode and SPI on CPM1 and CPM2 chips. QE BD mode and CPM2 SPI support were tested on real hardware, CPM1 was only compile tested (though I belive it will work :-). Thanks, -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [PATCH 6/8] spi_mpc8xxx: Factor out SPI mode change steps into a call
We'll add more steps soon, so get rid of the duplication.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
drivers/spi/spi_mpc8xxx.c | 56 +++-
1 files changed, 24 insertions(+), 32 deletions(-)
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index 518671b..4b119ea 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -155,6 +155,26 @@ MPC83XX_SPI_TX_BUF(u8)
MPC83XX_SPI_TX_BUF(u16)
MPC83XX_SPI_TX_BUF(u32)
+static void mpc8xxx_spi_change_mode(struct spi_device *spi)
+{
+ struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi-master);
+ struct spi_mpc8xxx_cs *cs = spi-controller_state;
+ __be32 __iomem *mode = mspi-base-mode;
+ unsigned long flags;
+
+ if (cs-hw_mode == mpc8xxx_spi_read_reg(mode))
+ return;
+
+ /* Turn off IRQs locally to minimize time that SPI is disabled. */
+ local_irq_save(flags);
+
+ /* Turn off SPI unit prior changing mode */
+ mpc8xxx_spi_write_reg(mode, cs-hw_mode ~SPMODE_ENABLE);
+ mpc8xxx_spi_write_reg(mode, cs-hw_mode);
+
+ local_irq_restore(flags);
+}
+
static void mpc8xxx_spi_chipselect(struct spi_device *spi, int value)
{
struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi-master);
@@ -168,27 +188,13 @@ static void mpc8xxx_spi_chipselect(struct spi_device
*spi, int value)
}
if (value == BITBANG_CS_ACTIVE) {
- u32 regval = mpc8xxx_spi_read_reg(mpc8xxx_spi-base-mode);
-
mpc8xxx_spi-rx_shift = cs-rx_shift;
mpc8xxx_spi-tx_shift = cs-tx_shift;
mpc8xxx_spi-get_rx = cs-get_rx;
mpc8xxx_spi-get_tx = cs-get_tx;
- if (cs-hw_mode != regval) {
- unsigned long flags;
- __be32 __iomem *mode = mpc8xxx_spi-base-mode;
-
- regval = cs-hw_mode;
- /* Turn off IRQs locally to minimize time that
-* SPI is disabled
-*/
- local_irq_save(flags);
- /* Turn off SPI unit prior changing mode */
- mpc8xxx_spi_write_reg(mode, regval ~SPMODE_ENABLE);
- mpc8xxx_spi_write_reg(mode, regval);
- local_irq_restore(flags);
- }
+ mpc8xxx_spi_change_mode(spi);
+
if (pdata-cs_control)
pdata-cs_control(spi, pol);
}
@@ -198,7 +204,6 @@ static
int mpc8xxx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
{
struct mpc8xxx_spi *mpc8xxx_spi;
- u32 regval;
u8 bits_per_word, pm;
u32 hz;
struct spi_mpc8xxx_cs *cs = spi-controller_state;
@@ -286,21 +291,8 @@ int mpc8xxx_spi_setup_transfer(struct spi_device *spi,
struct spi_transfer *t)
pm--;
cs-hw_mode |= SPMODE_PM(pm);
- regval = mpc8xxx_spi_read_reg(mpc8xxx_spi-base-mode);
- if (cs-hw_mode != regval) {
- unsigned long flags;
- __be32 __iomem *mode = mpc8xxx_spi-base-mode;
-
- regval = cs-hw_mode;
- /* Turn off IRQs locally to minimize time
-* that SPI is disabled
-*/
- local_irq_save(flags);
- /* Turn off SPI unit prior changing mode */
- mpc8xxx_spi_write_reg(mode, regval ~SPMODE_ENABLE);
- mpc8xxx_spi_write_reg(mode, regval);
- local_irq_restore(flags);
- }
+
+ mpc8xxx_spi_change_mode(spi);
return 0;
}
--
1.6.3.3
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[spi-devel-general] [PATCH 1/8] powerpc/cpm: Remove SPI defines and spi structs
When cpm2.h included into spi_mpc8xxx driver, the SPI defines
in the header conflict with defines in the driver.
We don't need them in the header file, so remove them. Plus
remove struct spi, we'll use a better version in the driver.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
arch/powerpc/include/asm/cpm1.h | 45 ---
arch/powerpc/include/asm/cpm2.h | 39 -
2 files changed, 0 insertions(+), 84 deletions(-)
diff --git a/arch/powerpc/include/asm/cpm1.h b/arch/powerpc/include/asm/cpm1.h
index 7685ffd..81b0119 100644
--- a/arch/powerpc/include/asm/cpm1.h
+++ b/arch/powerpc/include/asm/cpm1.h
@@ -478,51 +478,6 @@ typedef struct iic {
charres2[2];/* Reserved */
} iic_t;
-/* SPI parameter RAM.
-*/
-typedef struct spi {
- ushort spi_rbase; /* Rx Buffer descriptor base address */
- ushort spi_tbase; /* Tx Buffer descriptor base address */
- u_char spi_rfcr; /* Rx function code */
- u_char spi_tfcr; /* Tx function code */
- ushort spi_mrblr; /* Max receive buffer length */
- uintspi_rstate; /* Internal */
- uintspi_rdp;/* Internal */
- ushort spi_rbptr; /* Internal */
- ushort spi_rbc;/* Internal */
- uintspi_rxtmp; /* Internal */
- uintspi_tstate; /* Internal */
- uintspi_tdp;/* Internal */
- ushort spi_tbptr; /* Internal */
- ushort spi_tbc;/* Internal */
- uintspi_txtmp; /* Internal */
- uintspi_res;
- ushort spi_rpbase; /* Relocation pointer */
- ushort spi_res2;
-} spi_t;
-
-/* SPI Mode register.
-*/
-#define SPMODE_LOOP((ushort)0x4000)/* Loopback */
-#define SPMODE_CI ((ushort)0x2000)/* Clock Invert */
-#define SPMODE_CP ((ushort)0x1000)/* Clock Phase */
-#define SPMODE_DIV16 ((ushort)0x0800)/* BRG/16 mode */
-#define SPMODE_REV ((ushort)0x0400)/* Reversed Data */
-#define SPMODE_MSTR((ushort)0x0200)/* SPI Master */
-#define SPMODE_EN ((ushort)0x0100)/* Enable */
-#define SPMODE_LENMSK ((ushort)0x00f0)/* character length */
-#define SPMODE_LEN4((ushort)0x0030)/* 4 bits per char */
-#define SPMODE_LEN8((ushort)0x0070)/* 8 bits per char */
-#define SPMODE_LEN16 ((ushort)0x00f0)/* 16 bits per char */
-#define SPMODE_PMMSK ((ushort)0x000f)/* prescale modulus */
-
-/* SPIE fields */
-#define SPIE_MME 0x20
-#define SPIE_TXE 0x10
-#define SPIE_BSY 0x04
-#define SPIE_TXB 0x02
-#define SPIE_RXB 0x01
-
/*
* RISC Controller Configuration Register definitons
*/
diff --git a/arch/powerpc/include/asm/cpm2.h b/arch/powerpc/include/asm/cpm2.h
index 990ff19..236cfa3 100644
--- a/arch/powerpc/include/asm/cpm2.h
+++ b/arch/powerpc/include/asm/cpm2.h
@@ -654,45 +654,6 @@ typedef struct iic {
uintiic_txtmp; /* Internal */
} iic_t;
-/* SPI parameter RAM.
-*/
-typedef struct spi {
- ushort spi_rbase; /* Rx Buffer descriptor base address */
- ushort spi_tbase; /* Tx Buffer descriptor base address */
- u_char spi_rfcr; /* Rx function code */
- u_char spi_tfcr; /* Tx function code */
- ushort spi_mrblr; /* Max receive buffer length */
- uintspi_rstate; /* Internal */
- uintspi_rdp;/* Internal */
- ushort spi_rbptr; /* Internal */
- ushort spi_rbc;/* Internal */
- uintspi_rxtmp; /* Internal */
- uintspi_tstate; /* Internal */
- uintspi_tdp;/* Internal */
- ushort spi_tbptr; /* Internal */
- ushort spi_tbc;/* Internal */
- uintspi_txtmp; /* Internal */
- uintspi_res;/* Tx temp. */
- uintspi_res1[4];/* SDMA temp. */
-} spi_t;
-
-/* SPI Mode register.
-*/
-#define SPMODE_LOOP((ushort)0x4000)/* Loopback */
-#define SPMODE_CI ((ushort)0x2000)/* Clock Invert */
-#define SPMODE_CP ((ushort)0x1000)/* Clock Phase */
-#define SPMODE_DIV16 ((ushort)0x0800)/* BRG/16 mode */
-#define SPMODE_REV ((ushort)0x0400)/* Reversed Data */
-#define SPMODE_MSTR((ushort)0x0200)/* SPI Master */
-#define SPMODE_EN ((ushort)0x0100)/* Enable */
-#define SPMODE_LENMSK ((ushort)0x00f0)/* character length */
-#define SPMODE_PMMSK ((ushort)0x000f)/* prescale modulus */
-
-#define SPMODE_LEN(x) x)-1)0xF)4)
-#define SPMODE_PM(x) ((x) 0xF)
-
-#define SPI_EB ((u_char)0x10) /* big endian byte order */
-
/* IDMA parameter RAM
*/
typedef struct idma {
--
1.6.3.3
--
Let Crystal Reports handle
[spi-devel-general] [PATCH 4/8] powerpc/qecpm: Implement static inline stubs for non-QE/CPM builds
This is needed to avoid ugly #ifdefs in drivers.
QE/CPM UDC and MPC8xxx SPI drivers will benefit from this change.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
arch/powerpc/include/asm/cpm.h | 44
arch/powerpc/include/asm/qe.h | 11 +-
2 files changed, 54 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h
index ea3fdb9..0835eb9 100644
--- a/arch/powerpc/include/asm/cpm.h
+++ b/arch/powerpc/include/asm/cpm.h
@@ -3,6 +3,7 @@
#include linux/compiler.h
#include linux/types.h
+#include linux/errno.h
#include linux/of.h
/*
@@ -131,13 +132,56 @@ typedef struct cpm_buf_desc {
#define BD_I2C_START (0x0400)
int cpm_muram_init(void);
+
+#if defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE)
unsigned long cpm_muram_alloc(unsigned long size, unsigned long align);
int cpm_muram_free(unsigned long offset);
unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
void __iomem *cpm_muram_addr(unsigned long offset);
unsigned long cpm_muram_offset(void __iomem *addr);
dma_addr_t cpm_muram_dma(void __iomem *addr);
+#else
+static inline unsigned long cpm_muram_alloc(unsigned long size,
+ unsigned long align)
+{
+ return -ENOSYS;
+}
+
+static inline int cpm_muram_free(unsigned long offset)
+{
+ return -ENOSYS;
+}
+
+static inline unsigned long cpm_muram_alloc_fixed(unsigned long offset,
+ unsigned long size)
+{
+ return -ENOSYS;
+}
+
+static inline void __iomem *cpm_muram_addr(unsigned long offset)
+{
+ return NULL;
+}
+
+static inline unsigned long cpm_muram_offset(void __iomem *addr)
+{
+ return -ENOSYS;
+}
+
+static inline dma_addr_t cpm_muram_dma(void __iomem *addr)
+{
+ return 0;
+}
+#endif /* defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE) */
+
+#ifdef CONFIG_CPM
int cpm_command(u32 command, u8 opcode);
+#else
+static inline int cpm_command(u32 command, u8 opcode)
+{
+ return -ENOSYS;
+}
+#endif /* CONFIG_CPM */
int cpm2_gpiochip_add32(struct device_node *np);
diff --git a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h
index 157c5ca..791c67a 100644
--- a/arch/powerpc/include/asm/qe.h
+++ b/arch/powerpc/include/asm/qe.h
@@ -145,8 +145,17 @@ static inline void qe_pin_set_gpio(struct qe_pin *qe_pin)
{}
static inline void qe_pin_set_dedicated(struct qe_pin *pin) {}
#endif /* CONFIG_QE_GPIO */
-/* QE internal API */
+#ifdef CONFIG_QUICC_ENGINE
int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input);
+#else
+static inline int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol,
+ u32 cmd_input)
+{
+ return -ENOSYS;
+}
+#endif /* CONFIG_QUICC_ENGINE */
+
+/* QE internal API */
enum qe_clock qe_clock_source(const char *source);
unsigned int qe_get_brg_clk(void);
int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier);
--
1.6.3.3
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[spi-devel-general] [PATCH 3/8] powerpc/cpm: Move CPMFCR_* defines into cpm.h
The bits are generic to CPM devices, so let's move them to the
common header file, so drivers won't need to privately reintroduce
another bunch of the same bits (as we can't include cpm2.h header
together with cpm1.h).
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
arch/powerpc/include/asm/cpm.h | 16
arch/powerpc/include/asm/cpm2.h |8
2 files changed, 16 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h
index b5f1534..ea3fdb9 100644
--- a/arch/powerpc/include/asm/cpm.h
+++ b/arch/powerpc/include/asm/cpm.h
@@ -27,6 +27,22 @@ struct usb_ctlr {
u8 res6[0x22];
} __attribute__ ((packed));
+/*
+ * Function code bits, usually generic to devices.
+ */
+#ifdef CONFIG_CPM1
+#define CPMFCR_GBL ((u_char)0x00) /* Flag doesn't exist in CPM1 */
+#define CPMFCR_TC2 ((u_char)0x00) /* Flag doesn't exist in CPM1 */
+#define CPMFCR_DTB ((u_char)0x00) /* Flag doesn't exist in CPM1 */
+#define CPMFCR_BDB ((u_char)0x00) /* Flag doesn't exist in CPM1 */
+#else
+#define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */
+#define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */
+#define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */
+#define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */
+#endif
+#define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */
+
/* Opcodes common to CPM1 and CPM2
*/
#define CPM_CR_INIT_TRX((ushort)0x)
diff --git a/arch/powerpc/include/asm/cpm2.h b/arch/powerpc/include/asm/cpm2.h
index 236cfa3..f42e9ba 100644
--- a/arch/powerpc/include/asm/cpm2.h
+++ b/arch/powerpc/include/asm/cpm2.h
@@ -124,14 +124,6 @@ static inline void cpm2_fastbrg(uint brg, uint rate, int
div16)
__cpm2_setbrg(brg, rate, CPM2_BRG_INT_CLK, div16, CPM_BRG_EXTC_INT);
}
-/* Function code bits, usually generic to devices.
-*/
-#define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */
-#define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */
-#define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */
-#define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */
-#define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */
-
/* Parameter RAM offsets from the base.
*/
#define PROFF_SCC1 ((uint)0x8000)
--
1.6.3.3
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Re: [spi-devel-general] [PATCH -mm][POWERPC] mpc8xxx : allow SPI without cs.
On Fri, Jun 19, 2009 at 01:45:46PM +0200, Leon Woestenberg wrote:
Hello,
On Thu, Jun 18, 2009 at 4:04 PM, Kumar Galaga...@kernel.crashing.org wrote:
On Jun 18, 2009, at 8:09 AM, Anton Vorontsov wrote:
On Thu, Jun 18, 2009 at 08:19:44AM +0200, Rini van Zetten wrote:
This patch adds the possibility to have a spi device without a cs.
That is a good question. What HW is this for (I don't think its for eSPI
but I could be wrong).
We need SPI without CS too on our MPC8313E design.
We do support SPI without CS, but only for one slave device. If
there is no CS, technically you can address only one device on a
SPI bus.
And apparently Rini's case is not for addressing multiple chips
w/o CS lines, it's just some chip-selects need quirks.
In our case having a CS line to each slave (18 of them) is too
expensive and we use a chip select which piggy backs on another
signal.
Once the slave is selected, SPI is used to send large amounts of data.
Can you describe it a little bit more? Have you patched the SPI
driver to work with your setup?
If you can address 18 slaves w/o chip-select line, I quess
you have a CS demuxing bridge somewhere, i.e.
spi-controller {
/*
* no chip-selects from the controller, it can only talk to
* one device: the cs demuxing bridge, it is always selected.
*/
spi-cs-demuxing-bridge {
/*
* knows how to manage chip-selects (or demux
* one chip select line for several slaves)
*/
spi-slave {
reg = 0;
};
...
spi-slave {
reg = 17;
};
};
};
Surely we can hide the bridge into the SPI controller driver,
but I think it would be beneficial to factor-out it to a
stand-alone entity, so that other SPI controllers could work
with this setup without any modifications (oh and btw, we could
also create a bridge called gpio-chipselects-bridge, and
factor out all GPIO stuff from the drivers).
There are two options of how we can factor out chip-select
machines... the bad and the ugly. :-) No, the first one is bad,
but the second should be OK.
1. We can create full-fledged SPI master bridge drivers, the
drivers will just pass-through all SPI IO, but will manage
chip-selects. The bad part is that these drivers could degrade
performance since they'll have to manage SPI IO, which is
unneeded for the pure CS machines.
2. Another option (which I like more), is to create SPI chip-
select machine driver framework, so we could (finally)
separate two SPI entities: SPI IO and SPI chip-select machine.
CS machines of different flavours: GPIO, built-in, and
board-specific (!) with a lot of demuxing magic.
(1) can be implemented trivially, while (2) is a lot of work.
--
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Re: [spi-devel-general] [PATCH -mm][POWERPC] mpc8xxx : allow SPI without cs.
On Thu, Jun 18, 2009 at 08:19:44AM +0200, Rini van Zetten wrote:
This patch adds the possibility to have a spi device without a cs.
For example, the dts file should look something like this:
spi-controller {
gpios = pio1 1 0 /* cs0 */
0 /* cs1, no GPIO */
pio2 2 0;/* cs2 */
Interesting scheme. I guess this is for eSPI controllers that can
do their own chip-selects, but we want GPIO chip selects in addition
(or in place of built-in ones), correct?
Signed-off-by: Rini van Zetten r...@arvoo.nl
---
Changes :
patch against 2.6.30-rc8-mm1
I assume this is v2 already, and I overlooked v1, sorry.
Technically the patch looks OK, but please fix some cosmetics issues.
checkpatch reports:
WARNING: patch prefix 'drivers' exists, appears to be a -p0 patch
WARNING: line over 80 characters
#131: FILE: spi/spi_mpc8xxx.c:714:
+ dev_err(dev, can't request gpio #%d: %d\n, i,
ret);
WARNING: line over 80 characters
#141: FILE: spi/spi_mpc8xxx.c:724:
+ dev_err(dev, can't set output direction for
gpio
--- drivers/spi/spi_mpc8xxx.c.org 2009-06-12 10:45:21.0 +0200
+++ drivers/spi/spi_mpc8xxx.c 2009-06-12 10:54:48.0 +0200
@@ -666,9 +666,10 @@ static void mpc8xxx_spi_cs_control(struc
struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(dev-platform_data);
u16 cs = spi-chip_select;
int gpio = pinfo-gpios[cs];
- bool alow = pinfo-alow_flags[cs];
-
- gpio_set_value(gpio, on ^ alow);
+ if (gpio != -EEXIST) {
+ bool alow = pinfo-alow_flags[cs];
+ gpio_set_value(gpio, on ^ alow);
Please put an empty line after variable declaration.
Thanks!
--
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Re: [spi-devel-general] [PATCH 0/9] Some work for spi_mpc83xx driver, spi-mmc support for MPC8610HPCD
On Mon, May 04, 2009 at 01:55:04PM -0700, Andrew Morton wrote: On Fri, 1 May 2009 03:47:39 +0400 Anton Vorontsov avoront...@ru.mvista.com wrote: Here are few patches that are needed to support spi-mmc slot on MPC8610HPCD PowerPC boards: [1/9] spi_mpc83xx: Handles other Freescale processors [2/9] spi_mpc83xx: Quieten down the Requested speed is too low message [3/9] spi_mpc83xx: Add small delay after asserting chip-select line [4/9] powerpc/86xx: Add MMC SPI support for MPC8610HPCD boards Some or all of these seem appropriate to 2.6.30 and perhaps even -stable? I'd say no, we don't need the fixes for MPC8323E-RDB boards (currently the only mainline user of that driver), and support for MPC8610HPCD boards is a new feature, so I think all these patches can wait for 2.6.31. Thanks, -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 -- Register Now Save for Velocity, the Web Performance Operations Conference from O'Reilly Media. Velocity features a full day of expert-led, hands-on workshops and two days of sessions from industry leaders in dedicated Performance Operations tracks. Use code vel09scf and Save an extra 15% before 5/3. http://p.sf.net/sfu/velocityconf ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [PATCH 0/9] Some work for spi_mpc83xx driver, spi-mmc support for MPC8610HPCD
Hi all, Here are few patches that are needed to support spi-mmc slot on MPC8610HPCD PowerPC boards: [1/9] spi_mpc83xx: Handles other Freescale processors [2/9] spi_mpc83xx: Quieten down the Requested speed is too low message [3/9] spi_mpc83xx: Add small delay after asserting chip-select line [4/9] powerpc/86xx: Add MMC SPI support for MPC8610HPCD boards The rest are cleanups, initially Kumar suggested to rename spi_mpc83xx.c to spi_mpc8xxx.c, but checkpatch told me to fix some other issues. So the following cleanups were prepared: [5/9] spi_mpc83xx: Fix checkpatch issues [6/9] spi_mpc83xx: Split mpc83xx_spi_work() into two routines [7/9] spi_mpc83xx: Remove dead code [8/9] spi_mpc83xx: Rename spi_83xx.c to spi_8xxx.c [9/9] spi_mpc8xxx: s/83xx/8xxx/g Thanks, -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 -- Register Now Save for Velocity, the Web Performance Operations Conference from O'Reilly Media. Velocity features a full day of expert-led, hands-on workshops and two days of sessions from industry leaders in dedicated Performance Operations tracks. Use code vel09scf and Save an extra 15% before 5/3. http://p.sf.net/sfu/velocityconf ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [PATCH 7/9] spi_mpc83xx: Remove dead code
This patch removes #if 0'ed code, and spi_mpc83xx-busy variable that
is used by that dead snippet only.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
drivers/spi/spi_mpc83xx.c | 16
1 files changed, 0 insertions(+), 16 deletions(-)
diff --git a/drivers/spi/spi_mpc83xx.c b/drivers/spi/spi_mpc83xx.c
index 50112a5..4192ce4 100644
--- a/drivers/spi/spi_mpc83xx.c
+++ b/drivers/spi/spi_mpc83xx.c
@@ -98,8 +98,6 @@ struct mpc83xx_spi {
bool qe_mode;
- u8 busy;
-
struct workqueue_struct *workqueue;
struct work_struct work;
@@ -411,7 +409,6 @@ static void mpc83xx_spi_work(struct work_struct *work)
work);
spin_lock_irq(mpc83xx_spi-lock);
- mpc83xx_spi-busy = 1;
while (!list_empty(mpc83xx_spi-queue)) {
struct spi_message *m = container_of(mpc83xx_spi-queue.next,
struct spi_message, queue);
@@ -423,7 +420,6 @@ static void mpc83xx_spi_work(struct work_struct *work)
spin_lock_irq(mpc83xx_spi-lock);
}
- mpc83xx_spi-busy = 0;
spin_unlock_irq(mpc83xx_spi-lock);
}
@@ -482,18 +478,6 @@ static int mpc83xx_spi_setup(struct spi_device *spi)
dev_dbg(spi-dev, %s, mode %d, %u bits/w, %u Hz\n,
__func__, spi-mode (SPI_CPOL | SPI_CPHA),
spi-bits_per_word, spi-max_speed_hz);
-#if 0 /* Don't think this is needed */
- /* NOTE we _need_ to call chipselect() early, ideally with adapter
-* setup, unless the hardware defaults cooperate to avoid confusion
-* between normal (active low) and inverted chipselects.
-*/
-
- /* deselect chip (low or high) */
- spin_lock(mpc83xx_spi-lock);
- if (!mpc83xx_spi-busy)
- mpc83xx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
- spin_unlock(mpc83xx_spi-lock);
-#endif
return 0;
}
--
1.6.2.2
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[spi-devel-general] [PATCH 6/9] spi_mpc83xx: Split mpc83xx_spi_work() into two routines
mpc83xx_spi_work() is quite large, with up to five indentation
levels and is quite difficult to read.
So, split the function in two parts:
1. mpc83xx_spi_work() now only traverse queued spi messages;
2. mpc83xx_spi_do_one_msg() only manages single messages.
There should be no functional changes.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
drivers/spi/spi_mpc83xx.c | 115 +++-
1 files changed, 60 insertions(+), 55 deletions(-)
diff --git a/drivers/spi/spi_mpc83xx.c b/drivers/spi/spi_mpc83xx.c
index 40f7448..50112a5 100644
--- a/drivers/spi/spi_mpc83xx.c
+++ b/drivers/spi/spi_mpc83xx.c
@@ -350,71 +350,76 @@ static int mpc83xx_spi_bufs(struct spi_device *spi,
struct spi_transfer *t)
return mpc83xx_spi-count;
}
-static void mpc83xx_spi_work(struct work_struct *work)
+static void mpc83xx_spi_do_one_msg(struct spi_message *m)
{
- struct mpc83xx_spi *mpc83xx_spi =
- container_of(work, struct mpc83xx_spi, work);
-
- spin_lock_irq(mpc83xx_spi-lock);
- mpc83xx_spi-busy = 1;
- while (!list_empty(mpc83xx_spi-queue)) {
- struct spi_message *m;
- struct spi_device *spi;
- struct spi_transfer *t = NULL;
- unsigned cs_change;
- int status, nsecs = 50;
-
- m = container_of(mpc83xx_spi-queue.next,
- struct spi_message, queue);
- list_del_init(m-queue);
- spin_unlock_irq(mpc83xx_spi-lock);
-
- spi = m-spi;
- cs_change = 1;
- status = 0;
- list_for_each_entry(t, m-transfers, transfer_list) {
- if (t-bits_per_word || t-speed_hz) {
- /* Don't allow changes if CS is active */
- status = -EINVAL;
-
- if (cs_change)
- status =
mpc83xx_spi_setup_transfer(spi, t);
- if (status 0)
- break;
- }
-
- if (cs_change) {
- mpc83xx_spi_chipselect(spi, BITBANG_CS_ACTIVE);
- ndelay(nsecs);
- }
- cs_change = t-cs_change;
- if (t-len)
- status = mpc83xx_spi_bufs(spi, t);
- if (status) {
- status = -EMSGSIZE;
+ struct spi_device *spi = m-spi;
+ struct spi_transfer *t;
+ unsigned int cs_change;
+ const int nsecs = 50;
+ int status;
+
+ cs_change = 1;
+ status = 0;
+ list_for_each_entry(t, m-transfers, transfer_list) {
+ if (t-bits_per_word || t-speed_hz) {
+ /* Don't allow changes if CS is active */
+ status = -EINVAL;
+
+ if (cs_change)
+ status = mpc83xx_spi_setup_transfer(spi, t);
+ if (status 0)
break;
- }
- m-actual_length += t-len;
-
- if (t-delay_usecs)
- udelay(t-delay_usecs);
+ }
- if (cs_change) {
- ndelay(nsecs);
- mpc83xx_spi_chipselect(spi,
BITBANG_CS_INACTIVE);
- ndelay(nsecs);
- }
+ if (cs_change) {
+ mpc83xx_spi_chipselect(spi, BITBANG_CS_ACTIVE);
+ ndelay(nsecs);
+ }
+ cs_change = t-cs_change;
+ if (t-len)
+ status = mpc83xx_spi_bufs(spi, t);
+ if (status) {
+ status = -EMSGSIZE;
+ break;
}
+ m-actual_length += t-len;
- m-status = status;
- m-complete(m-context);
+ if (t-delay_usecs)
+ udelay(t-delay_usecs);
- if (status || !cs_change) {
+ if (cs_change) {
ndelay(nsecs);
mpc83xx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
+ ndelay(nsecs);
}
+ }
+
+ m-status = status;
+ m-complete(m-context);
+
+ if (status || !cs_change) {
+ ndelay(nsecs);
+ mpc83xx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
+ }
+
+ mpc83xx_spi_setup_transfer(spi, NULL);
+}
+
+static void mpc83xx_spi_work(struct work_struct *work)
+{
+ struct mpc83xx_spi *mpc83xx_spi = container_of(work, struct mpc83xx_spi,
+ work);
+
+ spin_lock_irq
[spi-devel-general] [PATCH 3/9] spi_mpc83xx: Add small delay after asserting chip-select line
This is needed for some underlaying GPIO controllers that may be
a bit slow, or if chip-select signal need some time to stabilize.
For what it's worth, we already have the similar delay for
chip-select de-assertion case.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
drivers/spi/spi_mpc83xx.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/drivers/spi/spi_mpc83xx.c b/drivers/spi/spi_mpc83xx.c
index 08b49d2..d378d5e 100644
--- a/drivers/spi/spi_mpc83xx.c
+++ b/drivers/spi/spi_mpc83xx.c
@@ -383,8 +383,10 @@ static void mpc83xx_spi_work(struct work_struct *work)
break;
}
- if (cs_change)
+ if (cs_change) {
mpc83xx_spi_chipselect(spi, BITBANG_CS_ACTIVE);
+ ndelay(nsecs);
+ }
cs_change = t-cs_change;
if (t-len)
status = mpc83xx_spi_bufs(spi, t);
--
1.6.2.2
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[spi-devel-general] [PATCH 1/9] spi_mpc83xx: Handles other Freescale processors
With this patch we'll able to select spi_mpc83xx driver on the MPC86xx platforms. Let the driver depend on FSL_SOC, so we don't have to worry about Kconfig anymore. Also remove the experimental dependency, the driver has been tested to work on a various hardware, and surely not experimental anymore. Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com --- drivers/spi/Kconfig | 14 ++ 1 files changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 83a185d..3c1845c 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -140,16 +140,14 @@ config SPI_MPC52xx_PSC Controller in master SPI mode. config SPI_MPC83xx - tristate Freescale MPC83xx/QUICC Engine SPI controller - depends on (PPC_83xx || QUICC_ENGINE) EXPERIMENTAL + tristate Freescale MPC8xxx SPI controller + depends on FSL_SOC help - This enables using the Freescale MPC83xx and QUICC Engine SPI - controllers in master mode. + This enables using the Freescale MPC8xxx SPI controllers in master + mode. - Note, this driver uniquely supports the SPI controller on the MPC83xx - family of PowerPC processors, plus processors with QUICC Engine - technology. This driver uses a simple set of shift registers for data - (opposed to the CPM based descriptor model). + This driver uses a simple set of shift registers for data (opposed + to the CPM based descriptor model). config SPI_OMAP_UWIRE tristate OMAP1 MicroWire -- 1.6.2.2 -- Register Now Save for Velocity, the Web Performance Operations Conference from O'Reilly Media. Velocity features a full day of expert-led, hands-on workshops and two days of sessions from industry leaders in dedicated Performance Operations tracks. Use code vel09scf and Save an extra 15% before 5/3. http://p.sf.net/sfu/velocityconf ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [PATCH 5/9] spi_mpc83xx: Fix checkpatch issues
Checkpatch is spitting errors when seeing the rename patch, so fix
the errors prior to moving.
Following errors and warnings were fixed:
WARNING: Use #include linux/io.h instead of asm/io.h
#1027: FILE: drivers/spi/spi_mpc8xxx.c:37:
+#include asm/io.h
ERROR: foo * bar should be foo *bar
#: FILE: drivers/spi/spi_mpc8xxx.c:121:
+static inline void mpc83xx_spi_write_reg(__be32 __iomem * reg, u32 val)
ERROR: foo * bar should be foo *bar
#1116: FILE: drivers/spi/spi_mpc8xxx.c:126:
+static inline u32 mpc83xx_spi_read_reg(__be32 __iomem * reg)
ERROR: foo * bar should be foo *bar
#1125: FILE: drivers/spi/spi_mpc8xxx.c:135:
+ type * rx = mpc83xx_spi-rx; \
ERROR: foo * bar should be foo *bar
#1135: FILE: drivers/spi/spi_mpc8xxx.c:145:
+ const type * tx = mpc83xx_spi-tx; \
WARNING: suspect code indent for conditional statements (16, 25)
#1504: FILE: drivers/spi/spi_mpc8xxx.c:514:
+ while (((event =
[...]
+cpu_relax();
Following warnings were left over, since fixing them will
hurt the readability. We'd better fix them by lowering
the indentation level by splitting mpc83xx_spi_work function
into two parts.
WARNING: line over 80 characters
#1371: FILE: drivers/spi/spi_mpc8xxx.c:381:
+ status =
mpc83xx_spi_setup_transfer(spi, t);
WARNING: line over 80 characters
#1392: FILE: drivers/spi/spi_mpc8xxx.c:402:
+ mpc83xx_spi_chipselect(spi,
BITBANG_CS_INACTIVE);
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
drivers/spi/spi_mpc83xx.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/spi_mpc83xx.c b/drivers/spi/spi_mpc83xx.c
index d378d5e..40f7448 100644
--- a/drivers/spi/spi_mpc83xx.c
+++ b/drivers/spi/spi_mpc83xx.c
@@ -17,6 +17,7 @@
#include linux/bug.h
#include linux/errno.h
#include linux/err.h
+#include linux/io.h
#include linux/completion.h
#include linux/interrupt.h
#include linux/delay.h
@@ -34,7 +35,6 @@
#include sysdev/fsl_soc.h
#include asm/irq.h
-#include asm/io.h
/* SPI Controller registers */
struct mpc83xx_spi_reg {
@@ -118,12 +118,12 @@ struct spi_mpc83xx_cs {
u32 hw_mode;/* Holds HW mode register settings */
};
-static inline void mpc83xx_spi_write_reg(__be32 __iomem * reg, u32 val)
+static inline void mpc83xx_spi_write_reg(__be32 __iomem *reg, u32 val)
{
out_be32(reg, val);
}
-static inline u32 mpc83xx_spi_read_reg(__be32 __iomem * reg)
+static inline u32 mpc83xx_spi_read_reg(__be32 __iomem *reg)
{
return in_be32(reg);
}
@@ -132,7 +132,7 @@ static inline u32 mpc83xx_spi_read_reg(__be32 __iomem * reg)
static \
void mpc83xx_spi_rx_buf_##type(u32 data, struct mpc83xx_spi *mpc83xx_spi) \
{\
- type * rx = mpc83xx_spi-rx; \
+ type *rx = mpc83xx_spi-rx; \
*rx++ = (type)(data mpc83xx_spi-rx_shift);\
mpc83xx_spi-rx = rx; \
}
@@ -142,7 +142,7 @@ static
\
u32 mpc83xx_spi_tx_buf_##type(struct mpc83xx_spi *mpc83xx_spi) \
{ \
u32 data; \
- const type * tx = mpc83xx_spi-tx; \
+ const type *tx = mpc83xx_spi-tx; \
if (!tx)\
return 0; \
data = *tx++ mpc83xx_spi-tx_shift; \
@@ -516,7 +516,7 @@ static irqreturn_t mpc83xx_spi_irq(s32 irq, void
*context_data)
while (((event =
mpc83xx_spi_read_reg(mpc83xx_spi-base-event))
SPIE_NF) == 0)
-cpu_relax();
+ cpu_relax();
mpc83xx_spi-count -= 1;
if (mpc83xx_spi-count) {
--
1.6.2.2
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[spi-devel-general] [PATCH 8/9] spi_mpc83xx: Rename spi_83xx.c to spi_8xxx.c
The driver handles MPC83xx, MPC85xx and MPC86xx SPI controllers,
so rename the file for clarity.
Suggested-by: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
drivers/spi/Makefile |2 +-
drivers/spi/spi_mpc83xx.c | 958 -
drivers/spi/spi_mpc8xxx.c | 958 +
3 files changed, 959 insertions(+), 959 deletions(-)
delete mode 100644 drivers/spi/spi_mpc83xx.c
create mode 100644 drivers/spi/spi_mpc8xxx.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 5d04519..fdc7aa0 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_SPI_OMAP_UWIRE) += omap_uwire.o
obj-$(CONFIG_SPI_OMAP24XX) += omap2_mcspi.o
obj-$(CONFIG_SPI_ORION)+= orion_spi.o
obj-$(CONFIG_SPI_MPC52xx_PSC) += mpc52xx_psc_spi.o
-obj-$(CONFIG_SPI_MPC83xx) += spi_mpc83xx.o
+obj-$(CONFIG_SPI_MPC83xx) += spi_mpc8xxx.o
obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o
obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx.o
obj-$(CONFIG_SPI_TXX9) += spi_txx9.o
diff --git a/drivers/spi/spi_mpc83xx.c b/drivers/spi/spi_mpc83xx.c
deleted file mode 100644
index 4192ce4..000
--- a/drivers/spi/spi_mpc83xx.c
+++ /dev/null
@@ -1,958 +0,0 @@
-/*
- * MPC83xx SPI controller driver.
- *
- * Maintainer: Kumar Gala
- *
- * Copyright (C) 2006 Polycom, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#include linux/module.h
-#include linux/init.h
-#include linux/types.h
-#include linux/kernel.h
-#include linux/bug.h
-#include linux/errno.h
-#include linux/err.h
-#include linux/io.h
-#include linux/completion.h
-#include linux/interrupt.h
-#include linux/delay.h
-#include linux/irq.h
-#include linux/device.h
-#include linux/spi/spi.h
-#include linux/spi/spi_bitbang.h
-#include linux/platform_device.h
-#include linux/fsl_devices.h
-#include linux/of.h
-#include linux/of_platform.h
-#include linux/gpio.h
-#include linux/of_gpio.h
-#include linux/of_spi.h
-
-#include sysdev/fsl_soc.h
-#include asm/irq.h
-
-/* SPI Controller registers */
-struct mpc83xx_spi_reg {
- u8 res1[0x20];
- __be32 mode;
- __be32 event;
- __be32 mask;
- __be32 command;
- __be32 transmit;
- __be32 receive;
-};
-
-/* SPI Controller mode register definitions */
-#defineSPMODE_LOOP (1 30)
-#defineSPMODE_CI_INACTIVEHIGH (1 29)
-#defineSPMODE_CP_BEGIN_EDGECLK (1 28)
-#defineSPMODE_DIV16(1 27)
-#defineSPMODE_REV (1 26)
-#defineSPMODE_MS (1 25)
-#defineSPMODE_ENABLE (1 24)
-#defineSPMODE_LEN(x) ((x) 20)
-#defineSPMODE_PM(x)((x) 16)
-#defineSPMODE_OP (1 14)
-#defineSPMODE_CG(x)((x) 7)
-
-/*
- * Default for SPI Mode:
- * SPI MODE 0 (inactive low, phase middle, MSB, 8-bit length, slow clk
- */
-#defineSPMODE_INIT_VAL (SPMODE_CI_INACTIVEHIGH | SPMODE_DIV16 |
SPMODE_REV | \
-SPMODE_MS | SPMODE_LEN(7) | SPMODE_PM(0xf))
-
-/* SPIE register values */
-#defineSPIE_NE 0x0200 /* Not empty */
-#defineSPIE_NF 0x0100 /* Not full */
-
-/* SPIM register values */
-#defineSPIM_NE 0x0200 /* Not empty */
-#defineSPIM_NF 0x0100 /* Not full */
-
-/* SPI Controller driver's private data. */
-struct mpc83xx_spi {
- struct mpc83xx_spi_reg __iomem *base;
-
- /* rx tx bufs from the spi_transfer */
- const void *tx;
- void *rx;
-
- /* functions to deal with different sized buffers */
- void (*get_rx) (u32 rx_data, struct mpc83xx_spi *);
- u32(*get_tx) (struct mpc83xx_spi *);
-
- unsigned int count;
- unsigned int irq;
-
- unsigned nsecs; /* (clock cycle time)/2 */
-
- u32 spibrg; /* SPIBRG input clock */
- u32 rx_shift; /* RX data reg shift when in qe mode */
- u32 tx_shift; /* TX data reg shift when in qe mode */
-
- bool qe_mode;
-
- struct workqueue_struct *workqueue;
- struct work_struct work;
-
- struct list_head queue;
- spinlock_t lock;
-
- struct completion done;
-};
-
-struct spi_mpc83xx_cs {
- /* functions to deal with different sized buffers */
- void (*get_rx) (u32 rx_data, struct mpc83xx_spi *);
- u32 (*get_tx) (struct mpc83xx_spi *);
- u32 rx_shift; /* RX data reg shift when in qe mode */
- u32 tx_shift; /* TX
[spi-devel-general] [PATCH 9/9] spi_mpc8xxx: s/83xx/8xxx/g
Since we renamed the file, we might want to rename the file
internals too.
Though we don't bother with changing platform driver name and
platform module alias. The stuff is legacy and hopefully we'll
remove it soon.
Suggested-by: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
drivers/spi/Kconfig |2 +-
drivers/spi/Makefile |2 +-
drivers/spi/spi_mpc8xxx.c | 396 ++--
3 files changed, 200 insertions(+), 200 deletions(-)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 3c1845c..9e77bf1 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -139,7 +139,7 @@ config SPI_MPC52xx_PSC
This enables using the Freescale MPC52xx Programmable Serial
Controller in master SPI mode.
-config SPI_MPC83xx
+config SPI_MPC8xxx
tristate Freescale MPC8xxx SPI controller
depends on FSL_SOC
help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index fdc7aa0..18ba6b4 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_SPI_OMAP_UWIRE) += omap_uwire.o
obj-$(CONFIG_SPI_OMAP24XX) += omap2_mcspi.o
obj-$(CONFIG_SPI_ORION)+= orion_spi.o
obj-$(CONFIG_SPI_MPC52xx_PSC) += mpc52xx_psc_spi.o
-obj-$(CONFIG_SPI_MPC83xx) += spi_mpc8xxx.o
+obj-$(CONFIG_SPI_MPC8xxx) += spi_mpc8xxx.o
obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o
obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx.o
obj-$(CONFIG_SPI_TXX9) += spi_txx9.o
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index 4192ce4..15d9527 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -1,5 +1,5 @@
/*
- * MPC83xx SPI controller driver.
+ * MPC8xxx SPI controller driver.
*
* Maintainer: Kumar Gala
*
@@ -37,7 +37,7 @@
#include asm/irq.h
/* SPI Controller registers */
-struct mpc83xx_spi_reg {
+struct mpc8xxx_spi_reg {
u8 res1[0x20];
__be32 mode;
__be32 event;
@@ -76,16 +76,16 @@ struct mpc83xx_spi_reg {
#defineSPIM_NF 0x0100 /* Not full */
/* SPI Controller driver's private data. */
-struct mpc83xx_spi {
- struct mpc83xx_spi_reg __iomem *base;
+struct mpc8xxx_spi {
+ struct mpc8xxx_spi_reg __iomem *base;
/* rx tx bufs from the spi_transfer */
const void *tx;
void *rx;
/* functions to deal with different sized buffers */
- void (*get_rx) (u32 rx_data, struct mpc83xx_spi *);
- u32(*get_tx) (struct mpc83xx_spi *);
+ void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
+ u32(*get_tx) (struct mpc8xxx_spi *);
unsigned int count;
unsigned int irq;
@@ -107,44 +107,44 @@ struct mpc83xx_spi {
struct completion done;
};
-struct spi_mpc83xx_cs {
+struct spi_mpc8xxx_cs {
/* functions to deal with different sized buffers */
- void (*get_rx) (u32 rx_data, struct mpc83xx_spi *);
- u32 (*get_tx) (struct mpc83xx_spi *);
+ void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
+ u32 (*get_tx) (struct mpc8xxx_spi *);
u32 rx_shift; /* RX data reg shift when in qe mode */
u32 tx_shift; /* TX data reg shift when in qe mode */
u32 hw_mode;/* Holds HW mode register settings */
};
-static inline void mpc83xx_spi_write_reg(__be32 __iomem *reg, u32 val)
+static inline void mpc8xxx_spi_write_reg(__be32 __iomem *reg, u32 val)
{
out_be32(reg, val);
}
-static inline u32 mpc83xx_spi_read_reg(__be32 __iomem *reg)
+static inline u32 mpc8xxx_spi_read_reg(__be32 __iomem *reg)
{
return in_be32(reg);
}
#define MPC83XX_SPI_RX_BUF(type) \
static \
-void mpc83xx_spi_rx_buf_##type(u32 data, struct mpc83xx_spi *mpc83xx_spi) \
+void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
{\
- type *rx = mpc83xx_spi-rx; \
- *rx++ = (type)(data mpc83xx_spi-rx_shift);\
- mpc83xx_spi-rx = rx; \
+ type *rx = mpc8xxx_spi-rx; \
+ *rx++ = (type)(data mpc8xxx_spi-rx_shift);\
+ mpc8xxx_spi-rx = rx; \
}
#define MPC83XX_SPI_TX_BUF(type) \
static \
-u32 mpc83xx_spi_tx_buf_##type(struct mpc83xx_spi *mpc83xx_spi) \
+u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi) \
{ \
u32 data
[spi-devel-general] [PATCH 4/6] powerpc: Add mmc-spi-slot bindings
The bindings describes a case where MMC/SD/SDIO slot directly connected
to a SPI bus. Such setups are widely used on embedded PowerPC boards.
The patch also adds the mmc-spi-slot entry to the OpenFirmware modalias
table.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
.../powerpc/dts-bindings/mmc-spi-slot.txt | 23
drivers/of/base.c |1 +
2 files changed, 24 insertions(+), 0 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/mmc-spi-slot.txt
diff --git a/Documentation/powerpc/dts-bindings/mmc-spi-slot.txt
b/Documentation/powerpc/dts-bindings/mmc-spi-slot.txt
new file mode 100644
index 000..c39ac28
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/mmc-spi-slot.txt
@@ -0,0 +1,23 @@
+MMC/SD/SDIO slot directly connected to a SPI bus
+
+Required properties:
+- compatible : should be mmc-spi-slot.
+- reg : should specify SPI address (chip-select number).
+- spi-max-frequency : maximum frequency for this device (Hz).
+- voltage-ranges : two cells are required, first cell specifies minimum
+ slot voltage (mV), second cell specifies maximum slot voltage (mV).
+ Several ranges could be specified.
+- gpios : (optional) may specify GPIOs in this order: Card-Detect GPIO,
+ Write-Protect GPIO.
+
+Example:
+
+ mmc-s...@0 {
+ compatible = fsl,mpc8323rdb-mmc-slot,
+mmc-spi-slot;
+ reg = 0;
+ gpios = qe_pio_d 14 1
+qe_pio_d 15 0;
+ voltage-ranges = 3300 3300;
+ spi-max-frequency = 5000;
+ };
diff --git a/drivers/of/base.c b/drivers/of/base.c
index cd17092..41c5dfd 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -446,6 +446,7 @@ struct of_modalias_table {
};
static struct of_modalias_table of_modalias_table[] = {
{ fsl,mcu-mpc8349emitx, mcu-mpc8349emitx },
+ { mmc-spi-slot, mmc_spi },
};
/**
--
1.5.6.5
--
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[spi-devel-general] [PATCH 1/6] spi_mpc83xx: Fix sparse warnings
The patch fixes following sparse warnings:
CHECK spi_mpc83xx.c
spi_mpc83xx.c:145:1: warning: symbol 'mpc83xx_spi_rx_buf_u8' was not declared.
Should it be static?
spi_mpc83xx.c:146:1: warning: symbol 'mpc83xx_spi_rx_buf_u16' was not declared.
Should it be static?
spi_mpc83xx.c:147:1: warning: symbol 'mpc83xx_spi_rx_buf_u32' was not declared.
Should it be static?
spi_mpc83xx.c:148:1: warning: symbol 'mpc83xx_spi_tx_buf_u8' was not declared.
Should it be static?
spi_mpc83xx.c:149:1: warning: symbol 'mpc83xx_spi_tx_buf_u16' was not declared.
Should it be static?
spi_mpc83xx.c:150:1: warning: symbol 'mpc83xx_spi_tx_buf_u32' was not declared.
Should it be static?
spi_mpc83xx.c:175:32: warning: incorrect type in initializer (different address
spaces)
spi_mpc83xx.c:175:32:expected void *tmp_ptr
spi_mpc83xx.c:175:32:got unsigned int [noderef] asn:2*noident
spi_mpc83xx.c:183:26: warning: incorrect type in argument 1 (different address
spaces)
spi_mpc83xx.c:183:26:expected unsigned int [noderef] [usertype] asn:2*reg
spi_mpc83xx.c:183:26:got void *tmp_ptr
spi_mpc83xx.c:184:26: warning: incorrect type in argument 1 (different address
spaces)
spi_mpc83xx.c:184:26:expected unsigned int [noderef] [usertype] asn:2*reg
spi_mpc83xx.c:184:26:got void *tmp_ptr
spi_mpc83xx.c:287:31: warning: incorrect type in initializer (different address
spaces)
spi_mpc83xx.c:287:31:expected void *tmp_ptr
spi_mpc83xx.c:287:31:got unsigned int [noderef] asn:2*noident
spi_mpc83xx.c:295:25: warning: incorrect type in argument 1 (different address
spaces)
spi_mpc83xx.c:295:25:expected unsigned int [noderef] [usertype] asn:2*reg
spi_mpc83xx.c:295:25:got void *tmp_ptr
spi_mpc83xx.c:296:25: warning: incorrect type in argument 1 (different address
spaces)
spi_mpc83xx.c:296:25:expected unsigned int [noderef] [usertype] asn:2*reg
spi_mpc83xx.c:296:25:got void *tmp_ptr
spi_mpc83xx.c:486:13: warning: symbol 'mpc83xx_spi_irq' was not declared.
Should it be static?
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
drivers/spi/spi_mpc83xx.c | 16 +---
1 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/spi_mpc83xx.c b/drivers/spi/spi_mpc83xx.c
index ac0e3e4..6ef8937 100644
--- a/drivers/spi/spi_mpc83xx.c
+++ b/drivers/spi/spi_mpc83xx.c
@@ -123,6 +123,7 @@ static inline u32 mpc83xx_spi_read_reg(__be32 __iomem * reg)
}
#define MPC83XX_SPI_RX_BUF(type) \
+static \
void mpc83xx_spi_rx_buf_##type(u32 data, struct mpc83xx_spi *mpc83xx_spi) \
{\
type * rx = mpc83xx_spi-rx; \
@@ -131,6 +132,7 @@ void mpc83xx_spi_rx_buf_##type(u32 data, struct mpc83xx_spi
*mpc83xx_spi) \
}
#define MPC83XX_SPI_TX_BUF(type) \
+static \
u32 mpc83xx_spi_tx_buf_##type(struct mpc83xx_spi *mpc83xx_spi) \
{ \
u32 data; \
@@ -172,7 +174,7 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi,
int value)
if (cs-hw_mode != regval) {
unsigned long flags;
- void *tmp_ptr = mpc83xx_spi-base-mode;
+ __be32 __iomem *mode = mpc83xx_spi-base-mode;
regval = cs-hw_mode;
/* Turn off IRQs locally to minimize time that
@@ -180,8 +182,8 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi,
int value)
*/
local_irq_save(flags);
/* Turn off SPI unit prior changing mode */
- mpc83xx_spi_write_reg(tmp_ptr, regval ~SPMODE_ENABLE);
- mpc83xx_spi_write_reg(tmp_ptr, regval);
+ mpc83xx_spi_write_reg(mode, regval ~SPMODE_ENABLE);
+ mpc83xx_spi_write_reg(mode, regval);
local_irq_restore(flags);
}
if (mpc83xx_spi-activate_cs)
@@ -284,7 +286,7 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi,
struct spi_transfer *t)
regval = mpc83xx_spi_read_reg(mpc83xx_spi-base-mode);
if (cs-hw_mode != regval) {
unsigned long flags;
- void *tmp_ptr = mpc83xx_spi-base-mode;
+ __be32 __iomem *mode = mpc83xx_spi-base-mode;
regval = cs-hw_mode;
/* Turn off IRQs locally to minimize time
@@ -292,8 +294,8 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi,
struct spi_transfer *t)
*/
local_irq_save(flags);
/* Turn off SPI unit prior changing mode
[spi-devel-general] [PATCH 2/6] spi_mpc83xx: Rework chip selects handling
The main purpose of this patch is to pass 'struct spi_device' to the
chip select handling routines. This is needed so that we could implement
full-fledged OpenFirmware support for this driver.
While at it, also:
- Replace two {de,activate}_cs routines by single cs_contol().
- Don't duplicate platform data callbacks in mpc83xx_spi struct.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
arch/powerpc/platforms/83xx/mpc832x_rdb.c | 16
arch/powerpc/sysdev/fsl_soc.c | 14 ++
arch/powerpc/sysdev/fsl_soc.h |5 +++--
drivers/spi/spi_mpc83xx.c | 20 +++-
include/linux/fsl_devices.h |5 +++--
5 files changed, 23 insertions(+), 37 deletions(-)
diff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c
b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
index 2a1295f..28e23cd 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
@@ -39,16 +39,10 @@
#endif
#ifdef CONFIG_QUICC_ENGINE
-static void mpc83xx_spi_activate_cs(u8 cs, u8 polarity)
+static void mpc83xx_spi_cs_control(struct spi_device *spi, bool on)
{
- pr_debug(%s %d %d\n, __func__, cs, polarity);
- par_io_data_set(3, 13, polarity);
-}
-
-static void mpc83xx_spi_deactivate_cs(u8 cs, u8 polarity)
-{
- pr_debug(%s %d %d\n, __func__, cs, polarity);
- par_io_data_set(3, 13, !polarity);
+ pr_debug(%s %d %d\n, __func__, spi-chip_select, on);
+ par_io_data_set(3, 13, on);
}
static struct mmc_spi_platform_data mpc832x_mmc_pdata = {
@@ -74,9 +68,7 @@ static int __init mpc832x_spi_init(void)
par_io_config_pin(3, 14, 2, 0, 0, 0); /* SD_INSERT, I */
par_io_config_pin(3, 15, 2, 0, 0, 0); /* SD_PROTECT,I */
- return fsl_spi_init(mpc832x_spi_boardinfo, 1,
- mpc83xx_spi_activate_cs,
- mpc83xx_spi_deactivate_cs);
+ return fsl_spi_init(mpc832x_spi_boardinfo, 1, mpc83xx_spi_cs_control);
}
machine_device_initcall(mpc832x_rdb, mpc832x_spi_init);
#endif /* CONFIG_QUICC_ENGINE */
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 115cb16..0a545a9 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -416,8 +416,8 @@ arch_initcall(fsl_usb_of_init);
static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
struct spi_board_info *board_infos,
unsigned int num_board_infos,
- void (*activate_cs)(u8 cs, u8 polarity),
- void (*deactivate_cs)(u8 cs, u8 polarity))
+ void (*cs_control)(struct spi_device *dev,
+ bool on))
{
struct device_node *np;
unsigned int i = 0;
@@ -429,8 +429,7 @@ static int __init of_fsl_spi_probe(char *type, char
*compatible, u32 sysclk,
struct resource res[2];
struct platform_device *pdev;
struct fsl_spi_platform_data pdata = {
- .activate_cs = activate_cs,
- .deactivate_cs = deactivate_cs,
+ .cs_control = cs_control,
};
memset(res, 0, sizeof(res));
@@ -497,8 +496,7 @@ next:
int __init fsl_spi_init(struct spi_board_info *board_infos,
unsigned int num_board_infos,
- void (*activate_cs)(u8 cs, u8 polarity),
- void (*deactivate_cs)(u8 cs, u8 polarity))
+ void (*cs_control)(struct spi_device *spi, bool on))
{
u32 sysclk = -1;
int ret;
@@ -514,10 +512,10 @@ int __init fsl_spi_init(struct spi_board_info
*board_infos,
}
ret = of_fsl_spi_probe(NULL, fsl,spi, sysclk, board_infos,
- num_board_infos, activate_cs, deactivate_cs);
+ num_board_infos, cs_control);
if (!ret)
of_fsl_spi_probe(spi, fsl_spi, sysclk, board_infos,
-num_board_infos, activate_cs, deactivate_cs);
+num_board_infos, cs_control);
return spi_register_board_info(board_infos, num_board_infos);
}
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index 9c744e4..b5f3456 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -4,6 +4,8 @@
#include asm/mmu.h
+struct spi_device;
+
extern phys_addr_t get_immrbase(void);
#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
extern u32 get_brgfreq(void);
@@ -19,8 +21,7 @@ struct device_node;
extern int fsl_spi_init(struct spi_board_info *board_infos,
unsigned int num_board_infos,
- void (*activate_cs)(u8 cs, u8
Re: [spi-devel-general] [PATCH 0/7] OpenFirmware support for the spi_mpc83xx driver
On Fri, Dec 05, 2008 at 11:09:36PM +0300, Anton Vorontsov wrote: Hi all, The patch series are used to support SPI via the OF SPI subsystem (driver/of/of_spi.c). Now the driver is able to manage its own chip selects, and doesn't need any auxiliary support from the board files or fsl_soc constructors. The series also contains PowerPC portions of the MMC SPI support. Since the series touches spi and powerpc trees, I think it would be most convenient to pass it via one of these trees. The patches doesn't touch any SPI functionality, only some probe routines, so I believe powerpc.git is the best candidate... The other reason for powerpc tree is that the patches depends on other patches as found in paulus/powerpc.git + of_gpio_count() as found here: http://ozlabs.org/pipermail/linuxppc-dev/2008-December/065917.html David, if you're OK with the patches, may I ask you to sign off on the ones that touch drivers/spi so that we could pass it via Kumar's powerpc.git? David, I'm sorry for bothering you, but have you had a chance to look into this patch set? Thanks, The queue: [1/7] powerpc: Implement get_brgfreq() and get_baudrate() stubs [2/7] spi_mpc83xx: Fix sparse warnings [3/7] spi_mpc83xx: Rework chip selects handling [4/7] spi_mpc83xx: Add OF platform driver bindings [5/7] powerpc/fsl_soc: Isolate legacy fsl_spi support to mpc832x_rdb boards [6/7] powerpc: Add mmc-spi-slot bindings [7/7] powerpc/83xx: Add mmc-spi support via the device tree for MPC8323E-RDB -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 -- SF.Net email is Sponsored by MIX09, March 18-20, 2009 in Las Vegas, Nevada. The future of the web can't happen without you. Join us at MIX09 to help pave the way to the Next Web now. Learn more and register at http://ad.doubleclick.net/clk;208669438;13503038;i?http://2009.visitmix.com/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [PATCH 5/7] powerpc/fsl_soc: Isolate legacy fsl_spi support to mpc832x_rdb boards
The advantages of this:
- Don't encourage legacy support;
- Less external symbols, less code to compile-in for !MPC832x_RDB
platforms.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
arch/powerpc/platforms/83xx/mpc832x_rdb.c | 107 +
arch/powerpc/sysdev/fsl_soc.c | 107 -
arch/powerpc/sysdev/fsl_soc.h |4 -
3 files changed, 107 insertions(+), 111 deletions(-)
diff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c
b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
index 28e23cd..17abbd2 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
@@ -20,6 +20,7 @@
#include linux/spi/mmc_spi.h
#include linux/mmc/host.h
#include linux/of_platform.h
+#include linux/fsl_devices.h
#include asm/time.h
#include asm/ipic.h
@@ -39,6 +40,112 @@
#endif
#ifdef CONFIG_QUICC_ENGINE
+static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
+ struct spi_board_info *board_infos,
+ unsigned int num_board_infos,
+ void (*cs_control)(struct spi_device *dev,
+ bool on))
+{
+ struct device_node *np;
+ unsigned int i = 0;
+
+ for_each_compatible_node(np, type, compatible) {
+ int ret;
+ unsigned int j;
+ const void *prop;
+ struct resource res[2];
+ struct platform_device *pdev;
+ struct fsl_spi_platform_data pdata = {
+ .cs_control = cs_control,
+ };
+
+ memset(res, 0, sizeof(res));
+
+ pdata.sysclk = sysclk;
+
+ prop = of_get_property(np, reg, NULL);
+ if (!prop)
+ goto err;
+ pdata.bus_num = *(u32 *)prop;
+
+ prop = of_get_property(np, cell-index, NULL);
+ if (prop)
+ i = *(u32 *)prop;
+
+ prop = of_get_property(np, mode, NULL);
+ if (prop !strcmp(prop, cpu-qe))
+ pdata.qe_mode = 1;
+
+ for (j = 0; j num_board_infos; j++) {
+ if (board_infos[j].bus_num == pdata.bus_num)
+ pdata.max_chipselect++;
+ }
+
+ if (!pdata.max_chipselect)
+ continue;
+
+ ret = of_address_to_resource(np, 0, res[0]);
+ if (ret)
+ goto err;
+
+ ret = of_irq_to_resource(np, 0, res[1]);
+ if (ret == NO_IRQ)
+ goto err;
+
+ pdev = platform_device_alloc(mpc83xx_spi, i);
+ if (!pdev)
+ goto err;
+
+ ret = platform_device_add_data(pdev, pdata, sizeof(pdata));
+ if (ret)
+ goto unreg;
+
+ ret = platform_device_add_resources(pdev, res,
+ ARRAY_SIZE(res));
+ if (ret)
+ goto unreg;
+
+ ret = platform_device_add(pdev);
+ if (ret)
+ goto unreg;
+
+ goto next;
+unreg:
+ platform_device_del(pdev);
+err:
+ pr_err(%s: registration failed\n, np-full_name);
+next:
+ i++;
+ }
+
+ return i;
+}
+
+static int __init fsl_spi_init(struct spi_board_info *board_infos,
+ unsigned int num_board_infos,
+ void (*cs_control)(struct spi_device *spi,
+ bool on))
+{
+ u32 sysclk = -1;
+ int ret;
+
+ /* SPI controller is either clocked from QE or SoC clock */
+ sysclk = get_brgfreq();
+ if (sysclk == -1) {
+ sysclk = fsl_get_sys_freq();
+ if (sysclk == -1)
+ return -ENODEV;
+ }
+
+ ret = of_fsl_spi_probe(NULL, fsl,spi, sysclk, board_infos,
+ num_board_infos, cs_control);
+ if (!ret)
+ of_fsl_spi_probe(spi, fsl_spi, sysclk, board_infos,
+num_board_infos, cs_control);
+
+ return spi_register_board_info(board_infos, num_board_infos);
+}
+
static void mpc83xx_spi_cs_control(struct spi_device *spi, bool on)
{
pr_debug(%s %d %d\n, __func__, spi-chip_select, on);
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index b9da579..727f27b 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -598,113 +598,6 @@ err:
arch_initcall(fsl_usb_of_init);
-static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
- struct spi_board_info *board_infos
[spi-devel-general] [PATCH 3/7] spi_mpc83xx: Rework chip selects handling
The main purpose of this patch is to pass 'struct spi_device' to the
chip select handling routines. This is needed so that we could implement
full-fledged OpenFirmware support for this driver.
While at it, also:
- Replace two {de,activate}_cs routines by single cs_contol().
- Don't duplicate platform data callbacks in mpc83xx_spi struct.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
arch/powerpc/platforms/83xx/mpc832x_rdb.c | 16
arch/powerpc/sysdev/fsl_soc.c | 14 ++
arch/powerpc/sysdev/fsl_soc.h |5 +++--
drivers/spi/spi_mpc83xx.c | 20 +++-
include/linux/fsl_devices.h |5 +++--
5 files changed, 23 insertions(+), 37 deletions(-)
diff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c
b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
index 2a1295f..28e23cd 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
@@ -39,16 +39,10 @@
#endif
#ifdef CONFIG_QUICC_ENGINE
-static void mpc83xx_spi_activate_cs(u8 cs, u8 polarity)
+static void mpc83xx_spi_cs_control(struct spi_device *spi, bool on)
{
- pr_debug(%s %d %d\n, __func__, cs, polarity);
- par_io_data_set(3, 13, polarity);
-}
-
-static void mpc83xx_spi_deactivate_cs(u8 cs, u8 polarity)
-{
- pr_debug(%s %d %d\n, __func__, cs, polarity);
- par_io_data_set(3, 13, !polarity);
+ pr_debug(%s %d %d\n, __func__, spi-chip_select, on);
+ par_io_data_set(3, 13, on);
}
static struct mmc_spi_platform_data mpc832x_mmc_pdata = {
@@ -74,9 +68,7 @@ static int __init mpc832x_spi_init(void)
par_io_config_pin(3, 14, 2, 0, 0, 0); /* SD_INSERT, I */
par_io_config_pin(3, 15, 2, 0, 0, 0); /* SD_PROTECT,I */
- return fsl_spi_init(mpc832x_spi_boardinfo, 1,
- mpc83xx_spi_activate_cs,
- mpc83xx_spi_deactivate_cs);
+ return fsl_spi_init(mpc832x_spi_boardinfo, 1, mpc83xx_spi_cs_control);
}
machine_device_initcall(mpc832x_rdb, mpc832x_spi_init);
#endif /* CONFIG_QUICC_ENGINE */
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 26ecb96..b9da579 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -601,8 +601,8 @@ arch_initcall(fsl_usb_of_init);
static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
struct spi_board_info *board_infos,
unsigned int num_board_infos,
- void (*activate_cs)(u8 cs, u8 polarity),
- void (*deactivate_cs)(u8 cs, u8 polarity))
+ void (*cs_control)(struct spi_device *dev,
+ bool on))
{
struct device_node *np;
unsigned int i = 0;
@@ -614,8 +614,7 @@ static int __init of_fsl_spi_probe(char *type, char
*compatible, u32 sysclk,
struct resource res[2];
struct platform_device *pdev;
struct fsl_spi_platform_data pdata = {
- .activate_cs = activate_cs,
- .deactivate_cs = deactivate_cs,
+ .cs_control = cs_control,
};
memset(res, 0, sizeof(res));
@@ -682,8 +681,7 @@ next:
int __init fsl_spi_init(struct spi_board_info *board_infos,
unsigned int num_board_infos,
- void (*activate_cs)(u8 cs, u8 polarity),
- void (*deactivate_cs)(u8 cs, u8 polarity))
+ void (*cs_control)(struct spi_device *spi, bool on))
{
u32 sysclk = -1;
int ret;
@@ -699,10 +697,10 @@ int __init fsl_spi_init(struct spi_board_info
*board_infos,
}
ret = of_fsl_spi_probe(NULL, fsl,spi, sysclk, board_infos,
- num_board_infos, activate_cs, deactivate_cs);
+ num_board_infos, cs_control);
if (!ret)
of_fsl_spi_probe(spi, fsl_spi, sysclk, board_infos,
-num_board_infos, activate_cs, deactivate_cs);
+num_board_infos, cs_control);
return spi_register_board_info(board_infos, num_board_infos);
}
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index 9c744e4..b5f3456 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -4,6 +4,8 @@
#include asm/mmu.h
+struct spi_device;
+
extern phys_addr_t get_immrbase(void);
#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
extern u32 get_brgfreq(void);
@@ -19,8 +21,7 @@ struct device_node;
extern int fsl_spi_init(struct spi_board_info *board_infos,
unsigned int num_board_infos,
- void (*activate_cs)(u8 cs, u8 polarity
[spi-devel-general] [PATCH 1/7] powerpc: Implement get_brgfreq() and get_baudrate() stubs
This is needed to not bother with ugly #ifdefs in the drivers.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
arch/powerpc/sysdev/fsl_soc.h |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index 60f7f22..9c744e4 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -5,8 +5,13 @@
#include asm/mmu.h
extern phys_addr_t get_immrbase(void);
+#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
extern u32 get_brgfreq(void);
extern u32 get_baudrate(void);
+#else
+static inline u32 get_brgfreq(void) { return -1; }
+static inline u32 get_baudrate(void) { return -1; }
+#endif
extern u32 fsl_get_sys_freq(void);
struct spi_board_info;
--
1.5.6.5
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Re: [spi-devel-general] [Patch 0/4] IndustrialIO subsystem (ADCs, accelerometers etc)
On Fri, Jul 25, 2008 at 12:12:36PM +0100, Jonathan Cameron wrote: Jan Engelhardt wrote: On Wednesday 2008-07-23 19:00, Jonathan Cameron wrote: Dear All, The need for an industrialio subsystem was discussed in http://lkml.org/lkml/2008/5/20/135 Firstly thanks to all the people who have contributed to the discussion of this in the past. In brief the intention is provide a kernel subsystem directed towards the handling on sensors (and later related output devices) such as ADC's, accelerometers and many others. Could this be done using UIO instead? No, this lot is directed towards devices that use serial buses such as i2c and SPI [...] There is spidev driver to do SPI in userspace. But no, it does not mean that we can always use UIO. For example, we can't use UIO when we want to process IRQs (think touchscreen pen-down irq), or better, we anyway will need to write UIO-kernel helper for this. So, sometimes it's just more convenient to do things in kernel. -- Anton Vorontsov email: [EMAIL PROTECTED] irc://irc.freenode.net/bd2 - This SF.Net email is sponsored by the Moblin Your Move Developer's challenge Build the coolest Linux based applications with Moblin SDK win great prizes Grand prize is a trip for two to an Open Source event anywhere in the world http://moblin-contest.org/redirect.php?banner_id=100url=/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [patch 2.6.26-rc8] spi: spi_mpc83xx clockrate fixes
On Fri, Jun 27, 2008 at 06:21:50PM -0700, David Brownell wrote:
From: Chen Gong [EMAIL PROTECTED]
Subject: [PATCH] fix spi_mpc83xx prescale
This updates the SPI clock rate calculations for the spi_mpc83xx
driver. Some boundary conditions were wrong, and in several cases
divide-by-16 wasn't always needed
Signed-off-by: Chen Gong [EMAIL PROTECTED]
Signed-off-by: David Brownell [EMAIL PROTECTED]
---
Hmmm...
David, maybe I'm completely misunderstood this patch (again), but it seems
wrong to me:
http://ozlabs.org/pipermail/linuxppc-dev/2008-June/058253.html
(Chen posted this patch separately to linuxppc-dev and spi lists)
I would be more happy if Chen could explain which boundary conditions
were wrong.
Something like I did once:
commit a44648b057f5331fe6c0e863dc693ed335490e7a
Author: Anton Vorontsov [EMAIL PROTECTED]
Date: Fri Aug 10 13:01:02 2007 -0700
spi_mpc83xx: fix prescale modulus calculation
Long ago I've noticed (but didn't pay much attention) that
spi_mpc83xx using PM calculations that differs from what
specs describe. I.e.
u8 pm = mpc83xx_spi-spibrg / (spi-max_speed_hz * 4);
While specs says: The SPI baud rate generator clock source (either
system clock or system clock divided by 16, depending on DIV16 bit) is
divided by 4 * ([PM] + 1), a range from 4 to 64..
Thus - 1 is missing in the spi_mpc83xx's formula.
Why nobody noticed that bug? Probably because sysclk usually less then
user expects, e.g. you expect 200 MHz, but real clock is 198 MHz,
and integer rounding helps when this formula is used.
Suppose it's SPI in QE, SYSCLK at 198 MHz, thus SPIBRG at 99MHz, 25 MHz
requested.
PM = (99MHz / ( 25 MHz * 4 )), PM == 0, output SPICLK will be 24.75 MHz
At lower frequencies this bug is more noticeable, though.
And this bug shows itself in all its beauty if SYSCLK is equal or a bit
more than you expect (200 MHz SYSCLK, 100 MHz SPIBRG):
PM = (100MHz / ( 25 MHz * 4 )), PM == 1, output SPICLK will be 12.625 MHz!
At the time I posted this patch, I tested SPICLK outputs by an oscilloscope,
and with SYSCLK 198 MHz everything was (and is, I suppose) just fine.
drivers/spi/spi_mpc83xx.c | 29 -
1 file changed, 16 insertions(+), 13 deletions(-)
--- a/drivers/spi/spi_mpc83xx.c 2008-05-13 15:17:37.0 -0700
+++ b/drivers/spi/spi_mpc83xx.c 2008-06-27 18:17:17.0 -0700
@@ -266,21 +266,24 @@ int mpc83xx_spi_setup_transfer(struct sp
cs-hw_mode |= SPMODE_LEN(bits_per_word);
- if ((mpc83xx_spi-spibrg / hz) = 64) {
- pm = mpc83xx_spi-spibrg / (hz * 64) - 1;
- if (pm 0x0f) {
- dev_err(spi-dev, Requested speed is too
- low: %d Hz. Will use %d Hz instead.\n,
- hz, mpc83xx_spi-spibrg / 1024);
- pm = 0x0f;
+ if ((mpc83xx_spi-spibrg / hz) 64) {
+ pm = mpc83xx_spi-spibrg / (hz * 64);
+ if (pm 16) {
+ cs-hw_mode |= SPMODE_DIV16;
+ pm /= 16;
+ if (pm 16) {
+ dev_err(spi-dev, Requested speed is too
+ low: %d Hz. Will use %d Hz instead.\n,
+ hz, mpc83xx_spi-spibrg / 1024);
+ pm = 16;
+ }
}
- cs-hw_mode |= SPMODE_PM(pm) | SPMODE_DIV16;
- } else {
+ } else
pm = mpc83xx_spi-spibrg / (hz * 4);
- if (pm)
- pm--;
- cs-hw_mode |= SPMODE_PM(pm);
- }
+ if (pm)
+ pm--;
+
+ cs-hw_mode |= SPMODE_PM(pm);
regval = mpc83xx_spi_read_reg(mpc83xx_spi-base-mode);
if (cs-hw_mode != regval) {
unsigned long flags;
--
Anton Vorontsov
email: [EMAIL PROTECTED]
irc://irc.freenode.net/bd2
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Re: [spi-devel-general] [PATCH 3/3] mmc: change .get_ro() callback semantics
On Tue, Jun 03, 2008 at 12:07:49PM +0200, Marc Pignat wrote:
Hi all!
On Friday 23 May 2008, Anton Vorontsov wrote:
get_ro() callback must return values = 0 for its logical state, and
...
static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index f2e9885..ef3b773 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -55,6 +55,9 @@ struct mmc_host_ops {
* Avoid calling these three functions too often or in a fast path,
* since underlaying controller might implement them in an expensive
* and/or slow way.
+*
+* .get_ro and .get_cd should return = 0 for their logical values,
+* or negative errno value in case of error.
*/
I would suggest to use something more strict (bulletproof), something like:
/*
* get_ro will return:
* 0 for a read/write card
* 1 for a read-only card
This isn't always practical. For example, host is using u8 register for
the status, so it might safely return u8 mask, that will always fit
into int. Or very smart/adventurous authors might be aware that, for the
particular host, mask's bit isn't last, and safely do uXX mask. :-)
The above is weak argument of course, since it is about optimization.
As an counter-evidence, the strict scheme that you described probably
less error prone. But is it? To implement it we'll need something like
WARN_ON(ret 0 ret != 1) to catch erroneous users. Take a closer
look though, will it catch uXX lastbit case? Nope. :-)
We can catch bogus users though... via hack (_assuming_ that there
are no errno values of 1 (sizeof(int) * 8 - 1)), i.e.
WARN_ON(ret == (1 (sizeof(int) * 8 - 1)). Though, to do so, we don't
need the strict scheme, this debugging hack will work in the current
scheme too.
--
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Re: [spi-devel-general] [PATCH 3/4] [MMC] mmc_spi: add polling support for the card detect line
On Thu, May 22, 2008 at 09:34:32PM +0200, Pierre Ossman wrote: [...] Ok. How about this version? Perfect. Unless there is some way you can pass flags in platform data? Using the lack of an init() to determine the need for polling is a bit circumstantial. Aha, that's an idea, thanks. Implemented in the updated patches. p.s. I think, in case of capabilities, it's users' responsibility to not issue bogus flags, so mmc_spi doesn't mask anything, it just passes platform's caps. This also avoids drivers update when (if) new caps will be implemented. -- Anton Vorontsov email: [EMAIL PROTECTED] irc://irc.freenode.net/bd2 - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [PATCH 1/3] mmc: add support for card-detection polling
Some hosts (and boards that use mmc_spi) do not use interrupts on the CD
line, so they can't trigger mmc_detect_change. We want to poll the card
and see if there was a change. 1 second poll interval seems resonable.
This patch also implements .get_cd() host operation, that could be used
by the hosts that are able to report card-detect status without need to
talk MMC.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
drivers/mmc/core/core.c | 12 +---
include/linux/mmc/host.h |8
2 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 01ced4c..ede5d1e 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -638,6 +638,9 @@ void mmc_rescan(struct work_struct *work)
*/
mmc_bus_put(host);
+ if (host-ops-get_cd host-ops-get_cd(host) == 0)
+ goto out;
+
mmc_claim_host(host);
mmc_power_up(host);
@@ -652,7 +655,7 @@ void mmc_rescan(struct work_struct *work)
if (!err) {
if (mmc_attach_sdio(host, ocr))
mmc_power_off(host);
- return;
+ goto out;
}
/*
@@ -662,7 +665,7 @@ void mmc_rescan(struct work_struct *work)
if (!err) {
if (mmc_attach_sd(host, ocr))
mmc_power_off(host);
- return;
+ goto out;
}
/*
@@ -672,7 +675,7 @@ void mmc_rescan(struct work_struct *work)
if (!err) {
if (mmc_attach_mmc(host, ocr))
mmc_power_off(host);
- return;
+ goto out;
}
mmc_release_host(host);
@@ -683,6 +686,9 @@ void mmc_rescan(struct work_struct *work)
mmc_bus_put(host);
}
+out:
+ if (host-caps MMC_CAP_NEEDS_POLL)
+ mmc_schedule_delayed_work(host-detect, HZ);
}
void mmc_start_host(struct mmc_host *host)
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 7ab962f..f2e9885 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -51,8 +51,15 @@ struct mmc_ios {
struct mmc_host_ops {
void(*request)(struct mmc_host *host, struct mmc_request *req);
+ /*
+* Avoid calling these three functions too often or in a fast path,
+* since underlaying controller might implement them in an expensive
+* and/or slow way.
+*/
void(*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
int (*get_ro)(struct mmc_host *host);
+ int (*get_cd)(struct mmc_host *host);
+
void(*enable_sdio_irq)(struct mmc_host *host, int enable);
};
@@ -94,6 +101,7 @@ struct mmc_host {
#define MMC_CAP_SD_HIGHSPEED (1 3)/* Can do SD high-speed timing
*/
#define MMC_CAP_SDIO_IRQ (1 4)/* Can signal pending SDIO IRQs
*/
#define MMC_CAP_SPI(1 5)/* Talks only SPI protocols */
+#define MMC_CAP_NEEDS_POLL (1 6)/* Needs polling for
card-detection */
/* host specific block data */
unsigned intmax_seg_size; /* see
blk_queue_max_segment_size */
--
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[spi-devel-general] [PATCH 2/3] mmc_spi: add support for card-detection polling
This patch adds new platform data variable caps, so platforms
could pass theirs capabilities into MMC core (for example, platforms
without interrupt on the CD line will most probably want to pass
MMC_CAP_NEEDS_POLL).
New platform get_cd() callback provided to optimize polling.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
drivers/mmc/host/mmc_spi.c | 19 +--
include/linux/spi/mmc_spi.h |9 +
2 files changed, 26 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/mmc_spi.c b/drivers/mmc/host/mmc_spi.c
index 3550858..724870c 100644
--- a/drivers/mmc/host/mmc_spi.c
+++ b/drivers/mmc/host/mmc_spi.c
@@ -1131,11 +1131,20 @@ static int mmc_spi_get_ro(struct mmc_host *mmc)
return 0;
}
+static int mmc_spi_get_cd(struct mmc_host *mmc)
+{
+ struct mmc_spi_host *host = mmc_priv(mmc);
+
+ if (host-pdata host-pdata-get_cd)
+ return host-pdata-get_cd(mmc-parent);
+ return -ENOSYS;
+}
static const struct mmc_host_ops mmc_spi_ops = {
.request= mmc_spi_request,
.set_ios= mmc_spi_set_ios,
.get_ro = mmc_spi_get_ro,
+ .get_cd = mmc_spi_get_cd,
};
@@ -1319,17 +1328,23 @@ static int mmc_spi_probe(struct spi_device *spi)
goto fail_glue_init;
}
+ /* pass platform capabilities, if any */
+ if (host-pdata)
+ mmc-caps |= host-pdata-caps;
+
status = mmc_add_host(mmc);
if (status != 0)
goto fail_add_host;
- dev_info(spi-dev, SD/MMC host %s%s%s%s\n,
+ dev_info(spi-dev, SD/MMC host %s%s%s%s%s\n,
mmc-class_dev.bus_id,
host-dma_dev ? : , no DMA,
(host-pdata host-pdata-get_ro)
? : , no WP,
(host-pdata host-pdata-setpower)
- ? : , no poweroff);
+ ? : , no poweroff,
+ (mmc-caps MMC_CAP_NEEDS_POLL)
+ ? , cd polling : );
return 0;
fail_add_host:
diff --git a/include/linux/spi/mmc_spi.h b/include/linux/spi/mmc_spi.h
index d5ca78b..a3626ae 100644
--- a/include/linux/spi/mmc_spi.h
+++ b/include/linux/spi/mmc_spi.h
@@ -23,6 +23,15 @@ struct mmc_spi_platform_data {
/* sense switch on sd cards */
int (*get_ro)(struct device *);
+ /*
+* If board does not use CD interrupts, driver can optimize polling
+* using this function.
+*/
+ int (*get_cd)(struct device *);
+
+ /* Capabilities to pass into mmc core (e.g. MMC_CAP_NEEDS_POLL). */
+ unsigned long caps;
+
/* how long to debounce card detect, in msecs */
u16 detect_delay;
--
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[spi-devel-general] [PATCH 3/3] mmc: change .get_ro() callback semantics
get_ro() callback must return values = 0 for its logical state, and
negative errno values in case of error.
If particular host instance doesn't support RO/WP switch, it should
return -ENOSYS.
This patch changes some hosts in two ways:
1. Now functions should be smart to not return negative values in
RO asserted case (particularly gpio_ calls could return negative
values for the outermost GPIOs).
Also, board code usually passes get_ro() callbacks that directly return
gpioreg bit result, so imxmmc, pxamci and mmc_spi's get_ro() handlers
need take special care when returning platform's values to the mmc core.
2. In case of host instance didn't implement get_ro() callback, it should
really return -ENOSYS and let the mmc core decide what to do about it
(mmc core thinks the same way as the hosts, so it isn't functional
change).
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
drivers/mmc/core/sd.c |4 ++--
drivers/mmc/host/at91_mci.c |2 +-
drivers/mmc/host/imxmmc.c |9 ++---
drivers/mmc/host/mmc_spi.c |9 ++---
drivers/mmc/host/pxamci.c |9 ++---
include/linux/mmc/host.h|3 +++
6 files changed, 24 insertions(+), 12 deletions(-)
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
index 7ef3b15..b122eb9 100644
--- a/drivers/mmc/core/sd.c
+++ b/drivers/mmc/core/sd.c
@@ -494,13 +494,13 @@ static int mmc_sd_init_card(struct mmc_host *host, u32
ocr,
* Check if read-only switch is active.
*/
if (!oldcard) {
- if (!host-ops-get_ro) {
+ if (!host-ops-get_ro || host-ops-get_ro(host) 0) {
printk(KERN_WARNING %s: host does not
support reading read-only
switch. assuming write-enable.\n,
mmc_hostname(host));
} else {
- if (host-ops-get_ro(host))
+ if (host-ops-get_ro(host) 0)
mmc_card_set_readonly(card);
}
}
diff --git a/drivers/mmc/host/at91_mci.c b/drivers/mmc/host/at91_mci.c
index 8979ad3..140c2b8 100644
--- a/drivers/mmc/host/at91_mci.c
+++ b/drivers/mmc/host/at91_mci.c
@@ -797,7 +797,7 @@ static int at91_mci_get_ro(struct mmc_host *mmc)
struct at91mci_host *host = mmc_priv(mmc);
if (host-board-wp_pin) {
- read_only = gpio_get_value(host-board-wp_pin);
+ read_only = !!gpio_get_value(host-board-wp_pin);
printk(KERN_WARNING %s: card is %s\n, mmc_hostname(mmc),
(read_only ? read-only : read-write) );
}
diff --git a/drivers/mmc/host/imxmmc.c b/drivers/mmc/host/imxmmc.c
index 95f33e8..5167679 100644
--- a/drivers/mmc/host/imxmmc.c
+++ b/drivers/mmc/host/imxmmc.c
@@ -889,9 +889,12 @@ static int imxmci_get_ro(struct mmc_host *mmc)
struct imxmci_host *host = mmc_priv(mmc);
if (host-pdata host-pdata-get_ro)
- return host-pdata-get_ro(mmc_dev(mmc));
- /* Host doesn't support read only detection so assume writeable */
- return 0;
+ return !!host-pdata-get_ro(mmc_dev(mmc));
+ /*
+* Board doesn't support read only detection; let the mmc core
+* decide what to do.
+*/
+ return -ENOSYS;
}
diff --git a/drivers/mmc/host/mmc_spi.c b/drivers/mmc/host/mmc_spi.c
index 724870c..85d9853 100644
--- a/drivers/mmc/host/mmc_spi.c
+++ b/drivers/mmc/host/mmc_spi.c
@@ -1126,9 +1126,12 @@ static int mmc_spi_get_ro(struct mmc_host *mmc)
struct mmc_spi_host *host = mmc_priv(mmc);
if (host-pdata host-pdata-get_ro)
- return host-pdata-get_ro(mmc-parent);
- /* board doesn't support read only detection; assume writeable */
- return 0;
+ return !!host-pdata-get_ro(mmc-parent);
+ /*
+* Board doesn't support read only detection; let the mmc core
+* decide what to do.
+*/
+ return -ENOSYS;
}
static int mmc_spi_get_cd(struct mmc_host *mmc)
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c
index 65210fc..b6056bd 100644
--- a/drivers/mmc/host/pxamci.c
+++ b/drivers/mmc/host/pxamci.c
@@ -361,9 +361,12 @@ static int pxamci_get_ro(struct mmc_host *mmc)
struct pxamci_host *host = mmc_priv(mmc);
if (host-pdata host-pdata-get_ro)
- return host-pdata-get_ro(mmc_dev(mmc));
- /* Host doesn't support read only detection so assume writeable */
- return 0;
+ return !!host-pdata-get_ro(mmc_dev(mmc));
+ /*
+* Board doesn't support read only detection; let the mmc core
+* decide what to do.
+*/
+ return -ENOSYS;
}
static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index f2e9885..ef3b773 100644
Re: [spi-devel-general] [PATCH 3/4] [MMC] mmc_spi: add polling support for the card detectline
On Mon, May 19, 2008 at 11:02:13AM +0800, Chen Gong wrote: -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Anton Vorontsov Sent: 2008?5?17? 0:51 To: Kumar Gala; David Brownell; Pierre Ossman Cc: [EMAIL PROTECTED]; spi-devel-general@lists.sourceforge.net; [EMAIL PROTECTED]; Tabi Timur Subject: [PATCH 3/4] [MMC] mmc_spi: add polling support for the card detectline Some boards do not use interrupts on the CD line, so we want to poll the CD and see if there was a change. 1 second poll interval seems resonable. Signed-off-by: Anton Vorontsov [EMAIL PROTECTED] --- drivers/mmc/host/mmc_spi.c | 51 I want to know whether every card working well ? Because I'm working For 83xx MMC-over-SPI support, the presented concrete methods I used as you do, but only 256M card seems good, 512M or 1G/2G card all have some problems So far I don't have cards larger than 256M. Will try to get one though. Thanks, -- Anton Vorontsov email: [EMAIL PROTECTED] irc://irc.freenode.net/bd2 - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [PATCH 3/4] [MMC] mmc_spi: add polling support for the card detect line
On Wed, May 21, 2008 at 09:28:31PM +0200, Pierre Ossman wrote:
On Wed, 21 May 2008 22:47:13 +0400
Anton Vorontsov [EMAIL PROTECTED] wrote:
Calling get_cd() for every request smells like overhead, especially given
that that get_cd() could ask for GPIO status via relatively slow bus (like
I2C GPIO expanders). So, polling seems most reasonable solution here, no
need to call it very often.
Fair enough. You should probably add a comment about this somewhere so
that people do not call get_cd() in the core request function and
similar places. Place it so that both get_cd() and get_ro() are covered
though, as it should be relevant for both.
I think this is applicable to the .set_ios() too.
[...]
+ if (host-ops-get_cd) {
+ int old_cd_status = host-cd_status;
+
+ host-cd_status = !!host-ops-get_cd(host);
+ if (!(old_cd_status ^ host-cd_status)) {
+ mmc_bus_put(host);
+ goto out;
+ }
+ }
+
This should only be done when there is no bus handler. Since we are
polling, we might actually miss the user removing and reinserting the
card. The only way to check for that is to poke the card and see if it
is still alive. This also means you won't need that state variable.
Yeah, this makes sense. Indeed pretty easy to trigger [if poll interval
increased to 3 seconds, for example].
Also, that second if clause seems fit for an obfuscation contest. ;)
cd_status was a bitfield, so I thought that bit operations would be
appropriate. :-)
p.s. Since mmc_host_ops no longer the same for every instance of
mmc_spi, struct mmc_host_ops can't be const and should be allocated
dynamically.
This can be solved by allowing get_cd() to return an error that will be
treated as if get_cd() wasn't defined. -ENODEV seems suitable.
-ENOSYS (not implemented) sounds better for this purpose...
(get_ro() needs the same treatment, but I haven't gotten around to
that)
Ok. How about this version?
--
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email: [EMAIL PROTECTED]
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[spi-devel-general] [PATCH 3/3] mmc: change .get_ro() callback semantics
get_ro() callback must return values = 0 for its logical state, and
negative errno values in case of error.
If particular host instance doesn't support RO/WP switch, it should
return -ENOSYS.
This patch changes some hosts in two ways:
1. Now functions should be smart to not return negative values in
RO asserted case (particularly gpio_ calls could return negative
values for the outermost GPIOs).
Also, board code usually passes get_ro() callbacks that directly return
gpioreg bit result, so imxmmc, pxamci and mmc_spi's get_ro() handlers
need take special care when returning platform's values to the mmc core.
2. In case of host instance didn't implement get_ro() callback, it should
really return -ENOSYS and let the mmc core decide what to do about it
(mmc core thinks the same way as the hosts, so it isn't functional
change).
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
drivers/mmc/core/sd.c |4 ++--
drivers/mmc/host/at91_mci.c |2 +-
drivers/mmc/host/imxmmc.c |9 ++---
drivers/mmc/host/mmc_spi.c |9 ++---
drivers/mmc/host/pxamci.c |9 ++---
include/linux/mmc/host.h|3 +++
6 files changed, 24 insertions(+), 12 deletions(-)
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
index 7ef3b15..b122eb9 100644
--- a/drivers/mmc/core/sd.c
+++ b/drivers/mmc/core/sd.c
@@ -494,13 +494,13 @@ static int mmc_sd_init_card(struct mmc_host *host, u32
ocr,
* Check if read-only switch is active.
*/
if (!oldcard) {
- if (!host-ops-get_ro) {
+ if (!host-ops-get_ro || host-ops-get_ro(host) 0) {
printk(KERN_WARNING %s: host does not
support reading read-only
switch. assuming write-enable.\n,
mmc_hostname(host));
} else {
- if (host-ops-get_ro(host))
+ if (host-ops-get_ro(host) 0)
mmc_card_set_readonly(card);
}
}
diff --git a/drivers/mmc/host/at91_mci.c b/drivers/mmc/host/at91_mci.c
index a28fc2f..a2ccdf2 100644
--- a/drivers/mmc/host/at91_mci.c
+++ b/drivers/mmc/host/at91_mci.c
@@ -794,7 +794,7 @@ static int at91_mci_get_ro(struct mmc_host *mmc)
struct at91mci_host *host = mmc_priv(mmc);
if (host-board-wp_pin) {
- read_only = gpio_get_value(host-board-wp_pin);
+ read_only = !!gpio_get_value(host-board-wp_pin);
printk(KERN_WARNING %s: card is %s\n, mmc_hostname(mmc),
(read_only ? read-only : read-write) );
}
diff --git a/drivers/mmc/host/imxmmc.c b/drivers/mmc/host/imxmmc.c
index 95f33e8..5167679 100644
--- a/drivers/mmc/host/imxmmc.c
+++ b/drivers/mmc/host/imxmmc.c
@@ -889,9 +889,12 @@ static int imxmci_get_ro(struct mmc_host *mmc)
struct imxmci_host *host = mmc_priv(mmc);
if (host-pdata host-pdata-get_ro)
- return host-pdata-get_ro(mmc_dev(mmc));
- /* Host doesn't support read only detection so assume writeable */
- return 0;
+ return !!host-pdata-get_ro(mmc_dev(mmc));
+ /*
+* Board doesn't support read only detection; let the mmc core
+* decide what to do.
+*/
+ return -ENOSYS;
}
diff --git a/drivers/mmc/host/mmc_spi.c b/drivers/mmc/host/mmc_spi.c
index f0f86b1..a804c7f 100644
--- a/drivers/mmc/host/mmc_spi.c
+++ b/drivers/mmc/host/mmc_spi.c
@@ -1126,9 +1126,12 @@ static int mmc_spi_get_ro(struct mmc_host *mmc)
struct mmc_spi_host *host = mmc_priv(mmc);
if (host-pdata host-pdata-get_ro)
- return host-pdata-get_ro(mmc-parent);
- /* board doesn't support read only detection; assume writeable */
- return 0;
+ return !!host-pdata-get_ro(mmc-parent);
+ /*
+* Board doesn't support read only detection; let the mmc core
+* decide what to do.
+*/
+ return -ENOSYS;
}
static int mmc_spi_get_cd(struct mmc_host *mmc)
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c
index 65210fc..b6056bd 100644
--- a/drivers/mmc/host/pxamci.c
+++ b/drivers/mmc/host/pxamci.c
@@ -361,9 +361,12 @@ static int pxamci_get_ro(struct mmc_host *mmc)
struct pxamci_host *host = mmc_priv(mmc);
if (host-pdata host-pdata-get_ro)
- return host-pdata-get_ro(mmc_dev(mmc));
- /* Host doesn't support read only detection so assume writeable */
- return 0;
+ return !!host-pdata-get_ro(mmc_dev(mmc));
+ /*
+* Board doesn't support read only detection; let the mmc core
+* decide what to do.
+*/
+ return -ENOSYS;
}
static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index f2e9885..ef3b773 100644
[spi-devel-general] [PATCH 1/3] mmc: add support for card-detection polling
Some hosts (and boards that use mmc_spi) do not use interrupts on the CD
line, so they can't trigger mmc_detect_change. We want to poll the card
and see if there was a change. 1 second poll interval seems resonable.
This patch also implements .get_cd() host operation, that could be used
by the hosts that are able to report card-detect status without need to
talk MMC.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
drivers/mmc/core/core.c | 12 +---
include/linux/mmc/host.h |8
2 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 01ced4c..ede5d1e 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -638,6 +638,9 @@ void mmc_rescan(struct work_struct *work)
*/
mmc_bus_put(host);
+ if (host-ops-get_cd host-ops-get_cd(host) == 0)
+ goto out;
+
mmc_claim_host(host);
mmc_power_up(host);
@@ -652,7 +655,7 @@ void mmc_rescan(struct work_struct *work)
if (!err) {
if (mmc_attach_sdio(host, ocr))
mmc_power_off(host);
- return;
+ goto out;
}
/*
@@ -662,7 +665,7 @@ void mmc_rescan(struct work_struct *work)
if (!err) {
if (mmc_attach_sd(host, ocr))
mmc_power_off(host);
- return;
+ goto out;
}
/*
@@ -672,7 +675,7 @@ void mmc_rescan(struct work_struct *work)
if (!err) {
if (mmc_attach_mmc(host, ocr))
mmc_power_off(host);
- return;
+ goto out;
}
mmc_release_host(host);
@@ -683,6 +686,9 @@ void mmc_rescan(struct work_struct *work)
mmc_bus_put(host);
}
+out:
+ if (host-caps MMC_CAP_NEEDS_POLL)
+ mmc_schedule_delayed_work(host-detect, HZ);
}
void mmc_start_host(struct mmc_host *host)
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 7ab962f..f2e9885 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -51,8 +51,15 @@ struct mmc_ios {
struct mmc_host_ops {
void(*request)(struct mmc_host *host, struct mmc_request *req);
+ /*
+* Avoid calling these three functions too often or in a fast path,
+* since underlaying controller might implement them in an expensive
+* and/or slow way.
+*/
void(*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
int (*get_ro)(struct mmc_host *host);
+ int (*get_cd)(struct mmc_host *host);
+
void(*enable_sdio_irq)(struct mmc_host *host, int enable);
};
@@ -94,6 +101,7 @@ struct mmc_host {
#define MMC_CAP_SD_HIGHSPEED (1 3)/* Can do SD high-speed timing
*/
#define MMC_CAP_SDIO_IRQ (1 4)/* Can signal pending SDIO IRQs
*/
#define MMC_CAP_SPI(1 5)/* Talks only SPI protocols */
+#define MMC_CAP_NEEDS_POLL (1 6)/* Needs polling for
card-detection */
/* host specific block data */
unsigned intmax_seg_size; /* see
blk_queue_max_segment_size */
--
1.5.5.1
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[spi-devel-general] [PATCH 2/3] mmc_spi: add support for card-detection polling
If platform_data lacks init() callback (solely used to request
card-detect interrupt), we mark the host as MMC_CAP_NEEDS_POLL.
get_cd() host operation provided to optimize polling.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
drivers/mmc/host/mmc_spi.c | 18 --
include/linux/spi/mmc_spi.h |6 ++
2 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/mmc_spi.c b/drivers/mmc/host/mmc_spi.c
index 3550858..f0f86b1 100644
--- a/drivers/mmc/host/mmc_spi.c
+++ b/drivers/mmc/host/mmc_spi.c
@@ -1131,11 +1131,20 @@ static int mmc_spi_get_ro(struct mmc_host *mmc)
return 0;
}
+static int mmc_spi_get_cd(struct mmc_host *mmc)
+{
+ struct mmc_spi_host *host = mmc_priv(mmc);
+
+ if (host-pdata host-pdata-get_cd)
+ return host-pdata-get_cd(mmc-parent);
+ return -ENOSYS;
+}
static const struct mmc_host_ops mmc_spi_ops = {
.request= mmc_spi_request,
.set_ios= mmc_spi_set_ios,
.get_ro = mmc_spi_get_ro,
+ .get_cd = mmc_spi_get_cd,
};
@@ -1323,13 +1332,18 @@ static int mmc_spi_probe(struct spi_device *spi)
if (status != 0)
goto fail_add_host;
- dev_info(spi-dev, SD/MMC host %s%s%s%s\n,
+ if (host-pdata !host-pdata-init)
+ mmc-caps |= MMC_CAP_NEEDS_POLL;
+
+ dev_info(spi-dev, SD/MMC host %s%s%s%s%s\n,
mmc-class_dev.bus_id,
host-dma_dev ? : , no DMA,
(host-pdata host-pdata-get_ro)
? : , no WP,
(host-pdata host-pdata-setpower)
- ? : , no poweroff);
+ ? : , no poweroff,
+ (mmc-caps MMC_CAP_NEEDS_POLL)
+ ? , cd polling : );
return 0;
fail_add_host:
diff --git a/include/linux/spi/mmc_spi.h b/include/linux/spi/mmc_spi.h
index d5ca78b..23c6923 100644
--- a/include/linux/spi/mmc_spi.h
+++ b/include/linux/spi/mmc_spi.h
@@ -23,6 +23,12 @@ struct mmc_spi_platform_data {
/* sense switch on sd cards */
int (*get_ro)(struct device *);
+ /*
+* If board does not use CD interrupts, driver can optimize polling
+* using this function.
+*/
+ int (*get_cd)(struct device *);
+
/* how long to debounce card detect, in msecs */
u16 detect_delay;
--
1.5.5.1
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Re: [spi-devel-general] [PATCH 3/4] spi: Add OF binding support for SPI busses
On Fri, May 16, 2008 at 01:36:13PM -0600, Grant Likely wrote:
From: Grant Likely [EMAIL PROTECTED]
This patch adds support for populating an SPI bus based on data in the
OF device tree. This is useful for powerpc platforms which use the
device tree instead of discrete code for describing platform layout.
Signed-off-by: Grant Likely [EMAIL PROTECTED]
---
[...]
diff --git a/drivers/spi/spi_of.c b/drivers/spi/spi_of.c
new file mode 100644
index 000..b5ae434
--- /dev/null
+++ b/drivers/spi/spi_of.c
@@ -0,0 +1,86 @@
+/*
I think better placement for this is drivers/of, no?
+ * SPI OF support routines
+ * Copyright (C) 2008 Secret Lab Technologies Ltd.
+ *
+ * Support routines for deriving SPI device attachments from the device
+ * tree.
+ */
+
+#include linux/of.h
+#include linux/device.h
+#include linux/spi/spi.h
+#include linux/spi/spi_of.h
+
+/**
+ * spi_of_register_devices - Register child devices onto the SPI bus
+ * @master: Pointer to spi_master device
+ * @np: parent node of SPI device nodes
+ *
+ * Registers an spi_device for each child node of 'np' which has a 'reg'
+ * property.
+ */
+void spi_of_register_devices(struct spi_master *master, struct device_node
*np)
+{
+ struct spi_device *spi;
+ struct device_node *nc;
+ const u32 *prop;
+ const char *sprop;
+ int rc;
+ int len;
+
+ for_each_child_of_node(np, nc) {
+ /* Alloc an spi_device */
+ spi = spi_alloc_device(master);
+ if (!spi) {
+ dev_err(master-dev, spi_device alloc error for %s\n,
+ np-full_name);
+ continue;
+ }
+
+ /* Device address */
+ prop = of_get_property(nc, reg, len);
+ if (!prop || len sizeof(*prop)) {
+ dev_err(master-dev, %s has no 'reg' property\n,
+ np-full_name);
Should be nc-full_name.
+ continue;
+ }
[...]
--
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email: [EMAIL PROTECTED]
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Re: [spi-devel-general] [PATCH 3/4] [MMC] mmc_spi: add polling support for the card detect line
On Sat, May 17, 2008 at 01:36:33PM +0200, Pierre Ossman wrote: On Fri, 16 May 2008 20:50:57 +0400 Anton Vorontsov [EMAIL PROTECTED] wrote: Some boards do not use interrupts on the CD line, so we want to poll the CD and see if there was a change. 1 second poll interval seems resonable. The idea isn't bad, but I'm not sure about the mechanism. To poll a MMC slot, you do not really need a card detect at all. The MMC layer can just shoot off some requests and see if anything responds. The PXA driver (if my memory serves me right) already does this. So the best idea there would be to add this feature to the MMC core and let the host indicate that it needs it via MMC_CAP_NEEDS_POLL or something like that. The card detection pin then becomes an optimisation, something that is also useful in other ways. Have the host driver check the card detection pin at the start of every request, and quickly fail it if there is no card present. Calling get_cd() for every request smells like overhead, especially given that that get_cd() could ask for GPIO status via relatively slow bus (like I2C GPIO expanders). So, polling seems most reasonable solution here, no need to call it very often. How about these patches? Tested with and without get_cd() optimization. -- Anton Vorontsov email: [EMAIL PROTECTED] irc://irc.freenode.net/bd2 - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [PATCH 1/2] mmc: add support for card-detection polling
Some hosts (and boards that use mmc_spi) do not use interrupts on the CD
line, so they can't trigger mmc_detect_change. We want to poll the card
and see if there was a change. 1 second poll interval seems resonable.
This patch also implements .get_cd() host operation, that could be used
by the hosts that are able to report card-detect status without need to
talk MMC.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
drivers/mmc/core/core.c | 19 ---
include/linux/mmc/host.h |3 +++
2 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 01ced4c..e455ebd 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -631,6 +631,16 @@ void mmc_rescan(struct work_struct *work)
mmc_bus_get(host);
+ if (host-ops-get_cd) {
+ int old_cd_status = host-cd_status;
+
+ host-cd_status = !!host-ops-get_cd(host);
+ if (!(old_cd_status ^ host-cd_status)) {
+ mmc_bus_put(host);
+ goto out;
+ }
+ }
+
if (host-bus_ops == NULL) {
/*
* Only we can add a new handler, so it's safe to
@@ -652,7 +662,7 @@ void mmc_rescan(struct work_struct *work)
if (!err) {
if (mmc_attach_sdio(host, ocr))
mmc_power_off(host);
- return;
+ goto out;
}
/*
@@ -662,7 +672,7 @@ void mmc_rescan(struct work_struct *work)
if (!err) {
if (mmc_attach_sd(host, ocr))
mmc_power_off(host);
- return;
+ goto out;
}
/*
@@ -672,7 +682,7 @@ void mmc_rescan(struct work_struct *work)
if (!err) {
if (mmc_attach_mmc(host, ocr))
mmc_power_off(host);
- return;
+ goto out;
}
mmc_release_host(host);
@@ -683,6 +693,9 @@ void mmc_rescan(struct work_struct *work)
mmc_bus_put(host);
}
+out:
+ if (host-caps MMC_CAP_NEEDS_POLL)
+ mmc_schedule_delayed_work(host-detect, HZ);
}
void mmc_start_host(struct mmc_host *host)
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 7ab962f..05d03a4 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -53,6 +53,7 @@ struct mmc_host_ops {
void(*request)(struct mmc_host *host, struct mmc_request *req);
void(*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
int (*get_ro)(struct mmc_host *host);
+ int (*get_cd)(struct mmc_host *host);
void(*enable_sdio_irq)(struct mmc_host *host, int enable);
};
@@ -94,6 +95,7 @@ struct mmc_host {
#define MMC_CAP_SD_HIGHSPEED (1 3)/* Can do SD high-speed timing
*/
#define MMC_CAP_SDIO_IRQ (1 4)/* Can signal pending SDIO IRQs
*/
#define MMC_CAP_SPI(1 5)/* Talks only SPI protocols */
+#define MMC_CAP_NEEDS_POLL (1 6)/* Needs polling for
card-detection */
/* host specific block data */
unsigned intmax_seg_size; /* see
blk_queue_max_segment_size */
@@ -114,6 +116,7 @@ struct mmc_host {
unsigned intuse_spi_crc:1;
unsigned intclaimed:1; /* host exclusively claimed */
unsigned intbus_dead:1; /* bus has been released */
+ unsigned intcd_status:1;/* card-detect status */
#ifdef CONFIG_MMC_DEBUG
unsigned intremoved:1; /* host is being removed */
#endif
--
1.5.5.1
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[spi-devel-general] [PATCH 2/2] mmc_spi: add support for card-detection polling
If platform_data lacks init() callback (solely used to request
card-detect interrupt), we mark the host as MMC_CAP_NEEDS_POLL.
get_cd() host operation provided to optimize polling.
p.s. Since mmc_host_ops no longer the same for every instance of
mmc_spi, struct mmc_host_ops can't be const and should be allocated
dynamically.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
drivers/mmc/host/mmc_spi.c | 31 +--
include/linux/spi/mmc_spi.h |6 ++
2 files changed, 27 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/host/mmc_spi.c b/drivers/mmc/host/mmc_spi.c
index 3550858..667855a 100644
--- a/drivers/mmc/host/mmc_spi.c
+++ b/drivers/mmc/host/mmc_spi.c
@@ -115,6 +115,7 @@ struct scratch {
struct mmc_spi_host {
struct mmc_host *mmc;
+ struct mmc_host_ops mmc_spi_ops;
struct spi_device *spi;
unsigned char power_mode;
@@ -1131,13 +1132,12 @@ static int mmc_spi_get_ro(struct mmc_host *mmc)
return 0;
}
+static int mmc_spi_get_cd(struct mmc_host *mmc)
+{
+ struct mmc_spi_host *host = mmc_priv(mmc);
-static const struct mmc_host_ops mmc_spi_ops = {
- .request= mmc_spi_request,
- .set_ios= mmc_spi_set_ios,
- .get_ro = mmc_spi_get_ro,
-};
-
+ return host-pdata-get_cd(mmc-parent);
+}
//
@@ -1236,8 +1236,12 @@ static int mmc_spi_probe(struct spi_device *spi)
mmc = mmc_alloc_host(sizeof(*host), spi-dev);
if (!mmc)
goto nomem;
+ host = mmc_priv(mmc);
- mmc-ops = mmc_spi_ops;
+ host-mmc_spi_ops.request = mmc_spi_request,
+ host-mmc_spi_ops.set_ios = mmc_spi_set_ios,
+ host-mmc_spi_ops.get_ro = mmc_spi_get_ro,
+ mmc-ops = host-mmc_spi_ops;
mmc-max_blk_size = MMC_SPI_BLOCKSIZE;
/* As long as we keep track of the number of successfully
@@ -1256,7 +1260,6 @@ static int mmc_spi_probe(struct spi_device *spi)
mmc-f_min = 40;
mmc-f_max = spi-max_speed_hz;
- host = mmc_priv(mmc);
host-mmc = mmc;
host-spi = spi;
@@ -1323,13 +1326,21 @@ static int mmc_spi_probe(struct spi_device *spi)
if (status != 0)
goto fail_add_host;
- dev_info(spi-dev, SD/MMC host %s%s%s%s\n,
+ if (host-pdata !host-pdata-init)
+ mmc-caps |= MMC_CAP_NEEDS_POLL;
+
+ if (host-pdata host-pdata-get_cd)
+ host-mmc_spi_ops.get_cd = mmc_spi_get_cd;
+
+ dev_info(spi-dev, SD/MMC host %s%s%s%s%s\n,
mmc-class_dev.bus_id,
host-dma_dev ? : , no DMA,
(host-pdata host-pdata-get_ro)
? : , no WP,
(host-pdata host-pdata-setpower)
- ? : , no poweroff);
+ ? : , no poweroff,
+ (mmc-caps MMC_CAP_NEEDS_POLL)
+ ? , cd polling : );
return 0;
fail_add_host:
diff --git a/include/linux/spi/mmc_spi.h b/include/linux/spi/mmc_spi.h
index d5ca78b..915faf3 100644
--- a/include/linux/spi/mmc_spi.h
+++ b/include/linux/spi/mmc_spi.h
@@ -23,6 +23,12 @@ struct mmc_spi_platform_data {
/* sense switch on sd cards */
int (*get_ro)(struct device *);
+ /*
+* if board does not use CD interrupts, driver can poll the CD
+* line using this function.
+*/
+ int (*get_cd)(struct device *);
+
/* how long to debounce card detect, in msecs */
u16 detect_delay;
--
1.5.5.1
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Re: [spi-devel-general] [PATCH 3/4] spi: Add OF binding support for SPI busses
On Mon, May 19, 2008 at 07:09:00PM +0200, Gary Jennejohn wrote: On Mon, 19 May 2008 09:57:21 -0600 Grant Likely [EMAIL PROTECTED] wrote: On Mon, May 19, 2008 at 7:17 AM, Guennadi Liakhovetski [EMAIL PROTECTED] wrote: On Fri, 16 May 2008, Grant Likely wrote: +However, the binding does not attempt to define the specific method for +assigning chip select numbers. Since SPI chip select configuration is +flexible and non-standardized, it is left out of this binding with the +assumption that board specific platform code will be used to manage +chip selects. Individual drivers can define additional properties to +support describing the chip select layout. Yes, this looks like a problem to me. This means, SPI devices will need two bindings - OF and platform?... Maybe define an spi_chipselect OF-binding? Actually, spi devices have *neither*. :-) They bind to the SPI bus. Not the platform bus or of_platform bus. But that is Linux internal details; this discussion is about device tree bindings. Note that I did say that drivers can define additional properties for supporting chip select changes as needed. I'm just not attempting to encode them into the formal binding. There is simply just too many different ways to manipulate chip select signals and so I don't feel confident trying to define a *common* binding at this moment in time. At some point in the future when we have a number of examples to choose from then we can extend this binding with chip select related properties. As for the Linux internals, the 5200 SPI bus driver that I posted exports a function that allows another driver to call in and manipulated the CS lines before the transfer. It isn't the prettiest solution, but I'm not locked into the approach and that gives some time to consider cleaner interfaces. I sort of hesitate to hijack this thread, but since we're discussing SPI and chip selects... I have a driver for the SPI controller in the 440EPx. This controller is very simple and does not have any internal support for a chip select. The controller seems to also be in the 440GR and 440EP, and may be in other AMCC CPUs too. All chip selects must be done using GPIO. In fact, the board for which I developed this driver, a modified sequoia, actually uses 2 chip selects. My problem was, and is, that there's no generic GPIO support for powerpc. At least, not that I'm aware of. Please tell me if I'm wrong. Documentation/powerpc/booting-without-of.txt VIII - Specifying GPIO information for devices. And include/linux/of_gpio.h + drivers/of/gpio.c. Soon I'll post some patches for mpc83xx_spi showing how to use GPIOs for the SPI chip selects. -- Anton Vorontsov email: [EMAIL PROTECTED] irc://irc.freenode.net/bd2 - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [PATCH 1/4] [SPI] [POWERPC] spi_mpc83xx: handles Freescale MPC8610 as well
With this patch we'll able to select spi_mpc83xx driver on the MPC86xx processors. Signed-off-by: Anton Vorontsov [EMAIL PROTECTED] --- This patch is on top of Jochen's patch ( http://patchwork.ozlabs.org/linuxppc/patch?id=18261) that fixes SPI on MPC8610. drivers/spi/Kconfig |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 66ec5d8..094c237 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -125,7 +125,7 @@ config SPI_MPC52xx_PSC config SPI_MPC83xx tristate Freescale MPC83xx/QUICC Engine SPI controller - depends on SPI_MASTER (PPC_83xx || QUICC_ENGINE) EXPERIMENTAL + depends on SPI_MASTER (PPC_83xx || QUICC_ENGINE || PPC_86xx) EXPERIMENTAL help This enables using the Freescale MPC83xx and QUICC Engine SPI controllers in master mode. -- 1.5.5.1 - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [PATCH 4/4] [POWERPC] 86xx: mpc8610_hpcd: add SD/MMC card detect polling
MPC8610HPCD seem to not use interrupts for the SD CD line, so we need
poll it.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
arch/powerpc/platforms/86xx/mpc8610_hpcd.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index be430bc..47078e3 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -63,9 +63,15 @@ static int mmc_get_ro(struct device *dev)
return in_8(pixis_sdcsr) PX_SDCSR_SD_WP;
}
+static int mmc_get_cd(struct device *dev)
+{
+ return !(in_8(pixis_sdcsr) PX_SDCSR_SD_nCD);
+}
+
static struct mmc_spi_platform_data mmc_pdata = {
.ocr_mask = MMC_VDD_33_34,
.get_ro = mmc_get_ro,
+ .get_cd = mmc_get_cd,
};
static struct spi_board_info spi_boardinfo = {
--
1.5.5.1
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[spi-devel-general] [PATCH 3/4] [MMC] mmc_spi: add polling support for the card detect line
Some boards do not use interrupts on the CD line, so we want to poll
the CD and see if there was a change. 1 second poll interval seems
resonable.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
drivers/mmc/host/mmc_spi.c | 51 +-
include/linux/spi/mmc_spi.h | 10
2 files changed, 59 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/mmc_spi.c b/drivers/mmc/host/mmc_spi.c
index 3550858..a3b46b1 100644
--- a/drivers/mmc/host/mmc_spi.c
+++ b/drivers/mmc/host/mmc_spi.c
@@ -31,6 +31,7 @@
#include linux/crc7.h
#include linux/crc-itu-t.h
#include linux/scatterlist.h
+#include linux/workqueue.h
#include linux/mmc/host.h
#include linux/mmc/mmc.h /* for R1_SPI_* bit values */
@@ -122,6 +123,11 @@ struct mmc_spi_host {
struct mmc_spi_platform_data*pdata;
+ /* stores last Card-Detect status (when polling) */
+ int cd_status;
+ struct workqueue_struct *cd_poll_wqueue;
+ struct delayed_work cd_poll_work;
+
/* for bulk data transfers */
struct spi_transfer token, t, crc, early_status;
struct spi_message m;
@@ -1155,6 +1161,26 @@ mmc_spi_detect_irq(int irq, void *mmc)
return IRQ_HANDLED;
}
+static void mmc_spi_cd_poll_work(struct work_struct *work)
+{
+ struct mmc_spi_host *host = container_of(work, struct mmc_spi_host,
+cd_poll_work.work);
+ struct mmc_host *mmc = host-mmc;
+ int old_cd;
+
+ dev_dbg(host-spi-dev, polling for card detect...\n);
+
+ old_cd = host-cd_status;
+ host-cd_status = host-pdata-get_cd(mmc-parent);
+ if (old_cd != host-cd_status) {
+ /* ugh... this is ugly, but better than code duplication */
+ mmc_spi_detect_irq(NO_IRQ, mmc);
+ }
+
+ queue_delayed_work(host-cd_poll_wqueue, host-cd_poll_work,
+ MMC_SPI_POLL_INT);
+}
+
struct count_children {
unsignedn;
struct bus_type *bus;
@@ -1323,13 +1349,28 @@ static int mmc_spi_probe(struct spi_device *spi)
if (status != 0)
goto fail_add_host;
- dev_info(spi-dev, SD/MMC host %s%s%s%s\n,
+ if (host-pdata host-pdata-get_cd) {
+ host-cd_status = host-pdata-get_cd(mmc-parent);
+ INIT_DELAYED_WORK(host-cd_poll_work, mmc_spi_cd_poll_work);
+ host-cd_poll_wqueue = create_singlethread_workqueue(
+ mmc-class_dev.bus_id);
+ if (!host-cd_poll_wqueue) {
+ status = -ENOMEM;
+ goto fail_add_host;
+ }
+ queue_delayed_work(host-cd_poll_wqueue, host-cd_poll_work,
+ MMC_SPI_POLL_INT);
+ }
+
+ dev_info(spi-dev, SD/MMC host %s%s%s%s%s\n,
mmc-class_dev.bus_id,
host-dma_dev ? : , no DMA,
(host-pdata host-pdata-get_ro)
? : , no WP,
(host-pdata host-pdata-setpower)
- ? : , no poweroff);
+ ? : , no poweroff,
+ (host-pdata host-pdata-get_cd)
+ ? , cd polling : );
return 0;
fail_add_host:
@@ -1362,6 +1403,12 @@ static int __devexit mmc_spi_remove(struct spi_device
*spi)
if (host-pdata host-pdata-exit)
host-pdata-exit(spi-dev, mmc);
+ if (host-pdata host-pdata-get_cd) {
+ cancel_rearming_delayed_workqueue(
+ host-cd_poll_wqueue, host-cd_poll_work);
+ destroy_workqueue(host-cd_poll_wqueue);
+ }
+
mmc_remove_host(mmc);
if (host-dma_dev) {
diff --git a/include/linux/spi/mmc_spi.h b/include/linux/spi/mmc_spi.h
index e9bbe3e..6ed6ee9 100644
--- a/include/linux/spi/mmc_spi.h
+++ b/include/linux/spi/mmc_spi.h
@@ -1,6 +1,10 @@
#ifndef __LINUX_SPI_MMC_SPI_H
#define __LINUX_SPI_MMC_SPI_H
+#include asm/param.h /* for HZ */
+
+#define MMC_SPI_POLL_INT HZ
+
struct device;
struct mmc_host;
@@ -21,6 +25,12 @@ struct mmc_spi_platform_data {
/* sense switch on sd cards */
int (*get_ro)(struct device *);
+ /*
+* if board does not use CD interrupts, driver can poll the CD
+* line using this function.
+*/
+ int (*get_cd)(struct device *);
+
/* how long to debounce card detect, in msecs */
u16 detect_delay;
--
1.5.5.1
-
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[spi-devel-general] [PATCH 2/4] [POWERPC] 86xx: mpc8610_hpcd: add support for SPI and MMC-over-SPI
This is mpc832x-like MMC setup, but with a quirk to work around PIXIS'
CS line weirdness.
Probably someday we'll want to convert spi_mpc83xx driver into OF driver
and place the MMC node into device tree. But this will need great efforts
for SPI (alike I2C work we've seen lately), plus converting some PIXIS
code into OF GPIO controller(s).
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/mpc8610_hpcd.dts |9
arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 63 +--
2 files changed, 67 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 44e9287..ed20ac4 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -193,6 +193,15 @@
reg = 0xe4000 0x100;
};
+ [EMAIL PROTECTED] {
+ compatible = fsl,mpc8610-spi, fsl,spi;
+ cell-index = 0;
+ reg = 0x7000 0x40;
+ interrupts = 59 2;
+ interrupt-parent = mpic;
+ mode = cpu;
+ };
+
[EMAIL PROTECTED] {
compatible = fsl,mpc8610-ssi;
cell-index = 0;
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index fe163d4..be430bc 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -40,7 +40,63 @@
#include sysdev/fsl_pci.h
#include sysdev/fsl_soc.h
-static unsigned char *pixis_bdcfg0, *pixis_arch;
+#include linux/spi/spi.h
+#include linux/spi/mmc_spi.h
+#include linux/mmc/host.h
+
+#define PX_BRDCFG0_SERSEL (1 1)
+#define PX_BRDCFG0_DVISEL (1 3)
+#define PX_BRDCFG0_DLINK (1 4)
+#define PX_BRDCFG0_DIU_MASK(PX_BRDCFG0_DVISEL | PX_BRDCFG0_DLINK)
+
+#define PX_SDCSR_SD_nSEL (1 0)
+/* despite documentation this is active-high */
+#define PX_SDCSR_SD_WP (1 6)
+#define PX_SDCSR_SD_nCD(1 7)
+
+static u8 __iomem *pixis_bdcfg0;
+static u8 __iomem *pixis_arch;
+static u8 __iomem *pixis_sdcsr;
+
+static int mmc_get_ro(struct device *dev)
+{
+ return in_8(pixis_sdcsr) PX_SDCSR_SD_WP;
+}
+
+static struct mmc_spi_platform_data mmc_pdata = {
+ .ocr_mask = MMC_VDD_33_34,
+ .get_ro = mmc_get_ro,
+};
+
+static struct spi_board_info spi_boardinfo = {
+ .bus_num = 0x7000,
+ .chip_select = 0,
+ .max_speed_hz = 5000,
+ .modalias = mmc_spi,
+ .platform_data = mmc_pdata,
+};
+
+static int __init spi_init(void)
+{
+ if (!pixis_sdcsr)
+ return -ENODEV;
+ if (!(in_8(pixis_bdcfg0) PX_BRDCFG0_SERSEL)) {
+ pr_info(mpc8610_hpcd: SPI (and thus SD/MMC slot) was
+ disabled by the firmware.\n);
+ return -ENODEV;
+ }
+
+ /*
+* SD cards reacting quite badly on the PIXIS' SD CS line. That is,
+* I'm getting errors from the SD cards running at 25MHz. So here
+* is the trick: we assert the CS line and do not touch it afterwards.
+* This works for all cards I have, this also should be safe from the
+* SPI stand point, since SPI isn't shared.
+*/
+ clrbits8(pixis_sdcsr, PX_SDCSR_SD_nSEL);
+ return fsl_spi_init(spi_boardinfo, 1, NULL, NULL);
+}
+machine_device_initcall(mpc86xx_hpcd, spi_init);
static struct of_device_id __initdata mpc8610_ids[] = {
{ .compatible = fsl,mpc8610-immr, },
@@ -139,10 +195,6 @@ void mpc8610hpcd_set_gamma_table(int monitor_port, char
*gamma_table_base)
}
}
-#define PX_BRDCFG0_DVISEL (1 3)
-#define PX_BRDCFG0_DLINK (1 4)
-#define PX_BRDCFG0_DIU_MASK(PX_BRDCFG0_DVISEL | PX_BRDCFG0_DLINK)
-
void mpc8610hpcd_set_monitor_port(int monitor_port)
{
static const u8 bdcfg[] = {
@@ -286,6 +338,7 @@ static void __init mpc86xx_hpcd_setup_arch(void)
}
pixis_bdcfg0 = pixis + 8;
pixis_arch = pixis + 1;
+ pixis_sdcsr = pixis + 10;
} else
printk(KERN_ERR Err:
can't find device node 'fsl,fpga-pixis'\n);
--
1.5.5.1
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Re: [spi-devel-general] [PATCH 3/4] spi: Add OF binding support for SPI busses
On Fri, May 16, 2008 at 01:36:13PM -0600, Grant Likely wrote:
From: Grant Likely [EMAIL PROTECTED]
This patch adds support for populating an SPI bus based on data in the
OF device tree. This is useful for powerpc platforms which use the
device tree instead of discrete code for describing platform layout.
Signed-off-by: Grant Likely [EMAIL PROTECTED]
---
[...]
+void spi_of_register_devices(struct spi_master *master, struct device_node
*np)
+{
+ struct spi_device *spi;
+ struct device_node *nc;
+ const u32 *prop;
+ const char *sprop;
+ int rc;
+ int len;
+
+ for_each_child_of_node(np, nc) {
+ /* Alloc an spi_device */
+ spi = spi_alloc_device(master);
+ if (!spi) {
+ dev_err(master-dev, spi_device alloc error for %s\n,
+ np-full_name);
+ continue;
+ }
+
+ /* Device address */
+ prop = of_get_property(nc, reg, len);
+ if (!prop || len sizeof(*prop)) {
+ dev_err(master-dev, %s has no 'reg' property\n,
+ np-full_name);
+ continue;
+ }
+ spi-chip_select = *prop;
+
+ /* Mode (clock phase/polarity/etc. */
+ if (of_find_property(nc, spi,cpha, NULL))
+ spi-mode |= SPI_CPHA;
+ if (of_find_property(nc, spi,cpol, NULL))
+ spi-mode |= SPI_CPOL;
+
+ /* Device speed */
+ prop = of_get_property(nc, max-speed, len);
+ if (prop len = sizeof(*prop))
+ spi-max_speed_hz = *prop;
+ else
+ spi-max_speed_hz = 10;
+
+ /* IRQ */
+ spi-irq = irq_of_parse_and_map(nc, 0);
+
+ /* Select device driver */
+ sprop = of_get_property(nc, linux,modalias, len);
+ if (sprop len 0)
+ strncpy(spi-modalias, sprop, KOBJ_NAME_LEN);
+ else
+ strncpy(spi-modalias, spidev, KOBJ_NAME_LEN);
+
+ /* Store a pointer to the node in the device structure */
+ of_node_get(nc);
+ spi-dev.archdata.of_node = nc;
+
+ /* Register the new device */
+ rc = spi_register_device(spi);
+ if (rc) {
+ dev_err(master-dev, spi_device register error %s\n,
+ np-full_name);
+ spi_device_release(spi);
+ }
No way to pass platform data... can you suggest any idea to use
this for things like
[POWERPC] 86xx: mpc8610_hpcd: add support for SPI and MMC-over-SPI
I've sent just recently...?
Maybe this code could do something like
spi-dev.platform_data = nc-data;
and board code would fill nc-data at early stages? This needs to be a
convention, not just random use though.. Maybe we can expand the struct
device_node to explicitly include .platform_data for such cases?
Thanks,
--
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Re: [spi-devel-general] [PATCH 3/4] spi: Add OF binding support for SPI busses
On Fri, May 16, 2008 at 04:14:23PM -0600, Grant Likely wrote:
On Fri, May 16, 2008 at 4:03 PM, Anton Vorontsov [EMAIL PROTECTED] wrote:
On Fri, May 16, 2008 at 01:36:13PM -0600, Grant Likely wrote:
+ /* Store a pointer to the node in the device structure */
+ of_node_get(nc);
+ spi-dev.archdata.of_node = nc;
+
+ /* Register the new device */
+ rc = spi_register_device(spi);
+ if (rc) {
+ dev_err(master-dev, spi_device register error
%s\n,
+ np-full_name);
+ spi_device_release(spi);
+ }
No way to pass platform data... can you suggest any idea to use
this for things like
[POWERPC] 86xx: mpc8610_hpcd: add support for SPI and MMC-over-SPI
I've sent just recently...?
That's right. platform_data being a very driver specific thing there
is no way to generically extract a pdata structure from the device
tree. Instead, I'm storing the device node in archdata.of_node (line
immediately above spi_register_device) so that drivers can read the
device node themselves to populate a platform_device structure.
(Protected by CONFIG_OF of course).
Maybe this code could do something like
spi-dev.platform_data = nc-data;
and board code would fill nc-data at early stages? This needs to be a
convention, not just random use though.. Maybe we can expand the struct
device_node to explicitly include .platform_data for such cases?
Hmmm, as you say, this could end up being rather messy. However, by
passing the device node pointer, the driver could extract that data on
a per case basis. (ie. it would be decided on a per driver basis
where to get the platform data). I'm not sure; this bears more
thought...
Sometimes it's not worth powder and shot adding OF functionality to
the drivers, I2C and SPI are major examples. Another [not mmc_spi]
example is drivers/input/touchscreen/ads7846.c, which is SPI driver
and needs platform data. There is a board that needs this (touchscreen
controller on a MPC8360E-RDK).
Also there is no way to pass functions via device tree, we're
always end up doing board-specific hooks in the generic drivers...
Finally, let's call this platform_data and be done with it. Then we
can use this for things like drivers/video/fsl-diu-fb.c (see diu_ops,
which is global struct, filled by
arch/powerpc/platforms/86xx/mpc8610_hpcd.c).
--
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[spi-devel-general] [PATCH 7/7] [POWERPC][SPI] spi_mpc83xx: allow use on any processors with QUICC Engine
Currently, all QE SPI controllers are almost the same comparing to MPC83xx's, thus let's use that driver for them. Tested to work on MPC85xx in loopback mode. Signed-off-by: Anton Vorontsov [EMAIL PROTECTED] --- This is respin. Hope this time it will get ack from the PowerPC team. drivers/spi/Kconfig | 13 +++-- 1 files changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index b915711..a77ede5 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -124,16 +124,17 @@ config SPI_MPC52xx_PSC Controller in master SPI mode. config SPI_MPC83xx - tristate Freescale MPC83xx SPI controller - depends on SPI_MASTER PPC_83xx EXPERIMENTAL + tristate Freescale MPC83xx/QUICC Engine SPI controller + depends on SPI_MASTER (PPC_83xx || QUICC_ENGINE) EXPERIMENTAL select SPI_BITBANG help - This enables using the Freescale MPC83xx SPI controller in master - mode. + This enables using the Freescale MPC83xx and QUICC Engine SPI + controllers in master mode. Note, this driver uniquely supports the SPI controller on the MPC83xx - family of PowerPC processors. The MPC83xx uses a simple set of shift - registers for data (opposed to the CPM based descriptor model). + family of PowerPC processors, plus processors with QUICC Engine + technology. This driver uses a simple set of shift registers for data + (opposed to the CPM based descriptor model). config SPI_OMAP_UWIRE tristate OMAP1 MicroWire -- 1.5.0.6 - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now http://get.splunk.com/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [PATCH v2 7/7] [POWERPC][SPI] spi_mpc83xx: allow use on MPC85xx
On Tue, Sep 25, 2007 at 04:48:00PM +0200, Peter Korsgaard wrote: Anton == Anton Vorontsov [EMAIL PROTECTED] writes: Hi, Anton config SPI_MPC83xx Anton tristate Freescale MPC83xx SPI controller Anton - depends on SPI_MASTER PPC_83xx EXPERIMENTAL Anton + depends on SPI_MASTER (PPC_83xx || PPC_85xx) EXPERIMENTAL Anton select SPI_BITBANG Anton help Anton This enables using the Freescale MPC83xx SPI controller in master Please also update the help text. Oops. Thanks, fixed. - - - - From: Anton Vorontsov [EMAIL PROTECTED] Subject: [PATCH v2] [POWERPC][SPI] spi_mpc83xx: allow use on MPC85xx MPC85xx's QE SPI controller is almost the same comparing to MPC83xx. Thus lets use that driver. Tested to work in loopback mode. Signed-off-by: Anton Vorontsov [EMAIL PROTECTED] --- drivers/spi/Kconfig | 13 +++-- 1 files changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index b915711..7a7a42c 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -124,16 +124,17 @@ config SPI_MPC52xx_PSC Controller in master SPI mode. config SPI_MPC83xx - tristate Freescale MPC83xx SPI controller - depends on SPI_MASTER PPC_83xx EXPERIMENTAL + tristate Freescale MPC83xx/MPC85xx SPI controller + depends on SPI_MASTER (PPC_83xx || PPC_85xx) EXPERIMENTAL select SPI_BITBANG help - This enables using the Freescale MPC83xx SPI controller in master - mode. + This enables using the Freescale MPC83xx/MPC85xx SPI controller in + master mode. Note, this driver uniquely supports the SPI controller on the MPC83xx - family of PowerPC processors. The MPC83xx uses a simple set of shift - registers for data (opposed to the CPM based descriptor model). + and MPC85xx family of PowerPC processors. The MPC83xx/MPC85xx uses a + simple set of shift registers for data (opposed to the CPM based + descriptor model). config SPI_OMAP_UWIRE tristate OMAP1 MicroWire -- 1.5.0.6 - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [PATCH 7/7] [POWERPC][SPI] spi_mpc83xx: allow use on MPC85xx
On Tue, Sep 25, 2007 at 10:04:41AM -0500, Kumar Gala wrote: On Sep 25, 2007, at 9:35 AM, Anton Vorontsov wrote: MPC85xx's QE SPI controller is almost the same comparing to MPC83xx. Thus lets use that driver. Tested to work in loopback mode. Signed-off-by: Anton Vorontsov [EMAIL PROTECTED] --- drivers/spi/Kconfig |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index b915711..14f0d0d 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -125,7 +125,7 @@ config SPI_MPC52xx_PSC config SPI_MPC83xx tristate Freescale MPC83xx SPI controller -depends on SPI_MASTER PPC_83xx EXPERIMENTAL +depends on SPI_MASTER (PPC_83xx || PPC_85xx) EXPERIMENTAL select SPI_BITBANG help This enables using the Freescale MPC83xx SPI controller in master Should that really be just PPC_83xx || QUICC_ENGINE? Well, I thought about that. By now I'm unsure if every QE implementation will be compatible with further ones. So far I've tested this driver on MPC8323 and MPC8568. If we'll see more and more compatible QE SPI controllers, of course we may just do || QUICC_ENGINE. PPC_83xx || PPC_85xx PPC_83xx || QUICC_ENGINE Today first option saves us four bytes. ;-) - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [patch 0/4 2.6.23-rc2 + mm2-git-mmc] latest MMC-over-SPI support
On Wed, Aug 08, 2007 at 09:06:18AM -0700, David Brownell wrote: Same deal as before ... refreshed against the latest git-mmc.patch, four patches: - headers - block - core - mmc_spi host Differences from the very last patches sent are primarily that this one includes the lock/unlock changes again (since it's against git-mmc not against kernel.org), and code for the SDIO stuff is there (ditto). But also, a few more of Pierre's comments have kicked in. I'm hoping this version gets merged into git-mmc. :) Works great here. Thanks! -- Anton Vorontsov email: [EMAIL PROTECTED] backup email: [EMAIL PROTECTED] irc://irc.freenode.net/bd2 - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now http://get.splunk.com/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [patch 2.6.22-git5 0/4] MMC-over-SPI
On Thu, Jul 19, 2007 at 01:28:17PM -0700, David Brownell wrote: On Thursday 19 July 2007, Anton Vorontsov wrote: Thanks. In that case, I'm thinking there *IS* a bug of some kind in the controller driver Anton is using, else mode 3 would work for him like it (evidently) works for everyone else. I've checked with MPC8323E reference manual, and according to it spi_mpc83xx is doing right thing. I notice that driver disregards the cs_change instructions in the messages ... I could imagine how that could make a big difference. If that hardware were doing the right thing, then it would work reliably! Since it's not reliable, it's doing something wrong. You seem to think it's not a hardware issue; that may be true. Recall that the first dozen or so commands worked just fine. The issue was that some byte that should have been all-ones or 0xfe reported instead an 0xf8. That's not the kind of error that can be explained by clock skew; it covers at least two bits. Yup, I've either noticed that 0xf8 and 0xfe differs by only two bits (and by three if comparing to 0xff). But I can't really explain it yet. I'll see about making time to see if mode 0 works for me too; but even if it does, I'd prefer to leave the driver the way it is now instead of changing it to cover up for that mpc83xx bug ... plus, I just like CPHA=1 modes better because they don't need to start with that strange half-clock. ;) Well. As Pierre Ossman told, it should work at any mode. Well, either mode 0 or mode 3. And since it doesn't work in both modes, clearly something in your test system is buggy. That also proves that it's not mpc83xx's bug (because even if it would be a bug, and spi_mpc83xx having inversed values, it's still should work). No way could it prove that!! How could it ever be possible that your system not work in mode 3, and yet that not be a bug in your test system??? The only thing proven is that the mmc_spi code is basically correct; otherwise neither clock mode could cause the right data transfers. (And otherewise other folk wouldn't have seen it work...) The problem is in a lower level ... maybe the SPI controller driver, or the silicon, or the board wiring. So, it's likely depends on spi controller, maybe some timing issues or signal shapes, which distracts SD/MMC... Not sure. What does your oscilloscope show is going on when this error triggers? Well, it's not handy to catch particular bit using my oscilloscope. It's unable to scroll in time. But as failing bits are in the last spi message, maybe I could do something. Right now I'd most suspect the lack of cs_change support in that controller driver. I see. Thanks for the pointer. But then, may I ask for alt_mode (bool) platform data variable? Well, as already said: (a) we know mode 3 is required to work, (b) we know that on your test system it doesn't, so accordingly (c) we know there's a bug in your test system. The only reason to add such a flag would be to paper over that bug. The idea with bugs is to *FIX* them, not paper them over so they'll never get fixed. Especially if you've got a lab setup with even basic hardware debug tools, like your oscilloscope, which make it so easy to verify that the right signals are going down the wires. Yeah, you're right. And your whole reply makes a lot of sense, much thanks for explanations and ideas. -- Anton Vorontsov email: [EMAIL PROTECTED] backup email: [EMAIL PROTECTED] irc://irc.freenode.net/bd2 - This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now http://get.splunk.com/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [patch 2.6.22-git5 0/4] MMC-over-SPI
On Wed, Jul 18, 2007 at 10:27:17AM -0700, David Brownell wrote: On Wednesday 18 July 2007, Pierre Ossman wrote: On Tue, 17 Jul 2007 09:11:15 -0700 David Brownell [EMAIL PROTECTED] wrote: Ideally, someone with access to full MMC and SD specs can see what they say about the SPI clocking. The simplified SD specs omit the timing diagrams. I can probably help out there. According to the specs, both mode 0 and mode 3 are valid. The idle polarity simply isn't specified, only that data shall be sampled on rising edge. Hence mode 0 or 3. Thanks. In that case, I'm thinking there *IS* a bug of some kind in the controller driver Anton is using, else mode 3 would work for him like it (evidently) works for everyone else. I've checked with MPC8323E reference manual, and according to it spi_mpc83xx is doing right thing. I'll see about making time to see if mode 0 works for me too; but even if it does, I'd prefer to leave the driver the way it is now instead of changing it to cover up for that mpc83xx bug ... plus, I just like CPHA=1 modes better because they don't need to start with that strange half-clock. ;) Well. As Pierre Ossman told, it should work at any mode. That also proves that it's not mpc83xx's bug (because even if it would be a bug, and spi_mpc83xx having inversed values, it's still should work). So, it's likely depends on spi controller, maybe some timing issues or signal shapes, which distracts SD/MMC... Not sure. But then, may I ask for alt_mode (bool) platform data variable? Thanks! -- Anton Vorontsov email: [EMAIL PROTECTED] backup email: [EMAIL PROTECTED] irc://irc.freenode.net/bd2 - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft Visual Studio 2005. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [patch 2.6.22-git5 0/4] MMC-over-SPI
On Tue, Jul 17, 2007 at 09:11:15AM -0700, David Brownell wrote: On Tuesday 17 July 2007, Anton Vorontsov wrote: Uhh.. can you believe? mmc_spi spi1.0: ASSUMING unshared SPI bus! mmc_spi spi1.0: SD/MMC host mmc0, no DMA, no WP, no poweroff mmcblk0: mmc0: SD01G 1006080KiB mmcblk0: p1 [EMAIL PROTECTED]:~# mount /dev/mmcblk0p1 /mnt/ EXT2-fs warning: mounting unchecked fs, running e2fsck is recommended [EMAIL PROTECTED]:~# ls /mnt/ bin etc include lib libexec lost+found man sbin share var [EMAIL PROTECTED]:~# Good! Yup, I've turned debugging off, it's plainly working. And presumably it works with debugging enabled, too ... Yes, sure. I've just forgot to insert because; I've turned debugging off, because it's plainly working now. Sorry for the confusion. Debugging isn't culprit. ;-) The only change I've made is: --- a/drivers/mmc/host/mmc_spi.c +++ b/drivers/mmc/host/mmc_spi.c @@ -1184,7 +1184,7 @@ static int mmc_spi_probe(struct spi_device *spi) * Docs are very explicit that sampling is on the rising edge, so * SPI_MODE_0 and SPI_MODE_3 having different CPOL may not matter. */ - spi-mode |= SPI_CPOL | SPI_CPHA; + spi-mode = 0; spi-bits_per_word = 8; status = spi_setup(spi); Curious. I think it was Jan Nikitenko who reported mode 0 not working for SD, while mode 3 did work. All my recent testing used mode 3, but I started with mode 0... Ideally, someone with access to full MMC and SD specs can see what they say about the SPI clocking. The simplified SD specs omit the timing diagrams. Am I understanding correctly that SPI_CPOL is: ~~~| |~~| | | | | | 0|_| |_| (does not work for me) While !SPI_CPOL is: |~| |~| | | | | 0 ___| |__| | (works great for me) Is that correct? Not vice versa? That's for the clock, I take it ... yes. There's a pretty good timing diagram at Wikipedia, which should make the two bits (CPOL, CPHA) clear: http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus CPOL=0 means the clock starts at idle=low (vs high if CPOL=1). CPHA=0 means capture on leading clock edge (vs trailing if CPHA=1). Ok, just as I thought. That means that mpc83xx_spi.c is correct in that regard. At least that is what I'm observing on oscilloscope. Maybe it's something still messed in mpc83xx_spi.c (I've already fixed a lot), Could you post your changes to that driver? Sure, you'll see them shortly. Just need a bit of time. or maybe something else. So, if mmc_spi modes are correct, then mpc83xx_spi having inversed values, and should be fixed. With only SPI_CPHA that thing does not work also. Later today two patches to mpc83xx_spi should merge into the kernel.org GIT tree but they don't look like they'd relate to this SPI mode issue. (And the CRC7 patch should also be merging...) It's not inconceivable that the SPI controller driver is a bit confused with respect to interpreting the mode bits. We've seen that problem before. Today I've tested it on bunch of cards, MMC Transcend 64MB, MMC SanDisk 16MB, SD Kingston 128MB and 1GB. All of them work. Presumably you tested all of them with mode 0 ... which of them work with mode 3? None. Does it work better in mode 3 if you use a lower clock speed ceiling in the spi board info for that card slot? Nope. Thus, despite minor issues, mmc_spi works great, much thanks! Glad to hear it! Now, to sort out why mode 3 fails for you ... - Dave Much thanks, -- Anton Vorontsov email: [EMAIL PROTECTED] backup email: [EMAIL PROTECTED] irc://irc.freenode.net/bd2 - This SF.net email is sponsored by DB2 Express Download DB2 Express C - the FREE version of DB2 express and take control of your XML. No limits. Just data. Click to get it now. http://sourceforge.net/powerbar/db2/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
