Re: [PATCH 7/9] I2C: MV64XXX: Add Device Tree support
On 10/06/12 11:31, Andrew Lunn wrote: Extends the driver to get properties from device tree. Also extend the kirkwood DT support to supply the needed properties. Signed-off-by: Andrew Lunnand...@lunn.ch --- Documentation/devicetree/bindings/i2c/mrvl-i2c.txt | 35 +- arch/arm/boot/dts/kirkwood.dtsi| 13 +++ arch/arm/mach-kirkwood/board-dt.c |2 ++ drivers/i2c/busses/i2c-mv64xxx.c | 38 +--- 4 files changed, 82 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt b/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt index b891ee2..89ef899 100644 --- a/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt +++ b/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt @@ -1,4 +1,4 @@ -* I2C +* Marvell MMP I2C controller Required properties : @@ -32,3 +32,36 @@ Examples: interrupts =58; }; +* Marvell MV64XXX I2C controller + +Required properties : + + - reg : Offset and length of the register set for the device + - compatible : should be marvell,mv64xxx-i2c + - interrupts : the interrupt number + - frequency-m : m factor in baud rate calculation + +Recommended properties : + + - frequency-n : n factor in baud rate calculation + - timeout-ms : How long to wait for a transaction to complete + +Baud Rate: + +The baud rate is calculated thus: + +Fscl = Ftclk + -- +(frequency-n + 1) + 10 *(frequency-m + 1) * 2 + +Examples: I'd really rather see this calculated at run-time, given some systems can quite easily change their clocks. -- Ben Dooks http://www.codethink.co.uk/ Senior Engineer Codethink - Providing Genius -- Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [PATCH 3/5] SPI: Add helper macro for spi_driver boilerplate
On Wed, Nov 16, 2011 at 10:12:54AM -0700, Grant Likely wrote: On Wed, Nov 16, 2011 at 2:13 AM, Lars-Peter Clausen l...@metafoo.de wrote: This patch introduces the module_spi_driver macro which is a convenience macro for SPI driver modules similar to module_platform_driver. It is intended to be used by drivers which init/exit section does nothing but register/unregister the SPI driver. By using this macro it is possible to eliminate a few lines of boilerplate code per SPI driver. Signed-off-by: Lars-Peter Clausen l...@metafoo.de Acked-by: Grant Likely grant.lik...@secretlab.ca I'm begining to think we need to make some of these driver and device bits more generic... there seems to be so much similar but not quite the same code. -- Ben Dooks, b...@fluff.org, http://www.fluff.org/ben/ Large Hadron Colada: A large Pina Colada that makes the universe disappear. -- All the data continuously generated in your IT infrastructure contains a definitive record of customers, application performance, security threats, fraudulent activity, and more. Splunk takes this data and makes sense of it. IT sense. And common sense. http://p.sf.net/sfu/splunk-novd2d ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [PATCH 0/5] remove spi-s3c24xx-gpio driver
On Tue, Jun 28, 2011 at 02:49:12PM +0200, Peter Korsgaard wrote: The spi-s3c24xx-gpio driver is functionally equivalent to the spi-gpio driver (but precedes it). The driver has seen very little development since it got added back in 2006, and there's only 2 in-tree users of it. This patch series moves the remaining users to the spi-gpio driver and then finally removes the driver. Compile tested only as I don't have access to the hardware. I've not really got much in the way of access either, however the series looks sane to me. Acked-by: Ben Dooks ben-li...@fluff.org arch/arm/mach-s3c2410/include/mach/spi-gpio.h | 28 arch/arm/mach-s3c2410/mach-qt2410.c | 34 + arch/arm/mach-s3c2412/mach-jive.c | 41 ++ arch/arm/mach-s3c2440/mach-gta02.c|1 - drivers/spi/Kconfig | 10 -- drivers/spi/Makefile |1 - drivers/spi/spi-s3c24xx-gpio.c| 200 - 7 files changed, 22 insertions(+), 293 deletions(-) -- Bye, Peter Korsgaard -- Ben Dooks, b...@fluff.org, http://www.fluff.org/ben/ Large Hadron Colada: A large Pina Colada that makes the universe disappear. -- All of the data generated in your IT infrastructure is seriously valuable. Why? It contains a definitive record of application performance, security threats, fraudulent activity, and more. Splunk takes this data and makes sense of it. IT sense. And common sense. http://p.sf.net/sfu/splunk-d2d-c2 ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [PATCH] spi: tle620x: add missing device_remove_file()
On 11/05/11 13:39, Axel Lin wrote: This patch includes below fixes: 1. Add missing device_remove_file for dev_attr_status_show in tle62x0_remove. 2. Fix tle62x0_probe error handling: Currently, if the error happens when ptr 0, gpio_attrs[0] is not properly remove. Signed-off-by: Axel Linaxel@gmail.com Acked-by: Ben Dooks ben-li...@fluff.org --- drivers/spi/tle62x0.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/drivers/spi/tle62x0.c b/drivers/spi/tle62x0.c index a393895..32a4087 100644 --- a/drivers/spi/tle62x0.c +++ b/drivers/spi/tle62x0.c @@ -283,7 +283,7 @@ static int __devinit tle62x0_probe(struct spi_device *spi) return 0; err_gpios: - for (; ptr 0; ptr--) + while (--ptr= 0) device_remove_file(spi-dev, gpio_attrs[ptr]); device_remove_file(spi-dev,dev_attr_status_show); @@ -301,6 +301,7 @@ static int __devexit tle62x0_remove(struct spi_device *spi) for (ptr = 0; ptr st-nr_gpio; ptr++) device_remove_file(spi-dev, gpio_attrs[ptr]); + device_remove_file(spi-dev,dev_attr_status_show); kfree(st); return 0; } -- Achieve unprecedented app performance and reliability What every C/C++ and Fortran developer should know. Learn how Intel has extended the reach of its next-generation tools to help boost performance applications - inlcuding clusters. http://p.sf.net/sfu/intel-dev2devmay ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: mc13xxx core support for i2c
On 20/12/10 03:50, Marc Reilly wrote: These patches add i2c support for the mc13xxx-core driver. This v3 improves the v2 (http://lists.arm.linux.org.uk/lurker/message/20101215.214755.b6bae366.en.html) by splitting the driver up into core, spi and i2c files so that it can support one subsystem in the absence of the other. As noted by others, this needs to be re-worked so that the driver can always been built and used across bisections. A suggested approach would be to move items out into the header file first, and then maybe split the spi driver out of the core, and then add the I2c driver. It may also make the patch set easier to follow. -- Learn how Oracle Real Application Clusters (RAC) One Node allows customers to consolidate database storage, standardize their database environment, and, should the need arise, upgrade to a full multi-node Oracle RAC database without downtime or disruption http://p.sf.net/sfu/oracle-sfdevnl ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] (no subject)
Ben Gamari wrote: Bcc: Subject: GPIO chip select support in omap2_mcspi driver Hey, Recently I have been looking to use a BeagleBoard to drive several serial ADCs and DACs in a data acquisition and analysis setup. Unfortunately, the BeagleBoard is severely limited by the number of SPI controllers it exposes on the expansion connector (McSPI3 with 2 CS lines and McSPI4 with one). This is insufficient for our application and thus I have been investigating adding support to the mcspi driver for using GPIO lines as chip select lines, as is done in the pxa2xx, bfin5xx, and s3c24xx drivers. To this end, I have a few questions about how this support was implemented. First, it seems that the s3c24xx driver is built on the spi_bitbang driver, despite interfacing with a dedicated hardware SPI controller. What is the reason for this? Was this done specifically for the purpose of incorporating support for GPIO CS pins? The spi_bitbang driver also has a really useful spi queue and workqueue built into it, which is what the s3c24xx spi driver actually bothers to use. It seems like the rough idea is to add a cs_gpio field to the device struct (omap2_mcspi) and add the appropriate code to the omap2_mcspi_force_cs() to bring cs_gpio high or low if it is valid. The potential problem I can see with this is that omap2_mcspi_set_enable() is called to enable the channel before the force_cs() is called (in omap2_mcspi_work()). If I'm interpreting the documentation correctly, the enable bit starts the clocks, meaning that the chip will begin clocking out data before CS is brought high. I must be missing something here, no? For reference, I included a short list of relevant commits below, largely for my own benefit. I would greatly appreciate any feedback you might have. Thanks, - Ben pxa2xx_spi: a7bb3909b3293d503211d7f6af8ed62c1644b686 bfin_spi: 42c78b2bf51bafb4cfa98dfecc28dd9b8bcd04b0 -- Throughout its 18-year history, RSA Conference consistently attracts the world's best and brightest in the field, creating opportunities for Conference attendees to learn about information security's most important issues through interactions with peers, luminaries and emerging and established companies. http://p.sf.net/sfu/rsaconf-dev2dev ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [patch 1/1] spi_s3c24xx: Add FIQ pseudo-DMA support
Add pseudo-DMA by FIQ to the S3C24XX SPI driver. This allows the driver to get DMA-like performance where there are either no free DMA channels or when doing transfers that required both TX and RX data paths. Since this patch requires the addition of an assembly file to hold the FIQ code, we rename the module (instead of adding a rename of the .c file to this patch). We expect most users are loading this via udev and thus there should be no change to the userland configuration. Signed-off-by: Ben Dooks b...@simtec.co.uk Signed-off-by: Simtec Linux Team li...@simtec.co.uk --- Index: b/drivers/spi/Makefile === --- a/drivers/spi/Makefile 2009-11-18 15:53:44.0 + +++ b/drivers/spi/Makefile 2009-11-18 15:55:17.0 + @@ -28,11 +28,17 @@ obj-$(CONFIG_SPI_MPC52xx_PSC) += mpc52x obj-$(CONFIG_SPI_MPC8xxx) += spi_mpc8xxx.o obj-$(CONFIG_SPI_PPC4xx) += spi_ppc4xx.o obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o -obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx.o +obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx_hw.o obj-$(CONFIG_SPI_TXX9) += spi_txx9.o obj-$(CONFIG_SPI_XILINX) += xilinx_spi.o obj-$(CONFIG_SPI_SH_SCI) += spi_sh_sci.o obj-$(CONFIG_SPI_STMP3XXX) += spi_stmp.o + +# special build for s3c24xx spi driver with fiq support +spi_s3c24xx_hw-y := spi_s3c24xx.o +spi_s3c24xx_hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi_s3c24xx_fiq.o + + # ... add above this line ... # SPI protocol drivers (device/link on bus) Index: b/drivers/spi/spi_s3c24xx_fiq.S === --- /dev/null 1970-01-01 00:00:00.0 + +++ b/drivers/spi/spi_s3c24xx_fiq.S 2009-11-18 15:55:32.0 + @@ -0,0 +1,116 @@ +/* linux/drivers/spi/spi_s3c24xx_fiq.S + * + * Copyright 2009 Simtec Electronics + * Ben Dooks b...@simtec.co.uk + * + * S3C24XX SPI - FIQ pseudo-DMA transfer code + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include linux/linkage.h +#include asm/assembler.h + +#include mach/map.h +#include mach/regs-irq.h +#include plat/regs-spi.h + +#include spi_s3c24xx_fiq.h + + .text + + @ entry to these routines is as follows, with the register names + @ defined in fiq.h so that they can be shared with the C files which + @ setup the calling registers. + @ + @ fiq_rirq The base of the IRQ registers to find S3C2410_SRCPND + @ fiq_rtmp Temporary register to hold tx/rx data + @ fiq_rspi The base of the SPI register block + @ fiq_rtx The tx buffer pointer + @ fiq_rrx The rx buffer pointer + @ fiq_rcountThe number of bytes to move + + @ each entry starts with a word entry of how long it is + @ and an offset to the irq acknowledgment word + +ENTRY(s3c24xx_spi_fiq_rx) +s3c24xx_spi_fix_rx: + .word fiq_rx_end - fiq_rx_start + .word fiq_rx_irq_ack - fiq_rx_start +fiq_rx_start: + ldr fiq_rtmp, fiq_rx_irq_ack + str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ] + + ldrbfiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ] + strbfiq_rtmp, [ fiq_rrx ], #1 + + mov fiq_rtmp, #0xff + strbfiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] + + subsfiq_rcount, fiq_rcount, #1 + subnes pc, lr, #4 @@ return, still have work to do + + @@ set IRQ controller so that next op will trigger IRQ + mov fiq_rtmp, #0 + str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ] + subspc, lr, #4 + +fiq_rx_irq_ack: + .word 0 +fiq_rx_end: + +ENTRY(s3c24xx_spi_fiq_txrx) +s3c24xx_spi_fiq_txrx: + .word fiq_txrx_end - fiq_txrx_start + .word fiq_txrx_irq_ack - fiq_txrx_start +fiq_txrx_start: + + ldrbfiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ] + strbfiq_rtmp, [ fiq_rrx ], #1 + + ldr fiq_rtmp, fiq_txrx_irq_ack + str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ] + + ldrbfiq_rtmp, [ fiq_rtx ], #1 + strbfiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] + + subsfiq_rcount, fiq_rcount, #1 + subnes pc, lr, #4 @@ return, still have work to do + + mov fiq_rtmp, #0 + str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ] + subspc, lr, #4 + +fiq_txrx_irq_ack: + .word 0 + +fiq_txrx_end: + +ENTRY(s3c24xx_spi_fiq_tx) +s3c24xx_spi_fix_tx: + .word fiq_tx_end - fiq_tx_start + .word fiq_tx_irq_ack - fiq_tx_start +fiq_tx_start: + ldrbfiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ] + + ldr fiq_rtmp
[spi-devel-general] [patch 5/7] spi_s3c24xx: use resource_size() to get resource size
Change the use of (res-end - res-start) to use resource_size() to
get the size of the resource.
Signed-off-by: Ben Dooks b...@simtec.co.uk
---
drivers/spi/spi_s3c24xx.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Index: b/drivers/spi/spi_s3c24xx.c
===
--- a/drivers/spi/spi_s3c24xx.c 2009-08-08 09:53:33.0 +0100
+++ b/drivers/spi/spi_s3c24xx.c 2009-08-08 09:54:03.0 +0100
@@ -299,7 +299,7 @@ static int __init s3c24xx_spi_probe(stru
goto err_no_iores;
}
- hw-ioarea = request_mem_region(res-start, (res-end - res-start)+1,
+ hw-ioarea = request_mem_region(res-start, resource_size(res),
pdev-name);
if (hw-ioarea == NULL) {
@@ -308,7 +308,7 @@ static int __init s3c24xx_spi_probe(stru
goto err_no_iores;
}
- hw-regs = ioremap(res-start, (res-end - res-start)+1);
+ hw-regs = ioremap(res-start, resource_size(res));
if (hw-regs == NULL) {
dev_err(pdev-dev, Cannot map IO\n);
err = -ENXIO;
--
--
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[spi-devel-general] [patch 0/7] SPI fixes for documentation and spi_s3c24xx driver
Fix spello in the SPI documentation and fix the behaviour and bugs in the spi_s3c24xx driver. -- -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [patch 2/7] spi_s3c24xx: fix clock rate calculation
Currently the clock rate calculation may round as pleased, which means that it is possible that we will round down and end up with a faster clock rate than intended. Change the calculation to use DIV_ROUND_UP() to ensure that we end up with a clock rate either the same as or lower than the user requested one. Signed-off-by: Ben Dooks b...@simtec.co.uk --- drivers/spi/spi_s3c24xx.c | 17 +++-- 1 file changed, 7 insertions(+), 10 deletions(-) Index: b/drivers/spi/spi_s3c24xx.c === --- a/drivers/spi/spi_s3c24xx.c 2009-07-14 13:56:07.0 +0100 +++ b/drivers/spi/spi_s3c24xx.c 2009-07-14 14:08:45.0 +0100 @@ -111,6 +111,7 @@ static int s3c24xx_spi_setupxfer(struct unsigned int bpw; unsigned int hz; unsigned int div; + unsigned long clk; bpw = t ? t-bits_per_word : spi-bits_per_word; hz = t ? t-speed_hz : spi-max_speed_hz; @@ -120,20 +121,16 @@ static int s3c24xx_spi_setupxfer(struct return -EINVAL; } - div = clk_get_rate(hw-clk) / hz; - - /* is clk = pclk / (2 * (pre+1)), or is it -*clk = (pclk * 2) / ( pre + 1) */ - - div /= 2; - - if (div 0) - div -= 1; + clk = clk_get_rate(hw-clk); + div = DIV_ROUND_UP(clk, hz * 2) - 1; if (div 255) div = 255; - dev_dbg(spi-dev, setting pre-scaler to %d (hz %d)\n, div, hz); + dev_dbg(spi-dev, setting pre-scaler to %d (wanted %d, got %ld)\n, + div, hz, clk / (2 * (div + 1))); + + writeb(div, hw-regs + S3C2410_SPPRE); spin_lock(hw-bitbang.lock); -- -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [patch 1/7] spi: fix spelling of automatically in documentation
Fix spelling of automatically in Documentation/spi/spi-summary. Signed-off-by: Ben Dooks b...@simtec.co.uk --- Documentation/spi/spi-summary |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Index: b/Documentation/spi/spi-summary === --- a/Documentation/spi/spi-summary 2009-07-09 15:07:37.0 +0100 +++ b/Documentation/spi/spi-summary 2009-07-09 15:09:41.0 +0100 @@ -350,7 +350,7 @@ SPI protocol drivers somewhat resemble p .resume = CHIP_resume, }; -The driver core will autmatically attempt to bind this driver to any SPI +The driver core will automatically attempt to bind this driver to any SPI device whose board_info gave a modalias of CHIP. Your probe() code might look like this unless you're creating a device which is managing a bus (appearing under /sys/class/spi_master). -- -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [patch 3/7] spi_s3c24xx; Fix transfer setup code
Since the changes to the bitbang driver, there is the possibility we
will be called with either the speed_hz or bpw values zero. We take
these to mean that the default values (8 bits per word, or maximum
bus speed).
Signed-off-by: Ben Dooks b...@simtec.co.uk
---
Index: b/drivers/spi/spi_s3c24xx.c
===
--- a/drivers/spi/spi_s3c24xx.c 2009-07-27 18:55:16.0 +0100
+++ b/drivers/spi/spi_s3c24xx.c 2009-07-27 18:56:08.0 +0100
@@ -116,6 +116,12 @@ static int s3c24xx_spi_setupxfer(struct
bpw = t ? t-bits_per_word : spi-bits_per_word;
hz = t ? t-speed_hz : spi-max_speed_hz;
+ if (!bpw)
+ bpw = 8;
+
+ if (!hz)
+ hz = spi-max_speed_hz;
+
if (bpw != 8) {
dev_err(spi-dev, invalid bits-per-word (%d)\n, bpw);
return -EINVAL;
--
--
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[spi-devel-general] [patch 7/7] spi_s3c24xx: cache device setup data
With the update to the spi_bitbang driver, the transfer setup code is
being called more often, and thus is often re-doing calculations that
have been done before. The SPI layer allows our driver to add its
own data to each device so add a result cache to each device.
This should also remove the problem where we where directly setting up
registers in the setup call which meant we might overwrite the state of
an extant transfer.,
Signed-off-by: Ben Dooks b...@simtec.co.uk
---
drivers/spi/spi_s3c24xx.c | 126 --
1 file changed, 89 insertions(+), 37 deletions(-)
Index: b/drivers/spi/spi_s3c24xx.c
===
--- a/drivers/spi/spi_s3c24xx.c 2009-07-28 15:20:22.0 +0100
+++ b/drivers/spi/spi_s3c24xx.c 2009-07-28 15:20:28.0 +0100
@@ -28,6 +28,20 @@
#include plat/regs-spi.h
#include mach/spi.h
+/**
+ * s3c24xx_spi_devstate - per device data
+ * @hz: Last frequency calculated for @sppre field.
+ * @mode: Last mode setting for the @spcon field.
+ * @spcon: Value to write to the SPCON register.
+ * @sppre: Value to write to the SPPRE register.
+ */
+struct s3c24xx_spi_devstate {
+ unsigned inthz;
+ unsigned intmode;
+ u8 spcon;
+ u8 sppre;
+};
+
struct s3c24xx_spi {
/* bitbang has to be first */
struct spi_bitbang bitbang;
@@ -68,43 +82,31 @@ static void s3c24xx_spi_gpiocs(struct s3
static void s3c24xx_spi_chipsel(struct spi_device *spi, int value)
{
+ struct s3c24xx_spi_devstate *cs = spi-controller_state;
struct s3c24xx_spi *hw = to_hw(spi);
unsigned int cspol = spi-mode SPI_CS_HIGH ? 1 : 0;
- unsigned int spcon;
+
+ /* change the chipselect state and the state of the spi engine clock */
switch (value) {
case BITBANG_CS_INACTIVE:
hw-set_cs(hw-pdata, spi-chip_select, cspol^1);
+ writeb(cs-spcon, hw-regs + S3C2410_SPCON);
break;
case BITBANG_CS_ACTIVE:
- spcon = readb(hw-regs + S3C2410_SPCON);
-
- if (spi-mode SPI_CPHA)
- spcon |= S3C2410_SPCON_CPHA_FMTB;
- else
- spcon = ~S3C2410_SPCON_CPHA_FMTB;
-
- if (spi-mode SPI_CPOL)
- spcon |= S3C2410_SPCON_CPOL_HIGH;
- else
- spcon = ~S3C2410_SPCON_CPOL_HIGH;
-
- spcon |= S3C2410_SPCON_ENSCK;
-
- /* write new configration */
-
- writeb(spcon, hw-regs + S3C2410_SPCON);
+ writeb(cs-spcon | S3C2410_SPCON_ENSCK,
+ hw-regs + S3C2410_SPCON);
hw-set_cs(hw-pdata, spi-chip_select, cspol);
-
break;
}
}
-static int s3c24xx_spi_setupxfer(struct spi_device *spi,
-struct spi_transfer *t)
+static int s3c24xx_spi_update_state(struct spi_device *spi,
+ struct spi_transfer *t)
{
struct s3c24xx_spi *hw = to_hw(spi);
+ struct s3c24xx_spi_devstate *cs = spi-controller_state;
unsigned int bpw;
unsigned int hz;
unsigned int div;
@@ -124,41 +126,89 @@ static int s3c24xx_spi_setupxfer(struct
return -EINVAL;
}
- clk = clk_get_rate(hw-clk);
- div = DIV_ROUND_UP(clk, hz * 2) - 1;
+ if (spi-mode != cs-mode) {
+ u8 spcon = SPCON_DEFAULT;
- if (div 255)
- div = 255;
+ if (spi-mode SPI_CPHA)
+ spcon |= S3C2410_SPCON_CPHA_FMTB;
- dev_dbg(spi-dev, setting pre-scaler to %d (wanted %d, got %ld)\n,
- div, hz, clk / (2 * (div + 1)));
+ if (spi-mode SPI_CPOL)
+ spcon |= S3C2410_SPCON_CPOL_HIGH;
+ cs-mode = spi-mode;
+ cs-spcon = spcon;
+ }
- writeb(div, hw-regs + S3C2410_SPPRE);
+ if (cs-hz != hz) {
+ clk = clk_get_rate(hw-clk);
+ div = DIV_ROUND_UP(clk, hz * 2) - 1;
- spin_lock(hw-bitbang.lock);
- if (!hw-bitbang.busy) {
- hw-bitbang.chipselect(spi, BITBANG_CS_INACTIVE);
- /* need to ndelay for 0.5 clocktick ? */
+ if (div 255)
+ div = 255;
+
+ dev_dbg(spi-dev, pre-scaler=%d (wanted %d, got %ld)\n,
+ div, hz, clk / (2 * (div + 1)));
+
+ cs-hz = hz;
+ cs-sppre = div;
}
- spin_unlock(hw-bitbang.lock);
return 0;
}
+static int s3c24xx_spi_setupxfer(struct spi_device *spi,
+struct spi_transfer *t)
+{
+ struct s3c24xx_spi_devstate *cs = spi-controller_state;
+ struct s3c24xx_spi *hw = to_hw(spi);
+ int ret;
+
+ ret = s3c24xx_spi_update_state(spi, t
[spi-devel-general] [patch 4/7] spi_s3c24xx: fix header includes
The driver includes asm/io.h where it should be including linux/io.h and also includes mach/hardware.h and asm/dma.h without using anything from these. Signed-off-by; Ben Dooks b...@simtec.co.uk --- drivers/spi/spi_s3c24xx.c |5 + 1 file changed, 1 insertion(+), 4 deletions(-) Index: b/drivers/spi/spi_s3c24xx.c === --- a/drivers/spi/spi_s3c24xx.c 2009-07-28 15:19:28.0 +0100 +++ b/drivers/spi/spi_s3c24xx.c 2009-07-28 15:20:16.0 +0100 @@ -20,14 +20,11 @@ #include linux/clk.h #include linux/platform_device.h #include linux/gpio.h +#include linux/io.h #include linux/spi/spi.h #include linux/spi/spi_bitbang.h -#include asm/io.h -#include asm/dma.h -#include mach/hardware.h - #include plat/regs-spi.h #include mach/spi.h -- -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] XR20M1172 -SPI-UART
On Tue, Aug 04, 2009 at 06:48:14PM +0530, arjun rath wrote: Hi all, I am working on XR20M1172 which is a two channel SPI uart with 64 byte FIFO.Currently i am working on S3C2450 Processor where it has given HSPI instead of SPI.And there is no link between spi.c file and hspi.c.And one more file is being given i.e spi_s3c24xx.c file which is generic to all samsung . I've not got any up to date information about the 2450, but I belive the newer HSPI block is not compatible with the older spi_s3c24xx.c driver. So my question is my XR20M1172(slave spi) will communicate with hspi or spi_s3c24xx file because i am registering my slave chip with spi.c file which is talking with spi_s3c24xx.c file. The registeration of SPI devices is seperate from the registration of the SPI bus master. The SPI bus master is registered from a platform device that attaches the master controller to a SPI bus. The SPI bus is specified in a number passed in to the driver via platform_data supplied when the master is registered. I am using linux 2.6.21 kernel source. I might be persuaded to do an HSPI driver, but it will be a patch against a much newer kernel, since it will be useful for other devices that are being actively maintained. Any help will be greatful. Regards Arjun -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general -- -- Ben Q: What's a light-year? A: One-third less calories than a regular year. -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [patch 3/6] spi_s3c24xx; Fix transfer setup code
Since the changes to the bitbang driver, there is the possibility we
will be called with either the speed_hz or bpw values zero. We take
these to mean that the default values (8 bits per word, or maximum
bus speed).
Signed-off-by: Ben Dooks b...@simtec.co.uk
---
Index: b/drivers/spi/spi_s3c24xx.c
===
--- a/drivers/spi/spi_s3c24xx.c 2009-07-27 18:55:16.0 +0100
+++ b/drivers/spi/spi_s3c24xx.c 2009-07-27 18:56:08.0 +0100
@@ -116,6 +116,12 @@ static int s3c24xx_spi_setupxfer(struct
bpw = t ? t-bits_per_word : spi-bits_per_word;
hz = t ? t-speed_hz : spi-max_speed_hz;
+ if (!bpw)
+ bpw = 8;
+
+ if (!hz)
+ hz = spi-max_speed_hz;
+
if (bpw != 8) {
dev_err(spi-dev, invalid bits-per-word (%d)\n, bpw);
return -EINVAL;
--
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[spi-devel-general] [patch 1/6] spi: fix spelling of automatically in documentation
Fix spelling of automatically in Documentation/spi/spi-summary. Signed-off-by: Ben Dooks b...@simtec.co.uk --- Documentation/spi/spi-summary |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Index: b/Documentation/spi/spi-summary === --- a/Documentation/spi/spi-summary 2009-07-09 15:07:37.0 +0100 +++ b/Documentation/spi/spi-summary 2009-07-09 15:09:41.0 +0100 @@ -350,7 +350,7 @@ SPI protocol drivers somewhat resemble p .resume = CHIP_resume, }; -The driver core will autmatically attempt to bind this driver to any SPI +The driver core will automatically attempt to bind this driver to any SPI device whose board_info gave a modalias of CHIP. Your probe() code might look like this unless you're creating a device which is managing a bus (appearing under /sys/class/spi_master). -- -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [patch 5/6] spi_s3c24xx: use dev_pm_ops
Change the spi_s3c24xx driver to use dev_pm_ops to avoid the
following warning during probe:
Platform driver 's3c2410-spi' needs updating - please use dev_pm_ops
Signed-off-by: Ben Dooks b...@simtec.co.uk
---
---
drivers/spi/spi_s3c24xx.c | 22 +-
1 file changed, 13 insertions(+), 9 deletions(-)
Index: b/drivers/spi/spi_s3c24xx.c
===
--- a/drivers/spi/spi_s3c24xx.c 2009-07-28 15:20:16.0 +0100
+++ b/drivers/spi/spi_s3c24xx.c 2009-07-28 15:20:22.0 +0100
@@ -418,9 +418,9 @@ static int __exit s3c24xx_spi_remove(str
#ifdef CONFIG_PM
-static int s3c24xx_spi_suspend(struct platform_device *pdev, pm_message_t msg)
+static int s3c24xx_spi_suspend(struct device *dev)
{
- struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
+ struct s3c24xx_spi *hw = platform_get_drvdata(to_platform_device(dev));
if (hw-pdata hw-pdata-gpio_setup)
hw-pdata-gpio_setup(hw-pdata, 0);
@@ -429,27 +429,31 @@ static int s3c24xx_spi_suspend(struct pl
return 0;
}
-static int s3c24xx_spi_resume(struct platform_device *pdev)
+static int s3c24xx_spi_resume(struct device *dev)
{
- struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
+ struct s3c24xx_spi *hw = platform_get_drvdata(to_platform_device(dev));
s3c24xx_spi_initialsetup(hw);
return 0;
}
+static struct dev_pm_ops s3c24xx_spi_pmops = {
+ .suspend= s3c24xx_spi_suspend,
+ .resume = s3c24xx_spi_resume,
+};
+
+#define S3C24XX_SPI_PMOPS s3c24xx_spi_pmops
#else
-#define s3c24xx_spi_suspend NULL
-#define s3c24xx_spi_resume NULL
-#endif
+#define S3C24XX_SPI_PMOPS NULL
+#endif /* CONFIG_PM */
MODULE_ALIAS(platform:s3c2410-spi);
static struct platform_driver s3c24xx_spi_driver = {
.remove = __exit_p(s3c24xx_spi_remove),
- .suspend= s3c24xx_spi_suspend,
- .resume = s3c24xx_spi_resume,
.driver = {
.name = s3c2410-spi,
.owner = THIS_MODULE,
+ .pm = S3C24XX_SPI_PMOPS,
},
};
--
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[spi-devel-general] [patch 6/6] spi_s3c24xx: cache device setup data
With the update to the spi_bitbang driver, the transfer setup code is
being called more often, and thus is often re-doing calculations that
have been done before. The SPI layer allows our driver to add its
own data to each device so add a result cache to each device.
This should also remove the problem where we where directly setting up
registers in the setup call which meant we might overwrite the state of
an extant transfer.,
Signed-off-by: Ben Dooks b...@simtec.co.uk
---
drivers/spi/spi_s3c24xx.c | 126 --
1 file changed, 89 insertions(+), 37 deletions(-)
Index: b/drivers/spi/spi_s3c24xx.c
===
--- a/drivers/spi/spi_s3c24xx.c 2009-07-28 15:20:22.0 +0100
+++ b/drivers/spi/spi_s3c24xx.c 2009-07-28 15:20:28.0 +0100
@@ -28,6 +28,20 @@
#include plat/regs-spi.h
#include mach/spi.h
+/**
+ * s3c24xx_spi_devstate - per device data
+ * @hz: Last frequency calculated for @sppre field.
+ * @mode: Last mode setting for the @spcon field.
+ * @spcon: Value to write to the SPCON register.
+ * @sppre: Value to write to the SPPRE register.
+ */
+struct s3c24xx_spi_devstate {
+ unsigned inthz;
+ unsigned intmode;
+ u8 spcon;
+ u8 sppre;
+};
+
struct s3c24xx_spi {
/* bitbang has to be first */
struct spi_bitbang bitbang;
@@ -68,43 +82,31 @@ static void s3c24xx_spi_gpiocs(struct s3
static void s3c24xx_spi_chipsel(struct spi_device *spi, int value)
{
+ struct s3c24xx_spi_devstate *cs = spi-controller_state;
struct s3c24xx_spi *hw = to_hw(spi);
unsigned int cspol = spi-mode SPI_CS_HIGH ? 1 : 0;
- unsigned int spcon;
+
+ /* change the chipselect state and the state of the spi engine clock */
switch (value) {
case BITBANG_CS_INACTIVE:
hw-set_cs(hw-pdata, spi-chip_select, cspol^1);
+ writeb(cs-spcon, hw-regs + S3C2410_SPCON);
break;
case BITBANG_CS_ACTIVE:
- spcon = readb(hw-regs + S3C2410_SPCON);
-
- if (spi-mode SPI_CPHA)
- spcon |= S3C2410_SPCON_CPHA_FMTB;
- else
- spcon = ~S3C2410_SPCON_CPHA_FMTB;
-
- if (spi-mode SPI_CPOL)
- spcon |= S3C2410_SPCON_CPOL_HIGH;
- else
- spcon = ~S3C2410_SPCON_CPOL_HIGH;
-
- spcon |= S3C2410_SPCON_ENSCK;
-
- /* write new configration */
-
- writeb(spcon, hw-regs + S3C2410_SPCON);
+ writeb(cs-spcon | S3C2410_SPCON_ENSCK,
+ hw-regs + S3C2410_SPCON);
hw-set_cs(hw-pdata, spi-chip_select, cspol);
-
break;
}
}
-static int s3c24xx_spi_setupxfer(struct spi_device *spi,
-struct spi_transfer *t)
+static int s3c24xx_spi_update_state(struct spi_device *spi,
+ struct spi_transfer *t)
{
struct s3c24xx_spi *hw = to_hw(spi);
+ struct s3c24xx_spi_devstate *cs = spi-controller_state;
unsigned int bpw;
unsigned int hz;
unsigned int div;
@@ -124,41 +126,89 @@ static int s3c24xx_spi_setupxfer(struct
return -EINVAL;
}
- clk = clk_get_rate(hw-clk);
- div = DIV_ROUND_UP(clk, hz * 2) - 1;
+ if (spi-mode != cs-mode) {
+ u8 spcon = SPCON_DEFAULT;
- if (div 255)
- div = 255;
+ if (spi-mode SPI_CPHA)
+ spcon |= S3C2410_SPCON_CPHA_FMTB;
- dev_dbg(spi-dev, setting pre-scaler to %d (wanted %d, got %ld)\n,
- div, hz, clk / (2 * (div + 1)));
+ if (spi-mode SPI_CPOL)
+ spcon |= S3C2410_SPCON_CPOL_HIGH;
+ cs-mode = spi-mode;
+ cs-spcon = spcon;
+ }
- writeb(div, hw-regs + S3C2410_SPPRE);
+ if (cs-hz != hz) {
+ clk = clk_get_rate(hw-clk);
+ div = DIV_ROUND_UP(clk, hz * 2) - 1;
- spin_lock(hw-bitbang.lock);
- if (!hw-bitbang.busy) {
- hw-bitbang.chipselect(spi, BITBANG_CS_INACTIVE);
- /* need to ndelay for 0.5 clocktick ? */
+ if (div 255)
+ div = 255;
+
+ dev_dbg(spi-dev, pre-scaler=%d (wanted %d, got %ld)\n,
+ div, hz, clk / (2 * (div + 1)));
+
+ cs-hz = hz;
+ cs-sppre = div;
}
- spin_unlock(hw-bitbang.lock);
return 0;
}
+static int s3c24xx_spi_setupxfer(struct spi_device *spi,
+struct spi_transfer *t)
+{
+ struct s3c24xx_spi_devstate *cs = spi-controller_state;
+ struct s3c24xx_spi *hw = to_hw(spi);
+ int ret;
+
+ ret = s3c24xx_spi_update_state(spi, t
[spi-devel-general] [patch 2/6] spi_s3c24xx: fix clock rate calculation
Currently the clock rate calculation may round as pleased, which means that it is possible that we will round down and end up with a faster clock rate than intended. Change the calculation to use DIV_ROUND_UP() to ensure that we end up with a clock rate either the same as or lower than the user requested one. Signed-off-by: Ben Dooks b...@simtec.co.uk --- drivers/spi/spi_s3c24xx.c | 17 +++-- 1 file changed, 7 insertions(+), 10 deletions(-) Index: b/drivers/spi/spi_s3c24xx.c === --- a/drivers/spi/spi_s3c24xx.c 2009-07-14 13:56:07.0 +0100 +++ b/drivers/spi/spi_s3c24xx.c 2009-07-14 14:08:45.0 +0100 @@ -111,6 +111,7 @@ static int s3c24xx_spi_setupxfer(struct unsigned int bpw; unsigned int hz; unsigned int div; + unsigned long clk; bpw = t ? t-bits_per_word : spi-bits_per_word; hz = t ? t-speed_hz : spi-max_speed_hz; @@ -120,20 +121,16 @@ static int s3c24xx_spi_setupxfer(struct return -EINVAL; } - div = clk_get_rate(hw-clk) / hz; - - /* is clk = pclk / (2 * (pre+1)), or is it -*clk = (pclk * 2) / ( pre + 1) */ - - div /= 2; - - if (div 0) - div -= 1; + clk = clk_get_rate(hw-clk); + div = DIV_ROUND_UP(clk, hz * 2) - 1; if (div 255) div = 255; - dev_dbg(spi-dev, setting pre-scaler to %d (hz %d)\n, div, hz); + dev_dbg(spi-dev, setting pre-scaler to %d (wanted %d, got %ld)\n, + div, hz, clk / (2 * (div + 1))); + + writeb(div, hw-regs + S3C2410_SPPRE); spin_lock(hw-bitbang.lock); -- -- Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day trial. Simplify your report design, integration and deployment - and focus on what you do best, core application coding. Discover what's new with Crystal Reports now. http://p.sf.net/sfu/bobj-july ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] GPIO: Fix probe() error return in gpio driver probes
On Wed, Jan 07, 2009 at 12:56:19PM +, b...@fluff.org.uk wrote: A number of drivers in drivers/gpio return -ENODEV when confronted with missing setup parameters such as the platform data. However, returning -ENODEV causes the driver layer to silently ignore the driver as it assumes the probe did not find anything and was only speculative. To make life easier to discern why a driver is not being attached, change to returning -EINVAL, which is a better description of the fact that the driver data was not valid. Also add a set of dev_dbg() statements to the error paths to provide an better explanation of the error as there may be more that one point in the driver. sorry, sent from the wrong email address please ignore. -- Ben (b...@fluff.org, http://www.fluff.org/) 'a smiley only costs 4 bytes' -- Check out the new SourceForge.net Marketplace. It is the best place to buy or sell services for just about anything Open Source. http://p.sf.net/sfu/Xq1LFB ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] GPIO: Fix probe() error return in gpio driver probes
A number of drivers in drivers/gpio return -ENODEV when confronted
with missing setup parameters such as the platform data. However,
returning -ENODEV causes the driver layer to silently ignore the
driver as it assumes the probe did not find anything and was only
speculative.
To make life easier to discern why a driver is not being attached,
change to returning -EINVAL, which is a better description of the
fact that the driver data was not valid.
Also add a set of dev_dbg() statements to the error paths to provide
an better explanation of the error as there may be more that one point
in the driver.
Signed-off-by: Ben Dooks ben-li...@fluff.org
Index: linux.git3/drivers/gpio/max7301.c
===
--- linux.git3.orig/drivers/gpio/max7301.c 2008-10-22 09:50:45.0
+0100
+++ linux.git3/drivers/gpio/max7301.c 2009-01-07 12:37:46.0 +
@@ -217,8 +217,10 @@ static int __devinit max7301_probe(struc
int i, ret;
pdata = spi-dev.platform_data;
- if (!pdata || !pdata-base)
- return -ENODEV;
+ if (!pdata || !pdata-base) {
+ dev_dbg(spi-dev, incorrect or missing platform data\n);
+ return -EINVAL;
+ }
/*
* bits_per_word cannot be configured in platform data
Index: linux.git3/drivers/gpio/max732x.c
===
--- linux.git3.orig/drivers/gpio/max732x.c 2008-10-22 09:50:45.0
+0100
+++ linux.git3/drivers/gpio/max732x.c 2009-01-07 12:22:10.0 +
@@ -267,8 +267,10 @@ static int __devinit max732x_probe(struc
int ret, nr_port;
pdata = client-dev.platform_data;
- if (pdata == NULL)
- return -ENODEV;
+ if (pdata == NULL) {
+ dev_dbg(client-dev, no platform data\n);
+ return -EINVAL;
+ }
chip = kzalloc(sizeof(struct max732x_chip), GFP_KERNEL);
if (chip == NULL)
Index: linux.git3/drivers/gpio/mcp23s08.c
===
--- linux.git3.orig/drivers/gpio/mcp23s08.c 2008-10-22 09:50:45.0
+0100
+++ linux.git3/drivers/gpio/mcp23s08.c 2009-01-07 12:23:24.0 +
@@ -310,8 +310,10 @@ static int mcp23s08_probe(struct spi_dev
unsignedbase;
pdata = spi-dev.platform_data;
- if (!pdata || !gpio_is_valid(pdata-base))
- return -ENODEV;
+ if (!pdata || !gpio_is_valid(pdata-base)) {
+ dev_dbg(spi-dev, invalid or missing platform data\n);
+ return -EINVAL;
+ }
for (addr = 0; addr 4; addr++) {
if (!pdata-chip[addr].is_present)
Index: linux.git3/drivers/gpio/pca953x.c
===
--- linux.git3.orig/drivers/gpio/pca953x.c 2008-10-22 09:50:45.0
+0100
+++ linux.git3/drivers/gpio/pca953x.c 2009-01-07 12:36:00.0 +
@@ -200,8 +200,10 @@ static int __devinit pca953x_probe(struc
int ret;
pdata = client-dev.platform_data;
- if (pdata == NULL)
- return -ENODEV;
+ if (pdata == NULL) {
+ dev_dbg(client-dev, no platform data\n);
+ return -EINVAL;
+ }
chip = kzalloc(sizeof(struct pca953x_chip), GFP_KERNEL);
if (chip == NULL)
Index: linux.git3/drivers/gpio/pcf857x.c
===
--- linux.git3.orig/drivers/gpio/pcf857x.c 2008-10-22 09:50:45.0
+0100
+++ linux.git3/drivers/gpio/pcf857x.c 2009-01-07 12:27:00.0 +
@@ -188,8 +188,10 @@ static int pcf857x_probe(struct i2c_clie
int status;
pdata = client-dev.platform_data;
- if (!pdata)
- return -ENODEV;
+ if (!pdata) {
+ dev_dbg(client-dev, no platform data\n);
+ return -EINVAL;
+ }
/* Allocate, initialize, and register this gpio_chip. */
gpio = kzalloc(sizeof *gpio, GFP_KERNEL);
@@ -248,8 +250,10 @@ static int pcf857x_probe(struct i2c_clie
else
status = i2c_read_le16(client);
- } else
- status = -ENODEV;
+ } else {
+ dev_dbg(client-dev, unsupported number of gpios\n);
+ status = -EINVAL;
+ }
if (status 0)
goto fail;
--
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[spi-devel-general] [patch 3/4] spi_s3c24xx_gpio: fix setting of num_chipselect.
The spi master driver must have num_chipselect set to
allow the bus to initialise. Pass this through the
platform data.
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.27-rc7-quilt2/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
===
--- linux-2.6.27-rc7-quilt2.orig/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
2008-09-23 14:59:56.0 +0100
+++ linux-2.6.27-rc7-quilt2/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
2008-09-23 15:58:03.0 +0100
@@ -18,6 +18,7 @@ struct s3c2410_spigpio_info {
unsigned longpin_mosi;
unsigned longpin_miso;
+ int num_chipselect;
int bus_num;
void (*chip_select)(struct s3c2410_spigpio_info *spi, int cs);
Index: linux-2.6.27-rc7-quilt2/drivers/spi/spi_s3c24xx_gpio.c
===
--- linux-2.6.27-rc7-quilt2.orig/drivers/spi/spi_s3c24xx_gpio.c 2008-09-23
15:01:47.0 +0100
+++ linux-2.6.27-rc7-quilt2/drivers/spi/spi_s3c24xx_gpio.c 2008-09-23
15:01:47.0 +0100
@@ -118,6 +118,7 @@ static int s3c2410_spigpio_probe(struct
/* setup spi bitbang adaptor */
sp-bitbang.master = spi_master_get(master);
sp-bitbang.master-bus_num = info-bus_num;
+ sp-bitbang.master-num_chipselect = info-num_chipselect;
sp-bitbang.chipselect = s3c2410_spigpio_chipselect;
sp-bitbang.txrx_word[SPI_MODE_0] = s3c2410_spigpio_txrx_mode0;
--
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[spi-devel-general] [patch 2/4] spi_s3c24xx_gpio: fix spi-device to our private data lookup
The spidev_to_sg() call in spi_s3c24xx_gpio.c was using the
wrong method to convert the spi device into the private data
for the driver. Fix this by using spi_master_get_devdata.
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.27-rc7-quilt1/drivers/spi/spi_s3c24xx_gpio.c
===
--- linux-2.6.27-rc7-quilt1.orig/drivers/spi/spi_s3c24xx_gpio.c 2008-09-23
12:34:31.0 +0100
+++ linux-2.6.27-rc7-quilt1/drivers/spi/spi_s3c24xx_gpio.c 2008-09-23
12:34:43.0 +0100
@@ -34,7 +34,7 @@ struct s3c2410_spigpio {
static inline struct s3c2410_spigpio *spidev_to_sg(struct spi_device *spi)
{
- return spi-controller_data;
+ return spi_master_get_devdata(spi-master);
}
static inline void setsck(struct spi_device *dev, int on)
--
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[spi-devel-general] [patch 1/4] SPI: Add pin configuration callback
Add a gpio configuration callback for the s3c24xx SPI driver, as
there are several options depending on the channel and the chip
in use.
This is needed as the controller may not have been setup by the
initial bootloader and the fact that the SPI controller gets
reset over suspend/resume into slave mode but the GPIO function
registers do not.
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.27-rc1-quilt1/drivers/spi/spi_s3c24xx.c
===
--- linux-2.6.27-rc1-quilt1.orig/drivers/spi/spi_s3c24xx.c 2008-08-04
11:46:12.0 +0100
+++ linux-2.6.27-rc1-quilt1/drivers/spi/spi_s3c24xx.c 2008-08-04
11:46:54.0 +0100
@@ -247,6 +247,9 @@ static void s3c24xx_spi_initialsetup(str
writeb(0xff, hw-regs + S3C2410_SPPRE);
writeb(SPPIN_DEFAULT, hw-regs + S3C2410_SPPIN);
writeb(SPCON_DEFAULT, hw-regs + S3C2410_SPCON);
+
+ if (hw-pdata hw-pdata-gpio_setup)
+ hw-pdata-gpio_setup(hw-pdata, 1);
}
static int __init s3c24xx_spi_probe(struct platform_device *pdev)
@@ -412,6 +415,9 @@ static int s3c24xx_spi_suspend(struct pl
{
struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
+ if (hw-pdata hw-pdata-gpio_setup)
+ hw-pdata-gpio_setup(hw-pdata, 0);
+
clk_disable(hw-clk);
return 0;
}
Index: linux-2.6.27-rc1-quilt1/arch/arm/mach-s3c2410/include/mach/spi.h
===
--- linux-2.6.27-rc1-quilt1.orig/arch/arm/mach-s3c2410/include/mach/spi.h
2008-08-04 11:45:55.0 +0100
+++ linux-2.6.27-rc1-quilt1/arch/arm/mach-s3c2410/include/mach/spi.h
2008-08-04 11:46:13.0 +0100
@@ -18,6 +18,7 @@ struct s3c2410_spi_info {
unsigned int num_cs;/* total chipselects */
int bus_num; /* bus number to use. */
+ void (*gpio_setup)(struct s3c2410_spi_info *spi, int enable);
void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol);
};
--
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[spi-devel-general] [patch 4/4] spi_s3c2410: use generic gpio calls instead of arch specific ones
Change the spi_s3c2410 driver to use the generic gpio calls that
are now available.
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.27-quilt1/drivers/spi/spi_s3c24xx.c
===
--- linux-2.6.27-quilt1.orig/drivers/spi/spi_s3c24xx.c 2008-10-10
14:45:04.0 +0100
+++ linux-2.6.27-quilt1/drivers/spi/spi_s3c24xx.c 2008-10-10
15:47:51.0 +0100
@@ -19,6 +19,7 @@
#include linux/err.h
#include linux/clk.h
#include linux/platform_device.h
+#include linux/gpio.h
#include linux/spi/spi.h
#include linux/spi/spi_bitbang.h
@@ -27,7 +28,6 @@
#include asm/dma.h
#include mach/hardware.h
-#include mach/regs-gpio.h
#include asm/plat-s3c24xx/regs-spi.h
#include mach/spi.h
@@ -66,7 +66,7 @@ static inline struct s3c24xx_spi *to_hw(
static void s3c24xx_spi_gpiocs(struct s3c2410_spi_info *spi, int cs, int pol)
{
- s3c2410_gpio_setpin(spi-pin_cs, pol);
+ gpio_set_value(spi-pin_cs, pol);
}
static void s3c24xx_spi_chipsel(struct spi_device *spi, int value)
@@ -248,8 +248,13 @@ static void s3c24xx_spi_initialsetup(str
writeb(SPPIN_DEFAULT, hw-regs + S3C2410_SPPIN);
writeb(SPCON_DEFAULT, hw-regs + S3C2410_SPCON);
- if (hw-pdata hw-pdata-gpio_setup)
- hw-pdata-gpio_setup(hw-pdata, 1);
+ if (hw-pdata) {
+ if (hw-set_cs == s3c24xx_spi_gpiocs)
+ gpio_direction_output(hw-pdata-pin_cs, 1);
+
+ if (hw-pdata-gpio_setup)
+ hw-pdata-gpio_setup(hw-pdata, 1);
+ }
}
static int __init s3c24xx_spi_probe(struct platform_device *pdev)
@@ -343,18 +348,27 @@ static int __init s3c24xx_spi_probe(stru
goto err_no_clk;
}
- s3c24xx_spi_initialsetup(hw);
-
/* setup any gpio we can */
if (!pdata-set_cs) {
- hw-set_cs = s3c24xx_spi_gpiocs;
+ if (pdata-pin_cs 0) {
+ dev_err(pdev-dev, No chipselect pin\n);
+ goto err_register;
+ }
+
+ err = gpio_request(pdata-pin_cs, dev_name(pdev-dev));
+ if (err) {
+ dev_err(pdev-dev, Failed to get gpio for cs\n);
+ goto err_register;
+ }
- s3c2410_gpio_setpin(pdata-pin_cs, 1);
- s3c2410_gpio_cfgpin(pdata-pin_cs, S3C2410_GPIO_OUTPUT);
+ hw-set_cs = s3c24xx_spi_gpiocs;
+ gpio_direction_output(pdata-pin_cs, 1);
} else
hw-set_cs = pdata-set_cs;
+ s3c24xx_spi_initialsetup(hw);
+
/* register our spi controller */
err = spi_bitbang_start(hw-bitbang);
@@ -366,6 +380,9 @@ static int __init s3c24xx_spi_probe(stru
return 0;
err_register:
+ if (hw-set_cs == s3c24xx_spi_gpiocs)
+ gpio_free(pdata-pin_cs);
+
clk_disable(hw-clk);
clk_put(hw-clk);
@@ -401,6 +418,9 @@ static int __exit s3c24xx_spi_remove(str
free_irq(hw-irq, hw);
iounmap(hw-regs);
+ if (hw-set_cs == s3c24xx_spi_gpiocs)
+ gpio_free(hw-pdata-pin_cs);
+
release_resource(hw-ioarea);
kfree(hw-ioarea);
Index: linux-2.6.27-quilt1/arch/arm/mach-s3c2410/include/mach/spi.h
===
--- linux-2.6.27-quilt1.orig/arch/arm/mach-s3c2410/include/mach/spi.h
2008-10-10 14:45:05.0 +0100
+++ linux-2.6.27-quilt1/arch/arm/mach-s3c2410/include/mach/spi.h
2008-10-10 14:45:09.0 +0100
@@ -14,7 +14,7 @@
#define __ASM_ARCH_SPI_H __FILE__
struct s3c2410_spi_info {
- unsigned longpin_cs;/* simple gpio cs */
+ int pin_cs;/* simple gpio cs */
unsigned int num_cs;/* total chipselects */
int bus_num; /* bus number to use. */
--
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[spi-devel-general] [patch 0/4] S3C24XX updates for 2.6.28 (v3)
SPI driver updates for 2.6.28. Sorry, this is the third set, the previous one missed a minor change to drivers/spi/spi_s3c24xx.c that causes the patch to mis-compile. -- Ben ([EMAIL PROTECTED], http://www.fluff.org/) 'a smiley only costs 4 bytes' - This SF.Net email is sponsored by the Moblin Your Move Developer's challenge Build the coolest Linux based applications with Moblin SDK win great prizes Grand prize is a trip for two to an Open Source event anywhere in the world http://moblin-contest.org/redirect.php?banner_id=100url=/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [patch 7/9] ANUBIS: Add SM501 GPIO and update I2C setup
Add GPIO support to the SM501 on the Simtec Anubis,
and then add the necessary updates for allowing the
two gpio I2C busses to be used.
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.26-rc8-quilt3/arch/arm/mach-s3c2440/mach-anubis.c
===
--- linux-2.6.26-rc8-quilt3.orig/arch/arm/mach-s3c2440/mach-anubis.c
2008-07-02 14:56:08.0 +0100
+++ linux-2.6.26-rc8-quilt3/arch/arm/mach-s3c2440/mach-anubis.c 2008-07-02
15:44:23.0 +0100
@@ -367,6 +367,8 @@ static struct sm501_initdata anubis_sm50
.mask = 0,
},
+ .devices= SM501_USE_GPIO,
+
/* set the SDRAM and bus clocks */
.mclk = 72 * MHZ,
.m1xclk = 144 * MHZ,
@@ -374,10 +376,12 @@ static struct sm501_initdata anubis_sm50
static struct sm501_platdata_gpio_i2c anubis_sm501_gpio_i2c[] = {
[0] = {
+ .bus_num= 1,
.pin_scl= 44,
.pin_sda= 45,
},
[1] = {
+ .bus_num= 2,
.pin_scl= 40,
.pin_sda= 41,
},
@@ -385,6 +389,7 @@ static struct sm501_platdata_gpio_i2c an
static struct sm501_platdata anubis_sm501_platdata = {
.init = anubis_sm501_initdata,
+ .gpio_base = -1,
.gpio_i2c = anubis_sm501_gpio_i2c,
.gpio_i2c_nr= ARRAY_SIZE(anubis_sm501_gpio_i2c),
};
--
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[spi-devel-general] [patch 6/9] S3C24XX: Common ADC driver for S3C24XX archs
A common ADC driver to allow the hwmon and touchscreen
drivers to share the ADC block.
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.27-rc9-s3c64xx-2/arch/arm/plat-s3c24xx/Kconfig
===
--- linux-2.6.27-rc9-s3c64xx-2.orig/arch/arm/plat-s3c24xx/Kconfig
2008-10-08 15:00:20.0 +0100
+++ linux-2.6.27-rc9-s3c64xx-2/arch/arm/plat-s3c24xx/Kconfig2008-10-10
10:39:51.0 +0100
@@ -49,6 +49,13 @@ config S3C2410_DMA_DEBUG
Enable debugging output for the DMA code. This option sends info
to the kernel log, at priority KERN_DEBUG.
+config S3C24XX_ADC
+ bool ADC common driver support
+ help
+ Core support for the ADC block found in the S3C24XX SoC systems
+ for drivers such as the touchscreen and hwmon to use to share
+ this resource.
+
# SPI default pin configuration code
config S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13
Index: linux-2.6.27-rc9-s3c64xx-2/arch/arm/plat-s3c24xx/Makefile
===
--- linux-2.6.27-rc9-s3c64xx-2.orig/arch/arm/plat-s3c24xx/Makefile
2008-10-08 15:00:20.0 +0100
+++ linux-2.6.27-rc9-s3c64xx-2/arch/arm/plat-s3c24xx/Makefile 2008-10-10
10:39:51.0 +0100
@@ -31,6 +31,7 @@ obj-$(CONFIG_PM) += pm.o
obj-$(CONFIG_PM) += sleep.o
obj-$(CONFIG_HAVE_PWM) += pwm.o
obj-$(CONFIG_S3C2410_DMA) += dma.o
+obj-$(CONFIG_S3C24XX_ADC) += adc.o
# SPI gpio central GPIO functions
Index: linux-2.6.27-rc9-s3c64xx-2/arch/arm/plat-s3c24xx/adc.c
===
--- /dev/null 1970-01-01 00:00:00.0 +
+++ linux-2.6.27-rc9-s3c64xx-2/arch/arm/plat-s3c24xx/adc.c 2008-10-10
10:41:11.0 +0100
@@ -0,0 +1,372 @@
+/* arch/arm/plat-s3c24xx/adc.c
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ * http://armlinux.simtec.co.uk/
+ * Ben Dooks [EMAIL PROTECTED], [EMAIL PROTECTED]
+ *
+ * S3C24XX ADC device core
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License.
+*/
+
+#include linux/module.h
+#include linux/kernel.h
+#include linux/platform_device.h
+#include linux/list.h
+#include linux/err.h
+#include linux/clk.h
+#include linux/interrupt.h
+#include linux/io.h
+
+#include plat/regs-adc.h
+#include plat/adc.h
+
+/* This driver is designed to control the usage of the ADC block between
+ * the touchscreen and any other drivers that may need to use it, such as
+ * the hwmon driver.
+ *
+ * Priority will be given to the touchscreen driver, but as this itself is
+ * rate limited it should not starve other requests which are processed in
+ * order that they are received.
+ *
+ * Each user registers to get a client block which uniquely identifies it
+ * and stores information such as the necessary functions to callback when
+ * action is required.
+ */
+
+struct s3c_adc_client {
+ struct platform_device *pdev;
+ struct list_head pend;
+
+ unsigned int nr_samples;
+ unsigned charis_ts;
+ unsigned charchannel;
+
+ void(*select_cb)(unsigned selected);
+ void(*convert_cb)(unsigned val1, unsigned val2);
+};
+
+struct adc_device {
+ struct platform_device *pdev;
+ struct platform_device *owner;
+ struct clk *clk;
+ struct s3c_adc_client *cur;
+ struct s3c_adc_client *ts_pend;
+ void __iomem*regs;
+
+ unsigned int prescale;
+
+ int irq;
+};
+
+static struct adc_device *adc_dev;
+
+static LIST_HEAD(adc_pending);
+
+#define adc_dbg(_adc, msg...) dev_dbg((_adc)-pdev-dev, msg)
+
+static inline void s3c_adc_convert(struct adc_device *adc)
+{
+ unsigned con = readl(adc-regs + S3C2410_ADCCON);
+
+ con |= S3C2410_ADCCON_ENABLE_START;
+ writel(con, adc-regs + S3C2410_ADCCON);
+}
+
+static inline void s3c_adc_select(struct adc_device *adc,
+ struct s3c_adc_client *client)
+{
+ unsigned con = readl(adc-regs + S3C2410_ADCCON);
+
+ client-select_cb(1);
+
+ con = ~S3C2410_ADCCON_MUXMASK;
+ con = ~S3C2410_ADCCON_STDBM;
+ con = ~S3C2410_ADCCON_STARTMASK;
+
+ if (!client-is_ts)
+ con |= S3C2410_ADCCON_SELMUX(client-channel);
+
+ writel(con, adc-regs + S3C2410_ADCCON);
+}
+
+static void s3c_adc_dbgshow(struct adc_device *adc)
+{
+ adc_dbg(adc, CON=%08x, TSC=%08x, DLY=%08x\n,
+ readl(adc-regs + S3C2410_ADCCON),
+ readl(adc-regs + S3C2410_ADCTSC),
+ readl(adc-regs + S3C2410_ADCDLY));
+}
+
+void s3c_adc_try(struct adc_device *adc)
+{
+ struct s3c_adc_client *next = adc-ts_pend
[spi-devel-general] [patch 1/4] SPI: Add pin configuration callback
Add a gpio configuration callback for the s3c24xx SPI driver, as
there are several options depending on the channel and the chip
in use.
This is needed as the controller may not have been setup by the
initial bootloader and the fact that the SPI controller gets
reset over suspend/resume into slave mode but the GPIO function
registers do not.
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.27-rc1-quilt1/drivers/spi/spi_s3c24xx.c
===
--- linux-2.6.27-rc1-quilt1.orig/drivers/spi/spi_s3c24xx.c 2008-08-04
11:46:12.0 +0100
+++ linux-2.6.27-rc1-quilt1/drivers/spi/spi_s3c24xx.c 2008-08-04
11:46:54.0 +0100
@@ -247,6 +247,9 @@ static void s3c24xx_spi_initialsetup(str
writeb(0xff, hw-regs + S3C2410_SPPRE);
writeb(SPPIN_DEFAULT, hw-regs + S3C2410_SPPIN);
writeb(SPCON_DEFAULT, hw-regs + S3C2410_SPCON);
+
+ if (hw-pdata hw-pdata-gpio_setup)
+ hw-pdata-gpio_setup(hw-pdata, 1);
}
static int __init s3c24xx_spi_probe(struct platform_device *pdev)
@@ -412,6 +415,9 @@ static int s3c24xx_spi_suspend(struct pl
{
struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
+ if (hw-pdata hw-pdata-gpio_setup)
+ hw-pdata-gpio_setup(hw-pdata, 0);
+
clk_disable(hw-clk);
return 0;
}
Index: linux-2.6.27-rc1-quilt1/arch/arm/mach-s3c2410/include/mach/spi.h
===
--- linux-2.6.27-rc1-quilt1.orig/arch/arm/mach-s3c2410/include/mach/spi.h
2008-08-04 11:45:55.0 +0100
+++ linux-2.6.27-rc1-quilt1/arch/arm/mach-s3c2410/include/mach/spi.h
2008-08-04 11:46:13.0 +0100
@@ -18,6 +18,7 @@ struct s3c2410_spi_info {
unsigned int num_cs;/* total chipselects */
int bus_num; /* bus number to use. */
+ void (*gpio_setup)(struct s3c2410_spi_info *spi, int enable);
void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol);
};
--
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[spi-devel-general] [patch 0/9] S3C24XX SPI updates for 2.6.28
SPI updates for S3C24XX SPI drivers -- Ben ([EMAIL PROTECTED], http://www.fluff.org/) 'a smiley only costs 4 bytes' - This SF.Net email is sponsored by the Moblin Your Move Developer's challenge Build the coolest Linux based applications with Moblin SDK win great prizes Grand prize is a trip for two to an Open Source event anywhere in the world http://moblin-contest.org/redirect.php?banner_id=100url=/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [patch 4/9] S3C24XX: AT2440EVB MMC
Add SD/MMC support for AT2440EVB board.
Signed-off-by: Ramax Lo [EMAIL PROTECTED]
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c
b/arch/arm/mach-s3c2440/mach-at2440evb.c
index f5e3c7f..ce18bc3 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -45,6 +45,7 @@
#include plat/clock.h
#include plat/devs.h
#include plat/cpu.h
+#include asm/plat-s3c24xx/mci.h
static struct map_desc at2440evb_iodesc[] __initdata = {
/* Nothing here */
@@ -162,6 +163,10 @@ static struct platform_device at2440evb_device_eth = {
},
};
+static struct s3c24xx_mci_pdata at2440evb_mci_pdata = {
+ .gpio_detect= S3C2410_GPG10,
+};
+
static struct platform_device *at2440evb_devices[] __initdata = {
s3c_device_usb,
s3c_device_wdt,
@@ -169,12 +174,15 @@ static struct platform_device *at2440evb_devices[]
__initdata = {
s3c_device_i2c,
s3c_device_rtc,
s3c_device_nand,
+ s3c_device_sdi,
at2440evb_device_eth,
};
static void __init at2440evb_map_io(void)
{
s3c_device_nand.dev.platform_data = at2440evb_nand_info;
+ s3c_device_sdi.name = s3c2440-sdi;
+ s3c_device_sdi.dev.platform_data = at2440evb_mci_pdata;
s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
s3c24xx_init_clocks(16934400);
--
1.5.4.3
--
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[spi-devel-general] [patch 3/9] arch/arm/mach-s3c2410/pm.c: fix sparse warnings
Do not use __raw_readl on straight pointers. Change the
code to using 'u32 *' as we are only accessing kernel
RAM using phys_to_virt() to find where it is.
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.27-rc6-quilt3/arch/arm/mach-s3c2410/pm.c
===
--- linux-2.6.27-rc6-quilt3.orig/arch/arm/mach-s3c2410/pm.c 2008-09-16
10:29:59.0 +0100
+++ linux-2.6.27-rc6-quilt3/arch/arm/mach-s3c2410/pm.c 2008-09-16
10:40:20.0 +0100
@@ -44,6 +44,11 @@ extern void pm_dbg(const char *fmt, ...)
#define DBG(fmt...) printk(KERN_DEBUG fmt)
#endif
+static inline void write_u32(u32 value, void *to)
+{
+ *(u32 *)to = value;
+}
+
static void s3c2410_pm_prepare(void)
{
/* ensure at least GSTATUS3 has the resume address */
@@ -54,35 +59,35 @@ static void s3c2410_pm_prepare(void)
DBG(GSTATUS4 0x%08x\n, __raw_readl(S3C2410_GSTATUS4));
if (machine_is_h1940()) {
- void *base = phys_to_virt(H1940_SUSPEND_CHECK);
- unsigned long ptr;
- unsigned long calc = 0;
+ u32 *base = phys_to_virt(H1940_SUSPEND_CHECK);
+ unsigned ptr;
+ u32 calc = 0;
/* generate check for the bootloader to check on resume */
- for (ptr = 0; ptr 0x4; ptr += 0x400)
- calc += __raw_readl(base+ptr);
+ for (ptr = 0; ptr 0x4/4; ptr += 0x400/4)
+ calc += base[ptr];
- __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
+ write_u32(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
}
/* the RX3715 uses similar code and the same H1940 and the
* same offsets for resume and checksum pointers */
if (machine_is_rx3715()) {
- void *base = phys_to_virt(H1940_SUSPEND_CHECK);
- unsigned long ptr;
- unsigned long calc = 0;
+ u32 *base = phys_to_virt(H1940_SUSPEND_CHECK);
+ unsigned ptr;
+ u32 calc = 0;
/* generate check for the bootloader to check on resume */
- for (ptr = 0; ptr 0x4; ptr += 0x4)
- calc += __raw_readl(base+ptr);
+ for (ptr = 0; ptr 0x4/4; ptr += 0x4/4)
+ calc += base[ptr];
- __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
+ write_u32(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
}
- if ( machine_is_aml_m5900() )
+ if (machine_is_aml_m5900())
s3c2410_gpio_setpin(S3C2410_GPF2, 1);
}
@@ -97,7 +102,7 @@ static int s3c2410_pm_resume(struct sys_
tmp = S3C2410_GSTATUS2_OFFRESET;
__raw_writel(tmp, S3C2410_GSTATUS2);
- if ( machine_is_aml_m5900() )
+ if (machine_is_aml_m5900())
s3c2410_gpio_setpin(S3C2410_GPF2, 0);
return 0;
--
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[spi-devel-general] [patch 2/4] spi_s3c24xx_gpio: fix spi-device to our private data lookup
The spidev_to_sg() call in spi_s3c24xx_gpio.c was using the
wrong method to convert the spi device into the private data
for the driver. Fix this by using spi_master_get_devdata.
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.27-rc7-quilt1/drivers/spi/spi_s3c24xx_gpio.c
===
--- linux-2.6.27-rc7-quilt1.orig/drivers/spi/spi_s3c24xx_gpio.c 2008-09-23
12:34:31.0 +0100
+++ linux-2.6.27-rc7-quilt1/drivers/spi/spi_s3c24xx_gpio.c 2008-09-23
12:34:43.0 +0100
@@ -34,7 +34,7 @@ struct s3c2410_spigpio {
static inline struct s3c2410_spigpio *spidev_to_sg(struct spi_device *spi)
{
- return spi-controller_data;
+ return spi_master_get_devdata(spi-master);
}
static inline void setsck(struct spi_device *dev, int on)
--
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[spi-devel-general] [patch 8/9] S3C24XX: Add extra GPIOs via Kconfig
Add Kconfig entries to allow more GPIO space to be specified depending on the machine(s) selected. Signed-off-by: Ben Dooks [EMAIL PROTECTED] Index: linux-2.6.26-rc9-quilt2/arch/arm/mach-s3c2440/Kconfig === --- linux-2.6.26-rc9-quilt2.orig/arch/arm/mach-s3c2440/Kconfig 2008-07-10 15:06:32.0 +0100 +++ linux-2.6.26-rc9-quilt2/arch/arm/mach-s3c2440/Kconfig 2008-07-10 16:01:32.0 +0100 @@ -30,6 +30,7 @@ config MACH_ANUBIS select CPU_S3C2440 select PM_SIMTEC if PM select HAVE_PATA_PLATFORM + select S3C24XX_GPIO_EXTRA64 help Say Y here if you are using the Simtec Electronics ANUBIS development system @@ -38,6 +39,7 @@ config MACH_OSIRIS bool Simtec IM2440D20 (OSIRIS) module select CPU_S3C2440 select PM_SIMTEC if PM + select S3C24XX_GPIO_EXTRA128 help Say Y here if you are using the Simtec IM2440D20 module, also known as the Osiris. Index: linux-2.6.26-rc9-quilt2/arch/arm/plat-s3c24xx/Kconfig === --- linux-2.6.26-rc9-quilt2.orig/arch/arm/plat-s3c24xx/Kconfig 2008-07-10 15:04:53.0 +0100 +++ linux-2.6.26-rc9-quilt2/arch/arm/plat-s3c24xx/Kconfig 2008-07-10 16:01:55.0 +0100 @@ -28,6 +28,27 @@ config S3C24XX_PWM Support for exporting the PWM timer blocks via the pwm device system. + +# gpio configurations + +config S3C24XX_GPIO_EXTRA + int + default 128 if S3C24XX_GPIO_EXTRA128 + default 64 if S3C24XX_GPIO_EXTRA64 + default 0 + +config S3C24XX_GPIO_EXTRA64 + bool + help + Add an extra 64 gpio numbers to the available GPIO pool. This is + available for boards that need extra gpios for external devices. + +config S3C24XX_GPIO_EXTRA128 + bool + help + Add an extra 128 gpio numbers to the available GPIO pool. This is + available for boards that need extra gpios for external devices. + config PM_SIMTEC bool help Index: linux-2.6.26-rc9-quilt2/arch/arm/mach-s3c2410/include/mach/gpio.h === --- linux-2.6.26-rc9-quilt2.orig/arch/arm/mach-s3c2410/include/mach/gpio.h 2008-07-10 15:03:23.0 +0100 +++ linux-2.6.26-rc9-quilt2/arch/arm/mach-s3c2410/include/mach/gpio.h 2008-07-10 15:06:56.0 +0100 @@ -15,4 +15,10 @@ #define gpio_set_value __gpio_set_value #define gpio_cansleep __gpio_cansleep +/* some boards require extra gpio capacity to support external + * devices that need GPIO. + */ + +#define ARCH_NR_GPIOS (256 + CONFIG_S3C24XX_GPIO_EXTRA) + #include asm-generic/gpio.h -- Ben ([EMAIL PROTECTED], http://www.fluff.org/) 'a smiley only costs 4 bytes' - This SF.Net email is sponsored by the Moblin Your Move Developer's challenge Build the coolest Linux based applications with Moblin SDK win great prizes Grand prize is a trip for two to an Open Source event anywhere in the world http://moblin-contest.org/redirect.php?banner_id=100url=/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [patch 0/4] S3C24XX SPI updates for 2.6.27 (correct set)
The correct set of S3C24XX SPI driver updates. -- Ben ([EMAIL PROTECTED], http://www.fluff.org/) 'a smiley only costs 4 bytes' - This SF.Net email is sponsored by the Moblin Your Move Developer's challenge Build the coolest Linux based applications with Moblin SDK win great prizes Grand prize is a trip for two to an Open Source event anywhere in the world http://moblin-contest.org/redirect.php?banner_id=100url=/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [patch 5/9] AT2440EVB: LCD frame buffer support.
Add LCD frame buffer support for AT2440EVB board.
Signed-off-by: Ramax Lo [EMAIL PROTECTED]
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c
b/arch/arm/mach-s3c2440/mach-at2440evb.c
index aab014f..595fec5 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -28,6 +28,7 @@
#include asm/mach/irq.h
#include mach/hardware.h
+#include mach/fb.h
#include asm/irq.h
#include asm/mach-types.h
@@ -167,6 +168,39 @@ static struct s3c24xx_mci_pdata at2440evb_mci_pdata = {
.gpio_detect= S3C2410_GPG10,
};
+/* 7 LCD panel */
+
+static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = {
+
+ .lcdcon5= S3C2410_LCDCON5_FRM565 |
+ S3C2410_LCDCON5_INVVLINE |
+ S3C2410_LCDCON5_INVVFRAME |
+ S3C2410_LCDCON5_PWREN |
+ S3C2410_LCDCON5_HWSWP,
+
+ .type = S3C2410_LCDCON1_TFT,
+
+ .width = 800,
+ .height = 480,
+
+ .pixclock = 3, /* HCLK 60 MHz, divisor 2 */
+ .xres = 800,
+ .yres = 480,
+ .bpp= 16,
+ .left_margin= 88,
+ .right_margin = 40,
+ .hsync_len = 128,
+ .upper_margin = 32,
+ .lower_margin = 11,
+ .vsync_len = 2,
+};
+
+static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
+ .displays = at2440evb_lcd_cfg,
+ .num_displays = 1,
+ .default_display = 0,
+};
+
static struct platform_device *at2440evb_devices[] __initdata = {
s3c_device_usb,
s3c_device_wdt,
@@ -175,6 +209,7 @@ static struct platform_device *at2440evb_devices[]
__initdata = {
s3c_device_rtc,
s3c_device_nand,
s3c_device_sdi,
+ s3c_device_lcd,
at2440evb_device_eth,
};
@@ -191,6 +226,7 @@ static void __init at2440evb_map_io(void)
static void __init at2440evb_init(void)
{
+ s3c24xx_fb_set_platdata(at2440evb_fb_info);
platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices));
}
--
1.5.4.3
---
List admin: http://lists.arm.linux.org.uk/mailman/listinfo/linux-arm-kernel
FAQ:http://www.arm.linux.org.uk/mailinglists/faq.php
Etiquette: http://www.arm.linux.org.uk/mailinglists/etiquette.php
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[spi-devel-general] [patch 3/4] spi_s3c24xx_gpio: fix setting of num_chipselect.
The spi master driver must have num_chipselect set to
allow the bus to initialise. Pass this through the
platform data.
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.27-rc7-quilt2/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
===
--- linux-2.6.27-rc7-quilt2.orig/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
2008-09-23 14:59:56.0 +0100
+++ linux-2.6.27-rc7-quilt2/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
2008-09-23 15:58:03.0 +0100
@@ -18,6 +18,7 @@ struct s3c2410_spigpio_info {
unsigned longpin_mosi;
unsigned longpin_miso;
+ int num_chipselect;
int bus_num;
void (*chip_select)(struct s3c2410_spigpio_info *spi, int cs);
Index: linux-2.6.27-rc7-quilt2/drivers/spi/spi_s3c24xx_gpio.c
===
--- linux-2.6.27-rc7-quilt2.orig/drivers/spi/spi_s3c24xx_gpio.c 2008-09-23
15:01:47.0 +0100
+++ linux-2.6.27-rc7-quilt2/drivers/spi/spi_s3c24xx_gpio.c 2008-09-23
15:01:47.0 +0100
@@ -118,6 +118,7 @@ static int s3c2410_spigpio_probe(struct
/* setup spi bitbang adaptor */
sp-bitbang.master = spi_master_get(master);
sp-bitbang.master-bus_num = info-bus_num;
+ sp-bitbang.master-num_chipselect = info-num_chipselect;
sp-bitbang.chipselect = s3c2410_spigpio_chipselect;
sp-bitbang.txrx_word[SPI_MODE_0] = s3c2410_spigpio_txrx_mode0;
--
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Re: [spi-devel-general] [patch 2.6.27-rc6] spi_s3c24xx: fix section warning
On Fri, Sep 12, 2008 at 04:54:08PM -0700, David Brownell wrote: On Friday 12 September 2008, Andrew Morton wrote: On Fri, 12 Sep 2008 09:44:13 -0700 David Brownell [EMAIL PROTECTED] wrote: From: Ben Dooks [EMAIL PROTECTED] Fix the section mismatch warning generated by the iconrrect naming of s3c24xx_spidrv which should be s3c24xx_spi_driver: WARNING: drivers/spi/spi_s3c24xx.o(.data+0x4): Section mismatch in reference from the variable s3c24xx_spidrv to the (unknown reference) .exit.text:(unknown) ... whoa. We have kbuild magic which relies unpn a name ending in _driver? Why did I just learn that. Do you know if this magic is described anywhere? You probably just learned that because you have better things to do than run with the appended patch, and then fixing the resulting warnings (sample shown above) according to the magic handwaving at secref_whitelist() in scripts/mod/modpost.c ... --- lib/Kconfig.debug |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/lib/Kconfig.debug 2008-07-22 15:27:52.0 -0700 +++ b/lib/Kconfig.debug 2008-07-22 15:31:34.0 -0700 @@ -95,7 +95,7 @@ config HEADERS_CHECK config DEBUG_SECTION_MISMATCH bool Enable full Section mismatch analysis - depends on UNDEFINED + # depends on UNDEFINED # This option is on purpose disabled for now. # It will be enabled when we are down to a resonable number # of section mismatch warnings ( 10 for an allyesconfig build) I have something similar in my tree. It would be nice to sort this out so it wasn't disabled by default. -- Ben Q: What's a light-year? A: One-third less calories than a regular year. - This SF.Net email is sponsored by the Moblin Your Move Developer's challenge Build the coolest Linux based applications with Moblin SDK win great prizes Grand prize is a trip for two to an Open Source event anywhere in the world http://moblin-contest.org/redirect.php?banner_id=100url=/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] spi_s3c24xx: fix section mismatch and __devexit code
Fix the section mismatch warning generated by the iconrrect
naming of s3c24xx_spidrv which should be s3c24xx_spi_driver:
WARNING: drivers/spi/spi_s3c24xx.o(.data+0x4): Section mismatch in reference
from the variable s3c24xx_spidrv to the (unknown reference) .exit.text:(unknown)
As noted below, the exit function should be marked __devexit
in case the platform device is capable of being removed.
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.27-rc2-quilt1/drivers/spi/spi_s3c24xx.c
===
--- linux-2.6.27-rc2-quilt1.orig/drivers/spi/spi_s3c24xx.c 2008-08-07
12:37:43.0 +0100
+++ linux-2.6.27-rc2-quilt1/drivers/spi/spi_s3c24xx.c 2008-08-07
12:40:12.0 +0100
@@ -387,7 +387,7 @@ static int __init s3c24xx_spi_probe(stru
return err;
}
-static int __exit s3c24xx_spi_remove(struct platform_device *dev)
+static int __devexit s3c24xx_spi_remove(struct platform_device *dev)
{
struct s3c24xx_spi *hw = platform_get_drvdata(dev);
@@ -436,8 +436,8 @@ static int s3c24xx_spi_resume(struct pla
#endif
MODULE_ALIAS(platform:s3c2410-spi);
-static struct platform_driver s3c24xx_spidrv = {
- .remove = __exit_p(s3c24xx_spi_remove),
+static struct platform_driver s3c24xx_spi_driver = {
+ .remove = __devexit_p(s3c24xx_spi_remove),
.suspend= s3c24xx_spi_suspend,
.resume = s3c24xx_spi_resume,
.driver = {
@@ -448,12 +448,12 @@ static struct platform_driver s3c24xx_sp
static int __init s3c24xx_spi_init(void)
{
-return platform_driver_probe(s3c24xx_spidrv, s3c24xx_spi_probe);
+return platform_driver_probe(s3c24xx_spi_driver, s3c24xx_spi_probe);
}
static void __exit s3c24xx_spi_exit(void)
{
-platform_driver_unregister(s3c24xx_spidrv);
+platform_driver_unregister(s3c24xx_spi_driver);
}
module_init(s3c24xx_spi_init);
--
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[spi-devel-general] SPI: Add pin configuration callback
Add a gpio configuration callback for the s3c24xx SPI driver, as
there are several options depending on the channel and the chip
in use.
This is needed as the controller may not have been setup by the
initial bootloader and the fact that the SPI controller gets
reset over suspend/resume into slave mode but the GPIO function
registers do not.
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.27-rc1-quilt1/drivers/spi/spi_s3c24xx.c
===
--- linux-2.6.27-rc1-quilt1.orig/drivers/spi/spi_s3c24xx.c 2008-08-04
11:46:12.0 +0100
+++ linux-2.6.27-rc1-quilt1/drivers/spi/spi_s3c24xx.c 2008-08-04
11:46:54.0 +0100
@@ -247,6 +247,9 @@ static void s3c24xx_spi_initialsetup(str
writeb(0xff, hw-regs + S3C2410_SPPRE);
writeb(SPPIN_DEFAULT, hw-regs + S3C2410_SPPIN);
writeb(SPCON_DEFAULT, hw-regs + S3C2410_SPCON);
+
+ if (hw-pdata hw-pdata-gpio_setup)
+ hw-pdata-gpio_setup(hw-pdata, 1);
}
static int __init s3c24xx_spi_probe(struct platform_device *pdev)
@@ -412,6 +415,9 @@ static int s3c24xx_spi_suspend(struct pl
{
struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
+ if (hw-pdata hw-pdata-gpio_setup)
+ hw-pdata-gpio_setup(hw-pdata, 0);
+
clk_disable(hw-clk);
return 0;
}
Index: linux-2.6.27-rc1-quilt1/include/asm-arm/arch-s3c2410/spi.h
===
--- linux-2.6.27-rc1-quilt1.orig/include/asm-arm/arch-s3c2410/spi.h
2008-08-04 11:45:55.0 +0100
+++ linux-2.6.27-rc1-quilt1/include/asm-arm/arch-s3c2410/spi.h 2008-08-04
11:46:13.0 +0100
@@ -18,6 +18,7 @@ struct s3c2410_spi_info {
unsigned int num_cs;/* total chipselects */
int bus_num; /* bus number to use. */
+ void (*gpio_setup)(struct s3c2410_spi_info *spi, int enable);
void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol);
};
--
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[spi-devel-general] S3C24XX: Ensure GPIO pins are configure properly on init and resume.
Add initialisation for the necessary GPIO lines on driver probe and
resume. This is needed as we need to place the GPIO lines into inputs
over suspend as the controller is reset during the resume path and
the initial state is to act as a SPI slave which drivers the MISO
line. With the MISO line driven, there is the likelyhood that the
chip will be driving against the SPI slave device (not all SPI
devices tristate their MISO line when their chipselect is inactive)
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.26-quilt5/drivers/spi/spi_s3c24xx.c
===
--- linux-2.6.26-quilt5.orig/drivers/spi/spi_s3c24xx.c 2008-07-29
17:46:06.0 +0100
+++ linux-2.6.26-quilt5/drivers/spi/spi_s3c24xx.c 2008-07-29
17:52:01.0 +0100
@@ -238,6 +238,8 @@ static irqreturn_t s3c24xx_spi_irq(int i
static void s3c24xx_spi_initialsetup(struct s3c24xx_spi *hw)
{
+ struct platform_device *pdev = to_platform_device(hw-dev);
+
/* for the moment, permanently enable the clock */
clk_enable(hw-clk);
@@ -247,6 +249,20 @@ static void s3c24xx_spi_initialsetup(str
writeb(0xff, hw-regs + S3C2410_SPPRE);
writeb(SPPIN_DEFAULT, hw-regs + S3C2410_SPPIN);
writeb(SPCON_DEFAULT, hw-regs + S3C2410_SPCON);
+
+ if (pdev-id == 0) {
+ s3c2410_gpio_cfgpin(S3C2410_GPE13, S3C2410_GPE13_SPICLK0);
+ s3c2410_gpio_cfgpin(S3C2410_GPE12, S3C2410_GPE12_SPIMOSI0);
+ s3c2410_gpio_cfgpin(S3C2410_GPE11, S3C2410_GPE11_SPIMISO0);
+ s3c2410_gpio_pullup(S3C2410_GPE11, 0);
+ s3c2410_gpio_pullup(S3C2410_GPE12, 0);
+ } else {
+ s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPG7_SPICLK1);
+ s3c2410_gpio_cfgpin(S3C2410_GPG6, S3C2410_GPG6_SPIMOSI1);
+ s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPG5_SPIMISO1);
+ s3c2410_gpio_pullup(S3C2410_GPG5, 0);
+ s3c2410_gpio_pullup(S3C2410_GPG6, 0);
+ }
}
static int __init s3c24xx_spi_probe(struct platform_device *pdev)
@@ -412,6 +428,26 @@ static int s3c24xx_spi_suspend(struct pl
{
struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
+ /* Place the gpio associated with the controller into input over
+* suspend as on resume the controller is reset and will end up
+* as a slave until we reconfigure it in the resume path. This
+* means that we cannot allow the controller to drive MISO line
+* during this period in case it drives against something on the
+* board.
+*/
+
+ if (pdev-id == 0) {
+ s3c2410_gpio_pullup(S3C2410_GPE12, 1);
+ s3c2410_gpio_pullup(S3C2410_GPE13, 1);
+ s3c2410_gpio_cfgpin(S3C2410_GPE12, S3C2410_GPIO_INPUT);
+ s3c2410_gpio_cfgpin(S3C2410_GPE11, S3C2410_GPIO_INPUT);
+ } else {
+ s3c2410_gpio_pullup(S3C2410_GPG5, 1);
+ s3c2410_gpio_pullup(S3C2410_GPG6, 1);
+ s3c2410_gpio_cfgpin(S3C2410_GPG6, S3C2410_GPIO_INPUT);
+ s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPIO_INPUT);
+ }
+
clk_disable(hw-clk);
return 0;
}
--
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Re: [spi-devel-general] [Patch 0/4] IndustrialIO subsystem (ADCs, accelerometers etc)
On Thu, Jul 24, 2008 at 09:41:25AM +0200, Hans J. Koch wrote: On Wed, Jul 23, 2008 at 08:19:18PM +0100, Ben Dooks wrote: On Wed, Jul 23, 2008 at 06:00:29PM +0100, Jonathan Cameron wrote: Dear All, The need for an industrialio subsystem was discussed in http://lkml.org/lkml/2008/5/20/135 The name is really bad, this sounds like something for doing large scale industrial process control. Well, it says Industrial I/O. To me, this means it handles I/O devices typically found in industrial applications. Yes, industrial is generally process control of manufacturing processes which in my view is making this sound like it is limiting the field of operations. All the applications we would currently need are things like handheld PDA type devices which are hardly 'industrial' or small consumer measurement systems. Firstly thanks to all the people who have contributed to the discussion of this in the past. In brief the intention is provide a kernel subsystem directed towards the handling on sensors (and later related output devices) such as ADC's, accelerometers and many others. We've already got an perfectly good hwmon framework, do we really need to do this again? hwmon is designed for slow I/O. It won't handle an ADC that does a few megasamples/sec. Thanks, Hans -- Ben ([EMAIL PROTECTED], http://www.fluff.org/) 'a smiley only costs 4 bytes' - This SF.Net email is sponsored by the Moblin Your Move Developer's challenge Build the coolest Linux based applications with Moblin SDK win great prizes Grand prize is a trip for two to an Open Source event anywhere in the world http://moblin-contest.org/redirect.php?banner_id=100url=/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [Patch 0/4] IndustrialIO subsystem (ADCs, accelerometers etc)
On Thu, Jul 24, 2008 at 11:44:36AM +0200, Eric Piel wrote: Henrique de Moraes Holschuh schreef: On Wed, 23 Jul 2008, Jonathan Cameron wrote: The subsystem is now in a functional state with a small set of drivers: Max1363 (supports numerous Maxim i2c ADC's) (tested with max1363 and max1238 chips) - Uses a periodic timer to provide ring buffer mode. - All reads form these devices are scan modes so direct single element access is not provided. - Monitor mode on max1363 is not yet supported (need to do a bit debugging of the board I have so as to be able to test this). ST LIS3L02DQ - SPI accelerometer. - Uses a datardy interrupt to driver a software ring buffer. - Most functionality of this device is supported. VTI SCA3000 (tested with an e05) - Hardware ring buffer. I'd like to see something done to have the common parts of interfaces of the same class (e.g. accelerometers) be standard. Like hwmon does with temp#_input, etc. Otherwise you made it easier to write drivers, but did nothing to help userspace to USE the drivers :-) Hi, I completely agree with Henrique. There already exist 3 accelerometer drivers in the kernel (and I'm writing a fourth on). What we are desperately in need of is a _user_ interface. So that a generic program can pop up and say Oh, there is an accelerometer on this computer, I'll use it to detect free falls. IMHO, I think the ADC should have a much more specific and specialised (user and kernel) API corresponding to the accelerometers. Granted, you probably had in mind only the accelerometers for industrial usage, but it would be much better if the current accelerometer drivers had a reason to be ported to this new subsystem. In particular, what I think would be worthy would be: * Up to 3 pre-defined axes (X, Y, Z) - that's provided by your current version of industrialio * If the accelerometer is soldered on the computer, define once for all to which _physical_ movement corresponds which axis (eg: a laptop on its normal position going up has axis Z increasing). * Free fall event. Either it's hardware detected, or the accelerometer infrastructure will detect it in software. * For each axis, what is the maximum and minimum bound and the unit - Probably worthy for the whole ADC infrastructure * Joystick emulation (calibrated so that when the computer is not moving, all the values are at 0). All the current drivers have it. I think if we're trying to make something that will cover a number of device classes, we need to be more like HID and have a system that reports and possibly records the following: 1) What data is possible to be returned from each event, with the units, magnitude and any scale applied by the device sending. 2) Each event should be able to report a number of items, so that if the sensor reports X/Y/Z in one go, there is just a single event containing those values. 3) A well defined set of information that can be read (like #1) that can provide details of the device and how it relates to the environment it is in. -- Ben ([EMAIL PROTECTED], http://www.fluff.org/) 'a smiley only costs 4 bytes' - This SF.Net email is sponsored by the Moblin Your Move Developer's challenge Build the coolest Linux based applications with Moblin SDK win great prizes Grand prize is a trip for two to an Open Source event anywhere in the world http://moblin-contest.org/redirect.php?banner_id=100url=/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [Patch 0/4] IndustrialIO subsystem (ADCs, accelerometers etc)
On Wed, Jul 23, 2008 at 06:00:29PM +0100, Jonathan Cameron wrote: Dear All, The need for an industrialio subsystem was discussed in http://lkml.org/lkml/2008/5/20/135 The name is really bad, this sounds like something for doing large scale industrial process control. Firstly thanks to all the people who have contributed to the discussion of this in the past. In brief the intention is provide a kernel subsystem directed towards the handling on sensors (and later related output devices) such as ADC's, accelerometers and many others. We've already got an perfectly good hwmon framework, do we really need to do this again? Key features of the subsystem include: * Provision of sysfs access for direct reading from devices (similar to hwmon but without the buffering / update rate restrictions) * Provision of chrdevs through which events may be passed to userspace in a similar fashion to the input subsystem. These events may be anything from hardware thresholds set on the sensor itself to sw / hw ring buffer event notifications (50% full etc). * Provision of access via chrdevs to hardware ring buffers on devices that provide them. * Software ring buffer support to allow semi regular capture of data form the device. Typically this will be driven from either datardy events, or from a periodic timer interrupt (to this end a very simple wrapper for periodic RTC's is included. This will move to more generic timer interfaces as and when they become available. For now available rtc's must be registered with the subsystem via the industrialio_register_ptimer function form within a board init. * A set of sample drivers illustrating the main 'classes' of device. By classes I really mean devices that are interfaced with in a similar way. The subsystem is now in a functional state with a small set of drivers: Max1363 (supports numerous Maxim i2c ADC's) (tested with max1363 and max1238 chips) - Uses a periodic timer to provide ring buffer mode. - All reads form these devices are scan modes so direct single element access is not provided. - Monitor mode on max1363 is not yet supported (need to do a bit debugging of the board I have so as to be able to test this). ST LIS3L02DQ - SPI accelerometer. - Uses a datardy interrupt to driver a software ring buffer. - Most functionality of this device is supported. VTI SCA3000 (tested with an e05) - Hardware ring buffer. More drivers in preparation. Next focus will be on cleaning up / implementing a more generic timer framework and allowing the system to partly run if not all dependencies are met (particularly availability of timers). An initial set of patches will be attached to this thread shortly. -- Ben Q: What's a light-year? A: One-third less calories than a regular year. - This SF.Net email is sponsored by the Moblin Your Move Developer's challenge Build the coolest Linux based applications with Moblin SDK win great prizes Grand prize is a trip for two to an Open Source event anywhere in the world http://moblin-contest.org/redirect.php?banner_id=100url=/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] [Patch 0/4] IndustrialIO subsystem (ADCs, accelerometers etc)
On Wed, Jul 23, 2008 at 06:00:29PM +0100, Jonathan Cameron wrote: Dear All, The need for an industrialio subsystem was discussed in http://lkml.org/lkml/2008/5/20/135 Firstly thanks to all the people who have contributed to the discussion of this in the past. In brief the intention is provide a kernel subsystem directed towards the handling on sensors (and later related output devices) such as ADC's, accelerometers and many others. Thinking about this, basically we have an event buffer and management system that could live in drivers/event. It manages the event sources and buffering, including tagging the data and buffering it ready for consumption. One thing I'd like to see is that the reading application should be able to choose to have events aggregated or not, so that if a few events turn up very fast it can choose to take them as one single item. Key features of the subsystem include: * Provision of sysfs access for direct reading from devices (similar to hwmon but without the buffering / update rate restrictions) Having an update rate and buffering is possibly useful, given that if you have say a number of ADC inputs but only one converter, then it is possible that there will be some form of resource starvation. * Provision of chrdevs through which events may be passed to userspace in a similar fashion to the input subsystem. These events may be anything from hardware thresholds set on the sensor itself to sw / hw ring buffer event notifications (50% full etc). * Provision of access via chrdevs to hardware ring buffers on devices that provide them. * Software ring buffer support to allow semi regular capture of data form the device. Typically this will be driven from either datardy events, or from a periodic timer interrupt (to this end a very simple wrapper for periodic RTC's is included. This will move to more generic timer interfaces as and when they become available. For now available rtc's must be registered with the subsystem via the industrialio_register_ptimer function form within a board init. -- Ben Q: What's a light-year? A: One-third less calories than a regular year. - This SF.Net email is sponsored by the Moblin Your Move Developer's challenge Build the coolest Linux based applications with Moblin SDK win great prizes Grand prize is a trip for two to an Open Source event anywhere in the world http://moblin-contest.org/redirect.php?banner_id=100url=/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [patch 0/2] S3C24XX SPI fixes
These two patches are fixes for the s3c24xx spi driver, the first one seems to have been lost in the noise, the second is a module alias fix for the driver. The patches are suitable for inclusion as soon as possible. -- Ben ([EMAIL PROTECTED], http://www.fluff.org/) 'a smiley only costs 4 bytes' - Check out the new SourceForge.net Marketplace. It's the best place to buy or sell services for just about anything Open Source. http://sourceforge.net/services/buy/index.php ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [patch 2/2] SPI: Move MOD_ALIAS in spi_s3c24xx driver.
Unite the MODULE_ALIAS() declaration with the rest of
the MODULE_* definitions.
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.25-quilt3/drivers/spi/spi_s3c24xx.c
===
--- linux-2.6.25-quilt3.orig/drivers/spi/spi_s3c24xx.c 2008-04-18
11:40:15.0 +0100
+++ linux-2.6.25-quilt3/drivers/spi/spi_s3c24xx.c 2008-04-18
11:41:37.0 +0100
@@ -424,7 +424,6 @@ static int s3c24xx_spi_resume(struct pla
#define s3c24xx_spi_resume NULL
#endif
-MODULE_ALIAS(platform:s3c2410-spi);
static struct platform_driver s3c24xx_spidrv = {
.remove = __exit_p(s3c24xx_spi_remove),
.suspend= s3c24xx_spi_suspend,
@@ -451,3 +450,4 @@ module_exit(s3c24xx_spi_exit);
MODULE_DESCRIPTION(S3C24XX SPI Driver);
MODULE_AUTHOR(Ben Dooks, [EMAIL PROTECTED]);
MODULE_LICENSE(GPL);
+MODULE_ALIAS(platform:s3c2410-spi);
--
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[spi-devel-general] SPI: spi_s3c24xx bus_num fixup due to missing part of previous patch
The original Pass the bus number we expect the S3C24XX SPI driver to attach
to via the platform data. [1] patch was mis-sent, and missed two important
parts of the diff, which was to actually set the bus_num field and add
the relevant field to the platform data.
[1] git commit 50f426b55d919dd017af35bb6a08753d1f262920
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.25-quilt3/include/asm-arm/arch-s3c2410/spi.h
===
--- linux-2.6.25-quilt3.orig/include/asm-arm/arch-s3c2410/spi.h 2008-04-18
11:34:07.0 +0100
+++ linux-2.6.25-quilt3/include/asm-arm/arch-s3c2410/spi.h 2008-04-18
11:36:15.0 +0100
@@ -16,6 +16,7 @@
struct s3c2410_spi_info {
unsigned longpin_cs;/* simple gpio cs */
unsigned int num_cs;/* total chipselects */
+ int bus_num; /* bus number to use. */
void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol);
};
Index: linux-2.6.25-quilt3/drivers/spi/spi_s3c24xx.c
===
--- linux-2.6.25-quilt3.orig/drivers/spi/spi_s3c24xx.c 2008-04-18
11:36:30.0 +0100
+++ linux-2.6.25-quilt3/drivers/spi/spi_s3c24xx.c 2008-04-18
11:39:10.0 +0100
@@ -270,6 +270,7 @@ static int __init s3c24xx_spi_probe(stru
/* setup the master state. */
master-num_chipselect = hw-pdata-num_cs;
+ master-bus_num = pdata-bus_num;
/* setup the state for the bitbang driver */
-
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Re: [spi-devel-general] Accelerometer, Gyros and ADC's etc within the kernel.
On Wed, May 21, 2008 at 09:49:42AM -0400, Dmitry Torokhov wrote: On Tue, May 20, 2008 at 01:28:17PM +0200, Jean Delvare wrote: Hi Jonathan, On Tue, 20 May 2008 11:04:01 +0100, Jonathan Cameron wrote: This email is basically a request for opinions on how and where such sensors should be integrated into the kernel. To set the scene... Increasing numbers of embedded devices are being supplied attached MEMS devices (www.xbow.com imote2 etc). Along with more traditional sensors such as ADC's not being used for hardware monitoring, these do not really seem to fit with in an particular subsystem of the kernel. A previous discussion on lkml in 2006 considered the accelerometers to be found within some laptop hard drives, but I haven't been able to track down any more general discussions of such non hardware monitoring sensors. The obvious possibilities are: * To place the various drivers within the spi / i2c etc subsystems as relevant. Bad idea. Grouping drivers by connectivity is almost always the wrong thing to do, as it means that different persons will maintain them and they have all chances to diverge. You really want to group drivers by functionality. On top of that, I am busy enough maintaining the i2c core and bus drivers without having more i2c device drivers added to my plate. These days I am trying to _empty_ drivers/i2c/chips, if anything. I concur for these sorts of devices, where the connectivity to the device is quite an easy part of the driver, thus you end up with tiny little bus drivers all over the place, and a main core driver. The kernel build system should allow easy selection of interface depending on what is available without huge #ifdef hacks. An example could be: Makefile: mysensor-y := mysensor-core.o mysensor-$(CONFIG_SPI) += mysensor-spi.o mysensor-$(CONFIG_I2C) += mysensor-i2c.o obj-$(CONFIG_MYSENSOR) += mysensor.o * To place within the hwmon subsystem as this is probably closest. (there is already at least one straight ADC driver in hwmon) Probably not the wisest choice, if nothing else, because the hwmon maintainer is already overloaded. And I don't think that these devices have much in common with the traditional hardware monitoring components anyway. I'm not sure what straight ADC driver you are referring to, but anything which measures a voltage and exports the reading to user-space is, well, a voltage sensor, and thus fix within hwmon. If the same chip is used for a higher-level, dedicated function then we would probably have a separate driver for it, outside of hwmon. * To create a new subsystem, or perhaps merely sysfs class to contain these elements. Would be OK. Or: * Place these within the input subsystem. You might want to discuss this with the input subsystem maintainer Dmitry Torokhov (Cc'd). The Wii remote is essentially a joystick, and joysticks belong to the input subsystem. I don't think that input subsystem woudl be the best choice. While we do support the event-driven mechanism for delivering information to userspace input is mostly oriented for human interface devices, not general data acquisition. If anything input_dev is too fat. Another thing is that input layer anonymizes input devices, makes them capability-oriented. I.e. we dont really care what model of joystick we have, we want something that reports ABS_X, ABS_Y, BTN_FIRE and userpsace can use it whether it a simple analog joystick or something fancy and USB connected. For your purposes you probably do want to know what the device is and what exactly being sampled/measured. Can you explain to me how the input system anonymizes things? I thought it was quite easy to read the name of the device? You could easily add a symlink from the driver's device binding in sysfs to the relevant input device as well. Also, why would you not want all your accelerometers grouped into a set of accelerometers? If your application software just searches all input devices for anything reporting itself as an accelerometer, then it would get the right result... -- Ben Q: What's a light-year? A: One-third less calories than a regular year. - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
Re: [spi-devel-general] Accelerometer, Gyros and ADC's etc within the kernel.
On Tue, May 27, 2008 at 07:00:56PM +0100, Jonathan Cameron wrote: The two drivers i've seen so far use the input subsystem to report their data to the user. I'm working on an driver for the SMB380 which can be both i2c and spi. Yes, the ST accel I'm using (LIS3L02DQ) is like that as well, so we definitely need to implement the ability to do this cleanly! this would be so much easier to read if word-wrapped to 77 characters per line. -- Ben Q: What's a light-year? A: One-third less calories than a regular year. - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [PATCH] SPI: spi_s3c24xx driver should initialise completion before using it.
The s3c24xx_spi_txrx() function should initialise the completion each time before using it, otherwise we end up with the possibility of returning success before the interrupt handler has processed all the data. Signed-off-by: Ben Dooks [EMAIL PROTECTED] Index: linux-2.6.24-quilt16/drivers/spi/spi_s3c24xx.c === --- linux-2.6.24-quilt16.orig/drivers/spi/spi_s3c24xx.c +++ linux-2.6.24-quilt16/drivers/spi/spi_s3c24xx.c @@ -192,8 +192,11 @@ static int s3c24xx_spi_txrx(struct spi_d hw-len = t-len; hw-count = 0; + init_completion(hw-done); + /* send the first byte */ writeb(hw_txbyte(hw, 0), hw-regs + S3C2410_SPTDAT); + wait_for_completion(hw-done); return hw-count; -- Ben ([EMAIL PROTECTED], http://www.fluff.org/) 'a smiley only costs 4 bytes' - This SF.net email is sponsored by the 2008 JavaOne(SM) Conference Don't miss this year's exciting event. There's still time to save $100. Use priority code J8TL2D2. http://ad.doubleclick.net/clk;198757673;13503038;p?http://java.sun.com/javaone ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[spi-devel-general] [PATCH] SPI: spi_s3c24xx driver needs to pass num_chipselect.
The SPI core now expects num_chipselect to be set correctly as
due to added checks on the chip being selected before an
transfer is allowed. This patch adds a num_cs field to the
platform data which needs to be set correctly before adding
the SPI platform device.
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.25-rc8-spi/drivers/spi/spi_s3c24xx.c
===
--- linux-2.6.25-rc8-spi.orig/drivers/spi/spi_s3c24xx.c 2008-04-11
15:25:28.0 +0100
+++ linux-2.6.25-rc8-spi/drivers/spi/spi_s3c24xx.c 2008-04-11
15:25:32.0 +0100
@@ -265,6 +265,10 @@ static int __init s3c24xx_spi_probe(stru
platform_set_drvdata(pdev, hw);
init_completion(hw-done);
+ /* setup the master state. */
+
+ master-num_chipselect = hw-pdata-num_cs;
+
/* setup the state for the bitbang driver */
hw-bitbang.master = hw-master;
Index: linux-2.6.25-rc8-spi/include/asm-arm/arch-s3c2410/spi.h
===
--- linux-2.6.25-rc8-spi.orig/include/asm-arm/arch-s3c2410/spi.h
2008-04-11 15:25:28.0 +0100
+++ linux-2.6.25-rc8-spi/include/asm-arm/arch-s3c2410/spi.h 2008-04-11
15:25:32.0 +0100
@@ -18,6 +18,7 @@ struct spi_board_info;
struct s3c2410_spi_info {
unsigned longpin_cs;/* simple gpio cs */
+ unsigned int num_cs;/* total chipselects */
unsigned longboard_size;
struct spi_board_info *board_info;
--
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[spi-devel-general] S3C24XX: Ensure we only configure valid GPIOs
If we specify an GPIO which cannot be used for the
purpose, then assume that the GPIO is not to be used
and do not try and configure it. This can be the case
where the SPI bus is TX only.
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
diff -urpN -X linux-2.6.24-rc3/Documentation/dontdiff
linux-2.6.24-rc3/drivers/spi/spi_s3c24xx_gpio.c
linux-2.6.24-rc3-spigpio1/drivers/spi/spi_s3c24xx_gpio.c
--- linux-2.6.24-rc3/drivers/spi/spi_s3c24xx_gpio.c 2007-10-09
21:31:38.0 +0100
+++ linux-2.6.24-rc3-spigpio1/drivers/spi/spi_s3c24xx_gpio.c2007-11-19
23:32:27.0 +
@@ -96,6 +96,7 @@ static void s3c2410_spigpio_chipselect(s
static int s3c2410_spigpio_probe(struct platform_device *dev)
{
+ struct s3c2410_spigpio_info *info;
struct spi_master *master;
struct s3c2410_spigpio *sp;
int ret;
@@ -113,7 +114,7 @@ static int s3c2410_spigpio_probe(struct
platform_set_drvdata(dev, sp);
/* copy in the plkatform data */
- sp-info = dev-dev.platform_data;
+ info = sp-info = dev-dev.platform_data;
/* setup spi bitbang adaptor */
sp-bitbang.master = spi_master_get(master);
@@ -124,13 +125,18 @@ static int s3c2410_spigpio_probe(struct
sp-bitbang.txrx_word[SPI_MODE_2] = s3c2410_spigpio_txrx_mode2;
sp-bitbang.txrx_word[SPI_MODE_3] = s3c2410_spigpio_txrx_mode3;
- /* set state of spi pins */
- s3c2410_gpio_setpin(sp-info-pin_clk, 0);
- s3c2410_gpio_setpin(sp-info-pin_mosi, 0);
-
- s3c2410_gpio_cfgpin(sp-info-pin_clk, S3C2410_GPIO_OUTPUT);
- s3c2410_gpio_cfgpin(sp-info-pin_mosi, S3C2410_GPIO_OUTPUT);
- s3c2410_gpio_cfgpin(sp-info-pin_miso, S3C2410_GPIO_INPUT);
+ /* set state of spi pins, always assume that the clock is
+* available, but do check the MOSI and MISO. */
+ s3c2410_gpio_setpin(info-pin_clk, 0);
+ s3c2410_gpio_cfgpin(info-pin_clk, S3C2410_GPIO_OUTPUT);
+
+ if (info-pin_mosi S3C2410_GPH10) {
+ s3c2410_gpio_setpin(info-pin_mosi, 0);
+ s3c2410_gpio_cfgpin(info-pin_mosi, S3C2410_GPIO_OUTPUT);
+ }
+
+ if (info-pin_miso != S3C2410_GPA0 info-pin_miso S3C2410_GPH10)
+ s3c2410_gpio_cfgpin(info-pin_miso, S3C2410_GPIO_INPUT);
ret = spi_bitbang_start(sp-bitbang);
if (ret)
-
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[spi-devel-general] [PATCH] Infineion TLE62X0 device driver
Add support for the Infineon TLE62x0 series of low-side driver
chips, such as the TLE6220 or TLE6230.
Signed-off-by: Ben Dooks [EMAIL PROTECTED]
Index: linux-2.6.22-rc4-simtec/include/linux/spi/tle62x0.h
===
--- /dev/null 1970-01-01 00:00:00.0 +
+++ linux-2.6.22-rc4-simtec/include/linux/spi/tle62x0.h 2007-06-05
19:14:07.0 +0100
@@ -0,0 +1,23 @@
+/* include/linux/spi/tle62x0.h
+ *
+ * Copyright 2007 Simtec Electronics
+ * Ben Dooks [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+*/
+
+struct tle62x0_pdata {
+ unsigned intinit_state;
+ unsigned intgpio_count;
+};
Index: linux-2.6.22-rc4-simtec/drivers/spi/Kconfig
===
--- linux-2.6.22-rc4-simtec.orig/drivers/spi/Kconfig2007-06-05
18:27:11.0 +0100
+++ linux-2.6.22-rc4-simtec/drivers/spi/Kconfig 2007-06-05 19:14:07.0
+0100
@@ -160,6 +160,13 @@ config SPI_S3C24XX_GPIO
# Add new SPI master controllers in alphabetical order above this line
#
+config SPI_TLE62X0
+ tristate Infineon TLE62X0
+ depends on SPI_MASTER
+ help
+ SPI driver for Infineion TLE62X0 series line driver chips,
+ such as the TLE6220, TLE6230 and TLE6240.
+
#
# There are lots of SPI device types, with sensors and memory
# being probably the most widely used ones.
Index: linux-2.6.22-rc4-simtec/drivers/spi/tle62x0.c
===
--- /dev/null 1970-01-01 00:00:00.0 +
+++ linux-2.6.22-rc4-simtec/drivers/spi/tle62x0.c 2007-06-05
19:14:07.0 +0100
@@ -0,0 +1,312 @@
+/* drivers/spi/tle62x0.c
+ *
+ * Copyright (c) 2007 Simtec Electronics
+ * Ben Dooks, [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Infineon TLE62x0 series driver
+*/
+
+#include linux/device.h
+#include linux/kernel.h
+
+#include linux/spi/spi.h
+#include linux/spi/tle62x0.h
+
+#define CMD_READ (0x00)
+#define CMD_SET(0xff)
+
+#define DIAG_NORMAL(0x03)
+#define DIAG_OVERLOAD (0x02)
+#define DIAG_OPEN (0x01)
+#define DIAG_SHORTGND (0x00)
+
+struct tle62x0_state {
+ struct spi_device *us;
+ struct mutexlock;
+ unsigned intnr_gpio;
+ unsigned intgpio_state;
+
+ unsigned char tx_buff[4];
+ unsigned char rx_buff[4];
+};
+
+static int to_gpio_num(struct device_attribute *attr);
+
+static inline int tle62x0_write(struct tle62x0_state *st)
+{
+ unsigned char *buff = st-tx_buff;
+ unsigned int gpio_state = st-gpio_state;
+
+ buff[0] = CMD_SET;
+
+ if (st-nr_gpio == 16) {
+ buff[1] = gpio_state 8;
+ buff[2] = gpio_state;
+ } else {
+ buff[1] = gpio_state;
+ }
+
+ dev_dbg(st-us-dev, buff %02x,%02x,%02x\n,
+ buff[0], buff[1], buff[2]);
+
+ return spi_write(st-us, buff, (st-nr_gpio == 16) ? 3 : 2);
+}
+
+static inline int tle62x0_read(struct tle62x0_state *st)
+{
+ unsigned char *txbuff = st-tx_buff;
+ struct spi_transfer xfer = {
+ .tx_buf = txbuff,
+ .rx_buf = st-rx_buff,
+ .len= (st-nr_gpio * 2) / 8,
+ };
+ struct spi_message msg;
+
+ txbuff[0] = CMD_READ;
+ txbuff[1] = 0x00;
+ txbuff[2] = 0x00;
+ txbuff[3] = 0x00;
+
+ spi_message_init(msg);
+ spi_message_add_tail(xfer, msg);
+
+ return spi_sync(st-us, msg);
+}
+
+static unsigned char *decode_fault(unsigned int fault_code)
+{
+ fault_code = 3;
+
+ switch (fault_code) {
+ case DIAG_NORMAL:
+ return N;
+ case DIAG_OVERLOAD:
+ return V;
+ case DIAG_OPEN:
+ return O;
+ case DIAG_SHORTGND:
+ return G;
+ }
+
+ return ?;
+}
+
+static int tle62x0_status_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct tle62x0_state *st
