RE: [PATCH] SPI: SSP SPI Controller driver

2012-11-22 Thread Bi, Chao

On Thu, Nov 22, 2012 at 8:56 AM, Bi, Chao 
chao...@intel.commailto:chao...@intel.com wrote:
  if (chip_info-enable_loopback)
+   chip-cr1 |= SSCR1_LBM;
Who sets the enable_loopback?

[Chao] 'enable_loopback' could be configured by SPI Protocol driver before it 
setup SPI controller. Generally it is not set by default because it's used for 
test and validation.

Should it not then depend on  (spi mode ) SPI_LOOP ?

Or am I missing something.

[Chao] I think it's up to protocol driver: if protocol driver choose to 
configure depend on (spi mode)SPI_LOOP, then it should set 
spi_device.controller_data to make 'enable_loopback' corresponds to (spi mode) 
SPI_LOOP,
anyhow, SSP controller will always judge spi loop only through 
spi_device.controller_data which may be changed by protocol driver.

in spi_intel_mid_ssp.c:

/* protocol drivers may change the chip settings, so...  */
 /* if chip_info exists, use it   */
 chip_info = spi-controller_data;
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RE: [PATCH] SPI: SSP SPI Controller driver

2012-11-21 Thread Bi, Chao
+   if (chip_info-enable_loopback)
+   chip-cr1 |= SSCR1_LBM;
Who sets the enable_loopback?

[Chao] 'enable_loopback' could be configured by SPI Protocol driver before it 
setup SPI controller. Generally it is not set by default because it's used for 
test and validation.

Thanks
From: Shubhrajyoti Datta [mailto:omaplinuxker...@gmail.com]
Sent: Wednesday, November 21, 2012 8:08 PM
To: Bi, Chao
Cc: grant.lik...@secretlab.ca; Chen, Jun D; 
spi-devel-general@lists.sourceforge.net; a...@linux.intel.com; Mills, Ken K; 
Centelles, Sylvain
Subject: Re: [PATCH] SPI: SSP SPI Controller driver


On Wed, Nov 21, 2012 at 7:46 AM, chao bi 
chao...@intel.commailto:chao...@intel.com wrote:

This patch is to implement SSP SPI controller driver, which has been applied and
validated on intel Moorestown  Medfield platform. The patch are originated by
Ken Mills ken.k.mi...@intel.commailto:ken.k.mi...@intel.com and Sylvain 
Centelles sylvain.centel...@intel.commailto:sylvain.centel...@intel.com,
and to be further developed by Channing 
chao...@intel.commailto:chao...@intel.com and Chen Jun
jun.d.c...@intel.commailto:jun.d.c...@intel.com according to their 
integration  validation on Medfield platform.

Signed-off-by: Ken Mills ken.k.mi...@intel.commailto:ken.k.mi...@intel.com
Signed-off-by: Sylvain Centelles 
sylvain.centel...@intel.commailto:sylvain.centel...@intel.com
Signed-off-by: channing chao...@intel.commailto:chao...@intel.com
Signed-off-by: Chen Jun jun.d.c...@intel.commailto:jun.d.c...@intel.com
---
 drivers/spi/Kconfig   |9 +
 drivers/spi/Makefile  |1 +
 drivers/spi/spi-intel-mid-ssp.c   | 1407 +
 include/linux/spi/spi-intel-mid-ssp.h |  326 
 4 files changed, 1743 insertions(+), 0 deletions(-)
 create mode 100644 drivers/spi/spi-intel-mid-ssp.c
 create mode 100644 include/linux/spi/spi-intel-mid-ssp.h

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 1acae35..8b4461b 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -179,6 +179,15 @@ config SPI_IMX
  This enables using the Freescale i.MX SPI controllers in master
  mode.

+config SPI_INTEL_MID_SSP
+   tristate SSP SPI controller driver for Intel MID platforms
+   depends on SPI_MASTER  INTEL_MID_DMAC
+   help
+ This is the unified SSP SPI master controller driver for
+ the Intel MID platforms, handling Moorestown  Medfield,
+ master clock mode.
+ It supports Bulverde SSP core.
+
 config SPI_LM70_LLP
tristate Parallel port adapter for LM70 eval board (DEVELOPMENT)
depends on PARPORT  EXPERIMENTAL
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index c48df47..83f06d0 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_SPI_FSL_ESPI)+= spi-fsl-espi.o
 obj-$(CONFIG_SPI_FSL_SPI)  += spi-fsl-spi.o
 obj-$(CONFIG_SPI_GPIO) += spi-gpio.o
 obj-$(CONFIG_SPI_IMX)  += spi-imx.o
+obj-$(CONFIG_SPI_INTEL_MID_SSP)+= spi-intel-mid-ssp.o
 obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70llp.o
 obj-$(CONFIG_SPI_MPC512x_PSC)  += spi-mpc512x-psc.o
 obj-$(CONFIG_SPI_MPC52xx_PSC)  += spi-mpc52xx-psc.o
diff --git a/drivers/spi/spi-intel-mid-ssp.c b/drivers/spi/spi-intel-mid-ssp.c
new file mode 100644
index 000..8fca48f
--- /dev/null
+++ b/drivers/spi/spi-intel-mid-ssp.c
@@ -0,0 +1,1407 @@
+/*
+ * spi-intel-mid-ssp.c
+ * This driver supports Bulverde SSP core used on Intel MID platforms
+ * It supports SSP of Moorestown  Medfield platforms and handles clock
+ * slave  master modes.
+ *
+ * Copyright (c) 2010, Intel Corporation.
+ *  Ken Mills ken.k.mi...@intel.commailto:ken.k.mi...@intel.com
+ *  Sylvain Centelles 
sylvain.centel...@intel.commailto:sylvain.centel...@intel.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ */
+
+/*
+ * Note:
+ *
+ * Supports DMA and non-interrupt polled transfers.
+ *
+ */
+
+#include linux/delay.h
+#include linux/interrupt.h
+#include linux/highmem.h
+#include linux/pci.h
+#include linux/init.h
+#include linux/interrupt.h
+#include linux/dma-mapping.h
+#include linux/intel_mid_dma.h
+#include linux/pm_qos.h
+#include linux/module.h
+
+#include linux/spi/spi.h
+#include linux/spi/spi