svn commit: r363099 - stable/12/sys/dev/sdhci

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sat Jul 11 16:38:46 2020
New Revision: 363099
URL: https://svnweb.freebsd.org/changeset/base/363099

Log:
  MFC r350162:
  
  Add emmc support for Rockchip RK3399 SoC.
  Tested on NanoPC-T4 board.

Modified:
  stable/12/sys/dev/sdhci/sdhci_fdt.c

Modified: stable/12/sys/dev/sdhci/sdhci_fdt.c
==
--- stable/12/sys/dev/sdhci/sdhci_fdt.c Sat Jul 11 15:57:46 2020
(r363098)
+++ stable/12/sys/dev/sdhci/sdhci_fdt.c Sat Jul 11 16:38:46 2020
(r363099)
@@ -52,6 +52,14 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#ifdef EXT_RESOURCES
+#include 
+#include 
+#include 
+#include 
+#include 
+#endif
+
 #include 
 
 #include 
@@ -61,16 +69,37 @@ __FBSDID("$FreeBSD$");
 
 #include "opt_mmccam.h"
 
+#ifdef EXT_RESOURCES
+#include "clkdev_if.h"
+#include "syscon_if.h"
+#endif
+
 #defineMAX_SLOTS   6
 #defineSDHCI_FDT_ARMADA38X 1
 #defineSDHCI_FDT_GENERIC   2
 #defineSDHCI_FDT_XLNX_ZY7  3
 #defineSDHCI_FDT_QUALCOMM  4
+#defineSDHCI_FDT_RK33995
 
+#ifdef EXT_RESOURCES
+#defineRK3399_GRF_EMMCCORE_CON00xf000
+#define RK3399_CORECFG_BASECLKFREQ 0xff00
+#define RK3399_CORECFG_TIMEOUTCLKUNIT  (1 << 7)
+#define RK3399_CORECFG_TUNINGCOUNT 0x3f
+#defineRK3399_GRF_EMMCCORE_CON11   0xf02c
+#define RK3399_CORECFG_CLOCKMULTIPLIER 0xff
+
+#defineLOWEST_SET_BIT(mask)mask) - 1) & (mask)) ^ (mask))
+#defineSHIFTIN(x, mask)((x) * LOWEST_SET_BIT(mask))
+
+#defineEMMCCARDCLK_ID  1000
+#endif
+
 static struct ofw_compat_data compat_data[] = {
{ "marvell,armada-380-sdhci",   SDHCI_FDT_ARMADA38X },
{ "sdhci_generic",  SDHCI_FDT_GENERIC },
{ "qcom,sdhci-msm-v4",  SDHCI_FDT_QUALCOMM },
+   { "rockchip,rk3399-sdhci-5.1",  SDHCI_FDT_RK3399 },
{ "xlnx,zy7_sdhci", SDHCI_FDT_XLNX_ZY7 },
{ NULL, 0 }
 };
@@ -90,8 +119,209 @@ struct sdhci_fdt_softc {
 
boolwp_inverted;/* WP pin is inverted */
boolno_18v; /* No 1.8V support */
+
+#ifdef EXT_RESOURCES
+   clk_t   clk_xin;/* xin24m fixed clock */
+   clk_t   clk_ahb;/* ahb clock */
+   phy_t   phy;/* phy to be used */
+#endif
 };
 
+#ifdef EXT_RESOURCES
+struct rk3399_emmccardclk_sc {
+   device_tclkdev;
+   bus_addr_t  reg;
+};
+
+static int
+rk3399_emmccardclk_init(struct clknode *clk, device_t dev)
+{
+
+   clknode_init_parent_idx(clk, 0);
+   return (0);
+}
+
+static clknode_method_t rk3399_emmccardclk_clknode_methods[] = {
+   /* Device interface */
+   CLKNODEMETHOD(clknode_init, rk3399_emmccardclk_init),
+   CLKNODEMETHOD_END
+};
+DEFINE_CLASS_1(rk3399_emmccardclk_clknode, rk3399_emmccardclk_clknode_class,
+rk3399_emmccardclk_clknode_methods, sizeof(struct rk3399_emmccardclk_sc),
+clknode_class);
+
+static int
+rk3399_ofw_map(struct clkdom *clkdom, uint32_t ncells,
+phandle_t *cells, struct clknode **clk)
+{
+
+   if (ncells == 0)
+   *clk = clknode_find_by_id(clkdom, EMMCCARDCLK_ID);
+   else
+   return (ERANGE);
+
+   if (*clk == NULL)
+   return (ENXIO);
+   return (0);
+}
+
+static void
+sdhci_init_rk3399_emmccardclk(device_t dev)
+{
+   struct clknode_init_def def;
+   struct rk3399_emmccardclk_sc *sc;
+   struct clkdom *clkdom;
+   struct clknode *clk;
+   clk_t clk_parent;
+   bus_addr_t paddr;
+   bus_size_t psize;
+   const char **clknames;
+   phandle_t node;
+   int i, nclocks, ncells, error;
+
+   node = ofw_bus_get_node(dev);
+
+   if (ofw_reg_to_paddr(node, 0, &paddr, &psize, NULL) != 0) {
+   device_printf(dev, "cannot parse 'reg' property\n");
+   return;
+   }
+
+   error = ofw_bus_parse_xref_list_get_length(node, "clocks",
+   "#clock-cells", &ncells);
+   if (error != 0 || ncells != 2) {
+   device_printf(dev, "couldn't find parent clocks\n");
+   return;
+   }
+
+   nclocks = ofw_bus_string_list_to_array(node, "clock-output-names",
+   &clknames);
+   /* No clocks to export */
+   if (nclocks <= 0)
+   return;
+
+   if (nclocks != 1) {
+   device_printf(dev, "Having %d clock instead of 1, aborting\n",
+   nclocks);
+   return;
+   }
+
+   clkdom = clkdom_create(dev);
+   clkdom_set_ofw_mapper(clkdom, rk3399_ofw_map);
+
+   memset(&def, 0, sizeof(def));
+   def.id = EMMCCARDCLK_ID;
+   def.name = clknames[0];
+   def.parent_names = malloc(sizeof(char *) * ncells, M_OFWPROP, M_WAITOK);
+   for (i = 0; i < nce

svn commit: r357254 - in head/sys: dts/arm64/overlays modules/dtb/rockchip

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Wed Jan 29 12:10:42 2020
New Revision: 357254
URL: https://svnweb.freebsd.org/changeset/base/357254

Log:
  Add an overlay for RK3328 USB3 node.
  It doesn't exist in mainline dts due to the issues related
  with detaching and reattaching USB3 devices as mentioned in
  https://patchwork.kernel.org/patch/10853381/
  In case of FreeBSD, as a temporary workaround "usbconfig reset"
  command can fix the problem.
  
  Reviewed by:  manu

Added:
  head/sys/dts/arm64/overlays/rk3328-dwc3.dtso   (contents, props changed)
Modified:
  head/sys/modules/dtb/rockchip/Makefile

Added: head/sys/dts/arm64/overlays/rk3328-dwc3.dtso
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dts/arm64/overlays/rk3328-dwc3.dtsoWed Jan 29 12:10:42 
2020(r357254)
@@ -0,0 +1,39 @@
+/dts-v1/;
+/plugin/;
+
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "rockchip,rk3328";
+};
+
+&{/} {
+   usbdrd3: usb@ff60 {
+   compatible = "rockchip,rk3328-dwc3";
+   clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
+<&cru ACLK_USB3OTG>;
+   clock-names = "ref_clk", "suspend_clk",
+ "bus_clk";
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+   status = "okay";
+
+   usbdrd_dwc3: dwc3@ff60 {
+   compatible = "snps,dwc3";
+   reg = <0x0 0xff60 0x0 0x10>;
+   interrupts = ;
+   dr_mode = "host";
+   phy_type = "utmi_wide";
+   snps,dis_enblslpm_quirk;
+   snps,dis-u2-freeclk-exists-quirk;
+   snps,dis_u2_susphy_quirk;
+   snps,dis_u3_susphy_quirk;
+   snps,dis-del-phy-power-chg-quirk;
+   snps,dis-tx-ipgap-linecheck-quirk;
+   status = "okay";
+   };
+   };
+};

Modified: head/sys/modules/dtb/rockchip/Makefile
==
--- head/sys/modules/dtb/rockchip/Makefile  Wed Jan 29 12:02:47 2020
(r357253)
+++ head/sys/modules/dtb/rockchip/Makefile  Wed Jan 29 12:10:42 2020
(r357254)
@@ -7,4 +7,6 @@ DTS=\
rockchip/rk3328-rock64.dts \
rockchip/rk3399-rockpro64.dts
 
+DTSO=  rk3328-dwc3.dtso
+
 .include 
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svn commit: r357252 - head/sys/arm64/rockchip

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Wed Jan 29 09:36:59 2020
New Revision: 357252
URL: https://svnweb.freebsd.org/changeset/base/357252

Log:
  Enable USB3 support for Rockchip RK3328 SoC.
  
  Reviewed by:  manu

Modified:
  head/sys/arm64/rockchip/rk_dwc3.c

Modified: head/sys/arm64/rockchip/rk_dwc3.c
==
--- head/sys/arm64/rockchip/rk_dwc3.c   Wed Jan 29 09:33:40 2020
(r357251)
+++ head/sys/arm64/rockchip/rk_dwc3.c   Wed Jan 29 09:36:59 2020
(r357252)
@@ -54,8 +54,14 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+enum rk_dwc3_type {
+   RK3328 = 1,
+   RK3399,
+};
+
 static struct ofw_compat_data compat_data[] = {
-   { "rockchip,rk3399-dwc3",   1 },
+   { "rockchip,rk3328-dwc3",   RK3328 },
+   { "rockchip,rk3399-dwc3",   RK3399 },
{ NULL, 0 }
 };
 
@@ -69,6 +75,7 @@ struct rk_dwc3_softc {
clk_t   clk_usb3;
clk_t   clk_grf;
hwreset_t   rst_usb3;
+   enum rk_dwc3_type   type;
 };
 
 static int
@@ -102,6 +109,7 @@ rk_dwc3_attach(device_t dev)
sc = device_get_softc(dev);
sc->dev = dev;
node = ofw_bus_get_node(dev);
+   sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
 
/* Mandatory clocks */
if (clk_get_by_ofw_name(dev, 0, "ref_clk", &sc->clk_ref) != 0) {
@@ -134,17 +142,18 @@ rk_dwc3_attach(device_t dev)
clk_get_name(sc->clk_bus));
return (ENXIO);
}
-   if (clk_get_by_ofw_name(dev, 0, "grf_clk", &sc->clk_grf) != 0) {
-   device_printf(dev, "Cannot get grf_clk clock\n");
-   return (ENXIO);
+   if (sc->type == RK3399) {
+   if (clk_get_by_ofw_name(dev, 0, "grf_clk", &sc->clk_grf) != 0) {
+   device_printf(dev, "Cannot get grf_clk clock\n");
+   return (ENXIO);
+   }
+   err = clk_enable(sc->clk_grf);
+   if (err != 0) {
+   device_printf(dev, "Could not enable clock %s\n",
+   clk_get_name(sc->clk_grf));
+   return (ENXIO);
+   }
}
-   err = clk_enable(sc->clk_grf);
-   if (err != 0) {
-   device_printf(dev, "Could not enable clock %s\n",
-   clk_get_name(sc->clk_grf));
-   return (ENXIO);
-   }
-
/* Optional clocks */
if (clk_get_by_ofw_name(dev, 0, "aclk_usb3_rksoc_axi_perf", 
&sc->clk_axi_perf) == 0) {
err = clk_enable(sc->clk_axi_perf);
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svn commit: r357250 - head/sys/arm64/rockchip/clk

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Wed Jan 29 08:46:35 2020
New Revision: 357250
URL: https://svnweb.freebsd.org/changeset/base/357250

Log:
  Add USB3 related clock definitions for Rockchip RK3328 SoC.
  
  Reviewed by:  manu

Modified:
  head/sys/arm64/rockchip/clk/rk3328_cru.c

Modified: head/sys/arm64/rockchip/clk/rk3328_cru.c
==
--- head/sys/arm64/rockchip/clk/rk3328_cru.cWed Jan 29 05:59:22 2020
(r357249)
+++ head/sys/arm64/rockchip/clk/rk3328_cru.cWed Jan 29 08:46:35 2020
(r357250)
@@ -51,6 +51,8 @@ __FBSDID("$FreeBSD$");
 
 /* GATES */
 
+#defineSCLK_USB3OTG_REF96
+#defineACLK_USB3OTG132
 #defineACLK_PERI   153
 #definePCLK_GPIO0  200
 #definePCLK_GPIO1  201
@@ -61,6 +63,9 @@ __FBSDID("$FreeBSD$");
 #definePCLK_I2C2   207
 #definePCLK_I2C3   208
 #definePCLK_TSADC  213
+#definePCLK_USB3PHY_OTG224
+#definePCLK_USB3PHY_PIPE   225
+#definePCLK_USB3_GRF   226
 #defineHCLK_SDMMC  317
 #defineHCLK_SDIO   318
 #defineHCLK_EMMC   319
@@ -76,6 +81,7 @@ static struct rk_cru_gate rk3328_gates[] = {
/* CRU_CLKGATE_CON4 */
CRU_GATE(0, "gpll_peri", "gpll", 0x210, 0)
CRU_GATE(0, "cpll_peri", "cpll", 0x210, 1)
+   CRU_GATE(SCLK_USB3OTG_REF, "clk_usb3otg_ref", "xin24m", 0x210, 7)
 
/* CRU_CLKGATE_CON8 */
CRU_GATE(0, "pclk_bus", "pclk_bus_pre", 0x220, 3)
@@ -98,13 +104,21 @@ static struct rk_cru_gate rk3328_gates[] = {
CRU_GATE(PCLK_GPIO2, "pclk_gpio2", "pclk_bus", 0x240, 9)
CRU_GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_bus", 0x240, 10)
 
+   /* CRU_CLKGATE_CON17 */
+   CRU_GATE(PCLK_USB3_GRF, "pclk_usb3_grf", "pclk_phy_pre", 0x244, 2)
+
/* CRU_CLKGATE_CON19 */
CRU_GATE(HCLK_SDMMC, "hclk_sdmmc", "hclk_peri", 0x24C, 0)
CRU_GATE(HCLK_SDIO, "hclk_sdio", "hclk_peri", 0x24C, 1)
CRU_GATE(HCLK_EMMC, "hclk_emmc", "hclk_peri", 0x24C, 2)
CRU_GATE(0, "hclk_peri_niu", "hclk_peri", 0x24C, 12)
CRU_GATE(0, "pclk_peri_niu", "hclk_peri", 0x24C, 13)
+   CRU_GATE(ACLK_USB3OTG, "aclk_usb3otg", "aclk_peri", 0x24C, 14)
CRU_GATE(HCLK_SDMMC_EXT, "hclk_sdmmc_ext", "hclk_peri", 0x24C, 15)
+
+   /* CRU_CLKGATE_CON28 */
+   CRU_GATE(PCLK_USB3PHY_OTG, "pclk_usb3phy_otg", "pclk_phy_pre", 0x270, 1)
+   CRU_GATE(PCLK_USB3PHY_PIPE, "pclk_usb3phy_pipe", "pclk_phy_pre", 0x270, 
2)
 };
 
 /*
@@ -991,6 +1005,78 @@ static struct rk_clk_composite_def i2c3 = {
.flags = RK_CLK_COMPOSITE_HAVE_MUX | RK_CLK_COMPOSITE_HAVE_GATE,
 };
 
+#defineSCLK_USB3_REF   72
+#defineSCLK_USB3_SUSPEND   73
+#defineSCLK_USB3PHY_REF94
+#defineSCLK_REF_USB3OTG95
+#defineSCLK_USB3OTG_SUSPEND97
+#defineSCLK_REF_USB3OTG_SRC98
+
+static const char *ref_usb3otg_parents[] = { "xin24m", "clk_usb3otg_ref" };
+
+static struct rk_clk_composite_def ref_usb3otg = {
+   .clkdef = {
+   .id = SCLK_REF_USB3OTG,
+   .name = "clk_ref_usb3otg",
+   .parent_names = ref_usb3otg_parents,
+   .parent_cnt = nitems(ref_usb3otg_parents),
+   },
+   .muxdiv_offset = 0x1B4,
+
+   .mux_shift = 8,
+   .mux_width = 1,
+
+   .flags = RK_CLK_COMPOSITE_HAVE_MUX,
+};
+
+static const char *usb3otg_suspend_parents[] = { "xin24m"/*, "clk_rtc32k" */};
+
+static struct rk_clk_composite_def usb3otg_suspend = {
+   .clkdef = {
+   .id = SCLK_USB3OTG_SUSPEND,
+   .name = "clk_usb3otg_suspend",
+   .parent_names = usb3otg_suspend_parents,
+   .parent_cnt = nitems(usb3otg_suspend_parents),
+   },
+   .muxdiv_offset = 0x184,
+
+   .mux_shift = 15,
+   .mux_width = 1,
+
+   .div_shift = 0,
+   .div_width = 10,
+
+   /* CRU_CLKGATE_CON4 */
+   .gate_offset = 0x210,
+   .gate_shift = 8,
+
+   .flags = RK_CLK_COMPOSITE_HAVE_GATE,
+};
+
+static const char *ref_usb3otg_src_parents[] = { "cpll", "gpll" };
+
+static struct rk_clk_composite_def ref_usb3otg_src = {
+   .clkdef = {
+   .id = SCLK_REF_USB3OTG_SRC,
+   .name = "clk_ref_usb3otg_src",
+   .parent_names = ref_usb3otg_src_parents,
+   .parent_cnt = nitems(ref_usb3otg_src_parents),
+   },
+   .muxdiv_offset = 0x1B4,
+
+   .mux_shift = 7,
+   .mux_width = 1,
+
+   .div_shift = 0,
+   .div_width = 7,
+
+   /* CRU_CLKGATE_CON4 */
+   .gate_offset = 0x210,
+   .gate_shift = 9,
+
+   .flags = RK_CLK_COMPOSITE_HAVE_GATE,
+};
+
 static struct rk_clk rk3328_clks[] = {
{
.type = RK3328_CLK_PLL,
@@ -1075,6 +1161,19 @@ static struct rk_clk rk3328

svn commit: r356075 - head/sys/dev/etherswitch/e6000sw

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Wed Dec 25 11:26:38 2019
New Revision: 356075
URL: https://svnweb.freebsd.org/changeset/base/356075

Log:
  Fix panic when running etherswitchcfg port command.

Modified:
  head/sys/dev/etherswitch/e6000sw/e6000sw.c

Modified: head/sys/dev/etherswitch/e6000sw/e6000sw.c
==
--- head/sys/dev/etherswitch/e6000sw/e6000sw.c  Wed Dec 25 09:34:16 2019
(r356074)
+++ head/sys/dev/etherswitch/e6000sw/e6000sw.c  Wed Dec 25 11:26:38 2019
(r356075)
@@ -849,6 +849,8 @@ e6000sw_setport(device_t dev, etherswitch_port_t *p)
if (!e6000sw_is_portenabled(sc, p->es_port))
return (0);
 
+   E6000SW_LOCK(sc);
+
/* Port flags. */
reg = e6000sw_readreg(sc, REG_PORT(sc, p->es_port), PORT_CONTROL2);
if (p->es_flags & ETHERSWITCH_PORT_DROPTAGGED)
@@ -862,7 +864,6 @@ e6000sw_setport(device_t dev, etherswitch_port_t *p)
e6000sw_writereg(sc, REG_PORT(sc, p->es_port), PORT_CONTROL2, reg);
 
err = 0;
-   E6000SW_LOCK(sc);
if (p->es_pvid != 0)
e6000sw_set_pvid(sc, p->es_port, p->es_pvid);
if (e6000sw_is_phyport(sc, p->es_port)) {
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Re: svn commit: r355373 - in head/sys: amd64/amd64 amd64/cloudabi32 amd64/cloudabi64 amd64/ia32 amd64/linux amd64/linux32 arm/arm arm/cloudabi32 arm64/arm64 arm64/cloudabi32 arm64/cloudabi64 arm64/lin

[Ganbold Tsagaankhuu]

On Wed, Dec 4, 2019 at 7:18 AM John Baldwin  wrote:

> Author: jhb
> Date: Tue Dec  3 23:17:54 2019
> New Revision: 355373
> URL: https://svnweb.freebsd.org/changeset/base/355373
>
> Log:
>   Use uintptr_t instead of register_t * for the stack base.
>
>   - Use ustringp for the location of the argv and environment strings
> and allow destp to travel further down the stack for the stackgap
> and auxv regions.
>   - Update the Linux copyout_strings variants to move destp down the
> stack as was done for the native ABIs in r263349.
>   - Stop allocating a space for a stack gap in the Linux ABIs.  This
> used to hold translated system call arguments, but hasn't been used
> since r159992.
>
>   Reviewed by:  kib
>   Tested on:md64 (amd64, i386, linux64), i386 (i386, linux)
>   Sponsored by: DARPA
>   Differential Revision:https://reviews.freebsd.org/D22501
>
> Modified:
>   head/sys/amd64/amd64/machdep.c
>   head/sys/amd64/cloudabi32/cloudabi32_sysvec.c
>   head/sys/amd64/cloudabi64/cloudabi64_sysvec.c
>   head/sys/amd64/ia32/ia32_signal.c
>   head/sys/amd64/linux/linux_sysvec.c
>   head/sys/amd64/linux32/linux32_sysvec.c
>   head/sys/arm/arm/machdep.c
>   head/sys/arm/cloudabi32/cloudabi32_sysvec.c
>   head/sys/arm64/arm64/elf32_machdep.c
>   head/sys/arm64/arm64/machdep.c
>   head/sys/arm64/cloudabi32/cloudabi32_sysvec.c
>   head/sys/arm64/cloudabi64/cloudabi64_sysvec.c
>   head/sys/arm64/linux/linux_sysvec.c
>

This maybe breaks buildkernel on arm64:

--- all_subdir_linux64 ---
/usr/src/sys/arm64/linux/linux_sysvec.c:235:8: error: incompatible integer
to pointer conversion assigning to 'uintptr_t *' (aka 'unsigned long *')
from 'uintptr_t' (aka 'unsigned long') [-Werror,-Wint-conversion]
destp = (uintptr_t)arginfo;
  ^ ~~
/usr/src/sys/arm64/linux/linux_sysvec.c:239:11: error: invalid operands to
binary expression ('uintptr_t *' (aka 'unsigned long *') and 'unsigned
long')
destp = rounddown2(destp, sizeof(void *));
^
/usr/src/sys/sys/param.h:301:30: note: expanded from macro 'rounddown2'
--- all_subdir_mac_test ---
--- mac_test.o ---
--- all_subdir_linux64 ---
#define rounddown2(x, y) ((x)&(~((y)-1)))  /* if y is power of two
*/
  ~~~^~~
/usr/src/sys/arm64/linux/linux_sysvec.c:240:19: error: incompatible pointer
to integer conversion assigning to 'unsigned long' from 'uintptr_t *' (aka
'unsigned long *'); dereference with * [-Werror,-Wint-conversion]
imgp->execpathp = destp;
^ ~
  *
/usr/src/sys/arm64/linux/linux_sysvec.c:249:15: error: incompatible pointer
to integer conversion assigning to 'unsigned long' from 'uintptr_t *' (aka
'unsigned long *'); dereference with * [-Werror,-Wint-conversion]
imgp->canary = destp;
 ^ ~
   *
/usr/src/sys/arm64/linux/linux_sysvec.c:256:10: error: invalid operands to
binary expression ('uintptr_t *' (aka 'unsigned long *') and 'unsigned
long')
destp = rounddown2(destp, sizeof(void *));
^
/usr/src/sys/sys/param.h:301:30: note: expanded from macro 'rounddown2'
#define rounddown2(x, y) ((x)&(~((y)-1)))  /* if y is power of two
*/
  ~~~^~~
--- all_subdir_mac_test ---
cc -target aarch64-unknown-freebsd13.0
--sysroot=/usr/obj/usr/src/arm64.aarch64/tmp
-B/usr/obj/usr/src/arm64.aarch64/tmp/usr/bin  -O2 -pipe
 -fno-strict-aliasing -Werror -D_KERNEL -DKLD_MODULE -DKLD_TIED -nostdinc
-DHAVE_KERNEL_OPTION_HEADERS -include
/usr/obj/usr/src/arm64.aarch64/sys/GENERIC/opt_global.h -I. -I/usr/src/sys
-I/usr/src/sys/contrib/ck/include -fno-common -g -fPIC
-fdebug-prefix-map=./machine=/usr/src/sys/arm64/include
-I/usr/obj/usr/src/arm64.aarch64/sys/GENERIC -MD  -MF.depend.mac_test.o
-MTmac_test.o -mgeneral-regs-only -ffixed-x18 -ffreestanding -fwrapv
-fstack-protector -gdwarf-2 -Wall -Wredundant-decls -Wnested-externs
-Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wcast-qual
-Wundef -Wno-pointer-sign -D__printf__=__freebsd_kprintf__
-Wmissing-include-dirs -fdiagnostics-show-option -Wno-unknown-pragmas
-Wno-error-tautological-compare -Wno-error-empty-body
-Wno-error-parentheses-equality -Wno-error-unused-function
-Wno-error-pointer-sign -Wno-error-shift-negative-value
-Wno-address-of-packed-member -Wno-format-zero-length -std=iso9899:1999
-c /usr/src/sys/security/mac_test/mac_test.c -o mac_test.o
--- all_subdir_linux64 ---
/usr/src/sys/arm64/linux/linux_sysvec.c:260:50: error: incompatible pointer
types passing 'uintptr_t **' (aka 'unsigned long **') to parameter of type
'uintptr_t *' (aka 'unsigned long *'); remove &
[-Werror,-Wincompatible-pointer-types]
error = imgp->sysent->sv_copyout_auxargs(imgp, &destp);
   

svn commit: r354678 - in stable/12/sys: dts/arm/overlays modules/dtb/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Wed Nov 13 10:08:45 2019
New Revision: 354678
URL: https://svnweb.freebsd.org/changeset/base/354678

Log:
  MFC r351452
  dtso: allwinner: Add an overlay for H3 thermal node

Added:
  stable/12/sys/dts/arm/overlays/sun8i-h3-ths.dtso   (contents, props changed)
Modified:
  stable/12/sys/dts/arm/overlays/sun8i-h3-sid.dtso
  stable/12/sys/modules/dtb/allwinner/Makefile

Modified: stable/12/sys/dts/arm/overlays/sun8i-h3-sid.dtso
==
--- stable/12/sys/dts/arm/overlays/sun8i-h3-sid.dtsoWed Nov 13 07:43:11 
2019(r354677)
+++ stable/12/sys/dts/arm/overlays/sun8i-h3-sid.dtsoWed Nov 13 10:08:45 
2019(r354678)
@@ -10,5 +10,10 @@
compatible = "allwinner,sun8i-h3-sid";
reg = <0x1c14000 0x400>;
status = "okay";
+
+   /* Data cells */
+   ths_calib: calib@234 {
+   reg = <0x234 0x2>;
+   };
};
 };

Added: stable/12/sys/dts/arm/overlays/sun8i-h3-ths.dtso
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ stable/12/sys/dts/arm/overlays/sun8i-h3-ths.dtsoWed Nov 13 10:08:45 
2019(r354678)
@@ -0,0 +1,27 @@
+/dts-v1/;
+/plugin/;
+
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "allwinner,sun8i-h3";
+};
+
+&{/soc} {
+   ths: thermal_sensor@1c25000 {
+compatible = "allwinner,sun8i-h3-ths";
+reg = <0x01c25000 0x100>;
+interrupts = ;
+clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
+clock-names = "apb", "ths";
+resets = <&ccu RST_BUS_THS>;
+reset-names = "apb";
+#thermal-sensor-cells = <0>;
+status = "okay";
+
+nvmem-cells = <&ths_calib>;
+nvmem-cell-names = "ths-calib";
+};
+};

Modified: stable/12/sys/modules/dtb/allwinner/Makefile
==
--- stable/12/sys/modules/dtb/allwinner/MakefileWed Nov 13 07:43:11 
2019(r354677)
+++ stable/12/sys/modules/dtb/allwinner/MakefileWed Nov 13 10:08:45 
2019(r354678)
@@ -24,7 +24,8 @@ DTS=  \
sun8i-h3-orangepi-plus2e.dts
 
 DTSO=  sun8i-a83t-sid.dtso \
-   sun8i-h3-sid.dtso
+   sun8i-h3-sid.dtso \
+   sun8i-h3-ths.dtso
 
 LINKS= \
${DTBDIR}/sun4i-a10-cubieboard.dtb ${DTBDIR}/cubieboard.dtb \
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svn commit: r346428 - in head/sys: arm64/conf conf

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sat Apr 20 03:21:47 2019
New Revision: 346428
URL: https://svnweb.freebsd.org/changeset/base/346428

Log:
  Add SY8106A Buck Regulator and Allwinner CIR devices to GENERIC arm64 kernel.

Modified:
  head/sys/arm64/conf/GENERIC
  head/sys/conf/files.arm64

Modified: head/sys/arm64/conf/GENERIC
==
--- head/sys/arm64/conf/GENERIC Sat Apr 20 02:54:20 2019(r346427)
+++ head/sys/arm64/conf/GENERIC Sat Apr 20 03:21:47 2019(r346428)
@@ -233,6 +233,7 @@ device  iic
 device twsi# Allwinner I2C controller
 device rk_i2c  # RockChip I2C controller
 device syr827  # Silergy SYR827 PMIC
+device sy8106a # SY8106A Buck Regulator
 
 # Clock and reset controllers
 device aw_ccu  # Allwinner clock controller
@@ -278,6 +279,7 @@ device  vt_efifb
 device evdev   # input event device support
 optionsEVDEV_SUPPORT   # evdev support in legacy 
drivers
 device uinput  # install /dev/uinput cdev
+device aw_cir
 
 # Pseudo devices.
 device crypto  # core crypto support

Modified: head/sys/conf/files.arm64
==
--- head/sys/conf/files.arm64   Sat Apr 20 02:54:20 2019(r346427)
+++ head/sys/conf/files.arm64   Sat Apr 20 03:21:47 2019(r346428)
@@ -27,6 +27,7 @@ cloudabi64_vdso_blob.ooptional
compat_cloudabi64   \
 # Allwinner common files
 arm/allwinner/a10_ehci.c   optionalehci aw_ehci fdt
 arm/allwinner/a10_timer.c  optionala10_timer fdt
+arm/allwinner/aw_cir.c optionalevdev aw_cir fdt
 arm/allwinner/aw_gpio.coptionalgpio aw_gpio fdt
 arm/allwinner/aw_mmc.c optionalmmc aw_mmc fdt | mmccam aw_mmc 
fdt
 arm/allwinner/aw_nmi.c optionalaw_nmi fdt \
@@ -206,6 +207,7 @@ dev/axgbe/xgbe-dev.coptionalaxgbe
 dev/axgbe/xgbe-drv.c   optionalaxgbe
 dev/axgbe/xgbe-mdio.c  optionalaxgbe
 dev/cpufreq/cpufreq_dt.c   optionalcpufreq fdt
+dev/iicbus/sy8106a.c   optionalsy8106a fdt
 dev/iicbus/twsi/mv_twsi.c  optionaltwsi fdt
 dev/iicbus/twsi/a10_twsi.c optionaltwsi fdt
 dev/iicbus/twsi/twsi.c optionaltwsi fdt


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svn commit: r346052 - head/sys/dev/usb/net

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue Apr  9 13:54:08 2019
New Revision: 346052
URL: https://svnweb.freebsd.org/changeset/base/346052

Log:
  In some cases like NanoPI R1, its second USB ethernet
  RTL8152 (chip version URE_CHIP_VER_4C10) doesn't
  have hardwired MAC address, in other words, it is all zeros.
  This commit fixes it by setting random MAC address
  when MAC address is all zeros.
  
  Reviewed by:  kevlo
  Differential Revision:https://reviews.freebsd.org/D19856

Modified:
  head/sys/dev/usb/net/if_ure.c

Modified: head/sys/dev/usb/net/if_ure.c
==
--- head/sys/dev/usb/net/if_ure.c   Tue Apr  9 12:28:12 2019
(r346051)
+++ head/sys/dev/usb/net/if_ure.c   Tue Apr  9 13:54:08 2019
(r346052)
@@ -62,6 +62,9 @@ SYSCTL_INT(_hw_usb_ure, OID_AUTO, debug, CTLFLAG_RWTUN
 "Debug level");
 #endif
 
+#defineETHER_IS_ZERO(addr) \
+   (!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]))
+
 /*
  * Various supported device vendors/products.
  */
@@ -673,12 +676,20 @@ ure_attach_post(struct usb_ether *ue)
else
ure_rtl8153_init(sc);
 
-   if (sc->sc_chip & URE_CHIP_VER_4C00)
+   if ((sc->sc_chip & URE_CHIP_VER_4C00) ||
+   (sc->sc_chip & URE_CHIP_VER_4C10))
ure_read_mem(sc, URE_PLA_IDR, URE_MCU_TYPE_PLA,
ue->ue_eaddr, 8);
else
ure_read_mem(sc, URE_PLA_BACKUP, URE_MCU_TYPE_PLA,
ue->ue_eaddr, 8);
+
+   if (ETHER_IS_ZERO(sc->sc_ue.ue_eaddr)) {
+   device_printf(sc->sc_ue.ue_dev, "MAC assigned randomly\n");
+   arc4rand(sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN, 0);
+   sc->sc_ue.ue_eaddr[0] &= ~0x01; /* unicast */
+   sc->sc_ue.ue_eaddr[0] |= 0x02;  /* locally administered */
+   }
 }
 
 static int
@@ -724,8 +735,10 @@ ure_init(struct usb_ether *ue)
ure_reset(sc);
 
/* Set MAC address. */
+   ure_write_1(sc, URE_PLA_CRWECR, URE_MCU_TYPE_PLA, URE_CRWECR_CONFIG);
ure_write_mem(sc, URE_PLA_IDR, URE_MCU_TYPE_PLA | URE_BYTE_EN_SIX_BYTES,
IF_LLADDR(ifp), 8);
+   ure_write_1(sc, URE_PLA_CRWECR, URE_MCU_TYPE_PLA, URE_CRWECR_NORAML);
 
/* Reset the packet filter. */
ure_write_2(sc, URE_PLA_FMC, URE_MCU_TYPE_PLA,


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svn commit: r346028 - head/sys/dev/usb/net

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Mon Apr  8 13:40:46 2019
New Revision: 346028
URL: https://svnweb.freebsd.org/changeset/base/346028

Log:
  Fix URE_WDT6_SET_MODE value in the register definition.
  Both linux and u-boot sources for RTL8152 driver has this value.
  RTL8152 USB ethernet is used in NanoPI R1 board as second ethernet.
  This fixes for me RTL8152 USB ethernet not detected problem after
  reboot on NanoPI R1 board.
  
  Both NetBSD and OpenBSD have a wrong value so far.

Modified:
  head/sys/dev/usb/net/if_urereg.h

Modified: head/sys/dev/usb/net/if_urereg.h
==
--- head/sys/dev/usb/net/if_urereg.hMon Apr  8 11:54:45 2019
(r346027)
+++ head/sys/dev/usb/net/if_urereg.hMon Apr  8 13:40:46 2019
(r346028)
@@ -176,7 +176,7 @@
 #defineURE_EEEP_CR_EEEP_TX 0x0002
 
 /* PLA_WDT6_CTRL */
-#defineURE_WDT6_SET_MODE   0x001
+#defineURE_WDT6_SET_MODE   0x0010
 
 /* PLA_TCR0 */
 #defineURE_TCR0_TX_EMPTY   0x0800


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svn commit: r351452 - in head/sys: dts/arm/overlays modules/dtb/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sat Aug 24 13:26:34 2019
New Revision: 351452
URL: https://svnweb.freebsd.org/changeset/base/351452

Log:
  dtso: allwinner: Add an overlay for H3 thermal node
  
  Reviewed by:  manu

Added:
  head/sys/dts/arm/overlays/sun8i-h3-ths.dtso   (contents, props changed)
Modified:
  head/sys/dts/arm/overlays/sun8i-h3-sid.dtso
  head/sys/modules/dtb/allwinner/Makefile

Modified: head/sys/dts/arm/overlays/sun8i-h3-sid.dtso
==
--- head/sys/dts/arm/overlays/sun8i-h3-sid.dtso Sat Aug 24 12:51:46 2019
(r351451)
+++ head/sys/dts/arm/overlays/sun8i-h3-sid.dtso Sat Aug 24 13:26:34 2019
(r351452)
@@ -10,5 +10,10 @@
compatible = "allwinner,sun8i-h3-sid";
reg = <0x1c14000 0x400>;
status = "okay";
+
+   /* Data cells */
+   ths_calib: calib@234 {
+   reg = <0x234 0x2>;
+   };
};
 };

Added: head/sys/dts/arm/overlays/sun8i-h3-ths.dtso
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dts/arm/overlays/sun8i-h3-ths.dtso Sat Aug 24 13:26:34 2019
(r351452)
@@ -0,0 +1,27 @@
+/dts-v1/;
+/plugin/;
+
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "allwinner,sun8i-h3";
+};
+
+&{/soc} {
+   ths: thermal_sensor@1c25000 {
+compatible = "allwinner,sun8i-h3-ths";
+reg = <0x01c25000 0x100>;
+interrupts = ;
+clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
+clock-names = "apb", "ths";
+resets = <&ccu RST_BUS_THS>;
+reset-names = "apb";
+#thermal-sensor-cells = <0>;
+status = "okay";
+
+nvmem-cells = <&ths_calib>;
+nvmem-cell-names = "ths-calib";
+};
+};

Modified: head/sys/modules/dtb/allwinner/Makefile
==
--- head/sys/modules/dtb/allwinner/Makefile Sat Aug 24 12:51:46 2019
(r351451)
+++ head/sys/modules/dtb/allwinner/Makefile Sat Aug 24 13:26:34 2019
(r351452)
@@ -25,7 +25,8 @@ DTS=  \
 
 DTSO=  sun8i-a83t-sid.dtso \
sun8i-h3-i2c0.dtso \
-   sun8i-h3-sid.dtso
+   sun8i-h3-sid.dtso \
+   sun8i-h3-ths.dtso
 
 LINKS= \
${DTBDIR}/sun4i-a10-cubieboard.dtb ${DTBDIR}/cubieboard.dtb \
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svn commit: r350439 - stable/12/sys/arm64/arm64

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue Jul 30 12:17:11 2019
New Revision: 350439
URL: https://svnweb.freebsd.org/changeset/base/350439

Log:
  MFC r346993
  Add a hw.model sysctl oid for arm64 which reports the CPU model similar to 
armv6/7.

Modified:
  stable/12/sys/arm64/arm64/identcpu.c

Modified: stable/12/sys/arm64/arm64/identcpu.c
==
--- stable/12/sys/arm64/arm64/identcpu.cTue Jul 30 08:53:03 2019
(r350438)
+++ stable/12/sys/arm64/arm64/identcpu.cTue Jul 30 12:17:11 2019
(r350439)
@@ -52,6 +52,10 @@ char machine[] = "arm64";
 SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0,
 "Machine class");
 
+static char cpu_model[64];
+SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD,
+   cpu_model, sizeof(cpu_model), "Machine model");
+
 /*
  * Per-CPU affinity as provided in MPIDR_EL1
  * Indexed by CPU number in logical order selected by the system.
@@ -1292,6 +1296,10 @@ identify_cpu(void)
 
cpu_desc[cpu].cpu_revision = CPU_REV(midr);
cpu_desc[cpu].cpu_variant = CPU_VAR(midr);
+
+   snprintf(cpu_model, sizeof(cpu_model), "%s %s r%dp%d",
+   cpu_desc[cpu].cpu_impl_name, cpu_desc[cpu].cpu_part_name,
+   cpu_desc[cpu].cpu_variant, cpu_desc[cpu].cpu_revision);
 
/* Save affinity for current CPU */
cpu_desc[cpu].mpidr = get_mpidr();
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svn commit: r350162 - head/sys/dev/sdhci

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sat Jul 20 02:53:06 2019
New Revision: 350162
URL: https://svnweb.freebsd.org/changeset/base/350162

Log:
  Add emmc support for Rockchip RK3399 SoC.
  Tested on NanoPC-T4 board.
  
  Reviewed by:  manu
  Differential Revision:https://reviews.freebsd.org/D20156

Modified:
  head/sys/dev/sdhci/sdhci_fdt.c

Modified: head/sys/dev/sdhci/sdhci_fdt.c
==
--- head/sys/dev/sdhci/sdhci_fdt.c  Sat Jul 20 02:03:31 2019
(r350161)
+++ head/sys/dev/sdhci/sdhci_fdt.c  Sat Jul 20 02:53:06 2019
(r350162)
@@ -52,6 +52,14 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#ifdef EXT_RESOURCES
+#include 
+#include 
+#include 
+#include 
+#include 
+#endif
+
 #include 
 
 #include 
@@ -61,16 +69,37 @@ __FBSDID("$FreeBSD$");
 
 #include "opt_mmccam.h"
 
+#ifdef EXT_RESOURCES
+#include "clkdev_if.h"
+#include "syscon_if.h"
+#endif
+
 #defineMAX_SLOTS   6
 #defineSDHCI_FDT_ARMADA38X 1
 #defineSDHCI_FDT_GENERIC   2
 #defineSDHCI_FDT_XLNX_ZY7  3
 #defineSDHCI_FDT_QUALCOMM  4
+#defineSDHCI_FDT_RK33995
 
+#ifdef EXT_RESOURCES
+#defineRK3399_GRF_EMMCCORE_CON00xf000
+#define RK3399_CORECFG_BASECLKFREQ 0xff00
+#define RK3399_CORECFG_TIMEOUTCLKUNIT  (1 << 7)
+#define RK3399_CORECFG_TUNINGCOUNT 0x3f
+#defineRK3399_GRF_EMMCCORE_CON11   0xf02c
+#define RK3399_CORECFG_CLOCKMULTIPLIER 0xff
+
+#defineLOWEST_SET_BIT(mask)mask) - 1) & (mask)) ^ (mask))
+#defineSHIFTIN(x, mask)((x) * LOWEST_SET_BIT(mask))
+
+#defineEMMCCARDCLK_ID  1000
+#endif
+
 static struct ofw_compat_data compat_data[] = {
{ "marvell,armada-380-sdhci",   SDHCI_FDT_ARMADA38X },
{ "sdhci_generic",  SDHCI_FDT_GENERIC },
{ "qcom,sdhci-msm-v4",  SDHCI_FDT_QUALCOMM },
+   { "rockchip,rk3399-sdhci-5.1",  SDHCI_FDT_RK3399 },
{ "xlnx,zy7_sdhci", SDHCI_FDT_XLNX_ZY7 },
{ NULL, 0 }
 };
@@ -90,8 +119,209 @@ struct sdhci_fdt_softc {
 
boolwp_inverted;/* WP pin is inverted */
boolno_18v; /* No 1.8V support */
+
+#ifdef EXT_RESOURCES
+   clk_t   clk_xin;/* xin24m fixed clock */
+   clk_t   clk_ahb;/* ahb clock */
+   phy_t   phy;/* phy to be used */
+#endif
 };
 
+#ifdef EXT_RESOURCES
+struct rk3399_emmccardclk_sc {
+   device_tclkdev;
+   bus_addr_t  reg;
+};
+
+static int
+rk3399_emmccardclk_init(struct clknode *clk, device_t dev)
+{
+
+   clknode_init_parent_idx(clk, 0);
+   return (0);
+}
+
+static clknode_method_t rk3399_emmccardclk_clknode_methods[] = {
+   /* Device interface */
+   CLKNODEMETHOD(clknode_init, rk3399_emmccardclk_init),
+   CLKNODEMETHOD_END
+};
+DEFINE_CLASS_1(rk3399_emmccardclk_clknode, rk3399_emmccardclk_clknode_class,
+rk3399_emmccardclk_clknode_methods, sizeof(struct rk3399_emmccardclk_sc),
+clknode_class);
+
+static int
+rk3399_ofw_map(struct clkdom *clkdom, uint32_t ncells,
+phandle_t *cells, struct clknode **clk)
+{
+
+   if (ncells == 0)
+   *clk = clknode_find_by_id(clkdom, EMMCCARDCLK_ID);
+   else
+   return (ERANGE);
+
+   if (*clk == NULL)
+   return (ENXIO);
+   return (0);
+}
+
+static void
+sdhci_init_rk3399_emmccardclk(device_t dev)
+{
+   struct clknode_init_def def;
+   struct rk3399_emmccardclk_sc *sc;
+   struct clkdom *clkdom;
+   struct clknode *clk;
+   clk_t clk_parent;
+   bus_addr_t paddr;
+   bus_size_t psize;
+   const char **clknames;
+   phandle_t node;
+   int i, nclocks, ncells, error;
+
+   node = ofw_bus_get_node(dev);
+
+   if (ofw_reg_to_paddr(node, 0, &paddr, &psize, NULL) != 0) {
+   device_printf(dev, "cannot parse 'reg' property\n");
+   return;
+   }
+
+   error = ofw_bus_parse_xref_list_get_length(node, "clocks",
+   "#clock-cells", &ncells);
+   if (error != 0 || ncells != 2) {
+   device_printf(dev, "couldn't find parent clocks\n");
+   return;
+   }
+
+   nclocks = ofw_bus_string_list_to_array(node, "clock-output-names",
+   &clknames);
+   /* No clocks to export */
+   if (nclocks <= 0)
+   return;
+
+   if (nclocks != 1) {
+   device_printf(dev, "Having %d clock instead of 1, aborting\n",
+   nclocks);
+   return;
+   }
+
+   clkdom = clkdom_create(dev);
+   clkdom_set_ofw_mapper(clkdom, rk3399_ofw_map);
+
+   memset(&def, 0, sizeof(def));
+   def.id = EMMCCARDCLK_ID;
+   def.name = clknames[0];
+   def.parent_names = malloc(sizeof(char

svn commit: r350161 - in head/sys: arm64/conf arm64/rockchip conf

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sat Jul 20 02:03:31 2019
New Revision: 350161
URL: https://svnweb.freebsd.org/changeset/base/350161

Log:
  Add driver for Rockchip RK3399 eMMC PHY.
  Tested on NanoPC-T4 board.
  
  Reviewed by:  manu
  Differential Revision:https://reviews.freebsd.org/D20840

Added:
  head/sys/arm64/rockchip/rk3399_emmcphy.c   (contents, props changed)
Modified:
  head/sys/arm64/conf/GENERIC
  head/sys/conf/files.arm64

Modified: head/sys/arm64/conf/GENERIC
==
--- head/sys/arm64/conf/GENERIC Fri Jul 19 23:58:30 2019(r350160)
+++ head/sys/arm64/conf/GENERIC Sat Jul 20 02:03:31 2019(r350161)
@@ -188,6 +188,7 @@ device  aw_mmc  # Allwinner 
SD/MMC controller
 device mmc # mmc/sd bus
 device mmcsd   # mmc/sd flash cards
 device dwmmc
+device rk_emmcphy
 
 # Serial (COM) ports
 device uart# Generic UART driver

Added: head/sys/arm64/rockchip/rk3399_emmcphy.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm64/rockchip/rk3399_emmcphy.cSat Jul 20 02:03:31 2019
(r350161)
@@ -0,0 +1,341 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2019 Ganbold Tsagaankhuu 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Rockchip RK3399 eMMC PHY
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "syscon_if.h"
+
+#defineGRF_EMMCPHY_BASE0xf780
+#defineGRF_EMMCPHY_CON0(GRF_EMMCPHY_BASE + 0x00)
+#define PHYCTRL_FRQSEL (1 << 13) | (1 << 12)
+#define  PHYCTRL_FRQSEL_200M   0
+#define  PHYCTRL_FRQSEL_50M1
+#define  PHYCTRL_FRQSEL_100M   2
+#define  PHYCTRL_FRQSEL_150M   3
+#define PHYCTRL_OTAPDLYENA (1 << 11)
+#define PHYCTRL_OTAPDLYSEL (1 << 10) | (1 << 9) | (1 << 8) | (1 << 
7)
+#define PHYCTRL_ITAPCHGWIN (1 << 6)
+#define PHYCTRL_ITAPDLYSEL (1 << 5) | (1 << 4)  | (1 << 3) | (1 << 
2) | \
+(1 << 1)
+#define PHYCTRL_ITAPDLYENA (1 << 0)
+#defineGRF_EMMCPHY_CON1(GRF_EMMCPHY_BASE + 0x04)
+#define PHYCTRL_CLKBUFSEL  (1 << 8) | (1 << 7) | (1 << 6)
+#define PHYCTRL_SELDLYTXCLK(1 << 5)
+#define PHYCTRL_SELDLYRXCLK(1 << 4)
+#define PHYCTRL_STRBSEL0xf
+#defineGRF_EMMCPHY_CON2(GRF_EMMCPHY_BASE + 0x08)
+#define PHYCTRL_REN_STRB   (1 << 9)
+#define PHYCTRL_REN_CMD(1 << 8)
+#define PHYCTRL_REN_DAT0xff
+#defineGRF_EMMCPHY_CON3(GRF_EMMCPHY_BASE + 0x0c)
+#define PHYCTRL_PU_STRB(1 << 9)
+#define PHYCTRL_PU_CMD (1 << 8)
+#define PHYCTRL_PU_DAT 0xff
+#defineGRF_EMMCPHY_CON4(GRF_EMMCPHY_BASE + 0x10)
+#define PHYCTRL_OD_RELEASE_CMD (1 << 9)
+#define PHYCTRL_OD_RELEASE_STRB(1 << 8)
+#define PHYCTRL_OD_RELEASE_DAT 0xff
+#defineGRF_EMMCPHY_CON5(GRF_EMMCPHY_BASE + 0x14)
+#define PHYCTRL_ODEN_STRB  (1 << 9)
+#define PHYCTRL_ODEN_CMD 

svn commit: r349638 - head/sys/arm64/rockchip

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Wed Jul  3 03:42:51 2019
New Revision: 349638
URL: https://svnweb.freebsd.org/changeset/base/349638

Log:
  Subclass Rockchip's General Register Files driver from Simple MFD driver.

Modified:
  head/sys/arm64/rockchip/rk_grf.c

Modified: head/sys/arm64/rockchip/rk_grf.c
==
--- head/sys/arm64/rockchip/rk_grf.cWed Jul  3 01:40:29 2019
(r349637)
+++ head/sys/arm64/rockchip/rk_grf.cWed Jul  3 03:42:51 2019
(r349638)
@@ -42,7 +42,7 @@ __FBSDID("$FreeBSD$");
 #include 
 
 #include 
-#include 
+#include 
 
 #include "opt_soc.h"
 
@@ -77,7 +77,7 @@ static device_method_t rk_grf_methods[] = {
 };
 
 DEFINE_CLASS_1(rk_grf, rk_grf_driver, rk_grf_methods,
-sizeof(struct syscon_generic_softc), syscon_generic_driver);
+sizeof(struct simple_mfd_softc), simple_mfd_driver);
 
 static devclass_t rk_grf_devclass;
 EARLY_DRIVER_MODULE(rk_grf, simplebus, rk_grf_driver, rk_grf_devclass,
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svn commit: r349637 - head/sys/conf

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Wed Jul  3 01:40:29 2019
New Revision: 349637
URL: https://svnweb.freebsd.org/changeset/base/349637

Log:
  Fix build error introduced by r349596.

Modified:
  head/sys/conf/files

Modified: head/sys/conf/files
==
--- head/sys/conf/files Wed Jul  3 01:04:11 2019(r349636)
+++ head/sys/conf/files Wed Jul  3 01:40:29 2019(r349637)
@@ -1712,7 +1712,7 @@ dev/fdt/fdt_slicer.c  optional fdt cfi | fdt 
mx25l | f
 dev/fdt/fdt_static_dtb.S   optional fdt fdt_dtb_static \
dependency  "${FDT_DTS_FILE:T:R}.dtb"
 dev/fdt/simplebus.coptional fdt
-dev/fdt/simple_mfd.c   optional fdt
+dev/fdt/simple_mfd.c   optional syscon fdt
 dev/filemon/filemon.c  optional filemon
 dev/firewire/firewire.coptional firewire
 dev/firewire/fwcrom.c  optional firewire
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Re: svn commit: r349596 - head/sys/dev/fdt

[Ganbold Tsagaankhuu]

On Tue, Jul 2, 2019 at 4:47 PM Ganbold Tsagaankhuu 
wrote:

> Author: ganbold
> Date: Tue Jul  2 08:47:18 2019
> New Revision: 349596
> URL: https://svnweb.freebsd.org/changeset/base/349596
>
> Log:
>   Extend simple_mfd driver to expose a syscon interface if
>   that node is also compatible with syscon. For instance,
>   Rockchip RK3399's GRF (General Register Files) is compatible
>   with simple-mfd as well as syscon and has devices like
>   usb2-phy, emmc-phy and pcie-phy etc. under it.
>

Forgot to include:

https://reviews.freebsd.org/D20647

thanks,

Ganbold


>
>   Reviewed by:  manu
>
> Added:
>   head/sys/dev/fdt/simple_mfd.h   (contents, props changed)
> Modified:
>   head/sys/dev/fdt/simple_mfd.c
>
> Modified: head/sys/dev/fdt/simple_mfd.c
>
> ==
> --- head/sys/dev/fdt/simple_mfd.c   Tue Jul  2 07:47:11 2019
> (r349595)
> +++ head/sys/dev/fdt/simple_mfd.c   Tue Jul  2 08:47:18 2019
> (r349596)
> @@ -33,7 +33,10 @@ __FBSDID("$FreeBSD$");
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
> +#include 
> +#include 
>
>  #include 
>
> @@ -42,15 +45,88 @@ __FBSDID("$FreeBSD$");
>  #include 
>  #include 
>
> -struct simple_mfd_softc {
> -   struct simplebus_softc  sc;
> -};
> +#include 
>
>  device_t simple_mfd_add_device(device_t dev, phandle_t node, u_int order,
>  const char *name, int unit, struct simplebus_devinfo *di);
>  struct simplebus_devinfo *simple_mfd_setup_dinfo(device_t dev, phandle_t
> node, struct simplebus_devinfo *di);
>
> +#include "syscon_if.h"
> +#include 
> +
> +MALLOC_DECLARE(M_SYSCON);
> +
> +static uint32_t simple_mfd_syscon_read_4(struct syscon *syscon,
> bus_size_t offset);
> +static int simple_mfd_syscon_write_4(struct syscon *syscon, bus_size_t
> offset,
> +uint32_t val);
> +static int simple_mfd_syscon_modify_4(struct syscon *syscon, bus_size_t
> offset,
> +uint32_t clear_bits, uint32_t set_bits);
> +
> +#defineSYSCON_LOCK(_sc)mtx_lock_spin(&(_sc)->mtx)
> +#defineSYSCON_UNLOCK(_sc)
> mtx_unlock_spin(&(_sc)->mtx)
> +#defineSYSCON_LOCK_INIT(_sc)   mtx_init(&(_sc)->mtx,   \
> +device_get_nameunit((_sc)->dev), "syscon", MTX_SPIN)
> +#defineSYSCON_LOCK_DESTROY(_sc)mtx_destroy(&(_sc)->mtx);
> +#defineSYSCON_ASSERT_LOCKED(_sc)   mtx_assert(&(_sc)->mtx,
> MA_OWNED);
> +#defineSYSCON_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->mtx,
> MA_NOTOWNED);
> +
> +static syscon_method_t simple_mfd_syscon_methods[] = {
> +   SYSCONMETHOD(syscon_read_4, simple_mfd_syscon_read_4),
> +   SYSCONMETHOD(syscon_write_4,simple_mfd_syscon_write_4),
> +   SYSCONMETHOD(syscon_modify_4,   simple_mfd_syscon_modify_4),
> +
> +   SYSCONMETHOD_END
> +};
> +DEFINE_CLASS_1(simple_mfd_syscon, simple_mfd_syscon_class,
> +simple_mfd_syscon_methods, 0, syscon_class);
> +
> +static uint32_t
> +simple_mfd_syscon_read_4(struct syscon *syscon, bus_size_t offset)
> +{
> +   struct simple_mfd_softc *sc;
> +   uint32_t val;
> +
> +   sc = device_get_softc(syscon->pdev);
> +
> +   SYSCON_LOCK(sc);
> +   val = bus_read_4(sc->mem_res, offset);
> +   SYSCON_UNLOCK(sc);
> +   return (val);
> +}
> +
>  static int
> +simple_mfd_syscon_write_4(struct syscon *syscon, bus_size_t offset,
> +uint32_t val)
> +{
> +   struct simple_mfd_softc *sc;
> +
> +   sc = device_get_softc(syscon->pdev);
> +
> +   SYSCON_LOCK(sc);
> +   bus_write_4(sc->mem_res, offset, val);
> +   SYSCON_UNLOCK(sc);
> +   return (0);
> +}
> +
> +static int
> +simple_mfd_syscon_modify_4(struct syscon *syscon, bus_size_t offset,
> +uint32_t clear_bits, uint32_t set_bits)
> +{
> +   struct simple_mfd_softc *sc;
> +   uint32_t val;
> +
> +   sc = device_get_softc(syscon->pdev);
> +
> +   SYSCON_LOCK(sc);
> +   val = bus_read_4(sc->mem_res, offset);
> +   val &= ~clear_bits;
> +   val |= set_bits;
> +   bus_write_4(sc->mem_res, offset, val);
> +   SYSCON_UNLOCK(sc);
> +   return (0);
> +}
> +
> +static int
>  simple_mfd_probe(device_t dev)
>  {
>
> @@ -70,10 +146,14 @@ simple_mfd_attach(device_t dev)
> struct simple_mfd_softc *sc;
> phandle_t node, child;
> device_t cdev;
> +   int rid;
>
> sc = device_get_softc(dev);
> node = ofw_bus_get_node(dev

svn commit: r349596 - head/sys/dev/fdt

[Ganbold Tsagaankhuu]

_INIT(sc);
+   sc->syscon = syscon_create_ofw_node(dev,
+   &simple_mfd_syscon_class, ofw_bus_get_node(dev));
+   if (sc->syscon == NULL) {
+   device_printf(dev,
+   "Failed to create/register syscon\n");
+   return (ENXIO);
+   }
+   }
return (bus_generic_attach(dev));
 }
 
+static int
+simple_mfd_detach(device_t dev)
+{
+   struct simple_mfd_softc *sc;
+
+   sc = device_get_softc(dev);
+   if (ofw_bus_is_compatible(dev, "syscon")) {
+   if (sc->syscon != NULL) {
+   syscon_unregister(sc->syscon);
+   free(sc->syscon, M_SYSCON);
+   }
+
+   SYSCON_LOCK_DESTROY(sc);
+
+   if (sc->mem_res != NULL)
+   bus_release_resource(dev, SYS_RES_MEMORY, 0,
+   sc->mem_res);
+   }
+   return (0);
+}
+
 struct simplebus_devinfo *
 simple_mfd_setup_dinfo(device_t dev, phandle_t node,
 struct simplebus_devinfo *di)
@@ -162,6 +281,7 @@ static device_method_t simple_mfd_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, simple_mfd_probe),
DEVMETHOD(device_attach,simple_mfd_attach),
+   DEVMETHOD(device_detach,simple_mfd_detach),
 
DEVMETHOD_END
 };

Added: head/sys/dev/fdt/simple_mfd.h
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/fdt/simple_mfd.h   Tue Jul  2 08:47:18 2019
(r349596)
@@ -0,0 +1,44 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2019 Ganbold Tsagaankhuu 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef DEV_SIMPLE_MFD_H
+#defineDEV_SIMPLE_MFD_H
+
+#include 
+
+struct simple_mfd_softc {
+   struct simplebus_softc  sc;
+   device_tdev;
+   struct syscon   *syscon;
+   struct resource *mem_res;
+   struct mtx  mtx;
+};
+
+DECLARE_CLASS(simple_mfd_driver);
+
+#endif /* DEV_SIMPLE_MFD_H */
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svn commit: r347559 - stable/12/sys/dev/usb/net

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue May 14 03:08:37 2019
New Revision: 347559
URL: https://svnweb.freebsd.org/changeset/base/347559

Log:
  MFC r346028:
  Fix URE_WDT6_SET_MODE value in the register definition.
  Both linux and u-boot sources for RTL8152 driver has this value.
  RTL8152 USB ethernet is used in NanoPI R1 board as second ethernet.
  This fixes RTL8152 USB ethernet not detected problem after
  reboot.

Modified:
  stable/12/sys/dev/usb/net/if_urereg.h

Modified: stable/12/sys/dev/usb/net/if_urereg.h
==
--- stable/12/sys/dev/usb/net/if_urereg.h   Tue May 14 03:05:06 2019
(r347558)
+++ stable/12/sys/dev/usb/net/if_urereg.h   Tue May 14 03:08:37 2019
(r347559)
@@ -176,7 +176,7 @@
 #defineURE_EEEP_CR_EEEP_TX 0x0002
 
 /* PLA_WDT6_CTRL */
-#defineURE_WDT6_SET_MODE   0x001
+#defineURE_WDT6_SET_MODE   0x0010
 
 /* PLA_TCR0 */
 #defineURE_TCR0_TX_EMPTY   0x0800
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svn commit: r347558 - stable/11/sys/dev/usb/net

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue May 14 03:05:06 2019
New Revision: 347558
URL: https://svnweb.freebsd.org/changeset/base/347558

Log:
  MFC r346028:
  Fix URE_WDT6_SET_MODE value in the register definition.
  Both linux and u-boot sources for RTL8152 driver has this value.
  RTL8152 USB ethernet is used in NanoPI R1 board as second ethernet.
  This fixes RTL8152 USB ethernet not detected problem after
  reboot.

Modified:
  stable/11/sys/dev/usb/net/if_urereg.h

Modified: stable/11/sys/dev/usb/net/if_urereg.h
==
--- stable/11/sys/dev/usb/net/if_urereg.h   Tue May 14 02:00:12 2019
(r347557)
+++ stable/11/sys/dev/usb/net/if_urereg.h   Tue May 14 03:05:06 2019
(r347558)
@@ -176,7 +176,7 @@
 #defineURE_EEEP_CR_EEEP_TX 0x0002
 
 /* PLA_WDT6_CTRL */
-#defineURE_WDT6_SET_MODE   0x001
+#defineURE_WDT6_SET_MODE   0x0010
 
 /* PLA_TCR0 */
 #defineURE_TCR0_TX_EMPTY   0x0800
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svn commit: r347097 - head/sys/arm64/rockchip/clk

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sat May  4 10:48:44 2019
New Revision: 347097
URL: https://svnweb.freebsd.org/changeset/base/347097

Log:
  Add emmc clock definitions for Rockchip RK3399 SoC.

Modified:
  head/sys/arm64/rockchip/clk/rk3399_cru.c

Modified: head/sys/arm64/rockchip/clk/rk3399_cru.c
==
--- head/sys/arm64/rockchip/clk/rk3399_cru.cSat May  4 10:38:54 2019
(r347096)
+++ head/sys/arm64/rockchip/clk/rk3399_cru.cSat May  4 10:48:44 2019
(r347097)
@@ -52,6 +52,9 @@ __FBSDID("$FreeBSD$");
 
 /* GATES */
 
+#defineACLK_EMMC_CORE  241
+#defineACLK_EMMC_NOC   242
+#defineACLK_EMMC_GRF   243
 #definePCLK_GPIO2  336
 #definePCLK_GPIO3  337
 #definePCLK_GPIO4  338
@@ -80,6 +83,10 @@ static struct rk_cru_gate rk3399_gates[] = {
CRU_GATE(0, "cpll_aclk_perihp_src", "cpll", 0x314, 0)
CRU_GATE(0, "gpll_aclk_perihp_src", "gpll", 0x314, 1)
 
+   /* CRU_CLKGATE_CON6 */
+   CRU_GATE(0, "gpll_aclk_emmc_src", "gpll", 0x318, 12)
+   CRU_GATE(0, "cpll_aclk_emmc_src", "cpll", 0x318, 13)
+
/* CRU_CLKGATE_CON7 */
CRU_GATE(0, "gpll_aclk_perilp0_src", "gpll", 0x31C, 0)
CRU_GATE(0, "cpll_aclk_perilp0_src", "cpll", 0x31C, 1)
@@ -101,6 +108,11 @@ static struct rk_cru_gate rk3399_gates[] = {
CRU_GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_alive", 0x37c, 4)
CRU_GATE(PCLK_GPIO4, "pclk_gpio4", "pclk_alive", 0x37c, 5)
 
+   /* CRU_CLKGATE_CON32 */
+   CRU_GATE(ACLK_EMMC_CORE, "aclk_emmccore", "aclk_emmc", 0x380, 8)
+   CRU_GATE(ACLK_EMMC_NOC, "aclk_emmc_noc", "aclk_emmc", 0x380, 9)
+   CRU_GATE(ACLK_EMMC_GRF, "aclk_emmcgrf", "aclk_emmc", 0x380, 10)
+
/* CRU_CLKGATE_CON33 */
CRU_GATE(HCLK_SDMMC, "hclk_sdmmc", "hclk_sd", 0x384, 8)
 };
@@ -1443,6 +1455,60 @@ static struct rk_clk_composite_def sclk_sdmmc = {
.flags = RK_CLK_COMPOSITE_HAVE_MUX | RK_CLK_COMPOSITE_HAVE_GATE,
 };
 
+/*
+ * emmc
+ */
+
+#defineSCLK_EMMC   78
+
+static const char *sclk_emmc_parents[] = {"cpll", "gpll", "npll"};
+
+static struct rk_clk_composite_def sclk_emmc = {
+   .clkdef = {
+   .id = SCLK_EMMC,
+   .name = "sclk_emmc",
+   .parent_names = sclk_emmc_parents,
+   .parent_cnt = nitems(sclk_emmc_parents),
+   },
+
+   .muxdiv_offset = 0x158,
+   .mux_shift = 8,
+   .mux_width = 3,
+
+   .div_shift = 0,
+   .div_width = 7,
+
+   .gate_offset = 0x318,
+   .gate_shift = 14,
+
+   .flags = RK_CLK_COMPOSITE_HAVE_MUX | RK_CLK_COMPOSITE_HAVE_GATE,
+};
+
+#defineACLK_EMMC   240
+
+static const char *aclk_emmc_parents[] = {
+   "cpll_aclk_emmc_src",
+   "gpll_aclk_emmc_src"
+};
+
+static struct rk_clk_composite_def aclk_emmc = {
+   .clkdef = {
+   .id = ACLK_EMMC,
+   .name = "aclk_emmc",
+   .parent_names = aclk_emmc_parents,
+   .parent_cnt = nitems(aclk_emmc_parents),
+   },
+
+   .muxdiv_offset = 0x154,
+   .mux_shift = 7,
+   .mux_width = 1,
+
+   .div_shift = 0,
+   .div_width = 5,
+
+   .flags = RK_CLK_COMPOSITE_HAVE_MUX,
+};
+
 static struct rk_clk rk3399_clks[] = {
{
.type = RK3399_CLK_PLL,
@@ -1550,6 +1616,15 @@ static struct rk_clk rk3399_clks[] = {
{
.type = RK_CLK_COMPOSITE,
.clk.composite = &sclk_sdmmc,
+   },
+
+   {
+   .type = RK_CLK_COMPOSITE,
+   .clk.composite = &sclk_emmc,
+   },
+   {
+   .type = RK_CLK_COMPOSITE,
+   .clk.composite = &aclk_emmc,
},
 };
 
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svn commit: r346993 - head/sys/arm64/arm64

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Wed May  1 14:20:31 2019
New Revision: 346993
URL: https://svnweb.freebsd.org/changeset/base/346993

Log:
  Add a hw.model sysctl oid for arm64 which reports the CPU model similar to 
armv6/7.
  
  Reviewed by:  andrew, manu
  Differential Revision:https://reviews.freebsd.org/D20123

Modified:
  head/sys/arm64/arm64/identcpu.c

Modified: head/sys/arm64/arm64/identcpu.c
==
--- head/sys/arm64/arm64/identcpu.c Wed May  1 13:43:49 2019
(r346992)
+++ head/sys/arm64/arm64/identcpu.c Wed May  1 14:20:31 2019
(r346993)
@@ -72,6 +72,10 @@ sysctl_hw_machine(SYSCTL_HANDLER_ARGS)
 SYSCTL_PROC(_hw, HW_MACHINE, machine, CTLTYPE_STRING | CTLFLAG_RD |
CTLFLAG_MPSAFE, NULL, 0, sysctl_hw_machine, "A", "Machine class");
 
+static char cpu_model[64];
+SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD,
+   cpu_model, sizeof(cpu_model), "Machine model");
+
 /*
  * Per-CPU affinity as provided in MPIDR_EL1
  * Indexed by CPU number in logical order selected by the system.
@@ -1312,6 +1316,10 @@ identify_cpu(void)
 
cpu_desc[cpu].cpu_revision = CPU_REV(midr);
cpu_desc[cpu].cpu_variant = CPU_VAR(midr);
+
+   snprintf(cpu_model, sizeof(cpu_model), "%s %s r%dp%d",
+   cpu_desc[cpu].cpu_impl_name, cpu_desc[cpu].cpu_part_name,
+   cpu_desc[cpu].cpu_variant, cpu_desc[cpu].cpu_revision);
 
/* Save affinity for current CPU */
cpu_desc[cpu].mpidr = get_mpidr();
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Re: svn commit: r346598 - head/sys/modules

[Ganbold Tsagaankhuu]

On Mon, Apr 29, 2019 at 11:16 PM Andrew Gallatin 
wrote:

> On 2019-04-29 10:54, Emmanuel Vadot wrote:
> > On Mon, 29 Apr 2019 10:49:01 -0400
> > Andrew Gallatin  wrote:
> >
> >> On 2019-04-29 10:21, Rodney W. Grimes wrote:
>  On Tue, 23 Apr 2019 at 13:26, Rodney W. Grimes
>   wrote:
> >
> > Very cool, now how do I get a PCIe slot into a RPI3!!! lol  :-)
> 
>  I know you're joking but the comment does highlight an issue in the
>  AArch64 world - there's a lack of good mid-range developer platforms.
> >>>
> >>> I may of been joking with respect to the RPI3, but at the same
> >>> time I do know that the RockPro64 exists and does have that
> >>> PCIe slot I want, I also know that Michael Dexter has one he would
> >>> loan me should I wish to investigate our state of support.
> >>
> >> Does anybody know what PCIe Generation / speed that slot runs at?
> >> All I can find them saying is "PCIe x4", which implies Gen 1, 2.5GT/s
> >> speeds, which is not terribly useful.  Gen2 or better would be enough
> >> to run 10GbE, which would be fun :)
> >>
> >> Drew
> >
> >   It/s PCIe 2.1 compatible. See
> > http://rockchip.fr/Rockchip%20RK3399%20TRM%20V1.3%20Part2.pdf
> >
>
> Everything I'm seeing there says Gen1 vs Gen2 depends on
> "PCIE_GENERATION_SEL", and that if its set to 0, you get
> Gen1 2.5Gt/s and if it is set to 1, you get Gen2, 5.0Gt/s.
> But I don't see anything specifying this value for the
> RockPro64 board.
>

If you check Rockchip RK3399 TRM V1.3 Part1.pdf
 you can see
PCIe 2.1 in block diagram  (Fig 1-1)

Ganbold



>
> Drew
>
>
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svn commit: r346428 - in head/sys: arm64/conf conf

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sat Apr 20 03:21:47 2019
New Revision: 346428
URL: https://svnweb.freebsd.org/changeset/base/346428

Log:
  Add SY8106A Buck Regulator and Allwinner CIR devices to GENERIC arm64 kernel.

Modified:
  head/sys/arm64/conf/GENERIC
  head/sys/conf/files.arm64

Modified: head/sys/arm64/conf/GENERIC
==
--- head/sys/arm64/conf/GENERIC Sat Apr 20 02:54:20 2019(r346427)
+++ head/sys/arm64/conf/GENERIC Sat Apr 20 03:21:47 2019(r346428)
@@ -233,6 +233,7 @@ device  iic
 device twsi# Allwinner I2C controller
 device rk_i2c  # RockChip I2C controller
 device syr827  # Silergy SYR827 PMIC
+device sy8106a # SY8106A Buck Regulator
 
 # Clock and reset controllers
 device aw_ccu  # Allwinner clock controller
@@ -278,6 +279,7 @@ device  vt_efifb
 device evdev   # input event device support
 optionsEVDEV_SUPPORT   # evdev support in legacy 
drivers
 device uinput  # install /dev/uinput cdev
+device aw_cir
 
 # Pseudo devices.
 device crypto  # core crypto support

Modified: head/sys/conf/files.arm64
==
--- head/sys/conf/files.arm64   Sat Apr 20 02:54:20 2019(r346427)
+++ head/sys/conf/files.arm64   Sat Apr 20 03:21:47 2019(r346428)
@@ -27,6 +27,7 @@ cloudabi64_vdso_blob.ooptional
compat_cloudabi64   \
 # Allwinner common files
 arm/allwinner/a10_ehci.c   optionalehci aw_ehci fdt
 arm/allwinner/a10_timer.c  optionala10_timer fdt
+arm/allwinner/aw_cir.c optionalevdev aw_cir fdt
 arm/allwinner/aw_gpio.coptionalgpio aw_gpio fdt
 arm/allwinner/aw_mmc.c optionalmmc aw_mmc fdt | mmccam aw_mmc 
fdt
 arm/allwinner/aw_nmi.c optionalaw_nmi fdt \
@@ -206,6 +207,7 @@ dev/axgbe/xgbe-dev.coptionalaxgbe
 dev/axgbe/xgbe-drv.c   optionalaxgbe
 dev/axgbe/xgbe-mdio.c  optionalaxgbe
 dev/cpufreq/cpufreq_dt.c   optionalcpufreq fdt
+dev/iicbus/sy8106a.c   optionalsy8106a fdt
 dev/iicbus/twsi/mv_twsi.c  optionaltwsi fdt
 dev/iicbus/twsi/a10_twsi.c optionaltwsi fdt
 dev/iicbus/twsi/twsi.c optionaltwsi fdt
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svn commit: r346052 - head/sys/dev/usb/net

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue Apr  9 13:54:08 2019
New Revision: 346052
URL: https://svnweb.freebsd.org/changeset/base/346052

Log:
  In some cases like NanoPI R1, its second USB ethernet
  RTL8152 (chip version URE_CHIP_VER_4C10) doesn't
  have hardwired MAC address, in other words, it is all zeros.
  This commit fixes it by setting random MAC address
  when MAC address is all zeros.
  
  Reviewed by:  kevlo
  Differential Revision:https://reviews.freebsd.org/D19856

Modified:
  head/sys/dev/usb/net/if_ure.c

Modified: head/sys/dev/usb/net/if_ure.c
==
--- head/sys/dev/usb/net/if_ure.c   Tue Apr  9 12:28:12 2019
(r346051)
+++ head/sys/dev/usb/net/if_ure.c   Tue Apr  9 13:54:08 2019
(r346052)
@@ -62,6 +62,9 @@ SYSCTL_INT(_hw_usb_ure, OID_AUTO, debug, CTLFLAG_RWTUN
 "Debug level");
 #endif
 
+#defineETHER_IS_ZERO(addr) \
+   (!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]))
+
 /*
  * Various supported device vendors/products.
  */
@@ -673,12 +676,20 @@ ure_attach_post(struct usb_ether *ue)
else
ure_rtl8153_init(sc);
 
-   if (sc->sc_chip & URE_CHIP_VER_4C00)
+   if ((sc->sc_chip & URE_CHIP_VER_4C00) ||
+   (sc->sc_chip & URE_CHIP_VER_4C10))
ure_read_mem(sc, URE_PLA_IDR, URE_MCU_TYPE_PLA,
ue->ue_eaddr, 8);
else
ure_read_mem(sc, URE_PLA_BACKUP, URE_MCU_TYPE_PLA,
ue->ue_eaddr, 8);
+
+   if (ETHER_IS_ZERO(sc->sc_ue.ue_eaddr)) {
+   device_printf(sc->sc_ue.ue_dev, "MAC assigned randomly\n");
+   arc4rand(sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN, 0);
+   sc->sc_ue.ue_eaddr[0] &= ~0x01; /* unicast */
+   sc->sc_ue.ue_eaddr[0] |= 0x02;  /* locally administered */
+   }
 }
 
 static int
@@ -724,8 +735,10 @@ ure_init(struct usb_ether *ue)
ure_reset(sc);
 
/* Set MAC address. */
+   ure_write_1(sc, URE_PLA_CRWECR, URE_MCU_TYPE_PLA, URE_CRWECR_CONFIG);
ure_write_mem(sc, URE_PLA_IDR, URE_MCU_TYPE_PLA | URE_BYTE_EN_SIX_BYTES,
IF_LLADDR(ifp), 8);
+   ure_write_1(sc, URE_PLA_CRWECR, URE_MCU_TYPE_PLA, URE_CRWECR_NORAML);
 
/* Reset the packet filter. */
ure_write_2(sc, URE_PLA_FMC, URE_MCU_TYPE_PLA,
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svn commit: r346028 - head/sys/dev/usb/net

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Mon Apr  8 13:40:46 2019
New Revision: 346028
URL: https://svnweb.freebsd.org/changeset/base/346028

Log:
  Fix URE_WDT6_SET_MODE value in the register definition.
  Both linux and u-boot sources for RTL8152 driver has this value.
  RTL8152 USB ethernet is used in NanoPI R1 board as second ethernet.
  This fixes for me RTL8152 USB ethernet not detected problem after
  reboot on NanoPI R1 board.
  
  Both NetBSD and OpenBSD have a wrong value so far.

Modified:
  head/sys/dev/usb/net/if_urereg.h

Modified: head/sys/dev/usb/net/if_urereg.h
==
--- head/sys/dev/usb/net/if_urereg.hMon Apr  8 11:54:45 2019
(r346027)
+++ head/sys/dev/usb/net/if_urereg.hMon Apr  8 13:40:46 2019
(r346028)
@@ -176,7 +176,7 @@
 #defineURE_EEEP_CR_EEEP_TX 0x0002
 
 /* PLA_WDT6_CTRL */
-#defineURE_WDT6_SET_MODE   0x001
+#defineURE_WDT6_SET_MODE   0x0010
 
 /* PLA_TCR0 */
 #defineURE_TCR0_TX_EMPTY   0x0800
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svn commit: r344456 - head/sys/arm/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Fri Feb 22 03:11:27 2019
New Revision: 344456
URL: https://svnweb.freebsd.org/changeset/base/344456

Log:
  Add base to the warning threshold.

Modified:
  head/sys/arm/allwinner/axp81x.c

Modified: head/sys/arm/allwinner/axp81x.c
==
--- head/sys/arm/allwinner/axp81x.c Fri Feb 22 03:10:24 2019
(r344455)
+++ head/sys/arm/allwinner/axp81x.c Fri Feb 22 03:11:27 2019
(r344456)
@@ -195,8 +195,9 @@ MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8x
 #defineAXP_BAT_COULOMB_LO  0xe3
 
 #defineAXP_BAT_CAP_WARN0xe6
-#define AXP_BAT_CAP_WARN_LV1   0xf0/* Bits 4, 5, 6, 7 */
-#define AXP_BAT_CAP_WARN_LV2   0xf /* Bits 0, 1, 2, 3 */
+#define AXP_BAT_CAP_WARN_LV1   0xf0/* Bits 4, 5, 6, 7 */
+#define AXP_BAP_CAP_WARN_LV1BASE   5   /* 5-20%, 1% per step */
+#define AXP_BAT_CAP_WARN_LV2   0xf /* Bits 0, 1, 2, 3 */
 
 /* Sensor conversion macros */
 #defineAXP_SENSOR_BAT_H(hi)((hi) << 4)
@@ -1527,6 +1528,7 @@ axp8xx_attach(device_t dev)
/* Get thresholds */
if (axp8xx_read(dev, AXP_BAT_CAP_WARN, &val, 1) == 0) {
sc->warn_thres = (val & AXP_BAT_CAP_WARN_LV1) >> 4;
+   sc->warn_thres += AXP_BAP_CAP_WARN_LV1BASE;
sc->shut_thres = (val & AXP_BAT_CAP_WARN_LV2);
if (bootverbose) {
device_printf(dev,
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svn commit: r344343 - head/sys/arm/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Wed Feb 20 07:10:38 2019
New Revision: 344343
URL: https://svnweb.freebsd.org/changeset/base/344343

Log:
  Clarify notifications when battery capacity ratio
  reaches warning and shutdown thresholds.

Modified:
  head/sys/arm/allwinner/axp81x.c

Modified: head/sys/arm/allwinner/axp81x.c
==
--- head/sys/arm/allwinner/axp81x.c Wed Feb 20 06:54:32 2019
(r344342)
+++ head/sys/arm/allwinner/axp81x.c Wed Feb 20 07:10:38 2019
(r344343)
@@ -1088,9 +1088,9 @@ axp8xx_intr(void *arg)
if (bootverbose)
device_printf(dev, "AXP_IRQSTAT4 val: %x\n", val);
if (val & AXP_IRQSTAT4_BATLVL_LO0)
-   devctl_notify("PMU", "Battery", "lower than level 2", 
NULL);
+   devctl_notify("PMU", "Battery", "shutdown threshold", 
NULL);
if (val & AXP_IRQSTAT4_BATLVL_LO1)
-   devctl_notify("PMU", "Battery", "lower than level 1", 
NULL);
+   devctl_notify("PMU", "Battery", "warning threshold", 
NULL);
/* Acknowledge */
axp8xx_write(dev, AXP_IRQSTAT4, val);
}
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svn commit: r344219 - head/sys/arm/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sun Feb 17 01:16:27 2019
New Revision: 344219
URL: https://svnweb.freebsd.org/changeset/base/344219

Log:
  Add sysctl for setting battery charging current.
  The charging current can be set using steps
  from 0: 200mA to 13: 2800mA (200mA/step).
  While there, fix battery charging current related
  sensor descriptions.
  
  Reviewed by:  manu
  Differential Revision:https://reviews.freebsd.org/D19212

Modified:
  head/sys/arm/allwinner/axp81x.c

Modified: head/sys/arm/allwinner/axp81x.c
==
--- head/sys/arm/allwinner/axp81x.c Sat Feb 16 23:57:38 2019
(r344218)
+++ head/sys/arm/allwinner/axp81x.c Sun Feb 17 01:16:27 2019
(r344219)
@@ -120,6 +120,10 @@ MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8x
 #define AXP_VOLTCTL_MASK   0x7f
 #defineAXP_POWERBAT0x32
 #define AXP_POWERBAT_SHUTDOWN  (1 << 7)
+#defineAXP_CHARGERCTL1 0x33
+#define AXP_CHARGERCTL1_MIN0
+#define AXP_CHARGERCTL1_MAX13
+#define AXP_CHARGERCTL1_CMASK  0xf
 #defineAXP_IRQEN1  0x40
 #define AXP_IRQEN1_ACIN_HI (1 << 6)
 #define AXP_IRQEN1_ACIN_LO (1 << 5)
@@ -614,13 +618,13 @@ static const struct axp8xx_sensors axp8xx_common_senso
.id = AXP_SENSOR_BATT_CHARGE_CURRENT,
.name = "batchargecurrent",
.format = "I",
-   .desc = "Battery Charging Current",
+   .desc = "Average Battery Charging Current",
},
{
.id = AXP_SENSOR_BATT_DISCHARGE_CURRENT,
.name = "batdischargecurrent",
.format = "I",
-   .desc = "Battery Discharging Current",
+   .desc = "Average Battery Discharging Current",
},
{
.id = AXP_SENSOR_BATT_CAPACITY_PERCENT,
@@ -890,6 +894,33 @@ axp8xx_shutdown(void *devp, int howto)
 }
 
 static int
+axp8xx_sysctl_chargecurrent(SYSCTL_HANDLER_ARGS)
+{
+   device_t dev = arg1;
+   uint8_t data;
+   int val, error;
+
+   error = axp8xx_read(dev, AXP_CHARGERCTL1, &data, 1);
+   if (error != 0)
+   return (error);
+
+   if (bootverbose)
+   device_printf(dev, "Raw CHARGECTL1 val: 0x%0x\n", data);
+   val = (data & AXP_CHARGERCTL1_CMASK);
+   error = sysctl_handle_int(oidp, &val, 0, req);
+   if (error || !req->newptr) /* error || read request */
+   return (error);
+
+   if ((val < AXP_CHARGERCTL1_MIN) || (val > AXP_CHARGERCTL1_MAX))
+   return (EINVAL);
+
+   val |= (data & (AXP_CHARGERCTL1_CMASK << 4));
+   axp8xx_write(dev, AXP_CHARGERCTL1, val);
+
+   return (0);
+}
+
+static int
 axp8xx_sysctl(SYSCTL_HANDLER_ARGS)
 {
struct axp8xx_softc *sc;
@@ -1482,6 +1513,16 @@ axp8xx_attach(device_t dev)
sc->sensors[i].format,
sc->sensors[i].desc);
}
+   SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
+   SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
+   OID_AUTO, "batchargecurrentstep",
+   CTLTYPE_INT | CTLFLAG_RW,
+   dev, 0, axp8xx_sysctl_chargecurrent,
+   "I", "Battery Charging Current Step, "
+   "0: 200mA, 1: 400mA, 2: 600mA, 3: 800mA, "
+   "4: 1000mA, 5: 1200mA, 6: 1400mA, 7: 1600mA, "
+   "8: 1800mA, 9: 2000mA, 10: 2200mA, 11: 2400mA, "
+   "12: 2600mA, 13: 2800mA");
 
/* Get thresholds */
if (axp8xx_read(dev, AXP_BAT_CAP_WARN, &val, 1) == 0) {
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svn commit: r344003 - head/sys/arm/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Mon Feb 11 14:31:19 2019
New Revision: 344003
URL: https://svnweb.freebsd.org/changeset/base/344003

Log:
  Add sensors support for AXP803/AXP813. Sensor values such as
  battery charging, charge state, voltage, charging current, discharging 
current,
  battery capacity etc. can be obtained via sysctl.
  
  Reviewed by:  manu
  Differential Revision:https://reviews.freebsd.org/D19145

Modified:
  head/sys/arm/allwinner/axp81x.c

Modified: head/sys/arm/allwinner/axp81x.c
==
--- head/sys/arm/allwinner/axp81x.c Mon Feb 11 09:31:54 2019
(r344002)
+++ head/sys/arm/allwinner/axp81x.c Mon Feb 11 14:31:19 2019
(r344003)
@@ -194,6 +194,11 @@ MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8x
 #define AXP_BAT_CAP_WARN_LV1   0xf0/* Bits 4, 5, 6, 7 */
 #define AXP_BAT_CAP_WARN_LV2   0xf /* Bits 0, 1, 2, 3 */
 
+/* Sensor conversion macros */
+#defineAXP_SENSOR_BAT_H(hi)((hi) << 4)
+#defineAXP_SENSOR_BAT_L(lo)((lo) & 0xf)
+#defineAXP_SENSOR_COULOMB(hi, lo)  (((hi & ~(1 << 7)) << 8) | (lo))
+
 static const struct {
const char *name;
uint8_t ctrl_reg;
@@ -538,6 +543,123 @@ static struct axp8xx_regdef axp8xx_common_regdefs[] = 
},
 };
 
+enum axp8xx_sensor {
+   AXP_SENSOR_ACIN_PRESENT,
+   AXP_SENSOR_VBUS_PRESENT,
+   AXP_SENSOR_BATT_PRESENT,
+   AXP_SENSOR_BATT_CHARGING,
+   AXP_SENSOR_BATT_CHARGE_STATE,
+   AXP_SENSOR_BATT_VOLTAGE,
+   AXP_SENSOR_BATT_CHARGE_CURRENT,
+   AXP_SENSOR_BATT_DISCHARGE_CURRENT,
+   AXP_SENSOR_BATT_CAPACITY_PERCENT,
+   AXP_SENSOR_BATT_MAXIMUM_CAPACITY,
+   AXP_SENSOR_BATT_CURRENT_CAPACITY,
+};
+
+enum battery_capacity_state {
+   BATT_CAPACITY_NORMAL = 1,   /* normal cap in battery */
+   BATT_CAPACITY_WARNING,  /* warning cap in battery */
+   BATT_CAPACITY_CRITICAL, /* critical cap in battery */
+   BATT_CAPACITY_HIGH, /* high cap in battery */
+   BATT_CAPACITY_MAX,  /* maximum cap in battery */
+   BATT_CAPACITY_LOW   /* low cap in battery */
+};
+
+struct axp8xx_sensors {
+   int id;
+   const char  *name;
+   const char  *desc;
+   const char  *format;
+};
+
+static const struct axp8xx_sensors axp8xx_common_sensors[] = {
+   {
+   .id = AXP_SENSOR_ACIN_PRESENT,
+   .name = "acin",
+   .format = "I",
+   .desc = "ACIN Present",
+   },
+   {
+   .id = AXP_SENSOR_VBUS_PRESENT,
+   .name = "vbus",
+   .format = "I",
+   .desc = "VBUS Present",
+   },
+   {
+   .id = AXP_SENSOR_BATT_PRESENT,
+   .name = "bat",
+   .format = "I",
+   .desc = "Battery Present",
+   },
+   {
+   .id = AXP_SENSOR_BATT_CHARGING,
+   .name = "batcharging",
+   .format = "I",
+   .desc = "Battery Charging",
+   },
+   {
+   .id = AXP_SENSOR_BATT_CHARGE_STATE,
+   .name = "batchargestate",
+   .format = "I",
+   .desc = "Battery Charge State",
+   },
+   {
+   .id = AXP_SENSOR_BATT_VOLTAGE,
+   .name = "batvolt",
+   .format = "I",
+   .desc = "Battery Voltage",
+   },
+   {
+   .id = AXP_SENSOR_BATT_CHARGE_CURRENT,
+   .name = "batchargecurrent",
+   .format = "I",
+   .desc = "Battery Charging Current",
+   },
+   {
+   .id = AXP_SENSOR_BATT_DISCHARGE_CURRENT,
+   .name = "batdischargecurrent",
+   .format = "I",
+   .desc = "Battery Discharging Current",
+   },
+   {
+   .id = AXP_SENSOR_BATT_CAPACITY_PERCENT,
+   .name = "batcapacitypercent",
+   .format = "I",
+   .desc = "Battery Capacity Percentage",
+   },
+   {
+   .id = AXP_SENSOR_BATT_MAXIMUM_CAPACITY,
+   .name = "batmaxcapacity",
+   .format = "I",
+   .desc = "Battery Maximum Capacity",
+   },
+   {
+   .id = AXP_SENSOR_BATT_CURRENT_CAPACITY,
+   .name = "batcurrentcapacity",
+   .format = "I",
+   .desc = "Battery Current Capacity",
+   },
+};
+
+struct axp8xx_config {
+   const char  *name;
+   int batsense_step;  /* uV */
+   int charge_step;/* uA */
+   int discharge_step; /* uA */
+   int maxcap_step;/* uAh */
+   int coulomb_step;   /* uAh */
+};
+
+static struct axp8xx_config axp803_config = {
+   .name =

svn commit: r343952 - head/sys/arm/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sun Feb 10 08:41:52 2019
New Revision: 343952
URL: https://svnweb.freebsd.org/changeset/base/343952

Log:
  Enable necessary bits when activating interrupts. This allows
  reading some events from the interrupt status registers. These events
  are reported to devd via system "PMU" and subsystem "Battery", "AC"
  and "USB" such as plugged/unplugged, absent, charged and charging.
  
  Reviewed by:  manu
  Differential Revision:https://reviews.freebsd.org/D19116

Modified:
  head/sys/arm/allwinner/axp81x.c

Modified: head/sys/arm/allwinner/axp81x.c
==
--- head/sys/arm/allwinner/axp81x.c Sun Feb 10 08:28:56 2019
(r343951)
+++ head/sys/arm/allwinner/axp81x.c Sun Feb 10 08:41:52 2019
(r343952)
@@ -65,9 +65,13 @@ MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8x
 #define AXP_POWERSRC_ACIN  (1 << 7)
 #define AXP_POWERSRC_VBUS  (1 << 5)
 #define AXP_POWERSRC_VBAT  (1 << 3)
-#define AXP_POWERSRC_CHARING   (1 << 2)
+#define AXP_POWERSRC_CHARING   (1 << 2)/* Charging Direction */
 #define AXP_POWERSRC_SHORTED   (1 << 1)
 #define AXP_POWERSRC_STARTUP   (1 << 0)
+#defineAXP_POWERMODE   0x01
+#define AXP_POWERMODE_BAT_CHARGING (1 << 6)
+#define AXP_POWERMODE_BAT_PRESENT  (1 << 5)
+#define AXP_POWERMODE_BAT_VALID(1 << 4)
 #defineAXP_ICTYPE  0x03
 #defineAXP_POWERCTL1   0x10
 #define AXP_POWERCTL1_DCDC7(1 << 6)/* AXP813/818 only */
@@ -117,14 +121,47 @@ MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8x
 #defineAXP_POWERBAT0x32
 #define AXP_POWERBAT_SHUTDOWN  (1 << 7)
 #defineAXP_IRQEN1  0x40
+#define AXP_IRQEN1_ACIN_HI (1 << 6)
+#define AXP_IRQEN1_ACIN_LO (1 << 5)
+#define AXP_IRQEN1_VBUS_HI (1 << 3)
+#define AXP_IRQEN1_VBUS_LO (1 << 2)
 #defineAXP_IRQEN2  0x41
+#define AXP_IRQEN2_BAT_IN  (1 << 7)
+#define AXP_IRQEN2_BAT_NO  (1 << 6)
+#define AXP_IRQEN2_BATCHGC (1 << 3)
+#define AXP_IRQEN2_BATCHGD (1 << 2)
 #defineAXP_IRQEN3  0x42
 #defineAXP_IRQEN4  0x43
+#define AXP_IRQEN4_BATLVL_LO1  (1 << 1)
+#define AXP_IRQEN4_BATLVL_LO0  (1 << 0)
 #defineAXP_IRQEN5  0x44
 #define AXP_IRQEN5_POKSIRQ (1 << 4)
+#define AXP_IRQEN5_POKLIRQ (1 << 3)
 #defineAXP_IRQEN6  0x45
+#defineAXP_IRQSTAT10x48
+#define AXP_IRQSTAT1_ACIN_HI   (1 << 6)
+#define AXP_IRQSTAT1_ACIN_LO   (1 << 5)
+#define AXP_IRQSTAT1_VBUS_HI   (1 << 3)
+#define AXP_IRQSTAT1_VBUS_LO   (1 << 2)
+#defineAXP_IRQSTAT20x49
+#define AXP_IRQSTAT2_BAT_IN(1 << 7)
+#define AXP_IRQSTAT2_BAT_NO(1 << 6)
+#define AXP_IRQSTAT2_BATCHGC   (1 << 3)
+#define AXP_IRQSTAT2_BATCHGD   (1 << 2)
+#defineAXP_IRQSTAT30x4a
+#defineAXP_IRQSTAT40x4b
+#define AXP_IRQSTAT4_BATLVL_LO1(1 << 1)
+#define AXP_IRQSTAT4_BATLVL_LO0(1 << 0)
 #defineAXP_IRQSTAT50x4c
 #define AXP_IRQSTAT5_POKSIRQ   (1 << 4)
+#define AXP_IRQEN5_POKLIRQ (1 << 3)
+#defineAXP_IRQSTAT60x4d
+#defineAXP_BATSENSE_HI 0x78
+#defineAXP_BATSENSE_LO 0x79
+#defineAXP_BATCHG_HI   0x7a
+#defineAXP_BATCHG_LO   0x7b
+#defineAXP_BATDISCHG_HI0x7c
+#defineAXP_BATDISCHG_LO0x7d
 #defineAXP_GPIO0_CTRL  0x90
 #defineAXP_GPIO0LDO_CTRL   0x91
 #defineAXP_GPIO1_CTRL  0x92
@@ -138,7 +175,25 @@ MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8x
 #define AXP_GPIO_FUNC_LDO_OFF  4
 #defineAXP_GPIO_SIGBIT 0x94
 #defineAXP_GPIO_PD 0x97
+#defineAXP_FUEL_GAUGECTL   0xb8
+#define AXP_FUEL_GAUGECTL_EN   (1 << 7)
 
+#defineAXP_BAT_CAP 0xb9
+#define AXP_BAT_CAP_VALID  (1 << 7)
+#define AXP_BAT_CAP_PERCENT0x7f
+
+#defineAXP_BAT_MAX_CAP_HI  0xe0
+#define AXP_BAT_MAX_CAP_VALID  (1 << 7)
+#defineAXP_BAT_MAX_CAP_LO  0xe1
+
+#defineAXP_BAT_COULOMB_HI  0xe2
+#define AXP_BAT_COULOMB_VALID  (1 << 7)
+#defineAXP_BAT_COULOMB_LO  0xe3
+
+#defineAXP_BAT_CAP_WARN0xe6
+#define AXP_BAT_CAP_WARN_LV1   0xf0/* Bits 4, 5, 6, 7 */
+#define AXP_BAT_CAP_WARN_LV2   0xf /* Bits 0, 1, 2, 3 */
+
 static const struct {
const char *name;
uint8_t ctrl_reg;
@@ -710,6 +765,68 @@ axp8xx_intr(void *arg

Re: svn commit: r336603 - head/sys/modules/dtb/allwinner

[Ganbold Tsagaankhuu]

On Sun, Jul 22, 2018 at 10:01 PM, Ganbold Tsagaankhuu 
wrote:

> Author: ganbold
> Date: Sun Jul 22 14:01:49 2018
> New Revision: 336603
> URL: https://svnweb.freebsd.org/changeset/base/336603
>
> Log:
>   dtb/allwinner: Build sun8i-h2-plus-orangepi-r1.dts
>   We have a u-boot port for this board so add the dtb to the build.
>

the u-boot port hopefully will be added soon:

https://reviews.freebsd.org/D16390

thanks,

Ganbold



>
> Modified:
>   head/sys/modules/dtb/allwinner/Makefile
>
> Modified: head/sys/modules/dtb/allwinner/Makefile
> 
> ==
> --- head/sys/modules/dtb/allwinner/Makefile Sun Jul 22 13:40:52 2018
>   (r336602)
> +++ head/sys/modules/dtb/allwinner/Makefile Sun Jul 22 14:01:49 2018
>   (r336603)
> @@ -12,6 +12,7 @@ DTS=  \
> sun7i-a20-olimex-som-evb.dts \
> sun7i-a20-pcduino3.dts \
> sun8i-a83t-bananapi-m3.dts \
> +   sun8i-h2-plus-orangepi-r1.dts \
> sun8i-h2-plus-orangepi-zero.dts \
> sun8i-h3-nanopi-m1.dts \
> sun8i-h3-nanopi-m1-plus.dts \
>
>
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svn commit: r336603 - head/sys/modules/dtb/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sun Jul 22 14:01:49 2018
New Revision: 336603
URL: https://svnweb.freebsd.org/changeset/base/336603

Log:
  dtb/allwinner: Build sun8i-h2-plus-orangepi-r1.dts
  We have a u-boot port for this board so add the dtb to the build.

Modified:
  head/sys/modules/dtb/allwinner/Makefile

Modified: head/sys/modules/dtb/allwinner/Makefile
==
--- head/sys/modules/dtb/allwinner/Makefile Sun Jul 22 13:40:52 2018
(r336602)
+++ head/sys/modules/dtb/allwinner/Makefile Sun Jul 22 14:01:49 2018
(r336603)
@@ -12,6 +12,7 @@ DTS=  \
sun7i-a20-olimex-som-evb.dts \
sun7i-a20-pcduino3.dts \
sun8i-a83t-bananapi-m3.dts \
+   sun8i-h2-plus-orangepi-r1.dts \
sun8i-h2-plus-orangepi-zero.dts \
sun8i-h3-nanopi-m1.dts \
sun8i-h3-nanopi-m1-plus.dts \
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Re: svn commit: r334626 - in head: lib/libc/amd64 lib/libc/amd64/sys lib/libc/arm lib/libc/arm/sys lib/libc/i386 lib/libc/i386/sys lib/libc/mips lib/libc/mips/sys lib/libc/powerpc lib/libc/powerpc/sys

[Ganbold Tsagaankhuu]

On Tue, Jun 5, 2018 at 3:35 AM, Mark Johnston  wrote:

> Author: markj
> Date: Mon Jun  4 19:35:15 2018
> New Revision: 334626
> URL: https://svnweb.freebsd.org/changeset/base/334626
>
> Log:
>   Reimplement brk() and sbrk() to avoid the use of _end.
>
>   Previously, libc.so would initialize its notion of the break address
>   using _end, a special symbol emitted by the static linker following
>   the bss section.  Compatibility issues between lld and ld.bfd could
>   cause the wrong definition of _end (libc.so's definition rather than
>   that of the executable) to be used, breaking the brk()/sbrk()
>   interface.
>
>   Avoid this problem and future interoperability issues by simply not
>   relying on _end.  Instead, modify the break() system call to return
>   the kernel's view of the current break address, and have libc
>   initialize its state using an extra syscall upon the first use of the
>   interface.  As a side effect, this appears to fix brk()/sbrk() usage
>   in executables run with rtld direct exec, since the kernel and libc.so
>   no longer maintain separate views of the process' break address.
>


Maybe it is not really related, or I'm doing something wrong, but when I
try to run release.sh script on FreeBSD 11.0-RELEASE-p9 to build pine64
image, it stops with error:
...
/usr/obj/usr/src/arm64.aarch64/tmp/usr/bin/ld: error: undefined symbol: brk
>>> referenced by brk_test.c:52 (/usr/src/lib/libc/tests/sys/brk_test.c:52)
>>>   brk_test.o:(atfu_brk_basic_body)

/usr/obj/usr/src/arm64.aarch64/tmp/usr/bin/ld: error: undefined symbol: sbrk
>>> referenced by brk_test.c:55 (/usr/src/lib/libc/tests/sys/brk_test.c:55)
>>>   brk_test.o:(atfu_brk_basic_body)

/usr/obj/usr/src/arm64.aarch64/tmp/usr/bin/ld: error: undefined symbol: brk
>>> referenced by brk_test.c:59 (/usr/src/lib/libc/tests/sys/brk_test.c:59)
>>>   brk_test.o:(atfu_brk_basic_body)

/usr/obj/usr/src/arm64.aarch64/tmp/usr/bin/ld: error: undefined symbol: brk
>>> referenced by brk_test.c:65 (/usr/src/lib/libc/tests/sys/brk_test.c:65)
>>>   brk_test.o:(atfu_brk_basic_body)

/usr/obj/usr/src/arm64.aarch64/tmp/usr/bin/ld: error: undefined symbol: sbrk
>>> referenced by brk_test.c:67 (/usr/src/lib/libc/tests/sys/brk_test.c:67)
>>>   brk_test.o:(atfu_brk_basic_body)

/usr/obj/usr/src/arm64.aarch64/tmp/usr/bin/ld: error: undefined symbol: sbrk
>>> referenced by brk_test.c:82 (/usr/src/lib/libc/tests/sys/brk_test.c:82)
>>>   brk_test.o:(atfu_sbrk_basic_body)
...

Ganbold


>
>   PR:   228574
>   Reviewed by:  kib (previous version)
>   MFC after:2 months
>   Differential Revision:https://reviews.freebsd.org/D15663
>
> Added:
>   head/lib/libc/sys/brk.c   (contents, props changed)
>   head/lib/libc/tests/sys/brk_test.c   (contents, props changed)
> Deleted:
>   head/lib/libc/amd64/sys/brk.S
>   head/lib/libc/amd64/sys/sbrk.S
>   head/lib/libc/arm/sys/brk.S
>   head/lib/libc/arm/sys/sbrk.S
>   head/lib/libc/i386/sys/brk.S
>   head/lib/libc/i386/sys/sbrk.S
>   head/lib/libc/mips/sys/brk.S
>   head/lib/libc/mips/sys/sbrk.S
>   head/lib/libc/powerpc/sys/brk.S
>   head/lib/libc/powerpc/sys/sbrk.S
>   head/lib/libc/powerpc64/sys/brk.S
>   head/lib/libc/powerpc64/sys/sbrk.S
>   head/lib/libc/sparc64/sys/brk.S
>   head/lib/libc/sparc64/sys/sbrk.S
> Modified:
>   head/lib/libc/amd64/Symbol.map
>   head/lib/libc/amd64/sys/Makefile.inc
>   head/lib/libc/arm/Symbol.map
>   head/lib/libc/arm/sys/Makefile.inc
>   head/lib/libc/i386/Symbol.map
>   head/lib/libc/i386/sys/Makefile.inc
>   head/lib/libc/mips/Symbol.map
>   head/lib/libc/mips/sys/Makefile.inc
>   head/lib/libc/powerpc/Symbol.map
>   head/lib/libc/powerpc/sys/Makefile.inc
>   head/lib/libc/powerpc64/Symbol.map
>   head/lib/libc/powerpc64/sys/Makefile.inc
>   head/lib/libc/riscv/sys/Makefile.inc
>   head/lib/libc/sparc64/Symbol.map
>   head/lib/libc/sparc64/sys/Makefile.inc
>   head/lib/libc/sys/Makefile.inc
>   head/lib/libc/sys/brk.2
>   head/lib/libc/tests/sys/Makefile
>   head/sys/compat/freebsd32/syscalls.master
>   head/sys/kern/syscalls.master
>   head/sys/vm/vm_unix.c
>
> Modified: head/lib/libc/amd64/Symbol.map
> 
> ==
> --- head/lib/libc/amd64/Symbol.map  Mon Jun  4 18:51:06 2018
> (r334625)
> +++ head/lib/libc/amd64/Symbol.map  Mon Jun  4 19:35:15 2018
> (r334626)
> @@ -63,7 +63,6 @@ FBSDprivate_1.0 {
> signalcontext;
> __siglongjmp;
> _brk;
> -   _end;
> __sys_vfork;
> _vfork;
>  };
>
> Modified: head/lib/libc/amd64/sys/Makefile.inc
> 
> ==
> --- head/lib/libc/amd64/sys/Makefile.incMon Jun  4 18:51:06 2018
>   (r334625)
> +++ head/lib/libc/amd64/sys/Makefile.incMon Jun  4 19:35:15 2018
>   (r334626)
> @@ -8,7 +8,7 @@ SRCS+=  \
> amd64_set_fsbase.c \
> amd64_s

svn commit: r317126 - head/sys/arm/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Wed Apr 19 05:59:00 2017
New Revision: 317126
URL: https://svnweb.freebsd.org/changeset/base/317126

Log:
  Use hwreset_get_by_ofw_idx() function instead, since there is
  no reset-names dts property defined for IR in case of H3 SoC.
  That way IR works on H3 SoC based board.
  Tested on Orangepi mini 2 board.

Modified:
  head/sys/arm/allwinner/aw_cir.c

Modified: head/sys/arm/allwinner/aw_cir.c
==
--- head/sys/arm/allwinner/aw_cir.c Wed Apr 19 05:28:21 2017
(r317125)
+++ head/sys/arm/allwinner/aw_cir.c Wed Apr 19 05:59:00 2017
(r317126)
@@ -419,7 +419,7 @@ aw_ir_attach(device_t dev)
}
 
/* De-assert reset */
-   if (hwreset_get_by_ofw_name(dev, 0, "apb", &rst_apb) == 0) {
+   if (hwreset_get_by_ofw_idx(dev, 0, 0, &rst_apb) == 0) {
err = hwreset_deassert(rst_apb);
if (err != 0) {
device_printf(dev, "cannot de-assert reset\n");
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svn commit: r317078 - head/sys/arm/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue Apr 18 06:58:04 2017
New Revision: 317078
URL: https://svnweb.freebsd.org/changeset/base/317078

Log:
  Remove function declaration that doesn't exist.

Modified:
  head/sys/arm/allwinner/a10_gpio.h

Modified: head/sys/arm/allwinner/a10_gpio.h
==
--- head/sys/arm/allwinner/a10_gpio.h   Tue Apr 18 03:40:36 2017
(r317077)
+++ head/sys/arm/allwinner/a10_gpio.h   Tue Apr 18 06:58:04 2017
(r317078)
@@ -32,6 +32,4 @@
 #defineA10_GPIO_FUNC_MII   2
 #defineA10_GPIO_FUNC_RGMII 5
 
-int a10_gpio_ethernet_activate(uint32_t);
-
 #endif
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svn commit: r317040 - head/share/misc

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Mon Apr 17 07:27:45 2017
New Revision: 317040
URL: https://svnweb.freebsd.org/changeset/base/317040

Log:
  Belatedly add myself to committers-src.dot file.

Modified:
  head/share/misc/committers-src.dot

Modified: head/share/misc/committers-src.dot
==
--- head/share/misc/committers-src.dot  Sun Apr 16 22:10:02 2017
(r317039)
+++ head/share/misc/committers-src.dot  Mon Apr 17 07:27:45 2017
(r317040)
@@ -169,6 +169,7 @@ flz [label="Florent Thoumie\nflz@FreeBSD
 gabor [label="Gabor Kovesdan\nga...@freebsd.org\n2010/02/02"]
 gad [label="Garance A. Drosehn\n...@freebsd.org\n2000/10/27"]
 gallatin [label="Andrew Gallatin\ngalla...@freebsd.org\n1999/01/15"]
+ganbold [label="Ganbold Tsagaankhuu\nganb...@freebsd.org\n2013/12/18"]
 gavin [label="Gavin Atkinson\nga...@freebsd.org\n2009/12/07"]
 gibbs [label="Justin T. Gibbs\ngi...@freebsd.org\n/??/??"]
 gjb [label="Glen Barber\n...@freebsd.org\n2013/06/04"]
@@ -772,6 +773,8 @@ sjg -> stevek
 
 sos -> marcel
 
+stas -> ganbold
+
 theraven -> phil
 
 thompsa -> weongyo
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svn commit: r315931 - head/sys/arm/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sat Mar 25 10:39:24 2017
New Revision: 315931
URL: https://svnweb.freebsd.org/changeset/base/315931

Log:
  Fix and add comments to match selected frequency sample.
  Add debug printfs when bootverbose is used.
  No functional changes.

Modified:
  head/sys/arm/allwinner/aw_cir.c

Modified: head/sys/arm/allwinner/aw_cir.c
==
--- head/sys/arm/allwinner/aw_cir.c Sat Mar 25 05:41:34 2017
(r315930)
+++ head/sys/arm/allwinner/aw_cir.c Sat Mar 25 10:39:24 2017
(r315931)
@@ -89,7 +89,12 @@ __FBSDID("$FreeBSD$");
 
 /* IR Sample Configure Reg */
 #defineAW_IR_CIR   0x34
-/* Filter Threshold = 8 * 21.3 = ~128us < 200us */
+
+/*
+ * Frequency sample: 23437.5Hz (Cycle: 42.7us)
+ * Pulse of NEC Remote > 560us
+ */
+/* Filter Threshold = 8 * 42.7 = ~341us < 500us */
 #define AW_IR_RXFILT_VAL   (((8) & 0x3f) << 2)
 /* Idle Threshold = (2 + 1) * 128 * 42.7 = ~16.4ms > 9ms */
 #define AW_IR_RXIDLE_VAL   (((2) & 0xff) << 8)
@@ -317,12 +322,17 @@ aw_ir_intr(void *arg)
 
/* Read RX interrupt status */
val = READ(sc, AW_IR_RXSTA);
+   if (bootverbose)
+   device_printf(sc->dev, "RX interrupt status: %x\n", val);
 
/* Clean all pending interrupt statuses */
WRITE(sc, AW_IR_RXSTA, val | AW_IR_RXSTA_CLEARALL);
 
/* When Rx FIFO Data available or Packet end */
if (val & (AW_IR_RXINT_RAI_EN | AW_IR_RXINT_RPEI_EN)) {
+   if (bootverbose)
+   device_printf(sc->dev,
+   "RX FIFO Data available or Packet end\n");
/* Get available message count in RX FIFO */
dcnt  = AW_IR_RXSTA_COUNTER(val);
/* Read FIFO */
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svn commit: r310019 - in head/sys: arm/conf arm/rockchip conf

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue Dec 13 11:43:46 2016
New Revision: 310019
URL: https://svnweb.freebsd.org/changeset/base/310019

Log:
  Switch Rockchip RK3188 SoC to use the platform code.
  
  Reviewed by:  andrew, manu
  Differential Revision:https://reviews.freebsd.org/D8769

Added:
  head/sys/arm/rockchip/rk30xx_mp.h   (contents, props changed)
Modified:
  head/sys/arm/conf/RK3188
  head/sys/arm/rockchip/rk30xx_machdep.c
  head/sys/arm/rockchip/rk30xx_mp.c
  head/sys/conf/options.arm

Modified: head/sys/arm/conf/RK3188
==
--- head/sys/arm/conf/RK3188Tue Dec 13 10:03:29 2016(r310018)
+++ head/sys/arm/conf/RK3188Tue Dec 13 11:43:46 2016(r310019)
@@ -23,8 +23,13 @@ identRK3188
 include"std.armv6"
 include"../rockchip/std.rk30xx"
 
+optionsSOC_ROCKCHIP_RK3188
+
 optionsSCHED_ULE   # ULE scheduler
 optionsSMP # Enable multiple cores
+optionsPLATFORM
+optionsPLATFORM_SMP
+optionsMULTIDELAY
 
 # Root mount from MMC/SD card
 optionsROOTDEVNAME=\"ufs:/dev/mmcsd0\"

Modified: head/sys/arm/rockchip/rk30xx_machdep.c
==
--- head/sys/arm/rockchip/rk30xx_machdep.c  Tue Dec 13 10:03:29 2016
(r310018)
+++ head/sys/arm/rockchip/rk30xx_machdep.c  Tue Dec 13 11:43:46 2016
(r310019)
@@ -42,33 +42,25 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
-#include 
 #include 
 #include 
-#include  
+#include 
+#include 
 
 #include 
+#include 
 
-vm_offset_t
-platform_lastaddr(void)
-{
+#include "platform_if.h"
 
-   return (devmap_lastaddr());
-}
-
-void
-platform_probe_and_attach(void)
+static vm_offset_t
+rk30xx_lastaddr(platform_t plat)
 {
 
+   return (devmap_lastaddr());
 }
 
-void
-platform_gpio_init(void)
-{
-}
-
-void
-platform_late_init(void)
+static void
+rk30xx_late_init(platform_t plat)
 {
 
/* Enable cache */
@@ -79,8 +71,8 @@ platform_late_init(void)
 /*
  * Set up static device mappings.
  */
-int
-platform_devmap_init(void)
+static int
+rk30xx_devmap_init(platform_t plat)
 {
 
devmap_add_entry(0x1000, 0x0020);
@@ -89,11 +81,27 @@ platform_devmap_init(void)
return (0);
 }
 
-void
-cpu_reset()
+static void
+rk30xx_cpu_reset()
 {
 
rk30_wd_watchdog_reset();
printf("Reset failed!\n");
while (1);
 }
+
+#if defined(SOC_ROCKCHIP_RK3188)
+static platform_method_t rk30xx_methods[] = {
+   PLATFORMMETHOD(platform_lastaddr,   rk30xx_lastaddr),
+   PLATFORMMETHOD(platform_devmap_init,rk30xx_devmap_init),
+   PLATFORMMETHOD(platform_late_init,  rk30xx_late_init),
+   PLATFORMMETHOD(platform_cpu_reset,  rk30xx_cpu_reset),
+
+#ifdef SMP
+   PLATFORMMETHOD(platform_mp_start_ap,rk30xx_mp_start_ap),
+   PLATFORMMETHOD(platform_mp_setmaxid,rk30xx_mp_setmaxid),
+#endif
+   PLATFORMMETHOD_END,
+};
+FDT_PLATFORM_DEF(rk30xx, "RK3188", 0, "rockchip,rk3188", 200);
+#endif

Modified: head/sys/arm/rockchip/rk30xx_mp.c
==
--- head/sys/arm/rockchip/rk30xx_mp.c   Tue Dec 13 10:03:29 2016
(r310018)
+++ head/sys/arm/rockchip/rk30xx_mp.c   Tue Dec 13 11:43:46 2016
(r310019)
@@ -37,9 +37,13 @@ __FBSDID("$FreeBSD$");
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
+
+#include 
 
 #defineSCU_PHYSBASE0x1013c000
 #defineSCU_SIZE0x100
@@ -80,7 +84,7 @@ rk30xx_boot2(void)
 }
 
 void
-platform_mp_setmaxid(void)
+rk30xx_mp_setmaxid(platform_t plat)
 {
bus_space_handle_t scu;
int ncpu;
@@ -101,7 +105,7 @@ platform_mp_setmaxid(void)
 }
 
 void
-platform_mp_start_ap(void)
+rk30xx_mp_start_ap(platform_t plat)
 {
bus_space_handle_t scu;
bus_space_handle_t imem;

Added: head/sys/arm/rockchip/rk30xx_mp.h
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/rockchip/rk30xx_mp.h   Tue Dec 13 11:43:46 2016
(r310019)
@@ -0,0 +1,38 @@
+/*-
+ * Copyright (C) 2016 Ganbold Tsagaankhuu 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distributi

svn commit: r307984 - in head/sys/arm: allwinner conf

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Thu Oct 27 04:26:33 2016
New Revision: 307984
URL: https://svnweb.freebsd.org/changeset/base/307984

Log:
  Add support for Allwinner Consumer IR interface.
  RX is supported now and the driver is using evdev framework.
  It was tested on Cubieboard2 (A20 SoC) using lirc
  with dfrobot's IR remote controller.

Added:
  head/sys/arm/allwinner/aw_cir.c   (contents, props changed)
Modified:
  head/sys/arm/allwinner/files.allwinner
  head/sys/arm/conf/GENERIC

Added: head/sys/arm/allwinner/aw_cir.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/allwinner/aw_cir.c Thu Oct 27 04:26:33 2016
(r307984)
@@ -0,0 +1,535 @@
+/*-
+ * Copyright (c) 2016 Ganbold Tsagaankhuu 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Allwinner Consumer IR controller
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#defineREAD(_sc, _r)   bus_read_4((_sc)->res[0], (_r))
+#defineWRITE(_sc, _r, _v)  bus_write_4((_sc)->res[0], (_r), (_v))
+
+/* IR Control */
+#defineAW_IR_CTL   0x00
+/* Global Enable */
+#define AW_IR_CTL_GEN  (1 << 0)
+/* RX enable */
+#define AW_IR_CTL_RXEN (1 << 1)
+/* CIR mode enable */
+#define AW_IR_CTL_MD   (1 << 4) | (1 << 5)
+
+/* RX Config Reg */
+#defineAW_IR_RXCTL 0x10
+/* Pulse Polarity Invert flag */
+#define AW_IR_RXCTL_RPPI   (1 << 2)
+
+/* RX Data */
+#defineAW_IR_RXFIFO0x20
+
+/* RX Interrupt Control */
+#defineAW_IR_RXINT 0x2C
+/* RX FIFO Overflow */
+#define AW_IR_RXINT_ROI_EN (1 << 0)
+/* RX Packet End */
+#define AW_IR_RXINT_RPEI_EN(1 << 1)
+/* RX FIFO Data Available */
+#define AW_IR_RXINT_RAI_EN (1 << 4)
+/* RX FIFO available byte level */
+#define AW_IR_RXINT_RAL(val)   ((val) << 8)
+
+/* RX Interrupt Status Reg */
+#defineAW_IR_RXSTA 0x30
+/* RX FIFO Get Available Counter */
+#define AW_IR_RXSTA_COUNTER(val)   (((val) >> 8) & (sc->fifo_size 
* 2 - 1))
+/* Clear all interrupt status */
+#define AW_IR_RXSTA_CLEARALL   0xff
+
+/* IR Sample Configure Reg */
+#defineAW_IR_CIR   0x34
+/* Filter Threshold = 8 * 21.3 = ~128us < 200us */
+#define AW_IR_RXFILT_VAL   (((8) & 0x3f) << 2)
+/* Idle Threshold = (2 + 1) * 128 * 42.7 = ~16.4ms > 9ms */
+#define AW_IR_RXIDLE_VAL   (((2) & 0xff) << 8)
+
+/* Bit 15 - value (pulse/space) */
+#defineVAL_MASK0x80
+/* Bits 0:14 - sample duration  */
+#definePERIOD_MASK 0x7f
+
+/* Clock rate for IR0 or IR1 clock in CIR mode */
+#defineAW_IR_BASE_CLK  300
+/* Frequency sample 3MHz/64 = 46875Hz (21.3us) */
+#defineAW_IR_SAMPLE_64 (0 << 0)
+/* Frequency sample 3MHz/128 = 23437.5Hz (42.7us) */
+#defineAW_IR_SAMPLE_128(1 << 0)
+
+#defineAW_IR_ERROR_CODE0x
+#defineAW_IR_REPEAT_CODE   0x0
+
+/* 80 * 42.7 = ~3.4ms, Lead1(4.5ms)

svn commit: r291683 - in head/sys: arm/amlogic/aml8726 boot/fdt/dts/arm

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Thu Dec  3 09:37:20 2015
New Revision: 291683
URL: https://svnweb.freebsd.org/changeset/base/291683

Log:
  Add glue driver for Amlogic Meson Gigabit Ethernet Controller
  and enable it for Odroid C1 board.
  Together with r291676 change, dwc(4) can receive packets now.

Added:
  head/sys/arm/amlogic/aml8726/aml8726_if_dwc.c   (contents, props changed)
Modified:
  head/sys/arm/amlogic/aml8726/files.aml8726
  head/sys/boot/fdt/dts/arm/odroidc1.dts

Added: head/sys/arm/amlogic/aml8726/aml8726_if_dwc.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/amlogic/aml8726/aml8726_if_dwc.c   Thu Dec  3 09:37:20 
2015(r291683)
@@ -0,0 +1,98 @@
+/*-
+ * Copyright (c) 2015 Ganbold Tsagaankhuu 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "if_dwc_if.h"
+
+static int
+aml8726_if_dwc_probe(device_t dev)
+{
+
+   if (!ofw_bus_status_okay(dev))
+   return (ENXIO);
+   if (!ofw_bus_is_compatible(dev, "amlogic,meson6-dwmac"))
+   return (ENXIO);
+   device_set_desc(dev, "Amlogic Meson Gigabit Ethernet Controller");
+
+   return (BUS_PROBE_DEFAULT);
+}
+
+static int
+aml8726_if_dwc_init(device_t dev)
+{
+
+   return (0);
+}
+
+static int
+aml8726_if_dwc_mac_type(device_t dev)
+{
+
+   return (DWC_GMAC_ALT_DESC);
+}
+
+static int
+aml8726_if_dwc_mii_clk(device_t dev)
+{
+
+   return (GMAC_MII_CLK_100_150M_DIV62);
+}
+
+static device_method_t aml8726_dwc_methods[] = {
+   DEVMETHOD(device_probe, aml8726_if_dwc_probe),
+
+   DEVMETHOD(if_dwc_init,  aml8726_if_dwc_init),
+   DEVMETHOD(if_dwc_mac_type,  aml8726_if_dwc_mac_type),
+   DEVMETHOD(if_dwc_mii_clk,   aml8726_if_dwc_mii_clk),
+
+   DEVMETHOD_END
+};
+
+static devclass_t aml8726_dwc_devclass;
+
+extern driver_t dwc_driver;
+
+DEFINE_CLASS_1(dwc, aml8726_dwc_driver, aml8726_dwc_methods,
+sizeof(struct dwc_softc), dwc_driver);
+DRIVER_MODULE(aml8726_dwc, simplebus, aml8726_dwc_driver,
+aml8726_dwc_devclass, 0, 0);
+
+MODULE_DEPEND(aml8726_dwc, dwc, 1, 1, 1);

Modified: head/sys/arm/amlogic/aml8726/files.aml8726
==
--- head/sys/arm/amlogic/aml8726/files.aml8726  Thu Dec  3 08:06:10 2015
(r291682)
+++ head/sys/arm/amlogic/aml8726/files.aml8726  Thu Dec  3 09:37:20 2015
(r291683)
@@ -28,3 +28,4 @@ arm/amlogic/aml8726/aml8726_pinctrl.c o
 arm/amlogic/aml8726/uart_dev_aml8726.c optionaluart
 arm/amlogic/aml8726/aml8726_usb_phy-m3.c   optionaldwcotg usb gpio
 arm/amlogic/aml8726/aml8726_usb_phy-m6.c   optionaldwcotg usb gpio
+arm/amlogic/aml8726/aml8726_if_dwc.c   optionaldwc

Modified: head/sys/boot/fdt/dts/arm/odroidc1.dts
==
--- head/sys/boot/fdt/dts/arm/odroidc1.dts  Thu Dec  3 08:06:10 2015
(r291682)
+++ head/sys/boot/fdt/dts/arm/odroidc1.dts  Thu Dec  3 09:37:20 2015
(r291683)
@@ -323,7 +323,7 @@
 
eth@c941 {
/* ethernet */
-   compatible = "snps,dwmac";
+   compatible = "amlogic,meson6-dwmac";
reg = <0xc941 0x2000>;  /* ahbbus 0x41 */
 

Re: svn commit: r289759 - in head/sys/arm: arm include

[Ganbold Tsagaankhuu]

On Fri, Oct 23, 2015 at 12:38 AM, Jason A. Harmening 
wrote:

> Author: jah
> Date: Thu Oct 22 16:38:01 2015
> New Revision: 289759
> URL: https://svnweb.freebsd.org/changeset/base/289759
>
> Log:
>   Use pmap_quick* functions in armv6 busdma, for bounce buffers and cache
> maintenance.  This makes it safe to sync buffers that have no VA mapping
> associated with the busdma map, but may have other mappings, possibly on
> different CPUs.  This also makes it safe to sync unmapped bounce buffers in
> non-sleepable thread contexts.
>
>   Similar to r286787 for x86, this treats userspace buffers the same as
> unmapped buffers and no longer borrows the UVA for sync operations.
>
>   Submitted by: Svatopluk Kraus  (earlier
> revision)
>   Tested by:Svatopluk Kraus
>   Differential Revision:https://reviews.freebsd.org/D3869



It seems I can't boot Odroid C1 with this change.

http://pastebin.ca/3227678

r289758 works for me.

Am I missing something?

thanks,

Ganbold



>
>
> Modified:
>   head/sys/arm/arm/busdma_machdep-v6.c
>   head/sys/arm/include/cpu-v6.h
>
> Modified: head/sys/arm/arm/busdma_machdep-v6.c
>
> ==
> --- head/sys/arm/arm/busdma_machdep-v6.cThu Oct 22 15:42:53 2015
>   (r289758)
> +++ head/sys/arm/arm/busdma_machdep-v6.cThu Oct 22 16:38:01 2015
>   (r289759)
> @@ -61,7 +61,7 @@ __FBSDID("$FreeBSD$");
>
>  #include 
>  #include 
> -#include 
> +#include 
>  #include 
>
>  #define MAX_BPAGES 64
> @@ -104,14 +104,16 @@ struct bounce_page {
> vm_offset_t vaddr;  /* kva of bounce buffer */
> bus_addr_t  busaddr;/* Physical address */
> vm_offset_t datavaddr;  /* kva of client data */
> -   bus_addr_t  dataaddr;   /* client physical address */
> +   vm_page_t   datapage;   /* physical page of client data */
> +   vm_offset_t dataoffs;   /* page offset of client data */
> bus_size_t  datacount;  /* client data count */
> STAILQ_ENTRY(bounce_page) links;
>  };
>
>  struct sync_list {
> vm_offset_t vaddr;  /* kva of client data */
> -   bus_addr_t  busaddr;/* client physical address */
> +   vm_page_t   pages;  /* starting page of client data */
> +   vm_offset_t dataoffs;   /* page offset of client data */
> bus_size_t  datacount;  /* client data count */
>  };
>
> @@ -181,7 +183,6 @@ struct bus_dmamap {
> intpagesreserved;
> bus_dma_tag_t  dmat;
> struct memdesc mem;
> -   pmap_t pmap;
> bus_dmamap_callback_t *callback;
> void  *callback_arg;
> int   flags;
> @@ -206,12 +207,14 @@ static bus_addr_t add_bounce_page(bus_dm
>   vm_offset_t vaddr, bus_addr_t addr,
>   bus_size_t size);
>  static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page
> *bpage);
> -static void _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
> -void *buf, bus_size_t buflen, int flags);
> +static void _bus_dmamap_count_pages(bus_dma_tag_t dmat, pmap_t pmap,
> +bus_dmamap_t map, void *buf, bus_size_t buflen, int flags);
>  static void _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map,
>  vm_paddr_t buf, bus_size_t buflen, int flags);
>  static int _bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
>  int flags);
> +static void dma_preread_safe(vm_offset_t va, vm_paddr_t pa, vm_size_t
> size);
> +static void dma_dcache_sync(struct sync_list *sl, bus_dmasync_op_t op);
>
>  static busdma_bufalloc_t coherent_allocator;   /* Cache of coherent
> buffers */
>  static busdma_bufalloc_t standard_allocator;   /* Cache of standard
> buffers */
> @@ -896,7 +899,8 @@ _bus_dmamap_count_phys(bus_dma_tag_t dma
> while (buflen != 0) {
> sgsize = MIN(buflen, dmat->maxsegsz);
> if (must_bounce(dmat, map, curaddr, sgsize) != 0) {
> -   sgsize = MIN(sgsize, PAGE_SIZE);
> +   sgsize = MIN(sgsize,
> +   PAGE_SIZE - (curaddr & PAGE_MASK));
> map->pagesneeded++;
> }
> curaddr += sgsize;
> @@ -907,7 +911,7 @@ _bus_dmamap_count_phys(bus_dma_tag_t dma
>  }
>
>  static void
> -_bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
> +_bus_dmamap_count_pages(bus_dma_tag_t dmat, pmap_t pmap, bus_dmamap_t map,
>  void *buf, bus_size_t buflen, int flags)
>  {
> vm_offset_t vaddr;
> @@ -927,10 +931,10 @@ _bus_dmamap_count_pages(bus_dma_tag_t dm
> vendaddr = (vm_offset_t)buf + buflen;
>
> while (vaddr < vendaddr) {
> -   

svn commit: r289630 - head/sys/arm/amlogic/aml8726

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue Oct 20 13:47:36 2015
New Revision: 289630
URL: https://svnweb.freebsd.org/changeset/base/289630

Log:
  Include "opt_platform.h" to fix kernel build for amlogic devices.

Modified:
  head/sys/arm/amlogic/aml8726/aml8726_machdep.c

Modified: head/sys/arm/amlogic/aml8726/aml8726_machdep.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_machdep.c  Tue Oct 20 13:32:09 
2015(r289629)
+++ head/sys/arm/amlogic/aml8726/aml8726_machdep.c  Tue Oct 20 13:47:36 
2015(r289630)
@@ -29,6 +29,8 @@
 #include 
 __FBSDID("$FreeBSD$");
 
+#include "opt_platform.h"
+
 #define _ARM32_BUS_DMA_PRIVATE
 #include 
 #include 
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svn commit: r283361 - in head/sys: arm/conf boot/fdt/dts/arm

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sun May 24 08:45:19 2015
New Revision: 283361
URL: https://svnweb.freebsd.org/changeset/base/283361

Log:
  Add kernel config and dts files for an aml8726-m3
  based device.
  Following u-boot commands allow FreeBSD boot on
  Yiyate Android TV Box (aml8726-m3):
  
  tv open 480p
  mmc rescan 0
  fatload mmc 0 0x8010 kernel.bin
  go 0x8010
  
  The current FreeBSD driver doesn't program the video
  clocks so the u-boot tv command is necessary in order
  for the frame buffer to be useful (otherwise it can
  be skipped).
  
  The SD card for the Yiyate Android TV Box doesn't need
  anything special beyond creating a FAT16 and a UFS
  filesystem.
  
  Differential Revision:https://reviews.freebsd.org/D2636
  Submitted by: John Wehle

Added:
  head/sys/arm/conf/YYHD18   (contents, props changed)
  head/sys/boot/fdt/dts/arm/meson3.dtsi   (contents, props changed)
  head/sys/boot/fdt/dts/arm/yyhd18-m3.dts   (contents, props changed)

Added: head/sys/arm/conf/YYHD18
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/conf/YYHD18Sun May 24 08:45:19 2015(r283361)
@@ -0,0 +1,26 @@
+# YYHD18 -- Custom configuration for the Yiyate Android TV box
+#
+# For more information on this file, please read the config(5) manual page,
+# and/or the handbook section on Kernel Configuration Files:
+#
+#
http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
+#
+# The handbook is also available locally in /usr/share/doc/handbook
+# if you've installed the doc distribution, otherwise always see the
+# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the
+# latest information.
+#
+# An exhaustive list of options and more detailed explanations of the
+# device lines is also present in the ../../conf/NOTES and NOTES files.
+# If you are in doubt as to the purpose or necessity of a line, check first
+# in NOTES.
+#
+# $FreeBSD$
+
+#NO_UNIVERSE
+
+include"AML8726"
+ident  YYHD18
+
+optionsFDT_DTB_STATIC
+makeoptionsFDT_DTS_FILE=yyhd18-m3.dts

Added: head/sys/boot/fdt/dts/arm/meson3.dtsi
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm/meson3.dtsi   Sun May 24 08:45:19 2015
(r283361)
@@ -0,0 +1,77 @@
+/*-
+ * Copyright (c) 2015 John Wehle 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * The basic single core aml8726 (aka meson) uses an Amlogic interrupt
+ * controller, however meson.dtsi specifies GIC (which is present on
+ * the multicore aml8726) so we need to override things here.
+ */
+
+/include/ "meson.dtsi"
+
+/ {
+   model = "Amlogic Meson3 SoC";
+   compatible = "amlogic,meson3";
+
+   interrupt-parent = <&pic>;
+
+   pic: pic@c1109a40 {
+   device_type = "interrupt-controller";
+   compatible = "amlogic,aml8726-pic";
+   reg = <0xc1109a40 128>; /* cbus 0x2690 */
+
+   interrupt-controller;
+   #interrupt-cells = <3>;
+   };
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu@200 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a9";
+   next-level-cache = <&L2>;
+   reg = <0x200>;
+   };
+   };
+
+   clk81: clk@0 {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   clock-frequency = <0

svn commit: r283360 - in head/sys/dev: acpi_support gpio led

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sun May 24 07:45:42 2015
New Revision: 283360
URL: https://svnweb.freebsd.org/changeset/base/283360

Log:
  This implements default-state support as described in:
  
  
https://www.kernel.org/doc/Documentation/devicetree/bindings/leds/leds-gpio.txt
  
  Without this booting the VSATV102 causes the blue "working" led to turn
  off when the kernel starts up. With this the led (which is turned on by
  the firmware) stays on since that's the default state specified in the FDT.
  
  Expanded the meaning of the led_create_state state parameter in order
  to implement support for "keep". The original values were:
  
  == 0 Off
  != 0 On
  
  The new values are:
  
  == -1don't change / keep current setting
  == 0 Off
  != -1 && != 0On
  
  This should have no effect on acpi_asus_attach which only calls
  led_create_state with state set to 1. Updated acpi_ibm_attach
  in order to avoid surprises.
  
  Differential Revision:https://reviews.freebsd.org/D2615
  Submitted by: John Wehle
  Reviewed by:  gonzo, loos

Modified:
  head/sys/dev/acpi_support/acpi_ibm.c
  head/sys/dev/gpio/gpioled.c
  head/sys/dev/led/led.c

Modified: head/sys/dev/acpi_support/acpi_ibm.c
==
--- head/sys/dev/acpi_support/acpi_ibm.cSun May 24 07:32:02 2015
(r283359)
+++ head/sys/dev/acpi_support/acpi_ibm.cSun May 24 07:45:42 2015
(r283360)
@@ -445,7 +445,8 @@ acpi_ibm_attach(device_t dev)
 
/* Hook up light to led(4) */
if (sc->light_set_supported)
-   sc->led_dev = led_create_state(ibm_led, sc, "thinklight", 
sc->light_val);
+   sc->led_dev = led_create_state(ibm_led, sc, "thinklight",
+   (sc->light_val ? 1 : 0));
 
return (0);
 }

Modified: head/sys/dev/gpio/gpioled.c
==
--- head/sys/dev/gpio/gpioled.c Sun May 24 07:32:02 2015(r283359)
+++ head/sys/dev/gpio/gpioled.c Sun May 24 07:45:42 2015(r283360)
@@ -166,8 +166,10 @@ static int
 gpioled_attach(device_t dev)
 {
struct gpioled_softc *sc;
+   int state;
 #ifdef FDT
phandle_t node;
+   char *default_state;
char *name;
 #else
const char *name;
@@ -177,10 +179,29 @@ gpioled_attach(device_t dev)
sc->sc_dev = dev;
sc->sc_busdev = device_get_parent(dev);
GPIOLED_LOCK_INIT(sc);
+
+   state = 0;
+
 #ifdef FDT
-   name = NULL;
if ((node = ofw_bus_get_node(dev)) == -1)
return (ENXIO);
+
+   if (OF_getprop_alloc(node, "default-state",
+   sizeof(char), (void **)&default_state) != -1) {
+   if (strcasecmp(default_state, "on") == 0)
+   state = 1;
+   else if (strcasecmp(default_state, "off") == 0)
+   state = 0;
+   else if (strcasecmp(default_state, "keep") == 0)
+   state = -1;
+   else {
+   device_printf(dev,
+   "unknown value for default-state in FDT\n");
+   }
+   free(default_state, M_OFWPROP);
+   }
+
+   name = NULL;
if (OF_getprop_alloc(node, "label", 1, (void **)&name) == -1)
OF_getprop_alloc(node, "name", 1, (void **)&name);
 #else
@@ -189,8 +210,8 @@ gpioled_attach(device_t dev)
name = NULL;
 #endif
 
-   sc->sc_leddev = led_create(gpioled_control, sc, name ? name :
-   device_get_nameunit(dev));
+   sc->sc_leddev = led_create_state(gpioled_control, sc, name ? name :
+   device_get_nameunit(dev), state);
 #ifdef FDT
if (name != NULL)
free(name, M_OFWPROP);

Modified: head/sys/dev/led/led.c
==
--- head/sys/dev/led/led.c  Sun May 24 07:32:02 2015(r283359)
+++ head/sys/dev/led/led.c  Sun May 24 07:45:42 2015(r283360)
@@ -293,7 +293,8 @@ led_create_state(led_t *func, void *priv
mtx_lock(&led_mtx);
sc->dev->si_drv1 = sc;
LIST_INSERT_HEAD(&led_list, sc, list);
-   sc->func(sc->private, state != 0);
+   if (state != -1)
+   sc->func(sc->private, state != 0);
mtx_unlock(&led_mtx);
 
return (sc->dev);
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svn commit: r283352 - head/sys/boot/fdt/dts/arm

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sun May 24 07:09:16 2015
New Revision: 283352
URL: https://svnweb.freebsd.org/changeset/base/283352

Log:
  Enable leds for VSATV102 in dts.
  
  Differential Revision: https://reviews.freebsd.org/D2614
  Submitted by: John Wehle

Modified:
  head/sys/boot/fdt/dts/arm/vsatv102-m6.dts

Modified: head/sys/boot/fdt/dts/arm/vsatv102-m6.dts
==
--- head/sys/boot/fdt/dts/arm/vsatv102-m6.dts   Sun May 24 07:00:58 2015
(r283351)
+++ head/sys/boot/fdt/dts/arm/vsatv102-m6.dts   Sun May 24 07:09:16 2015
(r283352)
@@ -282,6 +282,17 @@
};
};
 
+   leds {
+   compatible = "gpio-leds";
+
+   sys_led {
+   gpios = <&gpioao 2>;/* gpioao_2 sys_led */
+   label = "sys_led";
+
+   default-state = "on";
+   };
+   };
+
chosen {
stdin = "uart0";
stdout = "uart0";
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svn commit: r283188 - head/sys/arm/amlogic/aml8726

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Thu May 21 07:35:20 2015
New Revision: 283188
URL: https://svnweb.freebsd.org/changeset/base/283188

Log:
  Add missing break statement.
  
  Submitted by:   John Wehle

Modified:
  head/sys/arm/amlogic/aml8726/aml8726_usb_phy-m6.c

Modified: head/sys/arm/amlogic/aml8726/aml8726_usb_phy-m6.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_usb_phy-m6.c   Thu May 21 07:34:08 
2015(r283187)
+++ head/sys/arm/amlogic/aml8726/aml8726_usb_phy-m6.c   Thu May 21 07:35:20 
2015(r283188)
@@ -181,8 +181,10 @@ aml8726_usb_phy_attach(device_t dev)
sc->pwr_en[i].pin = prop[i * 3 + 1];
sc->pwr_en[i].pol = prop[i * 3 + 2];
 
-   if (sc->pwr_en[i].dev == NULL)
+   if (sc->pwr_en[i].dev == NULL) {
err = 1;
+   break;
+   }
}
 
free(prop, M_OFWPROP);
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svn commit: r283186 - head/sys/arm/amlogic/aml8726

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Thu May 21 07:23:50 2015
New Revision: 283186
URL: https://svnweb.freebsd.org/changeset/base/283186

Log:
  Add driver for usbclock generator for earlier amlogic chip.
  
  Differential Revision:https://reviews.freebsd.org/D2590
  Submitted by: John Wehle

Added:
  head/sys/arm/amlogic/aml8726/aml8726_usb_phy-m3.c   (contents, props changed)
Modified:
  head/sys/arm/amlogic/aml8726/files.aml8726

Added: head/sys/arm/amlogic/aml8726/aml8726_usb_phy-m3.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/amlogic/aml8726/aml8726_usb_phy-m3.c   Thu May 21 07:23:50 
2015(r283186)
@@ -0,0 +1,428 @@
+/*-
+ * Copyright 2014-2015 John Wehle 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Amlogic aml8726-m3 USB physical layer driver.
+ *
+ * Both USB physical interfaces share the same configuration register.
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "gpio_if.h"
+
+struct aml8726_usb_phy_gpio {
+   device_tdev;
+   uint32_tpin;
+   uint32_tpol;
+};
+
+struct aml8726_usb_phy_softc {
+   device_tdev;
+   struct resource *res[1];
+   uint32_tnpwr_en;
+   struct aml8726_usb_phy_gpio *pwr_en;
+};
+
+static struct resource_spec aml8726_usb_phy_spec[] = {
+   { SYS_RES_MEMORY,   0,  RF_ACTIVE },
+   { -1, 0 }
+};
+
+#defineAML_USB_PHY_CFG_REG 0
+#defineAML_USB_PHY_CFG_A_CLK_DETECTED  (1U << 31)
+#defineAML_USB_PHY_CFG_CLK_DIV_MASK(0x7f << 24)
+#defineAML_USB_PHY_CFG_CLK_DIV_SHIFT   24
+#defineAML_USB_PHY_CFG_B_CLK_DETECTED  (1 << 22)
+#defineAML_USB_PHY_CFG_A_PLL_RST   (1 << 19)
+#defineAML_USB_PHY_CFG_A_PHYS_RST  (1 << 18)
+#defineAML_USB_PHY_CFG_A_RST   (1 << 17)
+#defineAML_USB_PHY_CFG_B_PLL_RST   (1 << 13)
+#defineAML_USB_PHY_CFG_B_PHYS_RST  (1 << 12)
+#defineAML_USB_PHY_CFG_B_RST   (1 << 11)
+#defineAML_USB_PHY_CFG_CLK_EN  (1 << 8)
+#defineAML_USB_PHY_CFG_CLK_SEL_MASK(7 << 5)
+#defineAML_USB_PHY_CFG_CLK_SEL_XTAL(0 << 5)
+#defineAML_USB_PHY_CFG_CLK_SEL_XTAL_DIV2   (1 << 5)
+#defineAML_USB_PHY_CFG_B_POR   (1 << 1)
+#defineAML_USB_PHY_CFG_A_POR   (1 << 0)
+
+#defineAML_USB_PHY_CFG_CLK_DETECTED \
+(AML_USB_PHY_CFG_A_CLK_DETECTED | AML_USB_PHY_CFG_B_CLK_DETECTED)
+
+#defineAML_USB_PHY_MISC_A_REG  12
+#defineAML_USB_PHY_MISC_B_REG  16
+#defineAML_USB_PHY_MISC_ID_OVERIDE_EN  (1 << 23)
+#defineAML_USB_PHY_MISC_ID_OVERIDE_DEVICE  (1 << 22)
+#defineAML_USB_PHY_MISC_ID_OVERIDE_HOST(0 << 22)
+
+#defineCSR_WRITE_4(sc, reg, val)   bus_write_4((sc)->res[0], reg, 
(val))
+#defineCSR_READ_4(sc, reg) bus_read_4((sc)->res[0], reg)
+#defineCSR_BARRIER(sc, reg)bus_barrier((sc)->res[0], reg, 
4, \
+(BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE))
+
+#definePIN_ON_FLAG(pol)((pol) == 0 ?   \
+GPIO_PIN_LOW : GPIO_PIN_HIGH)
+#definePIN_OFF_FLAG(pol) 

svn commit: r283183 - head/sys/arm/amlogic/aml8726

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Thu May 21 07:09:01 2015
New Revision: 283183
URL: https://svnweb.freebsd.org/changeset/base/283183

Log:
  Remove unnecessary break statements.
  
  Submitted by:John Wehle

Modified:
  head/sys/arm/amlogic/aml8726/aml8726_ccm.c
  head/sys/arm/amlogic/aml8726/aml8726_pinctrl.c
  head/sys/arm/amlogic/aml8726/aml8726_sdxc-m8.c

Modified: head/sys/arm/amlogic/aml8726/aml8726_ccm.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_ccm.c  Thu May 21 07:07:28 2015
(r283182)
+++ head/sys/arm/amlogic/aml8726/aml8726_ccm.c  Thu May 21 07:09:01 2015
(r283183)
@@ -185,7 +185,6 @@ aml8726_ccm_attach(device_t dev)
device_printf(dev, "unsupported SoC\n");
return (ENXIO);
/* NOTREACHED */
-   break;
}
 
if (bus_alloc_resources(dev, aml8726_ccm_spec, sc->res)) {

Modified: head/sys/arm/amlogic/aml8726/aml8726_pinctrl.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_pinctrl.c  Thu May 21 07:07:28 
2015(r283182)
+++ head/sys/arm/amlogic/aml8726/aml8726_pinctrl.c  Thu May 21 07:09:01 
2015(r283183)
@@ -146,7 +146,6 @@ aml8726_pinctrl_attach(device_t dev)
device_printf(dev, "unsupported SoC\n");
return (ENXIO);
/* NOTREACHED */
-   break;
}
 
if (bus_alloc_resources(dev, aml8726_pinctrl_spec, sc->res)) {

Modified: head/sys/arm/amlogic/aml8726/aml8726_sdxc-m8.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_sdxc-m8.c  Thu May 21 07:07:28 
2015(r283182)
+++ head/sys/arm/amlogic/aml8726/aml8726_sdxc-m8.c  Thu May 21 07:09:01 
2015(r283183)
@@ -758,7 +758,6 @@ aml8726_sdxc_attach(device_t dev)
device_printf(dev, "unsupported SoC\n");
return (ENXIO);
/* NOTREACHED */
-   break;
}
 
node = ofw_bus_get_node(dev);
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svn commit: r283181 - in head/sys: arm/amlogic/aml8726 boot/fdt/dts/arm

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Thu May 21 07:01:08 2015
New Revision: 283181
URL: https://svnweb.freebsd.org/changeset/base/283181

Log:
  The RTC initialization values are based on the SoC which can be
  determined at runtime so there's no need to set the values in
  each DTS.
  Tested on YYHD18 (aml8726-m3), VSATV102 (aml8726-m6), and
  ODROIDC1 (aml8726-m8b).
  
  Differential Revision:https://reviews.freebsd.org/D2588
  Submitted by: John Wehle

Modified:
  head/sys/arm/amlogic/aml8726/aml8726_rtc.c
  head/sys/boot/fdt/dts/arm/odroidc1.dts
  head/sys/boot/fdt/dts/arm/vsatv102-m6.dts

Modified: head/sys/arm/amlogic/aml8726/aml8726_rtc.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_rtc.c  Thu May 21 06:58:50 2015
(r283180)
+++ head/sys/arm/amlogic/aml8726/aml8726_rtc.c  Thu May 21 07:01:08 2015
(r283181)
@@ -51,6 +51,8 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#include 
+
 #include "clock_if.h"
 
 /*
@@ -372,44 +374,27 @@ static int
 aml8726_rtc_attach(device_t dev)
 {
struct aml8726_rtc_softc *sc = device_get_softc(dev);
-   boolean_t init_always_valid;
-   char *init_always;
-   pcell_t prop;
-   phandle_t node;
-   ssize_t len;
 
sc->dev = dev;
 
-   node = ofw_bus_get_node(dev);
-
-   len = OF_getprop_alloc(node, "init-always",
-   sizeof(char), (void **)&init_always);
-   sc->init.always = FALSE;
-   init_always_valid = FALSE;
-   if (len > 0) {
-   if (strncmp(init_always, "true", len) == 0) {
-   sc->init.always = TRUE;
-   init_always_valid = TRUE;
-   } else if (strncmp(init_always, "false", len) == 0)
-   init_always_valid = TRUE;
-   free(init_always, M_OFWPROP);
-   }
-   if (init_always_valid == FALSE) {
-   device_printf(dev, "missing init-always attribute in FDT\n");
-   return (ENXIO);
-   }
-
-   if (OF_getencprop(node, "xo-init", &prop, sizeof(prop)) <= 0) {
-   device_printf(dev, "missing xo-init attribute in FDT\n");
-   return (ENXIO);
-   }
-   sc->init.xo = prop;
-
-   if (OF_getencprop(node, "gpo-init", &prop, sizeof(prop)) <= 0) {
-   device_printf(dev, "missing gpo-init attribute in FDT\n");
+   switch (aml8726_soc_hw_rev) {
+   case AML_SOC_HW_REV_M3:
+   sc->init.always = true;
+   sc->init.xo = 0x3c0a;
+   sc->init.gpo = 0x10;
+   break;
+   case AML_SOC_HW_REV_M6:
+   case AML_SOC_HW_REV_M8:
+   case AML_SOC_HW_REV_M8B:
+   sc->init.always = false;
+   sc->init.xo = 0x180a;
+   sc->init.gpo = 0x50;
+   break;
+   default:
+   device_printf(dev, "unsupported SoC\n");
return (ENXIO);
+   /* NOTREACHED */
}
-   sc->init.gpo = prop;
 
if (bus_alloc_resources(dev, aml8726_rtc_spec, sc->res)) {
device_printf(dev, "can not allocate resources for device\n");

Modified: head/sys/boot/fdt/dts/arm/odroidc1.dts
==
--- head/sys/boot/fdt/dts/arm/odroidc1.dts  Thu May 21 06:58:50 2015
(r283180)
+++ head/sys/boot/fdt/dts/arm/odroidc1.dts  Thu May 21 07:01:08 2015
(r283181)
@@ -194,10 +194,6 @@
compatible = "amlogic,aml8726-rtc";
reg = <0xc8100740 20>;  /* aobus 0x1d0 */
interrupts = <0 72 1>;
-
-   init-always = "false";
-   xo-init = <0x180a>;
-   gpo-init = <0x50>;
};
 
clkmsr: clkmsr@c1108758 {

Modified: head/sys/boot/fdt/dts/arm/vsatv102-m6.dts
==
--- head/sys/boot/fdt/dts/arm/vsatv102-m6.dts   Thu May 21 06:58:50 2015
(r283180)
+++ head/sys/boot/fdt/dts/arm/vsatv102-m6.dts   Thu May 21 07:01:08 2015
(r283181)
@@ -153,10 +153,6 @@
compatible = "amlogic,aml8726-rtc";
reg = <0xda004340 20>;  /* secbus2 0xd0 */
interrupts = <0 72 1>;  /* AM_IRQ2(8) */
-
-   init-always = "false";
-   xo-init = <0x180a>;
-   gpo-init = <0x50>;
};
 
clkmsr: clkmsr@c1108758 {
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svn commit: r283137 - head/sys/arm/conf

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Wed May 20 05:49:52 2015
New Revision: 283137
URL: https://svnweb.freebsd.org/changeset/base/283137

Log:
  D2432 (Patch for Amlogic single core PIC) moved the SMP option out
  of AML8726 and into board specific config files since some boards
  (e.g. YYHD18) use the aml8726-m3 which only have a single core.
  
  r283057 applied most of D2432, however while it removed SMP from
  AML8726, it missed adding the SMP option to the board specific
  config files.
  
  Differential Revision:https://reviews.freebsd.org/D2589
  Submitted by: John Wehle

Modified:
  head/sys/arm/conf/ODROIDC1
  head/sys/arm/conf/VSATV102

Modified: head/sys/arm/conf/ODROIDC1
==
--- head/sys/arm/conf/ODROIDC1  Wed May 20 01:08:01 2015(r283136)
+++ head/sys/arm/conf/ODROIDC1  Wed May 20 05:49:52 2015(r283137)
@@ -22,6 +22,8 @@
 include"AML8726"
 ident  ODROIDC1
 
+optionsSMP # Enable multiple cores
+
 # Interrupt controller
 device gic
 

Modified: head/sys/arm/conf/VSATV102
==
--- head/sys/arm/conf/VSATV102  Wed May 20 01:08:01 2015(r283136)
+++ head/sys/arm/conf/VSATV102  Wed May 20 05:49:52 2015(r283137)
@@ -22,6 +22,8 @@
 include"AML8726"
 ident  VSATV102
 
+optionsSMP # Enable multiple cores
+
 # Interrupt controller
 device gic
 
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svn commit: r282934 - in head/sys/arm: arm include

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Fri May 15 00:39:51 2015
New Revision: 282934
URL: https://svnweb.freebsd.org/changeset/base/282934

Log:
  It appears to be armv7_sleep is a duplication of armv7_cpu_sleep.
  For consistency with the naming conventions used by the other
  implementations kill armv7_sleep and keep armv7_cpu_sleep.
  
  Differential Revision:https://reviews.freebsd.org/D2537
  Submitted by: John Wehle
  Reviewed by:  ian@, andrew@

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/cpufunc_asm_armv7.S
  head/sys/arm/include/cpufunc.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Thu May 14 22:50:07 2015(r282933)
+++ head/sys/arm/arm/cpufunc.c  Fri May 15 00:39:51 2015(r282934)
@@ -673,7 +673,7 @@ struct cpu_functions cortexa_cpufuncs = 
cpufunc_nullop, /* flush_brnchtgt_C */
(void *)cpufunc_nullop, /* flush_brnchtgt_E */

-   armv7_sleep,/* sleep*/
+   armv7_cpu_sleep,/* sleep*/

/* Soft functions */


Modified: head/sys/arm/arm/cpufunc_asm_armv7.S
==
--- head/sys/arm/arm/cpufunc_asm_armv7.SThu May 14 22:50:07 2015
(r282933)
+++ head/sys/arm/arm/cpufunc_asm_armv7.SFri May 15 00:39:51 2015
(r282934)
@@ -366,9 +366,3 @@ ENTRY(armv7_idcache_inv_all)
bx  lr  @ return
 END(armv7_idcache_inv_all)
 
-ENTRY_NP(armv7_sleep)
-   dsb
-   wfi
-   bx  lr
-END(armv7_sleep)
-

Modified: head/sys/arm/include/cpufunc.h
==
--- head/sys/arm/include/cpufunc.h  Thu May 14 22:50:07 2015
(r282933)
+++ head/sys/arm/include/cpufunc.h  Fri May 15 00:39:51 2015
(r282934)
@@ -376,7 +376,6 @@ voidarmv7_setup (void);
 void   armv7_context_switch(void);
 void   armv7_drain_writebuf(void);
 void   armv7_sev   (void);
-void   armv7_sleep (int unused);
 u_int  armv7_auxctrl   (u_int, u_int);
 
 void   armadaxp_idcache_wbinv_all  (void);
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svn commit: r282830 - head/sys/arm/arm

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Wed May 13 05:46:04 2015
New Revision: 282830
URL: https://svnweb.freebsd.org/changeset/base/282830

Log:
  Delete cpu_do_powersave which is set but never used/tested
  serving no useful purpose.
  
  Differential Revision:https://reviews.freebsd.org/D2516
  Submitted by: John Wehle
  Reviewed by:  ian@

Modified:
  head/sys/arm/arm/cpufunc.c

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Wed May 13 02:25:54 2015(r282829)
+++ head/sys/arm/arm/cpufunc.c  Wed May 13 05:46:04 2015(r282830)
@@ -99,8 +99,6 @@ u_int arm_cache_level;
 u_int  arm_cache_type[14];
 u_int  arm_cache_loc;
 
-/* 1 == use cpu_sleep(), 0 == don't */
-int cpu_do_powersave;
 int ctrl;
 
 #ifdef CPU_ARM9
@@ -838,11 +836,6 @@ set_cpufuncs()
cputype = cpufunc_id();
cputype &= CPU_ID_CPU_MASK;
 
-   /*
-* NOTE: cpu_do_powersave defaults to off.  If we encounter a
-* CPU type where we want to use it by default, then we set it.
-*/
-
 #ifdef CPU_ARM9
if (((cputype & CPU_ID_IMPLEMENTOR_MASK) == CPU_ID_ARM_LTD ||
 (cputype & CPU_ID_IMPLEMENTOR_MASK) == CPU_ID_TI) &&
@@ -922,8 +915,6 @@ set_cpufuncs()
get_cachetype_cp15();

pmap_pte_init_mmu_v6();
-   /* Use powersave on this CPU. */
-   cpu_do_powersave = 1;
goto out;
}
 #endif /* CPU_CORTEXA */
@@ -946,9 +937,6 @@ set_cpufuncs()
get_cachetype_cp15();
pmap_pte_init_generic();
 
-   /* Use powersave on this CPU. */
-   cpu_do_powersave = 1;
-
goto out;
}
 #endif /* CPU_FA526 */
@@ -985,9 +973,6 @@ set_cpufuncs()
get_cachetype_cp15();
pmap_pte_init_xscale();
 
-   /* Use powersave on this CPU. */
-   cpu_do_powersave = 1;
-
goto out;
}
 #endif /* CPU_XSCALE_PXA2X0 */
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svn commit: r282812 - head/sys/arm/amlogic/aml8726

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue May 12 08:53:54 2015
New Revision: 282812
URL: https://svnweb.freebsd.org/changeset/base/282812

Log:
  Disable WPI in case of aml8726-m3.
  The aml8726-m3 SoC is identified as a Cortex A9-r2 rev 4 CPU and
  it hangs sometimes during the boot when WFI is used by the kernel.
  
  Differential Revision:  https://reviews.freebsd.org/D2473
  Submitted by:   John Wehle
  Suggested by:   ian@

Modified:
  head/sys/arm/amlogic/aml8726/aml8726_machdep.c

Modified: head/sys/arm/amlogic/aml8726/aml8726_machdep.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_machdep.c  Tue May 12 08:52:50 
2015(r282811)
+++ head/sys/arm/amlogic/aml8726/aml8726_machdep.c  Tue May 12 08:53:54 
2015(r282812)
@@ -38,6 +38,7 @@ __FBSDID("$FreeBSD$");
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -114,6 +115,19 @@ platform_gpio_init(void)
aml8726_identify_soc();
 
/*
+* My aml8726-m3 development box which identifies the CPU as
+* a Cortex A9-r2 rev 4 randomly locks up during boot when WFI
+* is used.
+*/
+   switch (aml8726_soc_hw_rev) {
+   case AML_SOC_HW_REV_M3:
+   cpufuncs.cf_sleep = (void *)cpufunc_nullop;
+   break;
+   default:
+   break;
+   }
+
+   /*
 * This FDT fixup should arguably be called through fdt_fixup_table,
 * however currently there's no mechanism to specify a fixup which
 * should always be invoked.
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svn commit: r282620 - head/sys/arm/amlogic/aml8726

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Fri May  8 04:38:01 2015
New Revision: 282620
URL: https://svnweb.freebsd.org/changeset/base/282620

Log:
  This follows the gic and ti/aintc code by adding additional barriers to the
  Amlogic pic driver.
  
  Differential Revision:https://reviews.freebsd.org/D2472
  Submitted by: John Wehle

Modified:
  head/sys/arm/amlogic/aml8726/aml8726_pic.c

Modified: head/sys/arm/amlogic/aml8726/aml8726_pic.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_pic.c  Fri May  8 04:22:11 2015
(r282619)
+++ head/sys/arm/amlogic/aml8726/aml8726_pic.c  Fri May  8 04:38:01 2015
(r282620)
@@ -121,6 +121,8 @@ aml8726_pic_eoi(void *arg)
if (nb >= AML_PIC_NIRQS)
return;
 
+   arm_irq_memory_barrier(nb);
+
CSR_WRITE_4(aml8726_pic_sc, AML_PIC_STAT_CLR_REG(nb), AML_PIC_BIT(nb));
 
CSR_BARRIER(aml8726_pic_sc, AML_PIC_STAT_CLR_REG(nb));
@@ -265,8 +267,12 @@ arm_unmask_irq(uintptr_t nb)
if (nb >= AML_PIC_NIRQS)
return;
 
+   arm_irq_memory_barrier(nb);
+
mask = CSR_READ_4(aml8726_pic_sc, AML_PIC_MASK_REG(nb));
mask |= AML_PIC_BIT(nb);
CSR_WRITE_4(aml8726_pic_sc, AML_PIC_MASK_REG(nb), mask);
+
+   CSR_BARRIER(aml8726_pic_sc, AML_PIC_MASK_REG(nb));
 }
 #endif
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svn commit: r282619 - head/sys/boot/fdt/dts/arm

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Fri May  8 04:22:11 2015
New Revision: 282619
URL: https://svnweb.freebsd.org/changeset/base/282619

Log:
  The interrupt-parent is set globally so it's unnecessary to also set it at 
each node.
  
  Differential Revision:https://reviews.freebsd.org/D2471
  Submitted by: John Wehle

Modified:
  head/sys/boot/fdt/dts/arm/odroidc1.dts
  head/sys/boot/fdt/dts/arm/vsatv102-m6.dts

Modified: head/sys/boot/fdt/dts/arm/odroidc1.dts
==
--- head/sys/boot/fdt/dts/arm/odroidc1.dts  Fri May  8 02:21:29 2015
(r282618)
+++ head/sys/boot/fdt/dts/arm/odroidc1.dts  Fri May  8 04:22:11 2015
(r282619)
@@ -194,7 +194,6 @@
compatible = "amlogic,aml8726-rtc";
reg = <0xc8100740 20>;  /* aobus 0x1d0 */
interrupts = <0 72 1>;
-   interrupt-parent = <&gic>;
 
init-always = "false";
xo-init = <0x180a>;
@@ -246,7 +245,6 @@
compatible = "amlogic,aml8726-mmc";
reg = <0xc1108c20 32>;  /* cbus 0x2308 */
interrupts = <0 28 1>;
-   interrupt-parent = <&gic>;
 
clocks = <&clk81>;
 
@@ -274,7 +272,6 @@
clock-frequency = <127500>;
reg = <0xc1108e00 60>;  /* cbus 0x2380 */
interrupts = <0 78 1>;
-   interrupt-parent = <&gic>;
 
pinctrl-names = "default";
pinctrl-0 = <&pins_sdxc_c>;
@@ -311,7 +308,6 @@
compatible = "synopsys,designware-hs-otg2";
reg = <0xc904 0x4>; /* ahbbus 0x4*/
interrupts = <0 30 4>;
-   interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <0>;
 
@@ -323,7 +319,6 @@
compatible = "synopsys,designware-hs-otg2";
reg = <0xc90c 0x4>; /* ahbbus 0xc */
interrupts = <0 31 4>;
-   interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <0>;
 
@@ -335,7 +330,6 @@
compatible = "snps,dwmac";
reg = <0xc941 0x2000>;  /* ahbbus 0x41 */
interrupts = <0 8 1>;
-   interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <0>;
 
@@ -352,7 +346,6 @@
 <0 3 1>,
 <0 12 1>,
 <0 13 1>;
-   interrupt-parent = <&gic>;
 
address = <0x790>;  /* match memreserve */
width = <720>;

Modified: head/sys/boot/fdt/dts/arm/vsatv102-m6.dts
==
--- head/sys/boot/fdt/dts/arm/vsatv102-m6.dts   Fri May  8 02:21:29 2015
(r282618)
+++ head/sys/boot/fdt/dts/arm/vsatv102-m6.dts   Fri May  8 04:22:11 2015
(r282619)
@@ -153,7 +153,6 @@
compatible = "amlogic,aml8726-rtc";
reg = <0xda004340 20>;  /* secbus2 0xd0 */
interrupts = <0 72 1>;  /* AM_IRQ2(8) */
-   interrupt-parent = <&gic>;
 
init-always = "false";
xo-init = <0x180a>;
@@ -205,7 +204,6 @@
compatible = "amlogic,aml8726-mmc";
reg = <0xc1108c20 32>;  /* cbus 0x2308 */
interrupts = <0 28 1>;  /* AM_IRQ0(28) */
-   interrupt-parent = <&gic>;
 
clocks = <&clk81>;
 
@@ -243,7 +241,6 @@
compatible = "synopsys,designware-hs-otg2";
reg = <0xc904 0x4>; /* ahbbus 0x4*/
interrupts = <0 30 4>;  /* AM_IRQ0(30) */
-   interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <0>;
};
@@ -253,7 +250,6 @@
compatible = "synopsys,designware-hs-otg2";
reg = <0xc90c 0x4>; /* ahbbus 0xc */
interrupts = <0 31 4>;  /* AM_IRQ0(31) */
-   interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <0>;
 
@@ -265,7 +261,6 @@
compatible = "snps,dwmac";
reg = <0xc941 0x2000>;  /* ahbbus 0x41 */

svn commit: r282517 - head/sys/arm/amlogic/aml8726

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Wed May  6 01:07:59 2015
New Revision: 282517
URL: https://svnweb.freebsd.org/changeset/base/282517

Log:
  This patch adds support for the extended baud rate register
  available on the aml8726-m6 (and later) SoC which allows for
  lower speeds.
  
  Differential Revision:https://reviews.freebsd.org/D2433
  Submitted by: John Wehle

Modified:
  head/sys/arm/amlogic/aml8726/aml8726_uart.h
  head/sys/arm/amlogic/aml8726/uart_dev_aml8726.c

Modified: head/sys/arm/amlogic/aml8726/aml8726_uart.h
==
--- head/sys/arm/amlogic/aml8726/aml8726_uart.h Tue May  5 23:27:49 2015
(r282516)
+++ head/sys/arm/amlogic/aml8726/aml8726_uart.h Wed May  6 01:07:59 2015
(r282517)
@@ -94,4 +94,14 @@
 #defineAML_UART_MISC_RECV_IRQ_CNT_MASK 0xff
 #defineAML_UART_MISC_RECV_IRQ_CNT_SHIFT0
 
+/*
+ * The new baud rate register is available on the
+ * aml8726-m6 and later.
+ */
+#defineAML_UART_NEW_BAUD_REG   20
+#defineAML_UART_NEW_BAUD_USE_XTAL_CLK  (1 << 24)
+#defineAML_UART_NEW_BAUD_RATE_EN   (1 << 23)
+#defineAML_UART_NEW_BAUD_RATE_MASK (0x7f << 0)
+#defineAML_UART_NEW_BAUD_RATE_SHIFT0
+
 #endif /* _ARM_AMLOGIC_AML8726_UART_H */

Modified: head/sys/arm/amlogic/aml8726/uart_dev_aml8726.c
==
--- head/sys/arm/amlogic/aml8726/uart_dev_aml8726.c Tue May  5 23:27:49 
2015(r282516)
+++ head/sys/arm/amlogic/aml8726/uart_dev_aml8726.c Wed May  6 01:07:59 
2015(r282517)
@@ -31,8 +31,8 @@
  * uarts.  For example ... though UART A as a 128 byte FIFO, the
  * others only have a 64 byte FIFO.
  *
- * Also, it's assumed that register 5 (the new baud rate register
- * present on the aml8726-m6) has not been activated.
+ * Also, it's assumed that the USE_XTAL_CLK feature (available on
+ * the aml8726-m6 and later) has not been activated.
  */
 
 #include 
@@ -57,6 +57,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#include 
 #include 
 
 #include "uart_if.h"
@@ -89,7 +90,7 @@ aml8726_uart_divisor(int rclk, int baudr
 
/* integer version of (rclk / baudrate + .5) */
divisor = ((rclk << 1) + baudrate) / (baudrate << 1);
-   if (divisor == 0 || divisor >= 65536)
+   if (divisor == 0)
return (0);
actual_baud = rclk / divisor;
 
@@ -109,6 +110,7 @@ aml8726_uart_param(struct uart_bas *bas,
 {
uint32_t cr;
uint32_t mr;
+   uint32_t nbr;
int divisor;
 
cr = uart_getreg(bas, AML_UART_CONTROL_REG);
@@ -147,8 +149,29 @@ aml8726_uart_param(struct uart_bas *bas,
/* Set baudrate. */
if (baudrate > 0 && bas->rclk != 0) {
divisor = aml8726_uart_divisor(bas->rclk / 4, baudrate) - 1;
-   if (divisor > 0x)
-   return (EINVAL);
+
+   switch (aml8726_soc_hw_rev) {
+   case AML_SOC_HW_REV_M6:
+   case AML_SOC_HW_REV_M8:
+   case AML_SOC_HW_REV_M8B:
+   if (divisor > (AML_UART_NEW_BAUD_RATE_MASK >>
+   AML_UART_NEW_BAUD_RATE_SHIFT))
+   return (EINVAL);
+
+   nbr = uart_getreg(bas, AML_UART_NEW_BAUD_REG);
+   nbr &= ~(AML_UART_NEW_BAUD_USE_XTAL_CLK |
+   AML_UART_NEW_BAUD_RATE_MASK);
+   nbr |= AML_UART_NEW_BAUD_RATE_EN |
+   (divisor << AML_UART_NEW_BAUD_RATE_SHIFT);
+   uart_setreg(bas, AML_UART_NEW_BAUD_REG, nbr);
+
+   divisor = 0;
+   break;
+   default:
+   if (divisor > 0x)
+   return (EINVAL);
+   break;
+   }
 
cr &= ~AML_UART_CONTROL_BAUD_MASK;
cr |= (divisor & AML_UART_CONTROL_BAUD_MASK);
@@ -187,7 +210,7 @@ aml8726_uart_init(struct uart_bas *bas, 
uint32_t cr;
uint32_t mr;
 
-   aml8726_uart_param(bas, baudrate, databits, stopbits, parity);
+   (void)aml8726_uart_param(bas, baudrate, databits, stopbits, parity);
 
cr = uart_getreg(bas, AML_UART_CONTROL_REG);
/* Disable all interrupt sources. */
@@ -466,7 +489,7 @@ aml8726_uart_bus_ioctl(struct uart_softc
 {
struct uart_bas *bas;
int baudrate, divisor, error;
-   uint32_t cr, mr;
+   uint32_t cr, mr, nbr;
 
bas = &sc->sc_bas;
uart_lock(sc->sc_hwmtx);
@@ -483,6 +506,20 @@ aml8726_uart_bus_ioctl(struct uart_softc
divisor = ((mr >> AML_UART_MISC_BAUD_EXT_SHIFT) <<
AML_UART_CONTROL_BAUD_WIDTH) | cr;
 
+   switch (aml8726_soc_hw_rev) {
+   case AML_SOC_HW_REV_M6:

svn commit: r282129 - head/sys/arm/amlogic/aml8726

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue Apr 28 08:27:44 2015
New Revision: 282129
URL: https://svnweb.freebsd.org/changeset/base/282129

Log:
  Update Amlogic MMC driver:
  
1) Advertise the actual min / max speeds the hardware is capable
 of supporting given the reference clock used by the board.
  
2) Rather than attempting to extend the hardware's timeout register
 in software (the hardware doesn't have sufficient bits to directly
  support long timeouts), simply implement the same timeout approach
 used in the SDXC driver.
  
3) Set the timeout for a linked command (e.g. STOP TRANSMISSION) based
 on the previous multiblock read / write.
  
  The changes have been smoke tested on both the ODROID-C1 and the VSATV102-M6
  using the following cards:
  
  * PQI 2GB microSD
  * SanDisk 2GB microSD
  * PQI 8GB SDHC (not a microSD so only tested on the ATV-102)
  * PNY 8GB microSDHC
  * SanDisk Ultra 32GB microSDHC
  
  Submitted by:  John Wehle

Modified:
  head/sys/arm/amlogic/aml8726/aml8726_mmc.c
  head/sys/arm/amlogic/aml8726/aml8726_mmc.h

Modified: head/sys/arm/amlogic/aml8726/aml8726_mmc.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_mmc.c  Tue Apr 28 08:20:23 2015
(r282128)
+++ head/sys/arm/amlogic/aml8726/aml8726_mmc.c  Tue Apr 28 08:27:44 2015
(r282129)
@@ -70,6 +70,7 @@ struct aml8726_mmc_softc {
device_tdev;
struct resource *res[2];
struct mtx  mtx;
+   struct callout  ch;
uint32_tport;
unsigned intref_freq;
struct aml8726_mmc_gpio pwr_en;
@@ -81,7 +82,7 @@ struct aml8726_mmc_softc {
struct mmc_host host;
int bus_busy;
struct mmc_command  *cmd;
-   unsigned inttimeout_remaining;
+   uint32_tstop_timeout;
 };
 
 static struct resource_spec aml8726_mmc_spec[] = {
@@ -92,6 +93,7 @@ static struct resource_spec aml8726_mmc_
 
 #defineAML_MMC_LOCK(sc)mtx_lock(&(sc)->mtx)
 #defineAML_MMC_UNLOCK(sc)  mtx_unlock(&(sc)->mtx)
+#defineAML_MMC_LOCK_ASSERT(sc) mtx_assert(&(sc)->mtx, MA_OWNED)
 #defineAML_MMC_LOCK_INIT(sc)   \
 mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev),   \
 "mmc", MTX_DEF)
@@ -107,6 +109,10 @@ static struct resource_spec aml8726_mmc_
 #definePWR_OFF_FLAG(pol)   ((pol) == 0 ? GPIO_PIN_HIGH :   
\
 GPIO_PIN_LOW)
 
+#defineMSECS_TO_TICKS(ms)  (((ms)*hz)/1000 + 1)
+
+static void aml8726_mmc_timeout(void *arg);
+
 static unsigned int
 aml8726_mmc_clk(phandle_t node)
 {
@@ -126,6 +132,37 @@ aml8726_mmc_clk(phandle_t node)
return ((unsigned int)prop);
 }
 
+static uint32_t
+aml8726_mmc_freq(struct aml8726_mmc_softc *sc, uint32_t divisor)
+{
+
+   return (sc->ref_freq / ((divisor + 1) * 2));
+}
+
+static uint32_t
+aml8726_mmc_div(struct aml8726_mmc_softc *sc, uint32_t desired_freq)
+{
+   uint32_t divisor;
+
+   divisor = sc->ref_freq / (desired_freq * 2);
+
+   if (divisor == 0)
+   divisor = 1;
+
+   divisor -= 1;
+
+   if (aml8726_mmc_freq(sc, divisor) > desired_freq)
+   divisor += 1;
+
+   if (divisor > (AML_MMC_CONFIG_CMD_CLK_DIV_MASK >>
+   AML_MMC_CONFIG_CMD_CLK_DIV_SHIFT)) {
+   divisor = AML_MMC_CONFIG_CMD_CLK_DIV_MASK >>
+   AML_MMC_CONFIG_CMD_CLK_DIV_SHIFT;
+   }
+
+   return (divisor);
+}
+
 static void
 aml8726_mmc_mapmem(void *arg, bus_dma_segment_t *segs, int nseg, int error)
 {
@@ -162,25 +199,18 @@ aml8726_mmc_power_on(struct aml8726_mmc_
PWR_ON_FLAG(sc->pwr_en.pol)));
 }
 
-static int
-aml8726_mmc_restart_timer(struct aml8726_mmc_softc *sc)
+static void
+aml8726_mmc_soft_reset(struct aml8726_mmc_softc *sc, boolean_t enable_irq)
 {
-   uint32_t count;
-   uint32_t isr;
-
-   if (sc->cmd == NULL || sc->timeout_remaining == 0)
-   return (0);
-
-   count = (sc->timeout_remaining > 0x1fff) ? 0x1fff :
-   sc->timeout_remaining;
-   sc->timeout_remaining -= count;
+   uint32_t icr;
 
-   isr = (count << AML_MMC_IRQ_STATUS_TIMER_CNT_SHIFT) |
-   AML_MMC_IRQ_STATUS_TIMER_EN | AML_MMC_IRQ_STATUS_TIMEOUT_IRQ;
+   icr = AML_MMC_IRQ_CONFIG_SOFT_RESET;
 
-   CSR_WRITE_4(sc, AML_MMC_IRQ_STATUS_REG, isr);
+   if (enable_irq == true)
+   icr |= AML_MMC_IRQ_CONFIG_CMD_DONE_EN;
 
-   return (1);
+   CSR_WRITE_4(sc, AML_MMC_IRQ_CONFIG_REG, icr);
+   CSR_BARRIER(sc, AML_MMC_IRQ_CONFIG_REG);
 }
 
 static int
@@ -191,7 +221,6 @@ aml8726_mmc_start_command(struct aml8726
uint32_t block_size;
uint32_t bus_width;
uint32_t cmdr;
-   uint32_t cycles_per_msec;
uint32_t extr;

svn commit: r282045 - head/sys/arm/conf

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Mon Apr 27 00:39:57 2015
New Revision: 282045
URL: https://svnweb.freebsd.org/changeset/base/282045

Log:
  Enable root mounting from mmc/sd card.

Modified:
  head/sys/arm/conf/RK3188

Modified: head/sys/arm/conf/RK3188
==
--- head/sys/arm/conf/RK3188Sun Apr 26 22:30:55 2015(r282044)
+++ head/sys/arm/conf/RK3188Mon Apr 27 00:39:57 2015(r282045)
@@ -72,8 +72,8 @@ options   WITNESS # Enable checks to de
 optionsWITNESS_SKIPSPIN# Don't run witness on spinlocks for 
speed
 optionsDIAGNOSTIC
 
-# Boot device is 2nd slice on USB
-optionsROOTDEVNAME=\"ufs:/dev/da0s2\"
+# Root mount from MMC/SD card
+optionsROOTDEVNAME=\"ufs:/dev/mmcsd0\"
 
 # MMC/SD/SDIO Card slot support
 device mmc # mmc/sd bus
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svn commit: r281418 - head/sys/arm/amlogic/aml8726

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sat Apr 11 08:34:41 2015
New Revision: 281418
URL: https://svnweb.freebsd.org/changeset/base/281418

Log:
  This modifies several FreeBSD drivers to use the GNU approach to
  supply clk81 information.  It also changes the hardware strings
  in some of the drivers to match what's present in the GNU files.
  
  Submitted by:  John Wehle
  Reviewed by:   imp

Modified:
  head/sys/arm/amlogic/aml8726/aml8726_clkmsr.c
  head/sys/arm/amlogic/aml8726/aml8726_identsoc.c
  head/sys/arm/amlogic/aml8726/aml8726_machdep.c
  head/sys/arm/amlogic/aml8726/aml8726_mmc.c
  head/sys/arm/amlogic/aml8726/aml8726_soc.h
  head/sys/arm/amlogic/aml8726/uart_dev_aml8726.c

Modified: head/sys/arm/amlogic/aml8726/aml8726_clkmsr.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_clkmsr.c   Sat Apr 11 08:34:34 
2015(r281417)
+++ head/sys/arm/amlogic/aml8726/aml8726_clkmsr.c   Sat Apr 11 08:34:41 
2015(r281418)
@@ -56,6 +56,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#include 
 #include 
 
 
@@ -147,6 +148,30 @@ aml8726_clkmsr_clock_frequency(struct am
return value;
 }
 
+static void
+aml8726_clkmsr_fixup_clk81(struct aml8726_clkmsr_softc *sc, int freq)
+{
+   pcell_t prop;
+   ssize_t len;
+   phandle_t clk_node;
+   phandle_t node;
+
+   node = ofw_bus_get_node(sc->dev);
+
+   len = OF_getencprop(node, "clocks", &prop, sizeof(prop));
+   if ((len / sizeof(prop)) != 1 || prop == 0 ||
+   (clk_node = OF_node_from_xref(prop)) == 0)
+   return;
+
+   len = OF_getencprop(clk_node, "clock-frequency", &prop, sizeof(prop));
+   if ((len / sizeof(prop)) != 1 || prop != 0)
+   return;
+
+   freq = cpu_to_fdt32(freq);
+
+   OF_setprop(clk_node, "clock-frequency", (void *)&freq, sizeof(freq));
+}
+
 static int
 aml8726_clkmsr_probe(device_t dev)
 {
@@ -178,6 +203,8 @@ aml8726_clkmsr_attach(device_t dev)
freq = aml8726_clkmsr_clock_frequency(sc, AML_CLKMSR_CLK81);
device_printf(sc->dev, "bus clock %u MHz\n", freq);
 
+   aml8726_clkmsr_fixup_clk81(sc, freq * 100);
+
return (0);
 }
 
@@ -209,8 +236,8 @@ static driver_t aml8726_clkmsr_driver = 
 
 static devclass_t aml8726_clkmsr_devclass;
 
-DRIVER_MODULE(clkmsr, simplebus, aml8726_clkmsr_driver,
-aml8726_clkmsr_devclass, 0, 0);
+EARLY_DRIVER_MODULE(clkmsr, simplebus, aml8726_clkmsr_driver,
+aml8726_clkmsr_devclass, 0, 0,  BUS_PASS_CPU + BUS_PASS_ORDER_EARLY);
 
 int
 aml8726_clkmsr_bus_frequency()
@@ -222,6 +249,9 @@ aml8726_clkmsr_bus_frequency()
u_long start, size;
int freq;
 
+   KASSERT(aml8726_soc_hw_rev != AML_SOC_HW_REV_UNKNOWN,
+   ("aml8726_soc_hw_rev isn't initialized"));
+
/*
 * Try to access the clkmsr node directly i.e. through /aliases/.
 */

Modified: head/sys/arm/amlogic/aml8726/aml8726_identsoc.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_identsoc.c Sat Apr 11 08:34:34 
2015(r281417)
+++ head/sys/arm/amlogic/aml8726/aml8726_identsoc.c Sat Apr 11 08:34:41 
2015(r281418)
@@ -59,8 +59,8 @@ __FBSDID("$FreeBSD$");
 
 #include 
 
-uint32_t aml8726_soc_hw_rev = 0x;
-uint32_t aml8726_soc_metal_rev = 0x;
+uint32_t aml8726_soc_hw_rev = AML_SOC_HW_REV_UNKNOWN;
+uint32_t aml8726_soc_metal_rev = AML_SOC_METAL_REV_UNKNOWN;
 
 static const struct {
uint32_t hw_rev;
@@ -86,11 +86,10 @@ static const struct {
{ 0xff, NULL }
 };
 
-static void
-aml8726_identify_soc(void *dummy)
+void
+aml8726_identify_soc()
 {
int err;
-   int i;
struct resource res;
 
memset(&res, 0, sizeof(res));
@@ -108,6 +107,12 @@ aml8726_identify_soc(void *dummy)
aml8726_soc_metal_rev = bus_read_4(&res, AML_SOC_METAL_REV_REG);
 
bus_space_unmap(res.r_bustag, res.r_bushandle, 0x10);
+}
+
+static void
+aml8726_identify_announce_soc(void *dummy)
+{
+   int i;
 
for (i = 0; aml8726_soc_desc[i].desc; i++)
if (aml8726_soc_desc[i].hw_rev == aml8726_soc_hw_rev)
@@ -133,5 +138,5 @@ aml8726_identify_soc(void *dummy)
printf("\n");
 }
 
-SYSINIT(aml8726_identify_soc, SI_SUB_CPU, SI_ORDER_SECOND,
-aml8726_identify_soc, NULL);
+SYSINIT(aml8726_identify_announce_soc, SI_SUB_CPU, SI_ORDER_SECOND,
+aml8726_identify_announce_soc, NULL);

Modified: head/sys/arm/amlogic/aml8726/aml8726_machdep.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_machdep.c  Sat Apr 11 08:34:34 
2015(r281417)
+++ head/sys/arm/amlogic/aml8726/aml8726_machdep.c  Sat Apr 11 08:34:41 
2015(r281418)
@@ -44,6 +44,7 @@ __FBSDID("$FreeBSD$");
 
 #include 
 
+#include 
 #include 
 
 #if defined(SOCDEV_PA) && defined(SOCDEV_VA)
@@ -55,12 +56,12 @@ vm_offset_t am

svn commit: r281416 - head/sys/arm/amlogic/aml8726

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sat Apr 11 08:30:37 2015
New Revision: 281416
URL: https://svnweb.freebsd.org/changeset/base/281416

Log:
  This modifies several FreeBSD drivers to use the hardware strings
  present in the GNU dts files.
  
  Submitted by:  John Wehle
  Reviewed by:   imp

Modified:
  head/sys/arm/amlogic/aml8726/aml8726_i2c.c
  head/sys/arm/amlogic/aml8726/aml8726_timer.c
  head/sys/arm/amlogic/aml8726/aml8726_wdt.c

Modified: head/sys/arm/amlogic/aml8726/aml8726_i2c.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_i2c.c  Sat Apr 11 08:27:38 2015
(r281415)
+++ head/sys/arm/amlogic/aml8726/aml8726_i2c.c  Sat Apr 11 08:30:37 2015
(r281416)
@@ -93,7 +93,7 @@ aml8726_iic_probe(device_t dev)
if (!ofw_bus_status_okay(dev))
return (ENXIO);
 
-   if (!ofw_bus_is_compatible(dev, "amlogic,aml8726-i2c"))
+   if (!ofw_bus_is_compatible(dev, "amlogic,meson6-i2c"))
return (ENXIO);
 
device_set_desc(dev, "Amlogic aml8726 I2C");

Modified: head/sys/arm/amlogic/aml8726/aml8726_timer.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_timer.cSat Apr 11 08:27:38 
2015(r281415)
+++ head/sys/arm/amlogic/aml8726/aml8726_timer.cSat Apr 11 08:30:37 
2015(r281416)
@@ -226,7 +226,7 @@ aml8726_timer_probe(device_t dev)
if (!ofw_bus_status_okay(dev))
return (ENXIO);
 
-   if (!ofw_bus_is_compatible(dev, "amlogic,aml8726-timer"))
+   if (!ofw_bus_is_compatible(dev, "amlogic,meson6-timer"))
return (ENXIO);
 
device_set_desc(dev, "Amlogic aml8726 timer");

Modified: head/sys/arm/amlogic/aml8726/aml8726_wdt.c
==
--- head/sys/arm/amlogic/aml8726/aml8726_wdt.c  Sat Apr 11 08:27:38 2015
(r281415)
+++ head/sys/arm/amlogic/aml8726/aml8726_wdt.c  Sat Apr 11 08:30:37 2015
(r281416)
@@ -167,7 +167,7 @@ aml8726_wdt_probe(device_t dev)
if (!ofw_bus_status_okay(dev))
return (ENXIO);
 
-   if (!ofw_bus_is_compatible(dev, "amlogic,aml8726-wdt"))
+   if (!ofw_bus_is_compatible(dev, "amlogic,meson6-wdt"))
return (ENXIO);
 
device_set_desc(dev, "Amlogic aml8726 WDT");
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svn commit: r281415 - head/sys/boot/fdt/dts/arm

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sat Apr 11 08:27:38 2015
New Revision: 281415
URL: https://svnweb.freebsd.org/changeset/base/281415

Log:
  This modifies the FreeBSD Amlogic DTS files to use the GNU files
  as the base.
  
  Submitted by: John Wehle
  Reviewed by:  imp

Modified:
  head/sys/boot/fdt/dts/arm/odroidc1.dts
  head/sys/boot/fdt/dts/arm/vsatv102-m6.dts

Modified: head/sys/boot/fdt/dts/arm/odroidc1.dts
==
--- head/sys/boot/fdt/dts/arm/odroidc1.dts  Sat Apr 11 08:27:34 2015
(r281414)
+++ head/sys/boot/fdt/dts/arm/odroidc1.dts  Sat Apr 11 08:27:38 2015
(r281415)
@@ -39,6 +39,8 @@
 
 /memreserve/ 0x790 0x0060; /* 6MB frame buffer */
 
+#include "meson8b.dtsi"
+
 / {
model = "hardkernel,odroid-c1";
compatible = "hardkernel,odroid-c1", "amlogic,s805";
@@ -46,41 +48,10 @@
#address-cells = <1>;
#size-cells = <1>;
 
-   interrupt-parent = <&gic>;
-
aliases {
soc = &soc;
screen = &screen;
-   uart0 = &uart0;
-   };
-
-   cpus {
-   #address-cells = <1>;
-   #size-cells = <0>;
-
-   cpu@0 {
-   device_type = "cpu";
-   compatible = "arm,cortex-a5";
-   reg = <0x0>;
-   };
-
-   cpu@1 {
-   device_type = "cpu";
-   compatible = "arm,cortex-a5";
-   reg = <0x1>;
-   };
-
-   cpu@2 {
-   device_type = "cpu";
-   compatible = "arm,cortex-a5";
-   reg = <0x2>;
-   };
-
-   cpu@3 {
-   device_type = "cpu";
-   compatible = "arm,cortex-a5";
-   reg = <0x3>;
-   };
+   uart0 = &uart_AO;
};
 
memory {
@@ -88,60 +59,37 @@
reg = <0x0 0x4000>; /* 1GB RAM */
};
 
-   soc: soc@c000 {
+   soc: soc {
device_type = "soc";
-   compatible = "simple-bus";
bus-frequency = <0>;
 
-   #address-cells = <1>;
-   #size-cells = <1>;
-
-   ranges = <0x0 0xc000 0x1a10>;
-
-   gic: gic@4301000 {
-   device_type = "interrupt-controller";
-   compatible = "arm,gic";
-   reg = <0x4301000 0x1000>, // distributer registers
- <0x4300100 0x0100>; // CPU if registers
-
-   interrupt-controller;
-   #interrupt-cells = <1>;
-   };
-
-   scu: scu@430 {
+   scu: scu@c430 {
compatible = "arm,cortex-a5-scu";
-   reg = <0x430 0x1000>;
+   reg = <0xc430 0x1000>;
};
 
-   cpuconfig: cpuconfig@1901ff80 {
+   cpuconfig: cpuconfig@d901ff80 {
compatible = "amlogic,aml8726-cpuconfig";
-   reg = <0x1901ff80 16>;
+   reg = <0xd901ff80 16>;
};
 
-   pl310@420 {
-   compatible = "arm,pl310";
-   reg = <0x420 0x1000>;
-   interrupts = <61>;
-   interrupt-parent = <&gic>;
-   };
-
-   ccm@1104140 {
+   ccm@c1104140 {
compatible = "amlogic,aml8726-ccm";
-   reg = <0x1104140 20>;   /* cbus 0x1050 */
+   reg = <0xc1104140 20>;  /* cbus 0x1050 */
 
functions = "ethernet", "i2c", "rng", "sdio", "sdxc",
"uart-a", "uart-b", "uart-c",
"usb-a", "usb-b";
};
 
-   pinctrl@11080b0 {
+   pinctrl@c11080b0 {
compatible = "amlogic,aml8726-pinctrl";
-   reg = <0x11080b0 40>,   /* mux */
- <0x11080e8 24>,   /* pu/pd */
- <0x1108120 24>,   /* pull enable */
- <0x8100014 4>,/* ao mux */
- <0x810002c 4>,/* ao pu/pd */
- <0x810002c 4>;/* ao pull enable */
+   reg = <0xc11080b0 40>,  /* mux */
+ <0xc11080e8 24>,  /* pu/pd */
+ <0xc1108120 24>,  /* pull enable */
+ <0xc8100014 4>,   /* ao mux */
+ <0xc810002c 4>,   /* ao pu/pd */
+ <0xc810002c 4>;   /* ao pull enable */
 
/*
 

svn commit: r281413 - head/sys/boot/fdt/dts/arm

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sat Apr 11 08:25:53 2015
New Revision: 281413
URL: https://svnweb.freebsd.org/changeset/base/281413

Log:
  The GNU files don't include a DTS for the aml8726-m8b (which has
  cortex-a5 cores unlike the aml8726-m8 which has cortex-a9 cores).
  
  Submitted by: John Wehle
  Reviewed by:  imp

Added:
  head/sys/boot/fdt/dts/arm/meson8b.dtsi   (contents, props changed)

Added: head/sys/boot/fdt/dts/arm/meson8b.dtsi
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm/meson8b.dtsi  Sat Apr 11 08:25:53 2015
(r281413)
@@ -0,0 +1,79 @@
+/*-
+ * Copyright (c) 2015 John Wehle 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/include/ "meson.dtsi"
+
+/ {
+   model = "Amlogic Meson8b SoC";
+   compatible = "amlogic,meson8b";
+
+   interrupt-parent = <&gic>;
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu@200 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a5";
+   next-level-cache = <&L2>;
+   reg = <0x200>;
+   };
+
+   cpu@201 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a5";
+   next-level-cache = <&L2>;
+   reg = <0x201>;
+   };
+
+   cpu@202 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a5";
+   next-level-cache = <&L2>;
+   reg = <0x202>;
+   };
+
+   cpu@203 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a5";
+   next-level-cache = <&L2>;
+   reg = <0x203>;
+   };
+   };
+
+   clk81: clk@0 {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   clock-frequency = <0>;
+   };
+};
+
+&L2 {
+   interrupts = <0 143 1>;
+};
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svn commit: r281412 - head/sys/gnu/dts/arm

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sat Apr 11 08:17:39 2015
New Revision: 281412
URL: https://svnweb.freebsd.org/changeset/base/281412

Log:
  The GNU Amlogic DTS files have some errors (e.g. bad register
  address, bad IRQ, etc) which are fixed by this patch.
  
  John has sent these changes to the author of the files who said
  he'll propagate the changes further upstream.
  
  Submitted by: John Wehle
  Reviewed by:  imp

Modified:
  head/sys/gnu/dts/arm/meson.dtsi
  head/sys/gnu/dts/arm/meson6.dtsi
  head/sys/gnu/dts/arm/meson8.dtsi

Modified: head/sys/gnu/dts/arm/meson.dtsi
==
--- head/sys/gnu/dts/arm/meson.dtsi Sat Apr 11 07:37:21 2015
(r281411)
+++ head/sys/gnu/dts/arm/meson.dtsi Sat Apr 11 08:17:39 2015
(r281412)
@@ -67,7 +67,7 @@
 
timer@c1109940 {
compatible = "amlogic,meson6-timer";
-   reg = <0xc1109940 0x14>;
+   reg = <0xc1109940 0x18>;
interrupts = <0 10 1>;
};
 
@@ -80,36 +80,37 @@
wdt: watchdog@c1109900 {
compatible = "amlogic,meson6-wdt";
reg = <0xc1109900 0x8>;
+   interrupts = <0 0 1>;
};
 
uart_AO: serial@c81004c0 {
compatible = "amlogic,meson-uart";
-   reg = <0xc81004c0 0x14>;
+   reg = <0xc81004c0 0x18>;
interrupts = <0 90 1>;
clocks = <&clk81>;
status = "disabled";
};
 
-   uart_A: serial@c81084c0 {
+   uart_A: serial@c11084c0 {
compatible = "amlogic,meson-uart";
-   reg = <0xc81084c0 0x14>;
-   interrupts = <0 90 1>;
+   reg = <0xc11084c0 0x18>;
+   interrupts = <0 26 1>;
clocks = <&clk81>;
status = "disabled";
};
 
-   uart_B: serial@c81084dc {
+   uart_B: serial@c11084dc {
compatible = "amlogic,meson-uart";
-   reg = <0xc81084dc 0x14>;
-   interrupts = <0 90 1>;
+   reg = <0xc11084dc 0x18>;
+   interrupts = <0 75 1>;
clocks = <&clk81>;
status = "disabled";
};
 
-   uart_C: serial@c8108700 {
+   uart_C: serial@c1108700 {
compatible = "amlogic,meson-uart";
-   reg = <0xc8108700 0x14>;
-   interrupts = <0 90 1>;
+   reg = <0xc1108700 0x18>;
+   interrupts = <0 93 1>;
clocks = <&clk81>;
status = "disabled";
};

Modified: head/sys/gnu/dts/arm/meson6.dtsi
==
--- head/sys/gnu/dts/arm/meson6.dtsiSat Apr 11 07:37:21 2015
(r281411)
+++ head/sys/gnu/dts/arm/meson6.dtsiSat Apr 11 08:17:39 2015
(r281412)
@@ -78,3 +78,7 @@
clock-frequency = <2>;
};
 }; /* end of / */
+
+&L2 {
+   interrupts = <0 61 1>;
+};

Modified: head/sys/gnu/dts/arm/meson8.dtsi
==
--- head/sys/gnu/dts/arm/meson8.dtsiSat Apr 11 07:37:21 2015
(r281411)
+++ head/sys/gnu/dts/arm/meson8.dtsiSat Apr 11 08:17:39 2015
(r281412)
@@ -90,3 +90,7 @@
clock-frequency = <14166>;
};
 }; /* end of / */
+
+&L2 {
+   interrupts = <0 143 1>;
+};
___
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svn commit: r280907 - head/sys/arm/conf

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue Mar 31 11:59:57 2015
New Revision: 280907
URL: https://svnweb.freebsd.org/changeset/base/280907

Log:
  Add kernel config files for Hardkernel Odroid-C1 and Visson ATV-102 devices.
  
  Submitted by:   John Wehle
  Approved by:stas (mentor)

Added:
  head/sys/arm/conf/ODROIDC1   (contents, props changed)
  head/sys/arm/conf/VSATV102   (contents, props changed)

Added: head/sys/arm/conf/ODROIDC1
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/conf/ODROIDC1  Tue Mar 31 11:59:57 2015(r280907)
@@ -0,0 +1,133 @@
+# ODROIDC1 -- Custom configuration for the HardKernel ODROID-C1 SBC
+#
+# For more information on this file, please read the handbook section on
+# Kernel Configuration Files:
+#
+#
http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
+#
+# The handbook is also available locally in /usr/share/doc/handbook
+# if you've installed the doc distribution, otherwise always see the
+# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the
+# latest information.
+#
+# An exhaustive list of options and more detailed explanations of the
+# device lines is also present in the ../../conf/NOTES and NOTES files.
+# If you are in doubt as to the purpose or necessity of a line, check first
+# in NOTES.
+#
+# $FreeBSD$
+
+ident  ODROIDC1
+
+include"../amlogic/aml8726/std.odroidc1"
+
+optionsHZ=100
+optionsSCHED_ULE   # ULE scheduler
+optionsPREEMPTION  # Enable kernel thread 
preemption
+optionsINET# InterNETworking
+optionsINET6   # IPv6 communications protocols
+optionsFFS # Berkeley Fast Filesystem
+optionsSOFTUPDATES # Enable FFS soft updates 
support
+optionsUFS_ACL # Support for access control 
lists
+optionsUFS_DIRHASH # Improve performance on big 
directories
+optionsPROCFS  # Process filesystem (requires 
PSEUDOFS)
+optionsPSEUDOFS# Pseudo-filesystem framework
+optionsGEOM_PART_BSD   # BSD partition scheme
+optionsGEOM_PART_MBR   # MBR partition scheme
+optionsSCSI_DELAY=5000 # Delay (in ms) before probing 
SCSI
+optionsKTRACE  # ktrace(1) support
+optionsSYSVSHM # SYSV-style shared memory
+optionsSYSVMSG # SYSV-style message queues
+optionsSYSVSEM # SYSV-style semaphores
+options_KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time 
extensions
+optionsPRINTF_BUFR_SIZE=128# Prevent printf output being 
interspersed.
+optionsKBD_INSTALL_CDEV# install a CDEV entry in /dev
+optionsLINUX_BOOT_ABI
+optionsVFP # vfp/neon
+
+# Debugging
+makeoptionsDEBUG=-g# Build kernel with gdb(1) debug symbols
+optionsALT_BREAK_TO_DEBUGGER
+#options   VERBOSE_SYSINIT # Enable verbose sysinit messages
+optionsBOOTVERBOSE=1
+optionsKDB
+optionsDDB # Enable the kernel debugger
+optionsINVARIANTS  # Enable calls of extra sanity 
checking
+optionsINVARIANT_SUPPORT   # Extra sanity checks of 
internal structures, required by INVARIANTS
+optionsWITNESS # Enable checks to detect 
deadlocks and cycles
+optionsWITNESS_SKIPSPIN# Don't run witness on 
spinlocks for speed
+#options   DIAGNOSTIC
+
+# NFS support
+#options   NFSCL   # New Network Filesystem Client
+#options   NFSLOCKD# Network Lock Manager
+#options   NFS_ROOT# NFS usable as /, requires NFSCL
+
+# NFS root from boopt/dhcp
+#options   BOOTP
+#options   BOOTP_NFSROOT
+#options   BOOTP_COMPAT
+#options   BOOTP_NFSV3
+#options   BOOTP_WIRED_TO=axe0
+
+# MMC/SD/SDIO card slot support
+device mmc # mmc/sd bus
+device mmcsd   # mmc/sd flash cards
+
+# Boot device is 2nd slice on MMC/SD card
+optionsROOTDEVNAME=\"ufs:mmcsd0s2\"
+
+# GPIO
+device gpio
+device gpioled
+
+# I2C support
+device iicbus
+device iicbb
+device iic
+
+# vt is the default console driver, resembling an SCO console
+device vt
+#devicekbdmux
+
+# Serial (COM) ports
+device uart# Generic UART driver
+
+# Pseudo devic

svn commit: r280906 - head/sys/boot/fdt/dts/arm

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue Mar 31 11:55:56 2015
New Revision: 280906
URL: https://svnweb.freebsd.org/changeset/base/280906

Log:
  Add device tree files for Hardkernel Odroid-C1 and Visson ATV-102 devices.
  
  Submitted by: John Wehle
  Approved by:  stas (mentor)

Added:
  head/sys/boot/fdt/dts/arm/odroidc1.dts   (contents, props changed)
  head/sys/boot/fdt/dts/arm/vsatv102-m6.dts   (contents, props changed)

Added: head/sys/boot/fdt/dts/arm/odroidc1.dts
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm/odroidc1.dts  Tue Mar 31 11:55:56 2015
(r280906)
@@ -0,0 +1,497 @@
+/*-
+ * Copyright (c) 2015 John Wehle 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * The ordering of certain devices is significant (e.g. usb depends on
+ * usb-phy which depends on gpio, also the timer should appear early on
+ * to provide a reasonably accurate DELAY implementation).
+ *
+ * Both usb-phys devices must be configured to prevent the usb controller
+ * from hanging during initialization.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x790 0x0060; /* 6MB frame buffer */
+
+/ {
+   model = "hardkernel,odroid-c1";
+   compatible = "hardkernel,odroid-c1", "amlogic,s805";
+
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   interrupt-parent = <&gic>;
+
+   aliases {
+   soc = &soc;
+   screen = &screen;
+   uart0 = &uart0;
+   };
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a5";
+   reg = <0x0>;
+   };
+
+   cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a5";
+   reg = <0x1>;
+   };
+
+   cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a5";
+   reg = <0x2>;
+   };
+
+   cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a5";
+   reg = <0x3>;
+   };
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x4000>; /* 1GB RAM */
+   };
+
+   soc: soc@c000 {
+   device_type = "soc";
+   compatible = "simple-bus";
+   bus-frequency = <0>;
+
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   ranges = <0x0 0xc000 0x1a10>;
+
+   gic: gic@4301000 {
+   device_type = "interrupt-controller";
+   compatible = "arm,gic";
+   reg = <0x4301000 0x1000>, // distributer registers
+ <0x4300100 0x0100>; // CPU if registers
+
+   interrupt-controller;
+   #interrupt-cells = <1>;
+   };
+
+   scu: scu@430 {
+   compatible = "arm,cortex-a5-scu";
+   reg = <0x430 0x1000>;
+   };
+
+   cpuconfig: cpuconfig@1901ff80 {
+   compatible = "amlogic,aml8726-cpuconfig";
+   reg = <0x1901ff80 16>;
+   };
+
+   pl310@420 {
+   compatible = "arm,pl310";
+   reg = <0x420 0x1000>;
+ 

svn commit: r280905 - in head/sys: arm/amlogic arm/amlogic/aml8726 arm/arm conf dev/mmc

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue Mar 31 11:50:46 2015
New Revision: 280905
URL: https://svnweb.freebsd.org/changeset/base/280905

Log:
  Add necessary changes to support various Amlogic SoC devices
  specially aml8726-m6 and aml8726-m8b SoC based devices.
  aml8726-m6 SoC exist in devices such as Visson ATV-102.
  Hardkernel ODROID-C1 board has aml8726-m8b SoC.
  
  The following support is included:
Basic machdep code
SMP
Interrupt controller
Clock control driver (aka gate)
Pinctrl
Timer
Real time clock
UART
GPIO
I2C
SD controller
SDXC controller
USB
Watchdog
Random number generator
PLL / Clock frequency measurement
Frame buffer
  
  Submitted by:   John Wehle
  Approved by:stas (mentor)

Added:
  head/sys/arm/amlogic/
  head/sys/arm/amlogic/aml8726/
  head/sys/arm/amlogic/aml8726/aml8726_ccm.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_ccm.h   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_clkmsr.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_clkmsr.h   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_fb.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_fb.h   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_gpio.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_i2c.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_identsoc.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_l2cache.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_machdep.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_machdep.h   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_mmc.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_mmc.h   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_mp.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_pic.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_pinctrl.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_pinctrl.h   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_rng.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_rtc.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_sdxc-m8.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_sdxc-m8.h   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_soc.h   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_timer.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_uart.h   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_uart_console.c   (contents, props 
changed)
  head/sys/arm/amlogic/aml8726/aml8726_usb_phy-m6.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/aml8726_wdt.c   (contents, props changed)
  head/sys/arm/amlogic/aml8726/files.aml8726   (contents, props changed)
  head/sys/arm/amlogic/aml8726/files.smp   (contents, props changed)
  head/sys/arm/amlogic/aml8726/std.aml8726   (contents, props changed)
  head/sys/arm/amlogic/aml8726/std.odroidc1   (contents, props changed)
  head/sys/arm/amlogic/aml8726/std.vsatv102-m6   (contents, props changed)
  head/sys/arm/amlogic/aml8726/uart_dev_aml8726.c   (contents, props changed)
Modified:
  head/sys/arm/arm/gic.c
  head/sys/conf/options.arm
  head/sys/dev/mmc/mmc.c

Added: head/sys/arm/amlogic/aml8726/aml8726_ccm.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/amlogic/aml8726/aml8726_ccm.c  Tue Mar 31 11:50:46 2015
(r280905)
@@ -0,0 +1,231 @@
+/*-
+ * Copyright 2015 John Wehle 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGL

svn commit: r277413 - in head/sys: arm/conf arm/rockchip boot/fdt/dts/arm dev/mmc/host

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue Jan 20 09:07:28 2015
New Revision: 277413
URL: https://svnweb.freebsd.org/changeset/base/277413

Log:
  Enable Synopsys DesignWare Mobile Storage Host Controller
  driver on Rockchip boards. It currently supports PIO mode
  and dma mode needs external dma controller to be used.
  
  Submitted by:   jmcneill
  Approved by:stas (mentor)

Modified:
  head/sys/arm/conf/RK3188
  head/sys/arm/rockchip/files.rk30xx
  head/sys/boot/fdt/dts/arm/rk3188-radxa-lite.dts
  head/sys/boot/fdt/dts/arm/rk3188-radxa.dts
  head/sys/boot/fdt/dts/arm/rk3188.dtsi
  head/sys/dev/mmc/host/dwmmc.c
  head/sys/dev/mmc/host/dwmmc.h

Modified: head/sys/arm/conf/RK3188
==
--- head/sys/arm/conf/RK3188Tue Jan 20 05:44:21 2015(r277412)
+++ head/sys/arm/conf/RK3188Tue Jan 20 09:07:28 2015(r277413)
@@ -76,8 +76,9 @@ options   DIAGNOSTIC
 optionsROOTDEVNAME=\"ufs:/dev/da0s2\"
 
 # MMC/SD/SDIO Card slot support
-#devicemmc # mmc/sd bus
-#devicemmcsd   # mmc/sd flash cards
+device mmc # mmc/sd bus
+device mmcsd   # mmc/sd flash cards
+device dwmmc
 
 # Console and misc
 device uart

Modified: head/sys/arm/rockchip/files.rk30xx
==
--- head/sys/arm/rockchip/files.rk30xx  Tue Jan 20 05:44:21 2015
(r277412)
+++ head/sys/arm/rockchip/files.rk30xx  Tue Jan 20 09:07:28 2015
(r277413)
@@ -19,3 +19,5 @@ arm/rockchip/rk30xx_grf.c standard
 arm/rockchip/rk30xx_wdog.c standard
 arm/rockchip/rk30xx_gpio.c optionalgpio
 arm/rockchip/rk30xx_mp.c   optionalsmp
+
+dev/mmc/host/dwmmc.c   optionaldwmmc

Modified: head/sys/boot/fdt/dts/arm/rk3188-radxa-lite.dts
==
--- head/sys/boot/fdt/dts/arm/rk3188-radxa-lite.dts Tue Jan 20 05:44:21 
2015(r277412)
+++ head/sys/boot/fdt/dts/arm/rk3188-radxa-lite.dts Tue Jan 20 09:07:28 
2015(r277413)
@@ -48,6 +48,10 @@
status = "okay";
};
 
+   mmc@10214000 {
+   status = "okay";
+   };
+
};
 
chosen {

Modified: head/sys/boot/fdt/dts/arm/rk3188-radxa.dts
==
--- head/sys/boot/fdt/dts/arm/rk3188-radxa.dts  Tue Jan 20 05:44:21 2015
(r277412)
+++ head/sys/boot/fdt/dts/arm/rk3188-radxa.dts  Tue Jan 20 09:07:28 2015
(r277413)
@@ -48,6 +48,10 @@
status = "okay";
};
 
+   mmc@10214000 {
+   status = "okay";
+   };
+
};
 
chosen {

Modified: head/sys/boot/fdt/dts/arm/rk3188.dtsi
==
--- head/sys/boot/fdt/dts/arm/rk3188.dtsi   Tue Jan 20 05:44:21 2015
(r277412)
+++ head/sys/boot/fdt/dts/arm/rk3188.dtsi   Tue Jan 20 09:07:28 2015
(r277413)
@@ -231,22 +231,26 @@
};
 
mmc@10214000 {
-   compatible = "rockchip,rk30xx-mmc";
+   compatible = "rockchip,rk2928-dw-mshc";
reg = <0x10214000 0x1000>;
interrupts = <55>;
#address-cells = <1>;
#size-cells = <0>;
-   clock-frequency = <2400>;   /* TODO: verify freq */
+   bus-frequency = <4800>; /* TODO: verify freq */
+   fifo-depth = <0x40>;
+   num-slots = <1>;
status = "disabled";
};
 
mmc@10218000 {
-   compatible = "rockchip,rk30xx-mmc";
+   compatible = "rockchip,rk2928-dw-mshc";
reg = <0x10218000 0x1000>;
interrupts = <56>;
#address-cells = <1>;
#size-cells = <0>;
-   clock-frequency = <2400>;   /* TODO: verify freq */
+   bus-frequency = <4800>; /* TODO: verify freq */
+   fifo-depth = <0x40>;
+   num-slots = <1>;
status = "disabled";
};
};

Modified: head/sys/dev/mmc/host/dwmmc.c
==
--- head/sys/dev/mmc/host/dwmmc.c   Tue Jan 20 05:44:21 2015
(r277412)
+++ head/sys/dev/mmc/host/dwmmc.c   Tue Jan 20 09:07:28 2015
(r277413)
@@ -129,6 +129,8 @@ struct dwmmc_softc {
uint32_t   

svn commit: r277156 - in head/sys/arm: arm include

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Wed Jan 14 01:23:50 2015
New Revision: 277156
URL: https://svnweb.freebsd.org/changeset/base/277156

Log:
  Correct cpu type, it was rather Cortex A12 R0.
  
  Approved by:stas (mentor)

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/identcpu.c
  head/sys/arm/include/armreg.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Tue Jan 13 22:51:44 2015(r277155)
+++ head/sys/arm/arm/cpufunc.c  Wed Jan 14 01:23:50 2015(r277156)
@@ -1067,11 +1067,11 @@ set_cpufuncs()
cputype == CPU_ID_CORTEXA9R1 ||
cputype == CPU_ID_CORTEXA9R2 ||
cputype == CPU_ID_CORTEXA9R3 ||
+   cputype == CPU_ID_CORTEXA12R0 ||
cputype == CPU_ID_CORTEXA15R0 ||
cputype == CPU_ID_CORTEXA15R1 ||
cputype == CPU_ID_CORTEXA15R2 ||
cputype == CPU_ID_CORTEXA15R3 ||
-   cputype == CPU_ID_CORTEXA17 ||
cputype == CPU_ID_KRAIT ) {
cpufuncs = cortexa_cpufuncs;
cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */

Modified: head/sys/arm/arm/identcpu.c
==
--- head/sys/arm/arm/identcpu.c Tue Jan 13 22:51:44 2015(r277155)
+++ head/sys/arm/arm/identcpu.c Wed Jan 14 01:23:50 2015(r277156)
@@ -185,6 +185,8 @@ const struct cpuidtab cpuids[] = {
  generic_steppings },
{ CPU_ID_CORTEXA9R3,CPU_CLASS_CORTEXA,  "Cortex A9-r3",
  generic_steppings },
+   { CPU_ID_CORTEXA12R0,   CPU_CLASS_CORTEXA,  "Cortex A12-r0",
+ generic_steppings },
{ CPU_ID_CORTEXA15R0,   CPU_CLASS_CORTEXA,  "Cortex A15-r0",
  generic_steppings },
{ CPU_ID_CORTEXA15R1,   CPU_CLASS_CORTEXA,  "Cortex A15-r1",
@@ -193,8 +195,6 @@ const struct cpuidtab cpuids[] = {
  generic_steppings },
{ CPU_ID_CORTEXA15R3,   CPU_CLASS_CORTEXA,  "Cortex A15-r3",
  generic_steppings },
-   { CPU_ID_CORTEXA17, CPU_CLASS_CORTEXA,  "Cortex A17",
- generic_steppings },
{ CPU_ID_KRAIT, CPU_CLASS_KRAIT,"Krait",
  generic_steppings },
 

Modified: head/sys/arm/include/armreg.h
==
--- head/sys/arm/include/armreg.h   Tue Jan 13 22:51:44 2015
(r277155)
+++ head/sys/arm/include/armreg.h   Wed Jan 14 01:23:50 2015
(r277156)
@@ -133,11 +133,11 @@
 #define CPU_ID_CORTEXA9R1  0x411fc090
 #define CPU_ID_CORTEXA9R2  0x412fc090
 #define CPU_ID_CORTEXA9R3  0x413fc090
+#define CPU_ID_CORTEXA12R0 0x410fc0d0
 #define CPU_ID_CORTEXA15R0 0x410fc0f0
 #define CPU_ID_CORTEXA15R1 0x411fc0f0
 #define CPU_ID_CORTEXA15R2 0x412fc0f0
 #define CPU_ID_CORTEXA15R3 0x413fc0f0
-#define CPU_ID_CORTEXA17   0x410fc0d0
 #defineCPU_ID_KRAIT0x510f06f0 /* Snapdragon S4 Pro/APQ8064 
*/
 #defineCPU_ID_TI925T   0x54029250
 #define CPU_ID_MV88FR131   0x56251310 /* Marvell Feroceon 88FR131 Core */
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svn commit: r277116 - in head/sys/arm: arm include

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue Jan 13 07:49:07 2015
New Revision: 277116
URL: https://svnweb.freebsd.org/changeset/base/277116

Log:
  Add CPU ID for ARM Cortex A17.
  
  Approved by:stas (mentor)

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/identcpu.c
  head/sys/arm/include/armreg.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Tue Jan 13 07:46:21 2015(r277115)
+++ head/sys/arm/arm/cpufunc.c  Tue Jan 13 07:49:07 2015(r277116)
@@ -1071,6 +1071,7 @@ set_cpufuncs()
cputype == CPU_ID_CORTEXA15R1 ||
cputype == CPU_ID_CORTEXA15R2 ||
cputype == CPU_ID_CORTEXA15R3 ||
+   cputype == CPU_ID_CORTEXA17 ||
cputype == CPU_ID_KRAIT ) {
cpufuncs = cortexa_cpufuncs;
cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */

Modified: head/sys/arm/arm/identcpu.c
==
--- head/sys/arm/arm/identcpu.c Tue Jan 13 07:46:21 2015(r277115)
+++ head/sys/arm/arm/identcpu.c Tue Jan 13 07:49:07 2015(r277116)
@@ -193,6 +193,8 @@ const struct cpuidtab cpuids[] = {
  generic_steppings },
{ CPU_ID_CORTEXA15R3,   CPU_CLASS_CORTEXA,  "Cortex A15-r3",
  generic_steppings },
+   { CPU_ID_CORTEXA17, CPU_CLASS_CORTEXA,  "Cortex A17",
+ generic_steppings },
{ CPU_ID_KRAIT, CPU_CLASS_KRAIT,"Krait",
  generic_steppings },
 

Modified: head/sys/arm/include/armreg.h
==
--- head/sys/arm/include/armreg.h   Tue Jan 13 07:46:21 2015
(r277115)
+++ head/sys/arm/include/armreg.h   Tue Jan 13 07:49:07 2015
(r277116)
@@ -137,6 +137,7 @@
 #define CPU_ID_CORTEXA15R1 0x411fc0f0
 #define CPU_ID_CORTEXA15R2 0x412fc0f0
 #define CPU_ID_CORTEXA15R3 0x413fc0f0
+#define CPU_ID_CORTEXA17   0x410fc0d0
 #defineCPU_ID_KRAIT0x510f06f0 /* Snapdragon S4 Pro/APQ8064 
*/
 #defineCPU_ID_TI925T   0x54029250
 #define CPU_ID_MV88FR131   0x56251310 /* Marvell Feroceon 88FR131 Core */
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svn commit: r277113 - stable/10/sys/arm/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue Jan 13 07:45:16 2015
New Revision: 277113
URL: https://svnweb.freebsd.org/changeset/base/277113

Log:
  MFC:
  Allow timer0 to run at full 24MHz not at 24MHz/16 by setting prescale to 1.
  
  Approved by:stas (mentor)

Modified:
  stable/10/sys/arm/allwinner/timer.c

Modified: stable/10/sys/arm/allwinner/timer.c
==
--- stable/10/sys/arm/allwinner/timer.c Tue Jan 13 07:40:59 2015
(r277112)
+++ stable/10/sys/arm/allwinner/timer.c Tue Jan 13 07:45:16 2015
(r277113)
@@ -72,7 +72,7 @@ __FBSDID("$FreeBSD$");
 #define TIMER_ENABLE   (1<<0)
 #define TIMER_AUTORELOAD   (1<<1)
 #define TIMER_OSC24M   (1<<2) /* oscillator = 24mhz */
-#define TIMER_PRESCALAR(4<<4) /* prescalar = 16 */
+#define TIMER_PRESCALAR(0<<4) /* prescalar = 1 */
 
 #define SYS_TIMER_CLKSRC   2400 /* clock source */
 
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svn commit: r272602 - head/sys/dev/uart

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Mon Oct  6 09:00:53 2014
New Revision: 272602
URL: https://svnweb.freebsd.org/changeset/base/272602

Log:
  Use documented compat string for msm uart.
  Whilst here use tab instead of spaces.
  
  Approved by:stas (mentor)

Modified:
  head/sys/dev/uart/uart_bus_fdt.c

Modified: head/sys/dev/uart/uart_bus_fdt.c
==
--- head/sys/dev/uart/uart_bus_fdt.cMon Oct  6 07:29:17 2014
(r272601)
+++ head/sys/dev/uart/uart_bus_fdt.cMon Oct  6 09:00:53 2014
(r272602)
@@ -84,7 +84,7 @@ static struct ofw_compat_data compat_dat
{"fsl,imx21-uart",  (uintptr_t)&uart_imx_class},
{"fsl,mvf600-uart", (uintptr_t)&uart_vybrid_class},
{"lpc,uart",(uintptr_t)&uart_lpc_class},
-{"qcom,uart-dm",(uintptr_t)&uart_msm_class},
+   {"qcom,msm-uartdm", (uintptr_t)&uart_msm_class},
{"ti,ns16550",  (uintptr_t)&uart_ti8250_class},
{"ns16550", (uintptr_t)&uart_ns8250_class},
{NULL,  (uintptr_t)NULL},
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svn commit: r272399 - head/sys/dev/uart

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Thu Oct  2 08:12:42 2014
New Revision: 272399
URL: https://svnweb.freebsd.org/changeset/base/272399

Log:
  Add uart driver for Qualcomm MSM 7000/8000 series chips.
  It is working on IFC6410 board which has Qualcomm Snapdragon SoC.
  
  Approved by:stas (mentor)

Added:
  head/sys/dev/uart/uart_dev_msm.c   (contents, props changed)
  head/sys/dev/uart/uart_dev_msm.h   (contents, props changed)
Modified:
  head/sys/dev/uart/uart.h
  head/sys/dev/uart/uart_bus_fdt.c

Modified: head/sys/dev/uart/uart.h
==
--- head/sys/dev/uart/uart.hThu Oct  2 06:29:49 2014(r272398)
+++ head/sys/dev/uart/uart.hThu Oct  2 08:12:42 2014(r272399)
@@ -65,6 +65,7 @@ struct uart_bas {
 struct uart_class;
 
 extern struct uart_class uart_imx_class __attribute__((weak));
+extern struct uart_class uart_msm_class __attribute__((weak));
 extern struct uart_class uart_ns8250_class __attribute__((weak));
 extern struct uart_class uart_quicc_class __attribute__((weak));
 extern struct uart_class uart_s3c2410_class __attribute__((weak));

Modified: head/sys/dev/uart/uart_bus_fdt.c
==
--- head/sys/dev/uart/uart_bus_fdt.cThu Oct  2 06:29:49 2014
(r272398)
+++ head/sys/dev/uart/uart_bus_fdt.cThu Oct  2 08:12:42 2014
(r272399)
@@ -84,6 +84,7 @@ static struct ofw_compat_data compat_dat
{"fsl,imx21-uart",  (uintptr_t)&uart_imx_class},
{"fsl,mvf600-uart", (uintptr_t)&uart_vybrid_class},
{"lpc,uart",(uintptr_t)&uart_lpc_class},
+{"qcom,uart-dm",(uintptr_t)&uart_msm_class},
{"ti,ns16550",  (uintptr_t)&uart_ti8250_class},
{"ns16550", (uintptr_t)&uart_ns8250_class},
{NULL,  (uintptr_t)NULL},

Added: head/sys/dev/uart/uart_dev_msm.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/uart/uart_dev_msm.cThu Oct  2 08:12:42 2014
(r272399)
@@ -0,0 +1,568 @@
+/*-
+ * Copyright (c) 2014 Ganbold Tsagaankhuu 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* Qualcomm MSM7K/8K uart driver */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include "opt_ddb.h"
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "uart_if.h"
+
+#defineDEF_CLK 7372800
+
+#defineGETREG(bas, reg)\
+bus_space_read_4((bas)->bst, (bas)->bsh, (reg))
+#defineSETREG(bas, reg, value) \
+bus_space_write_4((bas)->bst, (bas)->bsh, (reg), (value))
+
+static int msm_uart_param(struct uart_bas *, int, int, int, int);
+
+/*
+ * Low-level UART interface.
+ */
+static int msm_probe(struct uart_bas *bas);
+static voidmsm_init(struct uart_bas *bas, int, int, int, int);
+static voidmsm_term(struct uart_bas *bas);
+static voidmsm_putc(struct uart_bas *bas, int);
+static int msm_rxready(struct uart_bas *bas);
+static int msm_getc(struct uart_bas *bas, struct mtx *mtx);
+
+extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
+
+static int
+msm_uart_param(struct uart_bas *bas, int baudrate, int databits,
+int stopbits, int parity)
+{
+   int ulcon;
+
+   ulcon = 0;
+
+   switch (databits) {
+   case 5:
+   ulcon |= (UART_DM_5_BPS << 4);
+   break;
+   

svn commit: r272397 - head/sys/arm/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Thu Oct  2 06:00:55 2014
New Revision: 272397
URL: https://svnweb.freebsd.org/changeset/base/272397

Log:
  Allow timer0 to run at full 24MHz not at 24MHz/16 by setting prescale to 1.
  
  Approved by:stas (mentor)

Modified:
  head/sys/arm/allwinner/timer.c

Modified: head/sys/arm/allwinner/timer.c
==
--- head/sys/arm/allwinner/timer.c  Thu Oct  2 05:56:17 2014
(r272396)
+++ head/sys/arm/allwinner/timer.c  Thu Oct  2 06:00:55 2014
(r272397)
@@ -72,7 +72,7 @@ __FBSDID("$FreeBSD$");
 #define TIMER_ENABLE   (1<<0)
 #define TIMER_AUTORELOAD   (1<<1)
 #define TIMER_OSC24M   (1<<2) /* oscillator = 24mhz */
-#define TIMER_PRESCALAR(4<<4) /* prescalar = 16 */
+#define TIMER_PRESCALAR(0<<4) /* prescalar = 1 */
 
 #define SYS_TIMER_CLKSRC   2400 /* clock source */
 
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svn commit: r271901 - head/sys/arm/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sat Sep 20 09:18:58 2014
New Revision: 271901
URL: http://svnweb.freebsd.org/changeset/base/271901

Log:
  Fix typo in comment.
  Disable AHB clock gate for ehci0.
  
  Approved by:  stas (mentor)

Modified:
  head/sys/arm/allwinner/a10_clk.c

Modified: head/sys/arm/allwinner/a10_clk.c
==
--- head/sys/arm/allwinner/a10_clk.cSat Sep 20 08:34:56 2014
(r271900)
+++ head/sys/arm/allwinner/a10_clk.cSat Sep 20 09:18:58 2014
(r271901)
@@ -132,7 +132,7 @@ a10_clk_usb_activate(void)
/* Gating AHB clock for USB */
reg_value = ccm_read_4(sc, CCM_AHB_GATING0);
reg_value |= CCM_AHB_GATING_USB0; /* AHB clock gate usb0 */
-   reg_value |= CCM_AHB_GATING_EHCI0; /* AHB clock gate ehci1 */
+   reg_value |= CCM_AHB_GATING_EHCI0; /* AHB clock gate ehci0 */
reg_value |= CCM_AHB_GATING_EHCI1; /* AHB clock gate ehci1 */
ccm_write_4(sc, CCM_AHB_GATING0, reg_value);
 
@@ -167,6 +167,7 @@ a10_clk_usb_deactivate(void)
/* Disable gating AHB clock for USB */
reg_value = ccm_read_4(sc, CCM_AHB_GATING0);
reg_value &= ~CCM_AHB_GATING_USB0; /* disable AHB clock gate usb0 */
+   reg_value &= ~CCM_AHB_GATING_EHCI0; /* disable AHB clock gate ehci0 */
reg_value &= ~CCM_AHB_GATING_EHCI1; /* disable AHB clock gate ehci1 */
ccm_write_4(sc, CCM_AHB_GATING0, reg_value);
 
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svn commit: r266940 - head/sys/arm/conf

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sun Jun  1 05:02:48 2014
New Revision: 266940
URL: http://svnweb.freebsd.org/changeset/base/266940

Log:
  Silence tinderbox build.
  
  Approved by:stas (mentor)

Modified:
  head/sys/arm/conf/RK3188

Modified: head/sys/arm/conf/RK3188
==
--- head/sys/arm/conf/RK3188Sun Jun  1 04:11:05 2014(r266939)
+++ head/sys/arm/conf/RK3188Sun Jun  1 05:02:48 2014(r266940)
@@ -124,3 +124,5 @@ device  firmware# Used by the 
above
 # USB ethernet support, requires miibus
 device miibus
 device udav
+
+optionsFDT # Configure using FDT/DTB data.
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svn commit: r266919 - head/sys/arm/conf

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Sat May 31 06:17:34 2014
New Revision: 266919
URL: http://svnweb.freebsd.org/changeset/base/266919

Log:
  Add #NO_UNIVERSE to RADXA and RADXA-LITE kernel configs
  since there aren't any new devices in those files so unhook them
  from universe build.
  
  Approved by:stas (mentor)

Modified:
  head/sys/arm/conf/RADXA
  head/sys/arm/conf/RADXA-LITE

Modified: head/sys/arm/conf/RADXA
==
--- head/sys/arm/conf/RADXA Sat May 31 05:59:55 2014(r266918)
+++ head/sys/arm/conf/RADXA Sat May 31 06:17:34 2014(r266919)
@@ -18,6 +18,8 @@
 #
 # $FreeBSD$
 
+#NO_UNIVERSE
+
 include"RK3188"
 ident  RADXA
 

Modified: head/sys/arm/conf/RADXA-LITE
==
--- head/sys/arm/conf/RADXA-LITESat May 31 05:59:55 2014
(r266918)
+++ head/sys/arm/conf/RADXA-LITESat May 31 06:17:34 2014
(r266919)
@@ -18,6 +18,8 @@
 #
 # $FreeBSD$
 
+#NO_UNIVERSE
+
 include"RK3188"
 ident  RADXA-LITE
 
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svn commit: r266871 - in head/sys: arm/conf boot/fdt/dts/arm

[Ganbold Tsagaankhuu]

 Client
+
+# MMC/SD/SDIO card slot support
+#devicemmc # mmc/sd bus
+#devicemmcsd   # mmc/sd flash cards
+
+# Boot device is 2nd slice on USB
+optionsROOTDEVNAME=\"ufs:/dev/da0s2\"
+
+# Console and misc
+device uart
+device uart_ns8250
+device pty
+device snp
+device md
+device random  # Entropy device
+
+# I2C support
+#deviceiicbus
+#deviceiic
+
+# GPIO
+device gpio
+
+device scbus   # SCSI bus (required for SCSI)
+device da  # Direct Access (disks)
+device pass
+
+# USB support
+optionsUSB_HOST_ALIGN=32   # Align usb buffers to cache line size.
+device usb
+optionsUSB_DEBUG
+#options   USB_REQ_DEBUG
+#options   USB_VERBOSE
+device dwcotg  # DWC OTG controller
+
+device umass
+
+# Ethernet
+device loop
+device ether
+device mii
+device bpf
+
+# Wireless NIC cards
+optionsIEEE80211_DEBUG
+optionsIEEE80211_AMPDU_AGE
+optionsIEEE80211_SUPPORT_MESH
+optionsIEEE80211_SUPPORT_TDMA
+device wlan# 802.11 support
+device wlan_wep# 802.11 WEP support
+device wlan_ccmp   # 802.11 CCMP support
+device wlan_tkip   # 802.11 TKIP support
+device urtwn
+device urtwnfw
+device firmware# Used by the above
+
+# USB ethernet support, requires miibus
+device miibus
+device udav

Added: head/sys/boot/fdt/dts/arm/rk3188-radxa-lite.dts
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm/rk3188-radxa-lite.dts Fri May 30 06:37:06 
2014    (r266871)
@@ -0,0 +1,59 @@
+/*-
+ * Copyright (c) 2014 Ganbold Tsagaankhuu 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/dts-v1/;
+
+/include/ "rk3188.dtsi"
+
+/ {
+   model = "Radxa RadxaRock Lite";
+
+   memory {
+   device_type = "memory";
+   reg = < 0x6000 0x4000 >;/* 1GB RAM */
+   };
+
+   aliases {
+   soc = &SOC;
+   };
+
+   SOC: rk3188 {
+
+   uart2: serial@20064000 {
+   status = "okay";
+   };
+
+   };
+
+   chosen {
+   bootargs = "-v";
+   stdin = &uart2;
+   stdout = &uart2;
+   };
+};
+
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Re: svn commit: r265358 - head/sys/dev/usb/controller

[Ganbold Tsagaankhuu]

Hans

On Mon, May 5, 2014 at 7:50 PM, Hans Petter Selasky wrote:

> Author: hselasky
> Date: Mon May  5 11:50:52 2014
> New Revision: 265358
> URL: http://svnweb.freebsd.org/changeset/base/265358
>
> Log:
>   Improve DWC OTG USB host side support for isochronous FULL and HIGH
>   speed data traffic going directly to a USB device or through a
>   so-called USB transaction translator.
>
>   Add checks that we are not overusing the TX FIFO.
>
>   MFC after:2 weeks
>
> Modified:
>   head/sys/dev/usb/controller/dwc_otg.c
>   head/sys/dev/usb/controller/dwc_otg.h
>   head/sys/dev/usb/controller/dwc_otgreg.h
>
> Modified: head/sys/dev/usb/controller/dwc_otg.c
>
> ==
> --- head/sys/dev/usb/controller/dwc_otg.c   Mon May  5 11:30:45 2014
>  (r265357)
> +++ head/sys/dev/usb/controller/dwc_otg.c   Mon May  5 11:50:52 2014
>  (r265358)
> @@ -207,6 +207,12 @@ dwc_otg_init_fifo(struct dwc_otg_softc *
> /* reset active endpoints */
> sc->sc_active_rx_ep = 0;
>
> +   /* reset TX size */
> +   sc->sc_tx_cur_size = 0;
> +
> +   /* reset TT info */
> +   memset(sc->sc_tt_info, 0, sizeof(sc->sc_tt_info));
> +
> fifo_size /= 2;
>
> DWC_OTG_WRITE_4(sc, DOTG_GNPTXFSIZ,
> @@ -215,19 +221,17 @@ dwc_otg_init_fifo(struct dwc_otg_softc *
>
> tx_start += fifo_size;
>
> +   for (x = 0; x != sc->sc_host_ch_max; x++) {
> +   /* enable all needed interrupts */
> +   DWC_OTG_WRITE_4(sc, DOTG_HCINTMSK(x),
> HCINT_DEFAULT_MASK);
> +   }
> +
> DWC_OTG_WRITE_4(sc, DOTG_HPTXFSIZ,
> ((fifo_size / 4) << 16) |
> (tx_start / 4));
>
> -   for (x = 0; x != sc->sc_host_ch_max; x++) {
> -   /* enable interrupts */
> -   DWC_OTG_WRITE_4(sc, DOTG_HCINTMSK(x),
> -   HCINT_STALL | HCINT_BBLERR |
> -   HCINT_XACTERR |
> -   HCINT_NAK | HCINT_ACK | HCINT_NYET |
> -   HCINT_CHHLTD | HCINT_FRMOVRUN |
> -   HCINT_DATATGLERR);
> -   }
> +   /* store maximum TX FIFO size */
> +   sc->sc_tx_max_size = fifo_size;
>
> /* enable host channel interrupts */
> DWC_OTG_WRITE_4(sc, DOTG_HAINTMSK,
> @@ -309,6 +313,12 @@ dwc_otg_init_fifo(struct dwc_otg_softc *
> } else {
> /* reset active endpoints */
> sc->sc_active_rx_ep = 0;
> +
> +   /* reset TX size */
> +   sc->sc_tx_cur_size = 0;
> +
> +   /* reset TT info */
> +   memset(sc->sc_tt_info, 0, sizeof(sc->sc_tt_info));
> }
> return (0);
>  }
> @@ -376,9 +386,9 @@ dwc_otg_pull_down(struct dwc_otg_softc *
>  static void
>  dwc_otg_enable_sof_irq(struct dwc_otg_softc *sc)
>  {
> -   if (sc->sc_irq_mask & GINTSTS_SOF)
> +   if (sc->sc_irq_mask & GINTMSK_SOFMSK)
> return;
> -   sc->sc_irq_mask |= GINTSTS_SOF;
> +   sc->sc_irq_mask |= GINTMSK_SOFMSK;
> DWC_OTG_WRITE_4(sc, DOTG_GINTMSK, sc->sc_irq_mask);
>  }
>
> @@ -506,6 +516,7 @@ dwc_otg_clear_hcint(struct dwc_otg_softc
>  {
> uint32_t hcint;
>
> +   /* clear all pending interrupts */
> hcint = DWC_OTG_READ_4(sc, DOTG_HCINT(x));
> DWC_OTG_WRITE_4(sc, DOTG_HCINT(x), hcint);
>
> @@ -513,6 +524,10 @@ dwc_otg_clear_hcint(struct dwc_otg_softc
> sc->sc_chan_state[x].hcint = 0;
>  }
>
> +/*
> + * This function waits until a DWC OTG host channel is ready to be
> + * used again:
> + */
>  static uint8_t
>  dwc_otg_host_channel_wait(struct dwc_otg_td *td)
>  {
> @@ -545,6 +560,9 @@ dwc_otg_host_channel_wait(struct dwc_otg
> sc->sc_chan_state[td->channel].allocated = 0;
> sc->sc_chan_state[x].allocated = 1;
>
> +   sc->sc_chan_state[x].tx_size =
> +   sc->sc_chan_state[td->channel].tx_size;
> +
> if (sc->sc_chan_state[td->channel].suspended) {
> sc->sc_chan_state[td->channel].suspended = 0;
> sc->sc_chan_state[x].suspended = 1;
> @@ -579,6 +597,7 @@ static uint8_t
>  dwc_otg_host_channel_alloc(struct dwc_otg_td *td)
>  {
> struct dwc_otg_softc *sc;
> +   uint32_t tx_size;
> uint8_t x;
> uint8_t max_channel;
>
> @@ -591,9 +610,25 @@ dwc_otg_host_channel_alloc(struct dwc_ot
> if ((td->hcchar & HCCHAR_EPNUM_MASK) == 0) {
> max_channel = 1;
> x = 0;
> +   tx_size = td->max_packet_size;
> +   if ((sc->sc_tx_cur_size + tx_size) > sc->sc_tx_max_size) {
> +   DPRINTF("Too little FIFO space\n");
> +  

svn commit: r265739 - in head/sys/arm: conf rockchip

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Fri May  9 05:39:57 2014
New Revision: 265739
URL: http://svnweb.freebsd.org/changeset/base/265739

Log:
  Add the codes for enabling CPU cores of Rockchip RK3188 SoC.
  Enable SMP for Radxa Rock board.
  
  Approved by:  stas (mentor)

Added:
  head/sys/arm/rockchip/rk30xx_mp.c   (contents, props changed)
Modified:
  head/sys/arm/conf/RADXA
  head/sys/arm/rockchip/files.rk30xx
  head/sys/arm/rockchip/rk30xx_machdep.c

Modified: head/sys/arm/conf/RADXA
==
--- head/sys/arm/conf/RADXA Fri May  9 04:49:48 2014(r265738)
+++ head/sys/arm/conf/RADXA Fri May  9 05:39:57 2014(r265739)
@@ -121,3 +121,4 @@ options FDT
 optionsFDT_DTB_STATIC
 makeoptionsFDT_DTS_FILE=rk3188-radxa.dts
 
+optionsSMP # Enable multiple cores

Modified: head/sys/arm/rockchip/files.rk30xx
==
--- head/sys/arm/rockchip/files.rk30xx  Fri May  9 04:49:48 2014
(r265738)
+++ head/sys/arm/rockchip/files.rk30xx  Fri May  9 05:39:57 2014
(r265739)
@@ -19,3 +19,4 @@ arm/rockchip/rk30xx_grf.c standard
 arm/rockchip/rk30xx_wdog.c standard
 arm/rockchip/rk30xx_gpio.c optionalgpio
 dev/usb/controller/dwc_otg_fdt.c   optionaldwcotg
+arm/rockchip/rk30xx_mp.c   optionalsmp

Modified: head/sys/arm/rockchip/rk30xx_machdep.c
==
--- head/sys/arm/rockchip/rk30xx_machdep.c  Fri May  9 04:49:48 2014
(r265738)
+++ head/sys/arm/rockchip/rk30xx_machdep.c  Fri May  9 05:39:57 2014
(r265739)
@@ -85,6 +85,7 @@ int
 initarm_devmap_init(void)
 {
 
+   arm_devmap_add_entry(0x1000, 0x0020);
arm_devmap_add_entry(0x2000, 0x0010);

return (0);

Added: head/sys/arm/rockchip/rk30xx_mp.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/rockchip/rk30xx_mp.c   Fri May  9 05:39:57 2014
(r265739)
@@ -0,0 +1,192 @@
+/*-
+ * Copyright (c) 2014 Ganbold Tsagaankhuu 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#defineSCU_PHYSBASE0x1013c000
+#defineSCU_SIZE0x100
+
+#defineSCU_CONTROL_REG 0x00
+#defineSCU_CONTROL_ENABLE  (1 << 0)
+#defineSCU_STANDBY_EN  (1 << 5)
+#defineSCU_CONFIG_REG  0x04
+#defineSCU_CONFIG_REG_NCPU_MASK0x03
+#defineSCU_CPUPOWER_REG0x08
+#defineSCU_INV_TAGS_REG0x0c
+
+#defineSCU_FILTER_START_REG0x10
+#defineSCU_FILTER_END_REG  0x14
+#defineSCU_SECURE_ACCESS_REG   0x18
+#defineSCU_NONSECURE_ACCESS_REG0x1c
+
+#defineIMEM_PHYSBASE   0x1008
+#defineIMEM_SIZE   0x20
+
+#definePMU_PHYSBASE0x20004000
+#definePMU_SIZE0x100
+#definePMU_PWRDN_CON   0x08
+#definePMU_PWRDN_SCU   (1 << 4)
+
+extern char*mpentry_addr;
+static void rk30xx_boot2(void);
+
+static void
+rk30xx_boot2(void)
+{
+
+   __asm __volatile(
+ 

svn commit: r265624 - head/sys/boot/fdt/dts/arm

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Thu May  8 00:26:21 2014
New Revision: 265624
URL: http://svnweb.freebsd.org/changeset/base/265624

Log:
  Silence no interrupt-parent found message during boot.
  
  Approved by:  stas (mentor)

Modified:
  head/sys/boot/fdt/dts/arm/rk3188.dtsi

Modified: head/sys/boot/fdt/dts/arm/rk3188.dtsi
==
--- head/sys/boot/fdt/dts/arm/rk3188.dtsi   Thu May  8 00:08:19 2014
(r265623)
+++ head/sys/boot/fdt/dts/arm/rk3188.dtsi   Thu May  8 00:26:21 2014
(r265624)
@@ -31,6 +31,8 @@
#address-cells = <1>;
#size-cells = <1>;
 
+   interrupt-parent = <&GIC>;
+
aliases {
soc = &SOC;
};
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svn commit: r265207 - head/sys/arm/rockchip

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Fri May  2 01:20:13 2014
New Revision: 265207
URL: http://svnweb.freebsd.org/changeset/base/265207

Log:
  Switch to use arm_devmap_add_entry() to setup static device mapping.
  
  Approved by:  stas (mentor)

Modified:
  head/sys/arm/rockchip/rk30xx_machdep.c

Modified: head/sys/arm/rockchip/rk30xx_machdep.c
==
--- head/sys/arm/rockchip/rk30xx_machdep.c  Fri May  2 00:52:13 2014
(r265206)
+++ head/sys/arm/rockchip/rk30xx_machdep.c  Fri May  2 01:20:13 2014
(r265207)
@@ -51,14 +51,11 @@ __FBSDID("$FreeBSD$");
 
 #include 
 
-/* Start of address space used for bootstrap map */
-#define DEVMAP_BOOTSTRAP_MAP_START 0xF000
-
 vm_offset_t
 initarm_lastaddr(void)
 {
 
-   return (DEVMAP_BOOTSTRAP_MAP_START);
+   return (arm_devmap_lastaddr());
 }
 
 void
@@ -81,27 +78,14 @@ initarm_late_init(void)
CPU_CONTROL_DC_ENABLE|CPU_CONTROL_IC_ENABLE);
 }
 
-#define FDT_DEVMAP_MAX (1 + 2 + 1 + 1)
-static struct arm_devmap_entry fdt_devmap[FDT_DEVMAP_MAX] = {
-   { 0, 0, 0, 0, 0, }
-};
-
 /*
- * Construct pmap_devmap[] with DT-derived config data.
+ * Set up static device mappings.
  */
 int
 initarm_devmap_init(void)
 {
-   int i = 0;
-
-   fdt_devmap[i].pd_va = 0xF000;
-   fdt_devmap[i].pd_pa = 0x2000;
-   fdt_devmap[i].pd_size = 0x10;
-   fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
-   fdt_devmap[i].pd_cache = PTE_DEVICE;
-   i++;
 
-   arm_devmap_register_table(&fdt_devmap[0]);
+   arm_devmap_add_entry(0x2000, 0x0010);

return (0);
 }
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svn commit: r265038 - head/sys/boot/fdt/dts/arm

[Ganbold Tsagaankhuu]

>;
};
 
emac@01c0b000 {
-   compatible = "allwinner,sun4i-emac";
-   reg = <0x01c0b000 0x1000>;
-   interrupts = <55>;
-   interrupt-parent = <&AINTC>;
+   status = "okay";
};
};
 

Modified: head/sys/boot/fdt/dts/arm/cubieboard2.dts
==
--- head/sys/boot/fdt/dts/arm/cubieboard2.dts   Mon Apr 28 04:20:14 2014
(r265037)
+++ head/sys/boot/fdt/dts/arm/cubieboard2.dts   Mon Apr 28 05:39:20 2014
(r265038)
@@ -28,13 +28,10 @@
 
 /dts-v1/;
 
+/include/ "sun7i-a20.dtsi"
+
 / {
model = "Cubietech Cubieboard2";
-   compatible = "cubietech,a20-cubieboard", "allwinner,sun7i-a20";
-   #address-cells = <1>;
-   #size-cells = <1>;
-
-   interrupt-parent = <&GIC>;
 
memory {
device_type = "memory";
@@ -47,102 +44,21 @@
};
 
SOC: a20 {
-   #address-cells = <1>;
-   #size-cells = <1>;
-   compatible = "simple-bus";
-   ranges;
-   bus-frequency = <0>;
-
-   GIC: interrupt-controller@01c81000 {
-   compatible = "arm,gic";
-   reg =   <0x01c81000 0x1000>,/* Distributor 
Registers */
-   <0x01c82000 0x0100>;/* CPU Interface 
Registers */
-   interrupt-controller;
-   #interrupt-cells = <1>;
-   };
-
-   sramc@01c0 {
-   compatible = "allwinner,sun4i-sramc";
-   #address-cells = <1>;
-   #size-cells = <1>;
-   reg = < 0x01c0 0x1000 >;
-   };
-
-   cpu-cfg@01c25c00 {
-   compatible = "allwinner,sun7i-cpu-cfg";
-   #address-cells = <1>;
-   #size-cells = <1>;
-   reg = < 0x01c25c00 0x400 >;
-   };
-
-   ccm@01c2 {
-   compatible = "allwinner,sun4i-ccm";
-   #address-cells = <1>;
-   #size-cells = <1>;
-   reg = < 0x01c2 0x400 >;
-   };
-
-   timer@01c20c00 {
-   compatible = "allwinner,sun7i-timer";
-   reg = <0x01c20c00 0x90>;
-   interrupts = < 22 >;
-   interrupt-parent = <&GIC>;
-   clock-frequency = < 2400 >;
-   };
-
-   watchdog@01c20c90 {
-   compatible = "allwinner,sun4i-wdt";
-   reg = <0x01c20c90 0x10>;
-   };
-
-   GPIO: gpio@01c20800 {
-   #gpio-cells = <3>;
-   compatible = "allwinner,sun4i-gpio";
-   gpio-controller;
-   reg =<  0x01c20800 0x400 >;
-   interrupts = < 28 >;
-   interrupt-parent = <&GIC>;
-   };
 
usb1: usb@01c14000 {
-   compatible = "allwinner,usb-ehci", "usb-ehci";
-   reg = <0x01c14000 0x1000>;
-   interrupts = < 39 >;
-   interrupt-parent = <&GIC>;
+   status = "okay";
};
 
usb2: usb@01c1c000 {
-   compatible = "allwinner,usb-ehci", "usb-ehci";
-   reg = <0x01c1c000 0x1000>;
-   interrupts = < 40 >;
-   interrupt-parent = <&GIC>;
-   };
-
-   sata@01c18000 {
-   compatible = "allwinner,ahci";
-   reg = <0x01c18000 0x1000>;
-   interrupts = <56>;
-   interrupt-parent = <&GIC>;
+   status = "okay";
};
 
UART0: serial@01c28000 {
status = "okay";
-   compatible = "ns16550";
-   reg = <0x01c28000 0x400>;
-           reg-shift = <2>;
-   interrupts = <1>;
-   interrupt-parent = <&GIC>;
-   current-speed = <115200>;

svn commit: r263711 - in head/sys: arm/allwinner arm/allwinner/a20 arm/rockchip boot/fdt/dts/arm

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue Mar 25 08:31:47 2014
New Revision: 263711
URL: http://svnweb.freebsd.org/changeset/base/263711

Log:
  Switch to my freebsd.org emal address in copyright.
  
  Approved by:  stas (mentor)

Modified:
  head/sys/arm/allwinner/a10_clk.c
  head/sys/arm/allwinner/a10_clk.h
  head/sys/arm/allwinner/a10_common.c
  head/sys/arm/allwinner/a10_ehci.c
  head/sys/arm/allwinner/a10_gpio.c
  head/sys/arm/allwinner/a10_gpio.h
  head/sys/arm/allwinner/a10_machdep.c
  head/sys/arm/allwinner/a10_sramc.c
  head/sys/arm/allwinner/a10_sramc.h
  head/sys/arm/allwinner/a20/a20_cpu_cfg.c
  head/sys/arm/allwinner/a20/a20_cpu_cfg.h
  head/sys/arm/allwinner/aintc.c
  head/sys/arm/allwinner/console.c
  head/sys/arm/allwinner/if_emac.c
  head/sys/arm/allwinner/if_emacreg.h
  head/sys/arm/allwinner/timer.c
  head/sys/arm/rockchip/rk30xx_common.c
  head/sys/arm/rockchip/rk30xx_gpio.c
  head/sys/arm/rockchip/rk30xx_grf.c
  head/sys/arm/rockchip/rk30xx_grf.h
  head/sys/arm/rockchip/rk30xx_machdep.c
  head/sys/arm/rockchip/rk30xx_pmu.c
  head/sys/arm/rockchip/rk30xx_pmu.h
  head/sys/arm/rockchip/rk30xx_wdog.c
  head/sys/arm/rockchip/rk30xx_wdog.h
  head/sys/boot/fdt/dts/arm/cubieboard.dts
  head/sys/boot/fdt/dts/arm/cubieboard2.dts
  head/sys/boot/fdt/dts/arm/rk3188-radxa.dts
  head/sys/boot/fdt/dts/arm/rk3188.dtsi

Modified: head/sys/arm/allwinner/a10_clk.c
==
--- head/sys/arm/allwinner/a10_clk.cTue Mar 25 06:55:53 2014
(r263710)
+++ head/sys/arm/allwinner/a10_clk.cTue Mar 25 08:31:47 2014
(r263711)
@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2013 Ganbold Tsagaankhuu 
+ * Copyright (c) 2013 Ganbold Tsagaankhuu 
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without

Modified: head/sys/arm/allwinner/a10_clk.h
==
--- head/sys/arm/allwinner/a10_clk.hTue Mar 25 06:55:53 2014
(r263710)
+++ head/sys/arm/allwinner/a10_clk.hTue Mar 25 08:31:47 2014
(r263711)
@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2013 Ganbold Tsagaankhuu 
+ * Copyright (c) 2013 Ganbold Tsagaankhuu 
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without

Modified: head/sys/arm/allwinner/a10_common.c
==
--- head/sys/arm/allwinner/a10_common.c Tue Mar 25 06:55:53 2014
(r263710)
+++ head/sys/arm/allwinner/a10_common.c Tue Mar 25 08:31:47 2014
(r263711)
@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2012 Ganbold Tsagaankhuu 
+ * Copyright (c) 2012 Ganbold Tsagaankhuu 
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without

Modified: head/sys/arm/allwinner/a10_ehci.c
==
--- head/sys/arm/allwinner/a10_ehci.c   Tue Mar 25 06:55:53 2014
(r263710)
+++ head/sys/arm/allwinner/a10_ehci.c   Tue Mar 25 08:31:47 2014
(r263711)
@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2012 Ganbold Tsagaankhuu 
+ * Copyright (c) 2012 Ganbold Tsagaankhuu 
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without

Modified: head/sys/arm/allwinner/a10_gpio.c
==
--- head/sys/arm/allwinner/a10_gpio.c   Tue Mar 25 06:55:53 2014
(r263710)
+++ head/sys/arm/allwinner/a10_gpio.c   Tue Mar 25 08:31:47 2014
(r263711)
@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2013 Ganbold Tsagaankhuu 
+ * Copyright (c) 2013 Ganbold Tsagaankhuu 
  * Copyright (c) 2012 Oleksandr Tymoshenko 
  * Copyright (c) 2012 Luiz Otavio O Souza.
  * All rights reserved.

Modified: head/sys/arm/allwinner/a10_gpio.h
==
--- head/sys/arm/allwinner/a10_gpio.h   Tue Mar 25 06:55:53 2014
(r263710)
+++ head/sys/arm/allwinner/a10_gpio.h   Tue Mar 25 08:31:47 2014
(r263711)
@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2013 Ganbold Tsagaankhuu 
+ * Copyright (c) 2013 Ganbold Tsagaankhuu 
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without

Modified: head/sys/arm/allwinner/a10_machdep.c
==
--- head/sys/arm/allwinner/a10_machdep.cTue Mar 25 06:55:53 2014
(r263710)
+++ head/sys/arm/allwinner/a10_machdep.cTue Mar 25 08:31:47 2014
(r263711)
@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2012 Ganbold Tsagaankhuu 
+ * Copyright (c) 2012 Ganbold Tsagaankhuu 
  * All rights reserved.
  *
  * This code is derived from software written for Brini by Mark Brinicombe

Modified: head/sys/arm/allwinner/a10_sramc.c
==
--- head/sys

svn commit: r263698 - in head/sys/arm: allwinner/a20 conf

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Tue Mar 25 01:34:39 2014
New Revision: 263698
URL: http://svnweb.freebsd.org/changeset/base/263698

Log:
  Add code for enabling second CPU core for A20 SoC.
  Enable SMP on Cubieboard2.
  
  Approved by:  stas (mentor)

Added:
  head/sys/arm/allwinner/a20/a20_mp.c   (contents, props changed)
Modified:
  head/sys/arm/allwinner/a20/files.a20
  head/sys/arm/conf/CUBIEBOARD2

Added: head/sys/arm/allwinner/a20/a20_mp.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/allwinner/a20/a20_mp.c Tue Mar 25 01:34:39 2014
(r263698)
@@ -0,0 +1,158 @@
+/*-
+ * Copyright (c) 2014 Ganbold Tsagaankhuu 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#defineCPUCFG_BASE 0x01c25c00
+#defineCPUCFG_SIZE 0x400
+
+#defineCPU0_RST_CTL0x40
+#defineCPU0_CTL0x44
+#defineCPU0_STATUS 0x48
+#defineCPU1_RST_CTL0x80
+#defineCPU1_CTL0x84
+#defineCPU1_STATUS 0x88
+#defineCPUCFG_GENCTL   0x184
+#defineCPUCFG_P_REG0   0x1a4
+#defineCPU1_PWR_CLAMP  0x1b0
+#defineCPU1_PWROFF_REG 0x1b4
+#defineCPUCFG_DBGCTL0  0x1e0
+#defineCPUCFG_DBGCTL1  0x1e4
+
+void
+platform_mp_init_secondary(void)
+{
+
+   gic_init_secondary();
+}
+
+void
+platform_mp_setmaxid(void)
+{
+   int ncpu;
+
+   if (mp_ncpus != 0)
+   return;
+
+   /* Read current CP15 Cache Size ID Register */
+   __asm __volatile("mrc p15, 1, %0, c9, c0, 2" : "=r" (ncpu));
+   ncpu = ((ncpu >> 24) & 0x3) + 1;
+
+   mp_ncpus = ncpu;
+   mp_maxid = ncpu - 1;
+}
+
+int
+platform_mp_probe(void)
+{
+
+   if (mp_ncpus == 0)
+   platform_mp_setmaxid();
+
+   return (mp_ncpus > 1);
+}
+
+void
+platform_mp_start_ap(void)
+{
+   bus_space_handle_t cpucfg;
+
+   uint32_t val;
+
+   if (bus_space_map(fdtbus_bs_tag, CPUCFG_BASE, CPUCFG_SIZE, 0,
+   &cpucfg) != 0)
+   panic("Couldn't map the CPUCFG\n");
+
+   cpu_idcache_wbinv_all();
+   cpu_l2cache_wbinv_all();
+
+   bus_space_write_4(fdtbus_bs_tag, cpucfg, CPUCFG_P_REG0,
+   pmap_kextract((vm_offset_t)mpentry));
+
+   /*
+* Assert nCOREPORESET low and set L1RSTDISABLE low.
+* Ensure DBGPWRDUP is set to LOW to prevent any external
+* debug access to the processor.
+*/
+   bus_space_write_4(fdtbus_bs_tag, cpucfg, CPU1_RST_CTL, 0);
+
+   /* Set L1RSTDISABLE low */
+   val = bus_space_read_4(fdtbus_bs_tag, cpucfg, CPUCFG_GENCTL);
+   val &= ~(1 << 1);
+   bus_space_write_4(fdtbus_bs_tag, cpucfg, CPUCFG_GENCTL, val);
+
+   /* Set DBGPWRDUP low */
+   val = bus_space_read_4(fdtbus_bs_tag, cpucfg, CPUCFG_DBGCTL1);
+   val &= ~(1 << 1);
+   bus_space_write_4(fdtbus_bs_tag, cpucfg, CPUCFG_DBGCTL1, val);
+
+   /* Release power clamp */
+   bus_space_write_4(fdtbus_bs_tag, cpucfg, CPU1_PWR_CLAMP, 0xff);
+   bus_space_write_4(fdtbus_bs_tag, cpucfg, CPU1_PWR_CLAMP, 0x7f);
+   bus_space_write_4(fdtbus_bs_tag, cpucfg, CPU1_PWR_CLAMP, 0x3f);
+   bus_space_write_4(fdtbus_bs_tag, cpucfg, CPU1_PWR_CLAMP, 0x1f);
+   bus_space_write_4(fdtbus_bs_tag, cpucfg, CPU1_PWR_CLAMP, 0x0f);
+   bus_space_w

svn commit: r262711 - in head/sys: arm/allwinner arm/allwinner/a20 arm/conf boot/fdt/dts/arm

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Mon Mar  3 11:36:39 2014
New Revision: 262711
URL: http://svnweb.freebsd.org/changeset/base/262711

Log:
  Add EMAC and SRAM controller entries to FDT.
  Add EMAC device to kernel config files and
  enable EMAC, SRAM drivers for build.
  
  Approved by:  stas (mentor)

Modified:
  head/sys/arm/allwinner/a20/files.a20
  head/sys/arm/allwinner/files.a10
  head/sys/arm/conf/CUBIEBOARD
  head/sys/arm/conf/CUBIEBOARD2
  head/sys/boot/fdt/dts/arm/cubieboard.dts
  head/sys/boot/fdt/dts/arm/cubieboard2.dts

Modified: head/sys/arm/allwinner/a20/files.a20
==
--- head/sys/arm/allwinner/a20/files.a20Mon Mar  3 11:32:55 2014
(r262710)
+++ head/sys/arm/allwinner/a20/files.a20Mon Mar  3 11:36:39 2014
(r262711)
@@ -12,8 +12,10 @@ arm/arm/gic.cstandard
 
 arm/allwinner/a20/a20_cpu_cfg.cstandard
 arm/allwinner/a10_clk.cstandard
+arm/allwinner/a10_sramc.c  standard
 arm/allwinner/a10_gpio.c   optionalgpio
 arm/allwinner/a10_ehci.c   optionalehci
+arm/allwinner/if_emac.coptionalemac
 arm/allwinner/a10_wdog.c   standard
 arm/allwinner/timer.c  standard
 arm/arm/bus_space-v6.c standard

Modified: head/sys/arm/allwinner/files.a10
==
--- head/sys/arm/allwinner/files.a10Mon Mar  3 11:32:55 2014
(r262710)
+++ head/sys/arm/allwinner/files.a10Mon Mar  3 11:36:39 2014
(r262711)
@@ -11,8 +11,10 @@ arm/arm/irq_dispatch.S   standard
 
 arm/allwinner/a20/a20_cpu_cfg.cstandard
 arm/allwinner/a10_clk.cstandard
+arm/allwinner/a10_sramc.c  standard
 arm/allwinner/a10_gpio.c   optionalgpio
 arm/allwinner/a10_ehci.c   optionalehci
+arm/allwinner/if_emac.coptionalemac
 arm/allwinner/a10_wdog.c   standard
 arm/allwinner/timer.c  standard
 arm/allwinner/aintc.c  standard

Modified: head/sys/arm/conf/CUBIEBOARD
==
--- head/sys/arm/conf/CUBIEBOARDMon Mar  3 11:32:55 2014
(r262710)
+++ head/sys/arm/conf/CUBIEBOARDMon Mar  3 11:36:39 2014
(r262711)
@@ -125,6 +125,8 @@ device  smscphy
 #devicecpsw
 device bpf
 
+device emac
+
 # USB ethernet support, requires miibus
 device miibus
 

Modified: head/sys/arm/conf/CUBIEBOARD2
==
--- head/sys/arm/conf/CUBIEBOARD2   Mon Mar  3 11:32:55 2014
(r262710)
+++ head/sys/arm/conf/CUBIEBOARD2   Mon Mar  3 11:36:39 2014
(r262711)
@@ -125,6 +125,8 @@ device  smscphy
 #devicecpsw
 device bpf
 
+device emac
+
 # USB ethernet support, requires miibus
 device miibus
 

Modified: head/sys/boot/fdt/dts/arm/cubieboard.dts
==
--- head/sys/boot/fdt/dts/arm/cubieboard.dtsMon Mar  3 11:32:55 2014
(r262710)
+++ head/sys/boot/fdt/dts/arm/cubieboard.dtsMon Mar  3 11:36:39 2014
(r262711)
@@ -61,6 +61,13 @@
reg =   < 0x01c20400 0x400 >;
};
 
+   sramc@01c0 {
+   compatible = "allwinner,sun4i-sramc";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   reg = < 0x01c0 0x1000 >;
+   };
+
ccm@01c2 {
compatible = "allwinner,sun4i-ccm";
#address-cells = <1>;
@@ -124,6 +131,13 @@
busy-detect = <1>;
broken-txfifo = <1>;
};
+
+   emac@01c0b000 {
+   compatible = "allwinner,sun4i-emac";
+   reg = <0x01c0b000 0x1000>;
+   interrupts = <55>;
+   interrupt-parent = <&AINTC>;
+   };
};
 
chosen {

Modified: head/sys/boot/fdt/dts/arm/cubieboard2.dts
==
--- head/sys/boot/fdt/dts/arm/cubieboard2.dts   Mon Mar  3 11:32:55 2014
(r262710)
+++ head/sys/boot/fdt/dts/arm/cubieboard2.dts   Mon Mar  3 11:36:39 2014
(r262711)
@@ -61,6 +61,13 @@
#interrupt-cells = <1>;
};
 
+   sramc@01c0 {
+   compatible = "allwinner,sun4i-sramc";
+   #address-cells = <1>;
+   #size-cells = <1>;
+

svn commit: r262710 - head/sys/arm/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Mon Mar  3 11:32:55 2014
New Revision: 262710
URL: http://svnweb.freebsd.org/changeset/base/262710

Log:
  Add EMAC 10/100 Ethernet controller driver for A10/A20.
  It is available mostly in A10 devices like Hackberry, Marsboard,
  Mele A1000, A2000, A100 HTPC, cubieboard1 and A20 device
  like cubieboard2.
  TX performance can be improved using both channels 0 and 1.
  RX performance is poor and needs improvement with the assistance of
  external DMA controller in case there is bulk TCP receiver.
  
  Reviewed by:  yongari@
  Approved by:  stas (mentor)

Added:
  head/sys/arm/allwinner/if_emac.c   (contents, props changed)
  head/sys/arm/allwinner/if_emacreg.h   (contents, props changed)

Added: head/sys/arm/allwinner/if_emac.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/allwinner/if_emac.cMon Mar  3 11:32:55 2014
(r262710)
@@ -0,0 +1,1152 @@
+/*-
+ * Copyright (c) 2013 Ganbold Tsagaankhuu 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/* A10/A20 EMAC driver */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifdef INET
+#include 
+#include 
+#include 
+#include 
+#endif
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "miibus_if.h"
+
+#include "gpio_if.h"
+
+#include "a10_clk.h"
+#include "a10_sramc.h"
+#include "a10_gpio.h"
+
+struct emac_softc {
+   struct ifnet*emac_ifp;
+   device_temac_dev;
+   device_temac_miibus;
+   bus_space_handle_t  emac_handle;
+   bus_space_tag_t emac_tag;
+   struct resource *emac_res;
+   struct resource *emac_irq;
+   void*emac_intrhand;
+   int emac_if_flags;
+   struct mtx  emac_mtx;
+   struct callout  emac_tick_ch;
+   int emac_watchdog_timer;
+   int emac_rx_process_limit;
+   int emac_link;
+};
+
+static int emac_probe(device_t);
+static int emac_attach(device_t);
+static int emac_detach(device_t);
+static int emac_shutdown(device_t);
+static int emac_suspend(device_t);
+static int emac_resume(device_t);
+
+static voidemac_sys_setup(void);
+static voidemac_reset(struct emac_softc *);
+
+static voidemac_init_locked(struct emac_softc *);
+static voidemac_start_locked(struct ifnet *);
+static voidemac_init(void *);
+static voidemac_stop_locked(struct emac_softc *);
+static voidemac_intr(void *);
+static int emac_ioctl(struct ifnet *, u_long, caddr_t);
+
+static voidemac_rxeof(struct emac_softc *, int);
+static voidemac_txeof(struct emac_softc *);
+
+static int emac_miibus_readreg(device_t, int, int);
+static int emac_miibus_writereg(device_t, int, int, int);
+static voidemac_miibus_statchg(device_t);
+
+static int emac_ifmedia_upd(struct ifnet *);
+static voidemac_ifmedia_sts(struct ifnet *, struct ifmediareq *);
+
+static int sysctl_int_range(SYSCTL_HANDLER_ARGS, int, int);
+static int sysctl_hw_emac_proc_limit(SYSCTL_HANDLER_ARGS);
+
+#defineEMAC_READ_REG(sc, reg)  \
+bus_space_rea

svn commit: r262709 - head/sys/arm/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Mon Mar  3 11:24:47 2014
New Revision: 262709
URL: http://svnweb.freebsd.org/changeset/base/262709

Log:
  Add Static Random Access Memory controller driver for A10/A20.
  A10/A20's SRAM is used by devices, such as CPU, EMAC,
  for extra fast memory or as cache.
  
  Approved by:  stas (mentor)

Added:
  head/sys/arm/allwinner/a10_sramc.c   (contents, props changed)
  head/sys/arm/allwinner/a10_sramc.h   (contents, props changed)

Added: head/sys/arm/allwinner/a10_sramc.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/allwinner/a10_sramc.c  Mon Mar  3 11:24:47 2014
(r262709)
@@ -0,0 +1,134 @@
+/*-
+ * Copyright (c) 2013 Ganbold Tsagaankhuu 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "a10_sramc.h"
+
+#defineSRAM_CTL1_CFG   0x04
+
+struct a10_sramc_softc {
+   struct resource *res;
+   bus_space_tag_t bst;
+   bus_space_handle_t  bsh;
+};
+
+static struct a10_sramc_softc *a10_sramc_sc;
+
+#definesramc_read_4(sc, reg)   \
+bus_space_read_4((sc)->bst, (sc)->bsh, (reg))
+#definesramc_write_4(sc, reg, val) \
+bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val))
+
+
+static int
+a10_sramc_probe(device_t dev)
+{
+
+   if (ofw_bus_is_compatible(dev, "allwinner,sun4i-sramc")) {
+   device_set_desc(dev, "Allwinner sramc module");
+   return (BUS_PROBE_DEFAULT);
+   }
+
+   return (ENXIO);
+}
+
+static int
+a10_sramc_attach(device_t dev)
+{
+   struct a10_sramc_softc *sc = device_get_softc(dev);
+   int rid = 0;
+
+   sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
+   if (!sc->res) {
+   device_printf(dev, "could not allocate resource\n");
+   return (ENXIO);
+   }
+
+   sc->bst = rman_get_bustag(sc->res);
+   sc->bsh = rman_get_bushandle(sc->res);
+
+   a10_sramc_sc = sc;
+
+   return (0);
+}
+
+static device_method_t a10_sramc_methods[] = {
+   DEVMETHOD(device_probe, a10_sramc_probe),
+   DEVMETHOD(device_attach,a10_sramc_attach),
+   { 0, 0 }
+};
+
+static driver_t a10_sramc_driver = {
+   "a10_sramc",
+   a10_sramc_methods,
+   sizeof(struct a10_sramc_softc),
+};
+
+static devclass_t a10_sramc_devclass;
+
+DRIVER_MODULE(a10_sramc, simplebus, a10_sramc_driver, a10_sramc_devclass, 0, 
0);
+
+int
+a10_map_to_emac(void)
+{
+   struct a10_sramc_softc *sc = a10_sramc_sc;
+   uint32_t reg_value;
+
+   if (sc == NULL)
+   return (ENXIO);
+
+   /* Map SRAM to EMAC, set bit 2 and 4. */
+   reg_value = sramc_read_4(sc, SRAM_CTL1_CFG);
+   reg_value |= 0x5 << 2;
+   sramc_write_4(sc, SRAM_CTL1_CFG, reg_value);
+
+   return (0);
+}

Added: head/sys/arm/allwinner/a10_sramc.h
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/allwinner/a10_sramc.h  Mon Mar  3 11:24:47 2014
(r262709)
@@ -0,0 +1,34 @@
+/*-
+ * Copyright (c) 2013 Ganbold Tsagaankhuu 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and bina

svn commit: r262708 - head/sys/arm/allwinner

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Mon Mar  3 11:00:52 2014
New Revision: 262708
URL: http://svnweb.freebsd.org/changeset/base/262708

Log:
  Add gpio and clock bits for A10/A20's EMAC ethernet controller driver, such 
as:
  - EMAC gpio configuration
  - EMAC clock activation
  
  Approved by:  stas (mentor)

Added:
  head/sys/arm/allwinner/a10_gpio.h   (contents, props changed)
Modified:
  head/sys/arm/allwinner/a10_clk.c
  head/sys/arm/allwinner/a10_clk.h
  head/sys/arm/allwinner/a10_gpio.c

Modified: head/sys/arm/allwinner/a10_clk.c
==
--- head/sys/arm/allwinner/a10_clk.cMon Mar  3 09:57:04 2014
(r262707)
+++ head/sys/arm/allwinner/a10_clk.cMon Mar  3 11:00:52 2014
(r262708)
@@ -127,7 +127,7 @@ a10_clk_usb_activate(void)
uint32_t reg_value;
 
if (sc == NULL)
-   return ENXIO;
+   return (ENXIO);
 
/* Gating AHB clock for USB */
reg_value = ccm_read_4(sc, CCM_AHB_GATING0);
@@ -154,7 +154,7 @@ a10_clk_usb_deactivate(void)
uint32_t reg_value;
 
if (sc == NULL)
-   return ENXIO;
+   return (ENXIO);
 
/* Disable clock for USB */
reg_value = ccm_read_4(sc, CCM_USB_CLK);
@@ -173,3 +173,19 @@ a10_clk_usb_deactivate(void)
return (0);
 }
 
+int
+a10_clk_emac_activate(void) {
+   struct a10_ccm_softc *sc = a10_ccm_sc;
+   uint32_t reg_value;
+
+   if (sc == NULL)
+   return (ENXIO);
+
+   /* Gating AHB clock for EMAC */
+   reg_value = ccm_read_4(sc, CCM_AHB_GATING0);
+   reg_value |= CCM_AHB_GATING_EMAC;
+   ccm_write_4(sc, CCM_AHB_GATING0, reg_value);
+
+   return (0);
+}
+

Modified: head/sys/arm/allwinner/a10_clk.h
==
--- head/sys/arm/allwinner/a10_clk.hMon Mar  3 09:57:04 2014
(r262707)
+++ head/sys/arm/allwinner/a10_clk.hMon Mar  3 11:00:52 2014
(r262708)
@@ -103,6 +103,7 @@
 #define CCM_AHB_GATING_USB0(1 << 0)
 #define CCM_AHB_GATING_EHCI0   (1 << 1)
 #define CCM_AHB_GATING_EHCI1   (1 << 3)
+#define CCM_AHB_GATING_EMAC(1 << 17)
 
 #define CCM_USB_PHY(1 << 8)
 #define CCM_USB0_RESET (1 << 0)
@@ -111,5 +112,6 @@
 
 int a10_clk_usb_activate(void);
 int a10_clk_usb_deactivate(void);
+int a10_clk_emac_activate(void);
 
 #endif /* _A10_CLK_H_ */

Modified: head/sys/arm/allwinner/a10_gpio.c
==
--- head/sys/arm/allwinner/a10_gpio.c   Mon Mar  3 09:57:04 2014
(r262707)
+++ head/sys/arm/allwinner/a10_gpio.c   Mon Mar  3 11:00:52 2014
(r262708)
@@ -52,6 +52,7 @@ __FBSDID("$FreeBSD$");
 #include 
 
 #include "gpio_if.h"
+#include "a10_gpio.h"
 
 /*
  * A10 have 9 banks of gpio.
@@ -102,6 +103,8 @@ struct a10_gpio_softc {
 #defineA10_GPIO_GP_INT_STA 0x214
 #defineA10_GPIO_GP_INT_DEB 0x218
 
+static struct a10_gpio_softc *a10_gpio_sc;
+
 #defineA10_GPIO_WRITE(_sc, _off, _val) \
 bus_space_write_4(_sc->sc_bst, _sc->sc_bsh, _off, _val)
 #defineA10_GPIO_READ(_sc, _off)\
@@ -473,6 +476,9 @@ a10_gpio_attach(device_t dev)
 
device_add_child(dev, "gpioc", device_get_unit(dev));
device_add_child(dev, "gpiobus", device_get_unit(dev));
+
+   a10_gpio_sc = sc;
+
return (bus_generic_attach(dev));
 
 fail:
@@ -518,3 +524,19 @@ static driver_t a10_gpio_driver = {
 };
 
 DRIVER_MODULE(a10_gpio, simplebus, a10_gpio_driver, a10_gpio_devclass, 0, 0);
+
+int
+a10_emac_gpio_config(uint32_t pin)
+{
+   struct a10_gpio_softc *sc = a10_gpio_sc;
+
+   if (sc == NULL)
+   return (ENXIO);
+
+   /* Configure pin mux settings for MII. */
+   A10_GPIO_LOCK(sc);
+   a10_gpio_set_function(sc, pin, A10_GPIO_PULLDOWN);
+   A10_GPIO_UNLOCK(sc);
+
+   return (0);
+}

Added: head/sys/arm/allwinner/a10_gpio.h
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/allwinner/a10_gpio.h   Mon Mar  3 11:00:52 2014
(r262708)
@@ -0,0 +1,34 @@
+/*-
+ * Copyright (c) 2013 Ganbold Tsagaankhuu 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * 

svn commit: r260447 - head/sys/boot/fdt/dts

[Ganbold Tsagaankhuu]

Author: ganbold
Date: Wed Jan  8 09:33:16 2014
New Revision: 260447
URL: http://svnweb.freebsd.org/changeset/base/260447

Log:
  Update dts files of Cubieboard1,2 to use 1GB memory.
  Whilst there, fix cpu config register address for Cubieboard2.
  
  Approved by: stas (mentor)

Replaced:
  head/sys/boot/fdt/dts/cubieboard2.dts
 - copied, changed from r256656, head/sys/boot/fdt/dts/cubieboard2.dts
Modified:
  head/sys/boot/fdt/dts/cubieboard.dts

Modified: head/sys/boot/fdt/dts/cubieboard.dts
==
--- head/sys/boot/fdt/dts/cubieboard.dtsWed Jan  8 08:37:30 2014
(r260446)
+++ head/sys/boot/fdt/dts/cubieboard.dtsWed Jan  8 09:33:16 2014
(r260447)
@@ -38,7 +38,7 @@
 
memory {
device_type = "memory";
-   reg = < 0x4000 0x2000 >;/* 512MB RAM */
+   reg = < 0x4000 0x4000 >;/* 1GB RAM */
};
 
aliases {

Copied and modified: head/sys/boot/fdt/dts/cubieboard2.dts (from r256656, 
head/sys/boot/fdt/dts/cubieboard2.dts)
==
--- head/sys/boot/fdt/dts/cubieboard2.dts   Thu Oct 17 00:07:21 2013
(r256656, copy source)
+++ head/sys/boot/fdt/dts/cubieboard2.dts   Wed Jan  8 09:33:16 2014
(r260447)
@@ -38,7 +38,7 @@
 
memory {
device_type = "memory";
-   reg = < 0x4000 0x2000 >;/* 512MB RAM */
+   reg = < 0x4000 0x4000 >;/* 1GB RAM */
};
 
aliases {
@@ -61,7 +61,7 @@
#interrupt-cells = <1>;
};
 
-   cpu-cfg@01c2 {
+   cpu-cfg@01c25c00 {
compatible = "allwinner,sun7i-cpu-cfg";
#address-cells = <1>;
#size-cells = <1>;
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Re: svn commit: r259685 - in head/sys: arm/at91 dev/uart

[Ganbold Tsagaankhuu]

On Sun, Dec 22, 2013 at 12:23 AM, Warner Losh  wrote:

> Author: imp
> Date: Sat Dec 21 16:23:31 2013
> New Revision: 259685
> URL: http://svnweb.freebsd.org/changeset/base/259685
>
> Log:
>   Plumb the cn_grab and cn_ungrab routines down into the uart
>   clients. Mask RX interrupts while grabbed on the atmel serial
>   driver. This UART interrupts every character. When interrupts are
>   enabled at the mountroot> prompt, this means the ISR eats the
>   characters. Rather than try to create a cooperative buffering system
>   for the low level kernel console, instead just mask out the ISR. For
>   NS8250 and decsendents this isn't needed, since interrupts only happen
>   after 14 or more characters (depending on the fifo settings). Plumb
>   such that these are optional so there's no change in behavior for all
>   the other UART clients. ddb worked on this platform because all
>   interrupts were disabled while it was running, so this problem wasn't
>   noticed. The mountroot> issue has been around for a very very long
>   time.
>
>   MFC after:3 days
>
> Modified:
>   head/sys/arm/at91/uart_dev_at91usart.c
>   head/sys/dev/uart/uart_cpu.h
>   head/sys/dev/uart/uart_tty.c
>


There is PR "kern/184919: uart infrastructure missing console grab / ungrab
hooks", maybe that one should be closed.

Ganbold




>
> Modified: head/sys/arm/at91/uart_dev_at91usart.c
>
> ==
> --- head/sys/arm/at91/uart_dev_at91usart.c  Sat Dec 21 15:40:36 2013
>  (r259684)
> +++ head/sys/arm/at91/uart_dev_at91usart.c  Sat Dec 21 16:23:31 2013
>  (r259685)
> @@ -219,6 +219,20 @@ at91_usart_param(struct uart_bas *bas, i
> return (0);
>  }
>
> +static void
> +at91_usart_grab(struct uart_bas *bas)
> +{
> +
> +   WR4(bas, USART_IDR, USART_CSR_RXRDY);
> +}
> +
> +static void
> +at91_usart_ungrab(struct uart_bas *bas)
> +{
> +
> +   WR4(bas, USART_IER, USART_CSR_RXRDY);
> +}
> +
>  static struct uart_ops at91_usart_ops = {
> .probe = at91_usart_probe,
> .init = at91_usart_init,
> @@ -226,6 +240,8 @@ static struct uart_ops at91_usart_ops =
> .putc = at91_usart_putc,
> .rxready = at91_usart_rxready,
> .getc = at91_usart_getc,
> +   .grab = at91_usart_grab,
> +   .ungrab = at91_usart_ungrab,
>  };
>
>  static int
>
> Modified: head/sys/dev/uart/uart_cpu.h
>
> ==
> --- head/sys/dev/uart/uart_cpu.hSat Dec 21 15:40:36 2013
>  (r259684)
> +++ head/sys/dev/uart/uart_cpu.hSat Dec 21 16:23:31 2013
>  (r259685)
> @@ -43,6 +43,8 @@ struct uart_ops {
> void (*putc)(struct uart_bas *, int);
> int (*rxready)(struct uart_bas *);
> int (*getc)(struct uart_bas *, struct mtx *);
> +   void (*grab)(struct uart_bas *);
> +   void (*ungrab)(struct uart_bas *);
>  };
>
>  extern bus_space_tag_t uart_bus_space_io;
> @@ -135,6 +137,27 @@ uart_putc(struct uart_devinfo *di, int c
> uart_unlock(di->hwmtx);
>  }
>
> +static __inline void
> +uart_grab(struct uart_devinfo *di)
> +{
> +
> +   uart_lock(di->hwmtx);
> +   if (di->ops->grab)
> +   di->ops->grab(&di->bas);
> +   uart_unlock(di->hwmtx);
> +}
> +
> +static __inline void
> +uart_ungrab(struct uart_devinfo *di)
> +{
> +
> +   uart_lock(di->hwmtx);
> +   if (di->ops->ungrab)
> +   di->ops->ungrab(&di->bas);
> +   uart_unlock(di->hwmtx);
> +}
> +
> +
>  static __inline int
>  uart_rxready(struct uart_devinfo *di)
>  {
>
> Modified: head/sys/dev/uart/uart_tty.c
>
> ==
> --- head/sys/dev/uart/uart_tty.cSat Dec 21 15:40:36 2013
>  (r259684)
> +++ head/sys/dev/uart/uart_tty.cSat Dec 21 16:23:31 2013
>  (r259685)
> @@ -112,11 +112,15 @@ uart_cnterm(struct consdev *cp)
>  static void
>  uart_cngrab(struct consdev *cp)
>  {
> +
> +   uart_grab(cp->cn_arg);
>  }
>
>  static void
>  uart_cnungrab(struct consdev *cp)
>  {
> +
> +   uart_ungrab(cp->cn_arg);
>  }
>
>  static void
>
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svn commit: r259640 - in head/sys: arm/arm arm/include conf

[Ganbold Tsagaankhuu]

Author: ganbold (doc committer)
Date: Fri Dec 20 00:56:23 2013
New Revision: 259640
URL: http://svnweb.freebsd.org/changeset/base/259640

Log:
  Add identification and necessary type checks for Krait CPU cores. Krait CPU 
is used in
  Qualcomm Snapdragon S4 and Snapdragon 400/600/800 SoCs and has architectural
  similarities to ARM Cortex-A15. As for development boards IFC6400 series 
embedded
  boards from Inforce Computing uses Snapdragon S4 Pro/APQ8064.
  
  Approved by: stas (mentor)

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/elf_trampoline.c
  head/sys/arm/arm/identcpu.c
  head/sys/arm/arm/locore.S
  head/sys/arm/arm/swtch.S
  head/sys/arm/include/armreg.h
  head/sys/arm/include/cpuconf.h
  head/sys/arm/include/cpufunc.h
  head/sys/arm/include/intr.h
  head/sys/arm/include/md_var.h
  head/sys/conf/files.arm
  head/sys/conf/options.arm

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Fri Dec 20 00:47:54 2013(r259639)
+++ head/sys/arm/arm/cpufunc.c  Fri Dec 20 00:56:23 2013(r259640)
@@ -1038,7 +1038,7 @@ struct cpu_functions arm1176_cpufuncs = 
 };
 #endif /*CPU_ARM1176 */
 
-#if defined(CPU_CORTEXA)
+#if defined(CPU_CORTEXA) || defined(CPU_KRAIT)
 struct cpu_functions cortexa_cpufuncs = {
/* CPU functions */

@@ -1118,7 +1118,7 @@ u_int cpu_reset_needs_v4_MMU_disable; /*
   defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) ||  \
   defined(CPU_FA526) || defined(CPU_FA626TE) || defined(CPU_MV_PJ4B) ||
\
   defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) || \
-  defined(CPU_CORTEXA)
+  defined(CPU_CORTEXA) || defined(CPU_KRAIT)
 
 static void get_cachetype_cp15(void);
 
@@ -1416,7 +1416,7 @@ set_cpufuncs()
goto out;
}
 #endif /* CPU_ARM1136 || CPU_ARM1176 */
-#ifdef CPU_CORTEXA
+#if defined(CPU_CORTEXA) || defined(CPU_KRAIT)
if (cputype == CPU_ID_CORTEXA5 ||
cputype == CPU_ID_CORTEXA7 ||
cputype == CPU_ID_CORTEXA8R1 ||
@@ -1425,7 +1425,8 @@ set_cpufuncs()
cputype == CPU_ID_CORTEXA9R1 ||
cputype == CPU_ID_CORTEXA9R2 ||
cputype == CPU_ID_CORTEXA9R3 ||
-   cputype == CPU_ID_CORTEXA15 ) {
+   cputype == CPU_ID_CORTEXA15 ||
+   cputype == CPU_ID_KRAIT ) {
cpufuncs = cortexa_cpufuncs;
cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */
get_cachetype_cp15();
@@ -2407,7 +2408,7 @@ pj4bv7_setup(args)
 }
 #endif /* CPU_MV_PJ4B */
 
-#ifdef CPU_CORTEXA
+#if defined(CPU_CORTEXA) || defined(CPU_KRAIT)
 
 void
 cortexa_setup(char *args)

Modified: head/sys/arm/arm/elf_trampoline.c
==
--- head/sys/arm/arm/elf_trampoline.c   Fri Dec 20 00:47:54 2013
(r259639)
+++ head/sys/arm/arm/elf_trampoline.c   Fri Dec 20 00:56:23 2013
(r259640)
@@ -102,7 +102,7 @@ extern void xscalec3_l2cache_purge(void)
 #elif defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY)
 #define cpu_l2cache_wbinv_all  sheeva_l2cache_wbinv_all
 extern void sheeva_l2cache_wbinv_all(void);
-#elif defined(CPU_CORTEXA)
+#elif defined(CPU_CORTEXA) || defined(CPU_KRAIT)
 #define cpu_idcache_wbinv_all  armv7_idcache_wbinv_all
 #define cpu_l2cache_wbinv_all()
 #else

Modified: head/sys/arm/arm/identcpu.c
==
--- head/sys/arm/arm/identcpu.c Fri Dec 20 00:47:54 2013(r259639)
+++ head/sys/arm/arm/identcpu.c Fri Dec 20 00:56:23 2013(r259640)
@@ -254,6 +254,8 @@ const struct cpuidtab cpuids[] = {
  generic_steppings },
{ CPU_ID_CORTEXA15, CPU_CLASS_CORTEXA,  "Cortex A15",
  generic_steppings },
+   { CPU_ID_KRAIT, CPU_CLASS_KRAIT,"Krait",
+ generic_steppings },
 
{ CPU_ID_SA110, CPU_CLASS_SA1,  "SA-110",
  sa110_steppings },
@@ -353,6 +355,7 @@ const struct cpu_classtab cpu_classes[] 
{ "ARM10E", "CPU_ARM10" },  /* CPU_CLASS_ARM10E */
{ "ARM10EJ","CPU_ARM10" },  /* CPU_CLASS_ARM10EJ */
{ "Cortex-A",   "CPU_CORTEXA" },/* CPU_CLASS_CORTEXA */
+   { "Krait",  "CPU_KRAIT" },  /* CPU_CLASS_KRAIT */
{ "SA-1",   "CPU_SA110" },  /* CPU_CLASS_SA1 */
{ "XScale", "CPU_XSCALE_..." }, /* CPU_CLASS_XSCALE */
{ "ARM11J", "CPU_ARM11" },  /* CPU_CLASS_ARM11J */

Modified: head/sys/arm/arm/locore.S
==
--- head/sys/arm/arm/locore.S   Fri Dec 20 00:47:54 2013(r259639)
+++ head/sys/arm/arm/locore.S   Fri Dec 20 00:56:23 2013(r259640)
@@ -170,7 +170,7 @@ Lunmapped:
mcr p15, 0, r0, c2, c0, 0   /* Set TTB */
mcr p15, 0, 

svn commit: r259122 - head/sys/boot/fdt/dts

[Ganbold Tsagaankhuu]

Author: ganbold (doc committer)
Date: Mon Dec  9 07:15:46 2013
New Revision: 259122
URL: http://svnweb.freebsd.org/changeset/base/259122

Log:
  Add gpio config for usb1 in dts.
  That way it gives power to other usb hub via gpio at boot time.
  
  Reviewed by: stas@

Modified:
  head/sys/boot/fdt/dts/rk3188.dtsi

Modified: head/sys/boot/fdt/dts/rk3188.dtsi
==
--- head/sys/boot/fdt/dts/rk3188.dtsi   Mon Dec  9 07:14:59 2013
(r259121)
+++ head/sys/boot/fdt/dts/rk3188.dtsi   Mon Dec  9 07:15:46 2013
(r259122)
@@ -174,6 +174,7 @@
interrupt-parent = <&GIC>;
#address-cells = <1>;
#size-cells = <0>;
+   gpios = <&gpio0 3 2 2>;
};
 
uart0: serial@10124000 {
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svn commit: r259121 - head/sys/arm/rockchip

[Ganbold Tsagaankhuu]

Author: ganbold (doc committer)
Date: Mon Dec  9 07:14:59 2013
New Revision: 259121
URL: http://svnweb.freebsd.org/changeset/base/259121

Log:
  Add gpio parse routines according to sys/boot/fdt/dts/bindings-gpio.txt.
  
  Reviewed by: stas@

Modified:
  head/sys/arm/rockchip/rk30xx_gpio.c

Modified: head/sys/arm/rockchip/rk30xx_gpio.c
==
--- head/sys/arm/rockchip/rk30xx_gpio.c Mon Dec  9 07:00:39 2013
(r259120)
+++ head/sys/arm/rockchip/rk30xx_gpio.c Mon Dec  9 07:14:59 2013
(r259121)
@@ -86,6 +86,26 @@ struct rk30_gpio_softc {
struct gpio_pin sc_gpio_pins[RK30_GPIO_PINS];
 };
 
+static struct rk30_gpio_softc *rk30_gpio_sc = NULL;
+
+typedef int (*gpios_phandler_t)(phandle_t, pcell_t *, int);
+
+struct gpio_ctrl_entry {
+   const char  *compat;
+   gpios_phandler_thandler;
+};
+
+int rk30_gpios_prop_handle(phandle_t ctrl, pcell_t *gpios, int len);
+int platform_gpio_init(void);
+
+struct gpio_ctrl_entry gpio_controllers[] = {
+   { "rockchip,rk30xx-gpio", &rk30_gpios_prop_handle },
+   { "rockchip,rk30xx-gpio", &rk30_gpios_prop_handle },
+   { "rockchip,rk30xx-gpio", &rk30_gpios_prop_handle },
+   { "rockchip,rk30xx-gpio", &rk30_gpios_prop_handle },
+   { NULL, NULL }
+};
+
 #defineRK30_GPIO_LOCK(_sc) mtx_lock(&_sc->sc_mtx)
 #defineRK30_GPIO_UNLOCK(_sc)   mtx_unlock(&_sc->sc_mtx)
 #defineRK30_GPIO_LOCK_ASSERT(_sc)  mtx_assert(&_sc->sc_mtx, 
MA_OWNED)
@@ -436,6 +456,9 @@ rk30_gpio_attach(device_t dev)
int i, rid;
phandle_t gpio;
 
+   if (rk30_gpio_sc)
+   return (ENXIO);
+
sc->sc_dev = dev;
 
mtx_init(&sc->sc_mtx, "rk30 gpio", "gpio", MTX_DEF);
@@ -480,6 +503,11 @@ rk30_gpio_attach(device_t dev)
 
device_add_child(dev, "gpioc", device_get_unit(dev));
device_add_child(dev, "gpiobus", device_get_unit(dev));
+
+   rk30_gpio_sc = sc;
+
+   platform_gpio_init();
+   
return (bus_generic_attach(dev));
 
 fail:
@@ -525,3 +553,121 @@ static driver_t rk30_gpio_driver = {
 };
 
 DRIVER_MODULE(rk30_gpio, simplebus, rk30_gpio_driver, rk30_gpio_devclass, 0, 
0);
+
+int
+rk30_gpios_prop_handle(phandle_t ctrl, pcell_t *gpios, int len)
+{
+   struct rk30_gpio_softc *sc;
+   pcell_t gpio_cells;
+   int inc, t, tuples, tuple_size;
+   int dir, flags, pin, i;
+   u_long gpio_ctrl, size;
+
+   sc = rk30_gpio_sc;
+   if (sc == NULL)
+   return ENXIO;
+
+   if (OF_getprop(ctrl, "#gpio-cells", &gpio_cells, sizeof(pcell_t)) < 0)
+   return (ENXIO);
+
+   gpio_cells = fdt32_to_cpu(gpio_cells);
+   if (gpio_cells != 2)
+   return (ENXIO);
+
+   tuple_size = gpio_cells * sizeof(pcell_t) + sizeof(phandle_t);
+   tuples = len / tuple_size;
+
+   if (fdt_regsize(ctrl, &gpio_ctrl, &size))
+   return (ENXIO);
+
+   /*
+* Skip controller reference, since controller's phandle is given
+* explicitly (in a function argument).
+*/
+   inc = sizeof(ihandle_t) / sizeof(pcell_t);
+   gpios += inc;
+   for (t = 0; t < tuples; t++) {
+   pin = fdt32_to_cpu(gpios[0]);
+   dir = fdt32_to_cpu(gpios[1]);
+   flags = fdt32_to_cpu(gpios[2]);
+
+   for (i = 0; i < sc->sc_gpio_npins; i++) {
+   if (sc->sc_gpio_pins[i].gp_pin == pin)
+   break;
+   }
+   if (i >= sc->sc_gpio_npins)
+   return (EINVAL);
+
+   rk30_gpio_pin_configure(sc, &sc->sc_gpio_pins[i], flags);
+
+   if (dir == 1) {
+   /* Input. */
+   rk30_gpio_pin_set(sc->sc_dev, pin, RK30_GPIO_INPUT);
+   } else {
+   /* Output. */
+   rk30_gpio_pin_set(sc->sc_dev, pin, RK30_GPIO_OUTPUT);
+   }
+   gpios += gpio_cells + inc;
+   }
+
+   return (0);
+}
+
+#defineMAX_PINS_PER_NODE   5
+#defineGPIOS_PROP_CELLS4
+
+int
+platform_gpio_init(void)
+{
+   phandle_t child, parent, root, ctrl;
+   pcell_t gpios[MAX_PINS_PER_NODE * GPIOS_PROP_CELLS];
+   struct gpio_ctrl_entry *e;
+   int len, rv;
+
+   root = OF_finddevice("/");
+   len = 0;
+   parent = root;
+
+   /* Traverse through entire tree to find nodes with 'gpios' prop */
+   for (child = OF_child(parent); child != 0; child = OF_peer(child)) {
+
+   /* Find a 'leaf'. Start the search from this node. */
+   while (OF_child(child)) {
+   parent = child;
+   child = OF_child(child);
+   }
+   if ((len = OF_getproplen(child, "gpios")) > 0) {
+
+   if (len > sizeof(gpios))
+   

svn commit: r258548 - head/sys/arm/rockchip

[Ganbold Tsagaankhuu]

Author: ganbold (doc committer)
Date: Mon Nov 25 11:02:58 2013
New Revision: 258548
URL: http://svnweb.freebsd.org/changeset/base/258548

Log:
  Enable reset mechanism for rk3188.
  
  Approved by: ray@

Modified:
  head/sys/arm/rockchip/rk30xx_machdep.c

Modified: head/sys/arm/rockchip/rk30xx_machdep.c
==
--- head/sys/arm/rockchip/rk30xx_machdep.c  Mon Nov 25 11:02:11 2013
(r258547)
+++ head/sys/arm/rockchip/rk30xx_machdep.c  Mon Nov 25 11:02:58 2013
(r258548)
@@ -49,6 +49,8 @@ __FBSDID("$FreeBSD$");
 
 #include 
 
+#include 
+
 /* Start of address space used for bootstrap map */
 #define DEVMAP_BOOTSTRAP_MAP_START 0xF000
 
@@ -122,6 +124,7 @@ void
 cpu_reset()
 {
 
-   printf("No cpu_reset implementation!\n");
+   rk30_wd_watchdog_reset();
+   printf("Reset failed!\n");
while (1);
 }
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svn commit: r258547 - head/sys/boot/fdt/dts

[Ganbold Tsagaankhuu]

Author: ganbold (doc committer)
Date: Mon Nov 25 11:02:11 2013
New Revision: 258547
URL: http://svnweb.freebsd.org/changeset/base/258547

Log:
  Add clock frequency for rk3188 watchdog.
  Whilst here, replace "clocks" to "clock-frequency".
  
  Approved by: ray@

Modified:
  head/sys/boot/fdt/dts/rk3188.dtsi

Modified: head/sys/boot/fdt/dts/rk3188.dtsi
==
--- head/sys/boot/fdt/dts/rk3188.dtsi   Mon Nov 25 11:01:19 2013
(r258546)
+++ head/sys/boot/fdt/dts/rk3188.dtsi   Mon Nov 25 11:02:11 2013
(r258547)
@@ -80,7 +80,7 @@
compatible = "rockchip,rk3188-dw-apb-timer-osc";
reg = <0x20038000 0x20>;
interrupts = <76>;
-   clocks = <2400>;
+   clock-frequency = <2400>;
status = "disabled";
};
 
@@ -88,7 +88,7 @@
compatible = "rockchip,rk30xx-timer";
reg = <0x20038020 0x20>;
interrupts = <77>;
-   clocks = <2400>;
+   clock-frequency = <2400>;
status = "disabled";
};
 
@@ -96,7 +96,7 @@
compatible = "rockchip,rk30xx-timer";
reg = <0x20038060 0x20>;
interrupts = <91>;
-   clocks = <2400>;
+   clock-frequency = <2400>;
status = "disabled";
};
 
@@ -104,7 +104,7 @@
compatible = "rockchip,rk30xx-timer";
reg = <0x20038080 0x20>;
interrupts = <92>;
-   clocks = <2400>;
+   clock-frequency = <2400>;
status = "disabled";
};
 
@@ -112,13 +112,14 @@
compatible = "rockchip,rk30xx-timer";
reg = <0x200380a0 0x20>;
interrupts = <96>;
-   clocks = <2400>;
+   clock-frequency = <2400>;
status = "disabled";
};
 
watchdog@2004c000 {
compatible = "rockchip,rk30xx-wdt";
reg = <0x2004c000 0x100>;
+   clock-frequency = < 6600 >;
};
 
gpio0: gpio@2000a000 {
@@ -233,7 +234,7 @@
interrupts = <55>;
#address-cells = <1>;
#size-cells = <0>;
-   clocks = <2400>;/* TODO: verify freq */
+   clock-frequency = <2400>;   /* TODO: verify freq */
status = "disabled";
};
 
@@ -243,7 +244,7 @@
interrupts = <56>;
#address-cells = <1>;
#size-cells = <0>;
-   clocks = <2400>;/* TODO: verify freq */
+   clock-frequency = <2400>;   /* TODO: verify freq */
status = "disabled";
};
};
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svn commit: r258546 - head/sys/arm/rockchip

[Ganbold Tsagaankhuu]

Author: ganbold (doc committer)
Date: Mon Nov 25 11:01:19 2013
New Revision: 258546
URL: http://svnweb.freebsd.org/changeset/base/258546

Log:
  Add watchdog driver for rk3188.
  
  Approved by: ray@

Added:
  head/sys/arm/rockchip/rk30xx_wdog.c   (contents, props changed)
  head/sys/arm/rockchip/rk30xx_wdog.h   (contents, props changed)
Modified:
  head/sys/arm/rockchip/files.rk30xx

Modified: head/sys/arm/rockchip/files.rk30xx
==
--- head/sys/arm/rockchip/files.rk30xx  Mon Nov 25 10:58:02 2013
(r258545)
+++ head/sys/arm/rockchip/files.rk30xx  Mon Nov 25 11:01:19 2013
(r258546)
@@ -17,5 +17,6 @@ arm/rockchip/common.c standard
 arm/rockchip/rk30xx_machdep.c  standard
 arm/rockchip/rk30xx_pmu.c  standard
 arm/rockchip/rk30xx_grf.c  standard
+arm/rockchip/rk30xx_wdog.c standard
 arm/rockchip/rk30xx_gpio.c optionalgpio
 dev/usb/controller/dwc_otg_fdt.c   optionaldwcotg

Added: head/sys/arm/rockchip/rk30xx_wdog.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/rockchip/rk30xx_wdog.c Mon Nov 25 11:01:19 2013
(r258546)
@@ -0,0 +1,198 @@
+/*-
+ * Copyright (c) 2013 Ganbold Tsagaankhuu 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#ifndefRK30_WDT_BASE
+#defineRK30_WDT_BASE   0x2004c000
+#defineRK30_WDT_PSIZE  0x100
+#endif
+
+#defineRK30_WDT_READ(_sc, _r)  bus_read_4((_sc)->res, (_r))
+#defineRK30_WDT_WRITE(_sc, _r, _v) bus_write_4((_sc)->res, (_r), 
(_v))
+
+#defineWDOG_CTRL   0x00
+#defineWDOG_CTRL_EN(1 << 0)
+#defineWDOG_CTRL_RSP_MODE  (1 << 1)
+#defineWDOG_CTRL_RST_PULSE (4 << 2)
+#defineWDOG_CTRL_RST   0xa
+#defineWDOG_TORR   0x04
+#defineWDOG_TORR_INTVL_SHIFT   0
+#defineWDOG_CCVR   0x08
+#defineWDOG_CRR0x0c
+#defineWDOG_CRR_PWD0x76
+#defineWDOG_STAT   0x10
+#defineWDOG_EOI0x14
+
+static struct rk30_wd_softc *rk30_wd_sc = NULL;
+
+struct rk30_wd_softc {
+   device_tdev;
+   struct resource *res;
+   struct mtx  mtx;
+   int freq;
+};
+
+static void rk30_wd_watchdog_fn(void *private, u_int cmd, int *error);
+
+static int
+rk30_wd_probe(device_t dev)
+{
+
+   if (ofw_bus_is_compatible(dev, "rockchip,rk30xx-wdt")) {
+   device_set_desc(dev, "Rockchip RK30XX Watchdog");
+   return (BUS_PROBE_DEFAULT);
+   }
+
+   return (ENXIO);
+}
+
+static int
+rk30_wd_attach(device_t dev)
+{
+   struct rk30_wd_softc *sc;
+   int rid;
+   phandle_t node;
+   pcell_t cell;
+
+   if (rk30_wd_sc != NULL)
+   return (ENXIO);
+
+   sc = device_get_softc(dev);
+   sc->dev = dev;
+
+   node = ofw_bus_get_node(sc->dev);
+   if (OF_getencprop(node, "clock-frequency", &cell, sizeof(cell)) > 0)
+   sc->freq = cell / 100;
+   else
+   return (ENXIO);
+
+   rid = 0;
+   

Re: svn commit: r256949 - head/sys/arm/rockchip

[Ganbold Tsagaankhuu]

On Wed, Oct 23, 2013 at 1:21 PM, Joel Dahl  wrote:

>
> 23 okt 2013 kl. 02:39 skrev Ganbold Tsagaankhuu :
>
> > Author: ganbold (doc committer)
> > Date: Wed Oct 23 00:39:43 2013
> > New Revision: 256949
> > URL: http://svnweb.freebsd.org/changeset/base/256949
> >
> > Log:
> >  Import basic support for Rockchip RK3188 SoC.
> >
> > Added: head/sys/arm/rockchip/bus_space.c
> >
> ==
> > --- /dev/null 00:00:00 1970   (empty, because file is newly added)
> > +++ head/sys/arm/rockchip/bus_space.c Wed Oct 23 00:39:43 2013
>  (r256949)
> > @@ -0,0 +1,113 @@
> > +/*-
> > + * Copyright (C) 2012 FreeBSD Foundation
> > + * All rights reserved.
> > + *
> > + * Redistribution and use in source and binary forms, with or without
> > + * modification, are permitted provided that the following conditions
> > + * are met:
> > + * 1. Redistributions of source code must retain the above copyright
> > + *notice, this list of conditions and the following disclaimer.
> > + * 2. Redistributions in binary form must reproduce the above copyright
> > + *notice, this list of conditions and the following disclaimer in
> the
> > + *documentation and/or other materials provided with the
> distribution.
> > + * 3. Neither the name of MARVELL nor the names of contributors
> > + *may be used to endorse or promote products derived from this
> software
> > + *without specific prior written permission.
>
> Hmm? If this is copyrighted the FreeBSD Foundation, why does the copyright
> mention MARVELL?
>
> Copy/Paste mistake?
>
>
I have seen most of the bus_space.c in sys/arm has this type of license.

Ganbold



> --
> Joel
>
>
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svn commit: r256950 - head/sys/arm/conf

[Ganbold Tsagaankhuu]

Author: ganbold (doc committer)
Date: Wed Oct 23 00:43:22 2013
New Revision: 256950
URL: http://svnweb.freebsd.org/changeset/base/256950

Log:
  Radxa Rock board (by radxa.com) kernel config file.
  More info on the Wiki page:
  https://wiki.freebsd.org/FreeBSD/arm/Radxa%20Rock
  
  Reviewed by: ray@

Added:
  head/sys/arm/conf/RADXA   (contents, props changed)

Added: head/sys/arm/conf/RADXA
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/conf/RADXA Wed Oct 23 00:43:22 2013(r256950)
@@ -0,0 +1,119 @@
+# RADXA -- Custom configuration for the RADXA ARM development
+# platform, check out http://www.radxa.com
+#
+# For more information on this file, please read the handbook section on
+# Kernel Configuration Files:
+#
+#
http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
+#
+# The handbook is also available locally in /usr/share/doc/handbook
+# if you've installed the doc distribution, otherwise always see the
+# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the
+# latest information.
+#
+# An exhaustive list of options and more detailed explanations of the
+# device lines is also present in the ../../conf/NOTES and NOTES files.
+# If you are in doubt as to the purpose or necessity of a line, check first
+# in NOTES.
+#
+# $FreeBSD$
+
+ident  RADXA
+
+include"../rockchip/std.rk30xx"
+
+makeoptionsMODULES_OVERRIDE=""
+makeoptionsWITHOUT_MODULES="ahc"
+
+optionsHZ=100
+optionsSCHED_4BSD  #4BSD scheduler
+optionsINET#InterNETworking
+optionsINET6   #IPv6 communications protocols
+optionsFFS #Berkeley Fast Filesystem
+optionsSOFTUPDATES #Enable FFS soft updates support
+optionsUFS_ACL #Support for access control 
lists
+optionsUFS_DIRHASH #Improve performance on big 
directories
+optionsMSDOSFS #MSDOS Filesystem
+optionsCD9660  #ISO 9660 Filesystem
+optionsPROCFS  #Process filesystem (requires 
PSEUDOFS)
+optionsPSEUDOFS#Pseudo-filesystem framework
+optionsCOMPAT_43   #Compatible with BSD 4.3 [KEEP 
THIS!]
+optionsSCSI_DELAY=5000 #Delay (in ms) before probing 
SCSI
+optionsKTRACE  #ktrace(1) support
+optionsSYSVSHM #SYSV-style shared memory
+optionsSYSVMSG #SYSV-style message queues
+optionsSYSVSEM #SYSV-style semaphores
+options_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time 
extensions
+optionsKBD_INSTALL_CDEV# install a CDEV entry in /dev
+optionsPREEMPTION
+optionsFREEBSD_BOOT_LOADER
+optionsVFP # vfp/neon
+
+# Debugging
+makeoptionsDEBUG=-g#Build kernel with gdb(1) debug symbols
+optionsBREAK_TO_DEBUGGER
+#options   VERBOSE_SYSINIT #Enable verbose sysinit messages
+optionsKDB
+optionsDDB #Enable the kernel debugger
+#options   INVARIANTS  #Enable calls of extra sanity checking
+#options   INVARIANT_SUPPORT   #Extra sanity checks of internal 
structures, required by INVARIANTS
+optionsWITNESS #Enable checks to detect 
deadlocks and cycles
+optionsWITNESS_SKIPSPIN#Don't run witness on spinlocks 
for speed
+optionsDIAGNOSTIC
+
+# NFS support
+#options   NFSCL
+#options   NFSSERVER   #Network Filesystem Server
+#options   NFSCLIENT   #Network Filesystem Client
+
+# MMC/SD/SDIO card slot support
+#devicemmc # mmc/sd bus
+#devicemmcsd   # mmc/sd flash cards
+
+# Boot device is 2nd slice on MMC/SD card
+optionsROOTDEVNAME=\"ufs:/dev/da0s2\"
+
+# Console and misc
+device uart
+device uart_ns8250
+device pty
+device snp
+device md
+device random  # Entropy device
+
+# I2C support
+#deviceiicbus
+#deviceiic
+
+# GPIO
+device gpio
+
+device scbus   # SCSI bus (required for SCSI)
+device da  # Direct Access (disks)
+device pass
+
+# USB support
+device usb
+optionsUSB_DEBUG
+#options   USB_REQ_DEBUG
+#options   USB_VERBOSE
+device dwcotg  #DWC OTG co

svn commit: r256949 - head/sys/arm/rockchip

[Ganbold Tsagaankhuu]

s_c_1 = NULL,
+   .bs_c_2 = generic_armv4_bs_c_2,
+   .bs_c_4 = NULL,
+   .bs_c_8 = NULL,
+};
+
+bus_space_tag_t fdtbus_bs_tag = &_base_tag;

Added: head/sys/arm/rockchip/common.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/rockchip/common.c  Wed Oct 23 00:39:43 2013
(r256949)
@@ -0,0 +1,64 @@
+/*-
+ * Copyright (c) 2013 Ganbold Tsagaankhuu 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+struct fdt_fixup_entry fdt_fixup_table[] = {
+   { NULL, NULL }
+};
+
+static int
+fdt_aintc_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
+int *pol)
+{
+
+   if (!fdt_is_compatible(node, "arm,gic"))
+   return (ENXIO);
+
+   *interrupt = fdt32_to_cpu(intr[0]);
+   *trig = INTR_TRIGGER_CONFORM;
+   *pol = INTR_POLARITY_CONFORM;
+
+   return (0);
+}
+
+fdt_pic_decode_t fdt_pic_table[] = {
+   &fdt_aintc_decode_ic,
+   NULL
+};

Added: head/sys/arm/rockchip/files.rk30xx
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/rockchip/files.rk30xx  Wed Oct 23 00:39:43 2013
(r256949)
@@ -0,0 +1,21 @@
+# $FreeBSD$
+kern/kern_clocksource.cstandard
+
+arm/arm/bus_space_asm_generic.Sstandard
+arm/arm/bus_space_generic.cstandard
+arm/arm/cpufunc_asm_armv5.Sstandard
+arm/arm/cpufunc_asm_arm10.Sstandard
+arm/arm/cpufunc_asm_arm11.Sstandard
+arm/arm/cpufunc_asm_armv7.Sstandard
+arm/arm/irq_dispatch.S standard
+
+arm/arm/gic.c  standard
+arm/arm/mpcore_timer.c standard
+
+arm/rockchip/bus_space.c   standard
+arm/rockchip/common.c  standard
+arm/rockchip/rk30xx_machdep.c  standard
+arm/rockchip/rk30xx_pmu.c  standard
+arm/rockchip/rk30xx_grf.c  standard
+arm/rockchip/rk30xx_gpio.c optionalgpio
+dev/usb/controller/dwc_otg_fdt.c   optionaldwcotg

Added: head/sys/arm/rockchip/rk30xx_gpio.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/rockchip/rk30xx_gpio.c Wed Oct 23 00:39:43 2013    
(r256949)
@@ -0,0 +1,528 @@
+/*-
+ * Copyright (c) 2013 Ganbold Tsagaankhuu 
+ * Copyright (c) 2012 Oleksandr Tymoshenko 
+ * Copyright (c) 2012 Luiz Otavio O Souza.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONT