svn commit: r350371 - head/sys/dev/sfxge/common
Author: arybchik
Date: Sat Jul 27 09:36:45 2019
New Revision: 350371
URL: https://svnweb.freebsd.org/changeset/base/350371
Log:
sfxge(4): unify power of 2 alignment check macro
Substitute driver-defined IS_P2ALIGNED() with EFX_IS_P2ALIGNED()
defined in libefx.
Add type argument and cast value and alignment to one specified type.
Reported by:Andrea Valsania
Reviewed by:philip
Sponsored by: Solarflare Communications, Inc.
MFC after: 2 days
Differential Revision: https://reviews.freebsd.org/D21076
Modified:
head/sys/dev/sfxge/common/ef10_rx.c
head/sys/dev/sfxge/common/efsys.h
head/sys/dev/sfxge/common/efx.h
Modified: head/sys/dev/sfxge/common/ef10_rx.c
==
--- head/sys/dev/sfxge/common/ef10_rx.c Sat Jul 27 09:36:36 2019
(r350370)
+++ head/sys/dev/sfxge/common/ef10_rx.c Sat Jul 27 09:36:45 2019
(r350371)
@@ -1131,12 +1131,12 @@ ef10_rx_qcreate(
rc = ENOTSUP;
goto fail9;
}
- if (!IS_P2ALIGNED(es_max_dma_len,
+ if (!EFX_IS_P2ALIGNED(uint32_t, es_max_dma_len,
EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) {
rc = EINVAL;
goto fail10;
}
- if (!IS_P2ALIGNED(es_buf_stride,
+ if (!EFX_IS_P2ALIGNED(uint32_t, es_buf_stride,
EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) {
rc = EINVAL;
goto fail11;
Modified: head/sys/dev/sfxge/common/efsys.h
==
--- head/sys/dev/sfxge/common/efsys.h Sat Jul 27 09:36:36 2019
(r350370)
+++ head/sys/dev/sfxge/common/efsys.h Sat Jul 27 09:36:45 2019
(r350371)
@@ -84,10 +84,6 @@ extern "C" {
#defineB_TRUE TRUE
#endif
-#ifndef IS_P2ALIGNED
-#defineIS_P2ALIGNED(v, a) uintptr_t)(v)) & ((uintptr_t)(a) -
1)) == 0)
-#endif
-
#ifndef IS2P
#defineISP2(x) (((x) & ((x) - 1)) == 0)
#endif
@@ -375,7 +371,8 @@ typedef struct efsys_mem_s {
uint32_t *addr; \
\
_NOTE(CONSTANTCONDITION)\
- KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_dword_t)),\
+ KASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \
+ sizeof (efx_dword_t)), \
("not power of 2 aligned"));\
\
addr = (void *)((_esmp)->esm_base + (_offset)); \
@@ -394,7 +391,8 @@ typedef struct efsys_mem_s {
uint64_t *addr; \
\
_NOTE(CONSTANTCONDITION)\
- KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t)),\
+ KASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \
+ sizeof (efx_qword_t)), \
("not power of 2 aligned"));\
\
addr = (void *)((_esmp)->esm_base + (_offset)); \
@@ -413,7 +411,8 @@ typedef struct efsys_mem_s {
uint32_t *addr; \
\
_NOTE(CONSTANTCONDITION)\
- KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t)),\
+ KASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \
+ sizeof (efx_qword_t)), \
("not power of 2 aligned"));\
\
addr = (void *)((_esmp)->esm_base + (_offset)); \
@@ -435,7 +434,8 @@ typedef struct efsys_mem_s {
uint64_t *addr; \
\
_NOTE(CONSTANTCONDITION)\
- KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_oword_t)),\
+ KASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \
+ sizeof (efx_oword_t)), \
("not power of 2 aligned"));\
\
addr = (
svn commit: r350370 - head/sys/dev/sfxge/common
Author: arybchik
Date: Sat Jul 27 09:36:36 2019
New Revision: 350370
URL: https://svnweb.freebsd.org/changeset/base/350370
Log:
sfxge(4): fix align to power of 2 when align has smaller type
Substitute driver-defined P2ALIGN() with EFX_P2ALIGN() defined in
libefx.
Cast value and alignment to one specified type to guarantee result
correctness.
Reported by:Andrea Valsania
Reviewed by: philip
Sponsored by: Solarflare Communications, Inc.
MFC after: 2 days
Differential Revision: https://reviews.freebsd.org/D21075
Modified:
head/sys/dev/sfxge/common/ef10_rx.c
head/sys/dev/sfxge/common/efsys.h
head/sys/dev/sfxge/common/efx.h
Modified: head/sys/dev/sfxge/common/ef10_rx.c
==
--- head/sys/dev/sfxge/common/ef10_rx.c Sat Jul 27 09:36:27 2019
(r350369)
+++ head/sys/dev/sfxge/common/ef10_rx.c Sat Jul 27 09:36:36 2019
(r350370)
@@ -869,7 +869,7 @@ ef10_rx_qpush(
efx_dword_t dword;
/* Hardware has alignment restriction for WPTR */
- wptr = P2ALIGN(added, EF10_RX_WPTR_ALIGN);
+ wptr = EFX_P2ALIGN(unsigned int, added, EF10_RX_WPTR_ALIGN);
if (pushed == wptr)
return;
Modified: head/sys/dev/sfxge/common/efsys.h
==
--- head/sys/dev/sfxge/common/efsys.h Sat Jul 27 09:36:27 2019
(r350369)
+++ head/sys/dev/sfxge/common/efsys.h Sat Jul 27 09:36:36 2019
(r350370)
@@ -88,10 +88,6 @@ extern "C" {
#defineIS_P2ALIGNED(v, a) uintptr_t)(v)) & ((uintptr_t)(a) -
1)) == 0)
#endif
-#ifndef P2ALIGN
-#defineP2ALIGN(_x, _a) ((_x) & -(_a))
-#endif
-
#ifndef IS2P
#defineISP2(x) (((x) & ((x) - 1)) == 0)
#endif
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Sat Jul 27 09:36:27 2019
(r350369)
+++ head/sys/dev/sfxge/common/efx.h Sat Jul 27 09:36:36 2019
(r350370)
@@ -60,6 +60,10 @@ extern "C" {
#defineEFX_P2ROUNDUP(_type, _value, _align)\
(-(-(_type)(_value) & -(_type)(_align)))
+/* Align value down to the nearest power of two. */
+#defineEFX_P2ALIGN(_type, _value, _align) \
+ ((_type)(_value) & -(_type)(_align))
+
/* Return codes */
typedef __success(return == 0) int efx_rc_t;
___
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svn commit: r350369 - in head/sys/dev/sfxge: . common
Author: arybchik
Date: Sat Jul 27 09:36:27 2019
New Revision: 350369
URL: https://svnweb.freebsd.org/changeset/base/350369
Log:
sfxge(4): fix power of 2 round up when align has smaller type
Substitute driver-defined P2ROUNDUP() h with EFX_P2ROUNDUP()
defined in libefx.
Cast value and alignment to one specified type to guarantee result
correctness.
Reported by: Andrea Valsania
Reviewed by:philip
Sponsored by: Solarflare Communications, Inc.
MFC after: 2 days
Differential Revision: https://reviews.freebsd.org/D21074
Modified:
head/sys/dev/sfxge/common/ef10_impl.h
head/sys/dev/sfxge/common/ef10_nvram.c
head/sys/dev/sfxge/common/ef10_rx.c
head/sys/dev/sfxge/common/efsys.h
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_mcdi.h
head/sys/dev/sfxge/common/efx_tx.c
head/sys/dev/sfxge/sfxge_port.c
head/sys/dev/sfxge/sfxge_rx.c
Modified: head/sys/dev/sfxge/common/ef10_impl.h
==
--- head/sys/dev/sfxge/common/ef10_impl.h Sat Jul 27 02:23:05 2019
(r350368)
+++ head/sys/dev/sfxge/common/ef10_impl.h Sat Jul 27 09:36:27 2019
(r350369)
@@ -1269,10 +1269,11 @@ efx_mcdi_set_nic_global(
#defineEFX_RX_PACKED_STREAM_RX_PREFIX_SIZE 8
/* Minimum space for packet in packed stream mode */
-#defineEFX_RX_PACKED_STREAM_MIN_PACKET_SPACE\
- P2ROUNDUP(EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE + \
- EFX_MAC_PDU_MIN +\
- EFX_RX_PACKED_STREAM_ALIGNMENT, \
+#defineEFX_RX_PACKED_STREAM_MIN_PACKET_SPACE \
+ EFX_P2ROUNDUP(size_t, \
+ EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE + \
+ EFX_MAC_PDU_MIN + \
+ EFX_RX_PACKED_STREAM_ALIGNMENT, \
EFX_RX_PACKED_STREAM_ALIGNMENT)
/* Maximum number of credits */
Modified: head/sys/dev/sfxge/common/ef10_nvram.c
==
--- head/sys/dev/sfxge/common/ef10_nvram.c Sat Jul 27 02:23:05 2019
(r350368)
+++ head/sys/dev/sfxge/common/ef10_nvram.c Sat Jul 27 09:36:27 2019
(r350369)
@@ -394,7 +394,8 @@ tlv_write(
if (len > 0) {
ptr[(len - 1) / sizeof (uint32_t)] = 0;
memcpy(ptr, data, len);
- ptr += P2ROUNDUP(len, sizeof (uint32_t)) / sizeof (*ptr);
+ ptr += EFX_P2ROUNDUP(uint32_t, len,
+ sizeof (uint32_t)) / sizeof (*ptr);
}
return (ptr);
Modified: head/sys/dev/sfxge/common/ef10_rx.c
==
--- head/sys/dev/sfxge/common/ef10_rx.c Sat Jul 27 02:23:05 2019
(r350368)
+++ head/sys/dev/sfxge/common/ef10_rx.c Sat Jul 27 09:36:27 2019
(r350369)
@@ -957,8 +957,9 @@ ef10_rx_qps_packet_info(
*lengthp = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_ORIG_LEN);
buf_len= EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_CAP_LEN);
- buf_len = P2ROUNDUP(buf_len + EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE,
- EFX_RX_PACKED_STREAM_ALIGNMENT);
+ buf_len = EFX_P2ROUNDUP(uint16_t,
+ buf_len + EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE,
+ EFX_RX_PACKED_STREAM_ALIGNMENT);
*next_offsetp =
current_offset + buf_len + EFX_RX_PACKED_STREAM_ALIGNMENT;
Modified: head/sys/dev/sfxge/common/efsys.h
==
--- head/sys/dev/sfxge/common/efsys.h Sat Jul 27 02:23:05 2019
(r350368)
+++ head/sys/dev/sfxge/common/efsys.h Sat Jul 27 09:36:27 2019
(r350369)
@@ -88,10 +88,6 @@ extern "C" {
#defineIS_P2ALIGNED(v, a) uintptr_t)(v)) & ((uintptr_t)(a) -
1)) == 0)
#endif
-#ifndef P2ROUNDUP
-#defineP2ROUNDUP(x, align) (-(-(x) & -(align)))
-#endif
-
#ifndef P2ALIGN
#defineP2ALIGN(_x, _a) ((_x) & -(_a))
#endif
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Sat Jul 27 02:23:05 2019
(r350368)
+++ head/sys/dev/sfxge/common/efx.h Sat Jul 27 09:36:27 2019
(r350369)
@@ -56,6 +56,10 @@ extern "C" {
/* The macro expands divider twice */
#defineEFX_DIV_ROUND_UP(_n, _d)(((_n) + (_d) - 1) /
(_d))
+/* Round value up to the nearest power of two. */
+#defineEFX_P2ROUNDUP(_type, _value, _align)\
+ (-(-(_type)(_value) & -(_type)(_align)))
+
/* Return codes */
typedef __success(return == 0) int efx_rc_t;
@@ -522,10 +526,10 @@ typedef enum efx_link_mode_e {
+ /* bug16011 */ 16)\
#defineEFX_MAC_PDU(_sdu)
svn commit: r341784 - head/sys/dev/sfxge
Author: arybchik
Date: Mon Dec 10 09:35:53 2018
New Revision: 341784
URL: https://svnweb.freebsd.org/changeset/base/341784
Log:
sfxge(4): prepare the number of Tx queues on event queue 0 to become variable
The number of Tx queues on event queue 0 can depend on the NIC family type,
and this property will be leveraged by future patches.
This patch prepares the code for this change.
Submitted by: Ivan Malov
Sponsored by: Solarflare Communications, Inc.
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D18389
Modified:
head/sys/dev/sfxge/sfxge.c
head/sys/dev/sfxge/sfxge_ev.c
head/sys/dev/sfxge/sfxge_tx.c
head/sys/dev/sfxge/sfxge_tx.h
Modified: head/sys/dev/sfxge/sfxge.c
==
--- head/sys/dev/sfxge/sfxge.c Mon Dec 10 09:35:45 2018(r341783)
+++ head/sys/dev/sfxge/sfxge.c Mon Dec 10 09:35:53 2018(r341784)
@@ -151,8 +151,8 @@ sfxge_estimate_rsrc_limits(struct sfxge_softc *sc)
limits.edl_min_evq_count = 1;
limits.edl_max_evq_count = evq_max;
- limits.edl_min_txq_count = SFXGE_TXQ_NTYPES;
- limits.edl_max_txq_count = evq_max + SFXGE_TXQ_NTYPES - 1;
+ limits.edl_min_txq_count = SFXGE_EVQ0_N_TXQ(sc);
+ limits.edl_max_txq_count = evq_max + SFXGE_EVQ0_N_TXQ(sc) - 1;
limits.edl_min_rxq_count = 1;
limits.edl_max_rxq_count = evq_max;
@@ -168,12 +168,12 @@ sfxge_estimate_rsrc_limits(struct sfxge_softc *sc)
return (rc);
}
- KASSERT(txq_allocated >= SFXGE_TXQ_NTYPES,
- ("txq_allocated < SFXGE_TXQ_NTYPES"));
+ KASSERT(txq_allocated >= SFXGE_EVQ0_N_TXQ(sc),
+ ("txq_allocated < %u", SFXGE_EVQ0_N_TXQ(sc)));
sc->evq_max = MIN(evq_allocated, evq_max);
sc->evq_max = MIN(rxq_allocated, sc->evq_max);
- sc->evq_max = MIN(txq_allocated - (SFXGE_TXQ_NTYPES - 1),
+ sc->evq_max = MIN(txq_allocated - (SFXGE_EVQ0_N_TXQ(sc) - 1),
sc->evq_max);
KASSERT(sc->evq_max <= evq_max,
@@ -205,7 +205,7 @@ sfxge_set_drv_limits(struct sfxge_softc *sc)
limits.edl_min_evq_count = limits.edl_max_evq_count =
sc->intr.n_alloc;
limits.edl_min_txq_count = limits.edl_max_txq_count =
- sc->intr.n_alloc + SFXGE_TXQ_NTYPES - 1;
+ sc->intr.n_alloc + SFXGE_EVQ0_N_TXQ(sc) - 1;
limits.edl_min_rxq_count = limits.edl_max_rxq_count =
sc->intr.n_alloc;
Modified: head/sys/dev/sfxge/sfxge_ev.c
==
--- head/sys/dev/sfxge/sfxge_ev.c Mon Dec 10 09:35:45 2018
(r341783)
+++ head/sys/dev/sfxge/sfxge_ev.c Mon Dec 10 09:35:53 2018
(r341784)
@@ -269,9 +269,10 @@ sfxge_get_txq_by_label(struct sfxge_evq *evq, enum sfx
{
unsigned int index;
- KASSERT((evq->index == 0 && label < SFXGE_TXQ_NTYPES) ||
+ KASSERT((evq->index == 0 && label < SFXGE_EVQ0_N_TXQ(evq->sc)) ||
(label == SFXGE_TXQ_IP_TCP_UDP_CKSUM), ("unexpected txq label"));
- index = (evq->index == 0) ? label : (evq->index - 1 + SFXGE_TXQ_NTYPES);
+ index = (evq->index == 0) ?
+ label : (evq->index - 1 + SFXGE_EVQ0_N_TXQ(evq->sc));
return (evq->sc->txq[index]);
}
Modified: head/sys/dev/sfxge/sfxge_tx.c
==
--- head/sys/dev/sfxge/sfxge_tx.c Mon Dec 10 09:35:45 2018
(r341783)
+++ head/sys/dev/sfxge/sfxge_tx.c Mon Dec 10 09:35:53 2018
(r341784)
@@ -1973,7 +1973,7 @@ sfxge_tx_init(struct sfxge_softc *sc)
goto fail_tx_dpl_put_max;
}
- sc->txq_count = SFXGE_TXQ_NTYPES - 1 + sc->intr.n_alloc;
+ sc->txq_count = SFXGE_EVQ0_N_TXQ(sc) - 1 + sc->intr.n_alloc;
sc->tso_fw_assisted = sfxge_tso_fw_assisted;
if ((~encp->enc_features & EFX_FEATURE_FW_ASSISTED_TSO) ||
@@ -2002,9 +2002,9 @@ sfxge_tx_init(struct sfxge_softc *sc)
goto fail2;
for (index = 0;
-index < sc->txq_count - SFXGE_TXQ_NTYPES + 1;
+index < sc->txq_count - SFXGE_EVQ0_N_TXQ(sc) + 1;
index++) {
- if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_NTYPES - 1 + index,
+ if ((rc = sfxge_tx_qinit(sc, SFXGE_EVQ0_N_TXQ(sc) - 1 + index,
SFXGE_TXQ_IP_TCP_UDP_CKSUM, index)) != 0)
goto fail3;
}
Modified: head/sys/dev/sfxge/sfxge_tx.h
==
--- head/sys/dev/sfxge/sfxge_tx.h Mon Dec 10 09:35:45 2018
(r341783)
+++ head/sys/dev/sfxge/sfxge_tx.h Mon Dec 10 09:35:53 2018
(r341784)
@@ -139,6 +139,8 @@ enum sfxge_txq_type {
SFXGE_TXQ_NTYPES
};
+#defineSFXGE_EVQ0_N_TXQ(_sc) SFXGE_TXQ_NTYPES
+
#defineSFXGE_
svn commit: r341785 - head/sys/dev/sfxge
Author: arybchik
Date: Mon Dec 10 09:36:05 2018
New Revision: 341785
URL: https://svnweb.freebsd.org/changeset/base/341785
Log:
sfxge(4): use n Tx queues instead of n + 2 on EF10 HW
On EF10 HW we can avoid sending packets without checksum offload
or with IP-only checksum offload to dedicated queues. Instead, we
can use option descriptors to change offload policy on any queue
during runtime. Thus, we don't need to create two dedicated queues.
Submitted by: Ivan Malov
Sponsored by: Solarflare Communications, Inc.
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D18390
Modified:
head/sys/dev/sfxge/sfxge.c
head/sys/dev/sfxge/sfxge.h
head/sys/dev/sfxge/sfxge_ev.c
head/sys/dev/sfxge/sfxge_tx.c
head/sys/dev/sfxge/sfxge_tx.h
Modified: head/sys/dev/sfxge/sfxge.c
==
--- head/sys/dev/sfxge/sfxge.c Mon Dec 10 09:35:53 2018(r341784)
+++ head/sys/dev/sfxge/sfxge.c Mon Dec 10 09:36:05 2018(r341785)
@@ -762,6 +762,11 @@ sfxge_create(struct sfxge_softc *sc)
}
sc->rxq_entries = sfxge_rx_ring_entries;
+ if (efx_nic_cfg_get(enp)->enc_features & EFX_FEATURE_TXQ_CKSUM_OP_DESC)
+ sc->txq_dynamic_cksum_toggle_supported = B_TRUE;
+ else
+ sc->txq_dynamic_cksum_toggle_supported = B_FALSE;
+
if (!ISP2(sfxge_tx_ring_entries) ||
(sfxge_tx_ring_entries < EFX_TXQ_MINNDESCS) ||
(sfxge_tx_ring_entries > efx_nic_cfg_get(enp)->enc_txq_max_ndescs))
{
Modified: head/sys/dev/sfxge/sfxge.h
==
--- head/sys/dev/sfxge/sfxge.h Mon Dec 10 09:35:53 2018(r341784)
+++ head/sys/dev/sfxge/sfxge.h Mon Dec 10 09:36:05 2018(r341785)
@@ -294,6 +294,8 @@ struct sfxge_softc {
efx_nic_t *enp;
efsys_lock_tenp_lock;
+ boolean_t txq_dynamic_cksum_toggle_supported;
+
unsigned intrxq_entries;
unsigned inttxq_entries;
Modified: head/sys/dev/sfxge/sfxge_ev.c
==
--- head/sys/dev/sfxge/sfxge_ev.c Mon Dec 10 09:35:53 2018
(r341784)
+++ head/sys/dev/sfxge/sfxge_ev.c Mon Dec 10 09:36:05 2018
(r341785)
@@ -269,8 +269,11 @@ sfxge_get_txq_by_label(struct sfxge_evq *evq, enum sfx
{
unsigned int index;
- KASSERT((evq->index == 0 && label < SFXGE_EVQ0_N_TXQ(evq->sc)) ||
- (label == SFXGE_TXQ_IP_TCP_UDP_CKSUM), ("unexpected txq label"));
+ KASSERT((evq->sc->txq_dynamic_cksum_toggle_supported) ? (label == 0) :
+ ((evq->index == 0 && label < SFXGE_TXQ_NTYPES) ||
+(label == SFXGE_TXQ_IP_TCP_UDP_CKSUM)),
+ ("unexpected txq label"));
+
index = (evq->index == 0) ?
label : (evq->index - 1 + SFXGE_EVQ0_N_TXQ(evq->sc));
return (evq->sc->txq[index]);
Modified: head/sys/dev/sfxge/sfxge_tx.c
==
--- head/sys/dev/sfxge/sfxge_tx.c Mon Dec 10 09:35:53 2018
(r341784)
+++ head/sys/dev/sfxge/sfxge_tx.c Mon Dec 10 09:36:05 2018
(r341785)
@@ -35,7 +35,7 @@
/* Theory of operation:
*
- * Tx queues allocation and mapping
+ * Tx queues allocation and mapping on Siena
*
* One Tx queue with enabled checksum offload is allocated per Rx channel
* (event queue). Also 2 Tx queues (one without checksum offload and one
@@ -46,6 +46,17 @@
* if event queue index is 0, TxQ-index = TxQ-label * [0..SFXGE_TXQ_NTYPES)
* else TxQ-index = SFXGE_TXQ_NTYPES + EvQ-index - 1
* See sfxge_get_txq_by_label() sfxge_ev.c
+ *
+ * Tx queue allocation and mapping on EF10
+ *
+ * One Tx queue with enabled checksum offload is allocated per Rx
+ * channel (event queue). Checksum offload on all Tx queues is enabled or
+ * disabled dynamically by inserting option descriptors, so the additional
+ * queues used on Siena are not required.
+ *
+ * TxQ label is always set to zero on EF10 hardware.
+ * So, event queue to Tx queue mapping is simple:
+ * TxQ-index = EvQ-index
*/
#include
@@ -139,38 +150,75 @@ static void sfxge_tx_qlist_post(struct sfxge_txq *txq)
static void sfxge_tx_qunblock(struct sfxge_txq *txq);
static int sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf,
const bus_dma_segment_t *dma_seg, int n_dma_seg,
- int vlan_tagged);
+ int n_extra_descs);
+static inline void
+sfxge_next_stmp(struct sfxge_txq *txq, struct sfxge_tx_mapping **pstmp)
+{
+ KASSERT((*pstmp)->flags == 0, ("stmp flags are not 0"));
+ if (__predict_false(*pstmp ==
+ &txq->stmp[txq->ptr_mask]))
+
svn commit: r341783 - head/sys/dev/sfxge/common
Author: arybchik
Date: Mon Dec 10 09:35:45 2018
New Revision: 341783
URL: https://svnweb.freebsd.org/changeset/base/341783
Log:
sfxge(4): report support for Tx checksum op descriptors
FreeBSD driver needs a patch to provide a means for packets
which do not need checksum offload but have flow ID set
to avoid hitting only the first Tx queue (which has been used
for packets not needing checksum offload).
This should be possible on Huntington, Medford or Medford2 chips
since these support toggling checksum offload on any given queue
dynamically by means of pushing option descriptors.
The patch for FreeBSD driver will then need a means to figure out
whether the feature can be used, and testing adapter family might
not be a good solution.
This patch adds a feature bit specifically to indicate support
for checksum option descriptors. The new feature bits may have
more users in future, apart from the mentioned FreeBSD patch.
Submitted by: Ivan Malov
Sponsored by: Solarflare Communications, Inc.
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D18388
Modified:
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_nic.c
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Mon Dec 10 09:35:33 2018
(r341782)
+++ head/sys/dev/sfxge/common/efx.h Mon Dec 10 09:35:45 2018
(r341783)
@@ -1261,6 +1261,7 @@ efx_bist_stop(
#defineEFX_FEATURE_FW_ASSISTED_TSO 0x1000
#defineEFX_FEATURE_FW_ASSISTED_TSO_V2 0x2000
#defineEFX_FEATURE_PACKED_STREAM 0x4000
+#defineEFX_FEATURE_TXQ_CKSUM_OP_DESC 0x8000
typedef enum efx_tunnel_protocol_e {
EFX_TUNNEL_PROTOCOL_NONE = 0,
Modified: head/sys/dev/sfxge/common/efx_nic.c
==
--- head/sys/dev/sfxge/common/efx_nic.c Mon Dec 10 09:35:33 2018
(r341782)
+++ head/sys/dev/sfxge/common/efx_nic.c Mon Dec 10 09:35:45 2018
(r341783)
@@ -257,7 +257,8 @@ efx_nic_create(
EFX_FEATURE_PIO_BUFFERS |
EFX_FEATURE_FW_ASSISTED_TSO |
EFX_FEATURE_FW_ASSISTED_TSO_V2 |
- EFX_FEATURE_PACKED_STREAM;
+ EFX_FEATURE_PACKED_STREAM |
+ EFX_FEATURE_TXQ_CKSUM_OP_DESC;
break;
#endif /* EFSYS_OPT_HUNTINGTON */
@@ -277,7 +278,8 @@ efx_nic_create(
EFX_FEATURE_MCDI_DMA |
EFX_FEATURE_PIO_BUFFERS |
EFX_FEATURE_FW_ASSISTED_TSO_V2 |
- EFX_FEATURE_PACKED_STREAM;
+ EFX_FEATURE_PACKED_STREAM |
+ EFX_FEATURE_TXQ_CKSUM_OP_DESC;
break;
#endif /* EFSYS_OPT_MEDFORD */
@@ -293,7 +295,8 @@ efx_nic_create(
EFX_FEATURE_MCDI_DMA |
EFX_FEATURE_PIO_BUFFERS |
EFX_FEATURE_FW_ASSISTED_TSO_V2 |
- EFX_FEATURE_PACKED_STREAM;
+ EFX_FEATURE_PACKED_STREAM |
+ EFX_FEATURE_TXQ_CKSUM_OP_DESC;
break;
#endif /* EFSYS_OPT_MEDFORD2 */
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svn commit: r341782 - head/sys/dev/sfxge
Author: arybchik
Date: Mon Dec 10 09:35:33 2018
New Revision: 341782
URL: https://svnweb.freebsd.org/changeset/base/341782
Log:
sfxge(4): populate per-event queue stats in sysctl
In order to find out why the first event queue and corresponding
interrupt is triggered more frequent, it is useful to know which
events go to each event queue.
Sponsored by: Solarflare Communications, Inc.
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D18418
Modified:
head/sys/dev/sfxge/sfxge.h
head/sys/dev/sfxge/sfxge_ev.c
Modified: head/sys/dev/sfxge/sfxge.h
==
--- head/sys/dev/sfxge/sfxge.h Mon Dec 10 04:16:40 2018(r341781)
+++ head/sys/dev/sfxge/sfxge.h Mon Dec 10 09:35:33 2018(r341782)
@@ -184,6 +184,10 @@ struct sfxge_evq {
unsigned intbuf_base_id;
unsigned intentries;
charlock_name[SFXGE_LOCK_NAME_MAX];
+#if EFSYS_OPT_QSTATS
+ clock_t stats_update_time;
+ uint64_tstats[EV_NQSTATS];
+#endif
} __aligned(CACHE_LINE_SIZE);
#defineSFXGE_NDESCS1024
@@ -275,6 +279,9 @@ struct sfxge_softc {
struct ifnet*ifnet;
unsigned intif_flags;
struct sysctl_oid *stats_node;
+#if EFSYS_OPT_QSTATS
+ struct sysctl_oid *evqs_stats_node;
+#endif
struct sysctl_oid *txqs_node;
struct task task_reset;
Modified: head/sys/dev/sfxge/sfxge_ev.c
==
--- head/sys/dev/sfxge/sfxge_ev.c Mon Dec 10 04:16:40 2018
(r341781)
+++ head/sys/dev/sfxge/sfxge_ev.c Mon Dec 10 09:35:33 2018
(r341782)
@@ -443,29 +443,94 @@ sfxge_ev_wake_up(void *arg, uint32_t index)
#if EFSYS_OPT_QSTATS
static void
+sfxge_evq_stat_update(struct sfxge_evq *evq)
+{
+ clock_t now;
+
+ SFXGE_EVQ_LOCK(evq);
+
+ if (__predict_false(evq->init_state != SFXGE_EVQ_STARTED))
+ goto out;
+
+ now = ticks;
+ if ((unsigned int)(now - evq->stats_update_time) < (unsigned int)hz)
+ goto out;
+
+ evq->stats_update_time = now;
+ efx_ev_qstats_update(evq->common, evq->stats);
+
+out:
+ SFXGE_EVQ_UNLOCK(evq);
+}
+
+static int
+sfxge_evq_stat_handler(SYSCTL_HANDLER_ARGS)
+{
+ struct sfxge_evq *evq = arg1;
+ struct sfxge_softc *sc = evq->sc;
+ unsigned int id = arg2;
+
+ SFXGE_ADAPTER_LOCK(sc);
+
+ sfxge_evq_stat_update(evq);
+
+ SFXGE_ADAPTER_UNLOCK(sc);
+
+ return (SYSCTL_OUT(req, &evq->stats[id], sizeof(evq->stats[id])));
+}
+
+static int
+sfxge_evq_stat_init(struct sfxge_evq *evq)
+{
+ struct sfxge_softc *sc = evq->sc;
+ struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
+ char name[16];
+ struct sysctl_oid *evq_stats_node;
+ unsigned int id;
+
+ snprintf(name, sizeof(name), "%u", evq->index);
+ evq_stats_node = SYSCTL_ADD_NODE(ctx,
+SYSCTL_CHILDREN(sc->evqs_stats_node),
+OID_AUTO, name, CTLFLAG_RD, NULL, "");
+ if (evq_stats_node == NULL)
+ return (ENOMEM);
+
+ for (id = 0; id < EV_NQSTATS; id++) {
+ SYSCTL_ADD_PROC(
+ ctx, SYSCTL_CHILDREN(evq_stats_node),
+ OID_AUTO, efx_ev_qstat_name(sc->enp, id),
+ CTLTYPE_U64|CTLFLAG_RD,
+ evq, id, sfxge_evq_stat_handler, "Q",
+ "");
+ }
+
+ return (0);
+}
+
+static void
sfxge_ev_stat_update(struct sfxge_softc *sc)
{
struct sfxge_evq *evq;
unsigned int index;
clock_t now;
+ unsigned int id;
SFXGE_ADAPTER_LOCK(sc);
- if (__predict_false(sc->evq[0]->init_state != SFXGE_EVQ_STARTED))
- goto out;
-
now = ticks;
if ((unsigned int)(now - sc->ev_stats_update_time) < (unsigned int)hz)
goto out;
sc->ev_stats_update_time = now;
- /* Add event counts from each event queue in turn */
+ memset(sc->ev_stats, 0, sizeof(sc->ev_stats));
+
+ /* Update and add event counts from each event queue in turn */
for (index = 0; index < sc->evq_count; index++) {
evq = sc->evq[index];
- SFXGE_EVQ_LOCK(evq);
- efx_ev_qstats_update(evq->common, sc->ev_stats);
- SFXGE_EVQ_UNLOCK(evq);
+ sfxge_evq_stat_update(evq);
+ for (id = 0; id < EV_NQSTATS; id++)
+ sc->ev_stats[id] += evq->stats[id];
}
out:
SFXGE_ADAPTER_UNLOCK(sc);
@@ -672,7 +737,7 @@ sfxge_ev_qstop(struct sfxge_softc *sc, unsigned int in
#if EFSYS_OPT_QS
Re: svn commit: r341327 - head/sys/dev/sfxge
On 30.11.2018 22:01, Philip Paeps wrote: On 2018-11-30 19:36:27 (+0100), John Baldwin wrote: On 11/30/18 10:15 AM, Andrew Rybchenko wrote: On 30.11.2018 20:30, John Baldwin wrote: On 11/29/18 11:11 PM, Andrew Rybchenko wrote: Author: arybchik Date: Fri Nov 30 07:11:05 2018 New Revision: 341327 URL: https://svnweb.freebsd.org/changeset/base/341327 Log: sfxge(4): rollback last seen VLAN TCI if Tx packet is dropped Early processing of a packet on transmit may change last seen VLAN TCI in the queue context. If such a packet is eventually dropped, last seen VLAN TCI must be set to its previous value. Submitted by: Ivan Malov Sponsored by: Solarflare Communications, Inc. MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D18288 Just as a general comment. There's no point in creating a review in phabricator if you aren't going to get any actual review feedback via the tool. That just adds noise. (I've spotchecked a few of the recent sfxge commits and they all seem to create a review that then gets committed a few hours later without any feedback, etc.) All these changesets is the result of development in Solarflare. All these changesets were reviewed internally and in fact many have later fixes which are simply squashed in. We have discussed it with George (gnn@) some time ago and he asked to submit reviews anyway and wait at least a day or two before commit. Yes in this particular case these 2 hundreds of patches is the result of 2 years of development. So, I'd waited some time and started to commit in blocks. This time I've not included np@ and bz@ in reviewers since I've not got reviewed before and it would be too much spam. We have discussed it with Philip (philip@) shortly. As I understand he has no time now to review it. Basically I'm ready to follow any sensible policy. I don't think it makes to wait forever. If there are any volunteers I'll be happy to include more people in reviewers. I don't think you have to wait forever, and if the changes were reviewed internally that counts for review, I just don't want to add noise and clutter to phabricator and commit logs. I think it makes sense to have Phabricator reviews for the FreeBSD-specific parts of sfxge(4). Yes, I think it would be very-very useful. The internal review at Solarflare is definitely good enough to commit without waiting for review -- certainly on the parts of the driver that are generated from the common source -- but there is some value to having the FreeBSD-specific bits sit in Phabricator for a few days. Makes sense. Two FreeBSD-specific are waiting right now :) The storm of commits in the last week is exceptional because it represents two years of changes. With hindsight, just bulk-committing those to Subversion would have been a better idea. I think it is still useful for the project to have more granular changes. At least it easier to understand in the future motivation of these changes etc. Not a strong opinion as well, but I'd prefer to keep these changes as is (except squashing fixes as I do to avoid known breakages in the middle). In the future though, and when in the steady state of commits trickling in rather than flooding in, I still appreciate the reviews in Phabricator. Particularly for the FreeBSD-specific parts of the driver. I can't promise, but I'll try to avoid so huge delays in the future. I'm trying to submit when I'm more confident that changes are stable and probability of problems is less. Andrew. ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r341327 - head/sys/dev/sfxge
On 30.11.2018 21:54, Brooks Davis wrote: On Fri, Nov 30, 2018 at 09:15:39PM +0300, Andrew Rybchenko wrote: On 30.11.2018 20:30, John Baldwin wrote: On 11/29/18 11:11 PM, Andrew Rybchenko wrote: Author: arybchik Date: Fri Nov 30 07:11:05 2018 New Revision: 341327 URL: https://svnweb.freebsd.org/changeset/base/341327 Log: sfxge(4): rollback last seen VLAN TCI if Tx packet is dropped Early processing of a packet on transmit may change last seen VLAN TCI in the queue context. If such a packet is eventually dropped, last seen VLAN TCI must be set to its previous value. Submitted by: Ivan Malov Sponsored by: Solarflare Communications, Inc. MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D18288 Just as a general comment. There's no point in creating a review in phabricator if you aren't going to get any actual review feedback via the tool. That just adds noise. (I've spotchecked a few of the recent sfxge commits and they all seem to create a review that then gets committed a few hours later without any feedback, etc.) All these changesets is the result of development in Solarflare. All these changesets were reviewed internally and in fact many have later fixes which are simply squashed in. We have discussed it with George (gnn@) some time ago and he asked to submit reviews anyway and wait at least a day or two before commit. Yes in this particular case these 2 hundreds of patches is the result of 2 years of development. So, I'd waited some time and started to commit in blocks. This time I've not included np@ and bz@ in reviewers since I've not got reviewed before and it would be too much spam. We have discussed it with Philip (philip@) shortly. As I understand he has no time now to review it. Basically I'm ready to follow any sensible policy. I don't think it makes to wait forever. If there are any volunteers I'll be happy to include more people in reviewers. You can't just throw things in phab and hope someone reviews them. If you want then to be reviewed you need to work to have the reviewed. That's true regardless of technology. In this case, it seems pretty clear they have been reviewed within Solarflare so I don't think they really need to be reviewed within FreeBSD processes before they land so long as they are well tested and don't break the build. It makes sense. As I understand the argument from George was just give it a chance to be reviewed within FreeBSD process. Andrew. ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r341327 - head/sys/dev/sfxge
Hi Conrad, On 30.11.2018 21:35, Conrad Meyer wrote: On Fri, Nov 30, 2018 at 10:16 AM Andrew Rybchenko wrote: Basically I'm ready to follow any sensible policy. Hi Andrew, I think general policy is to not include a "Differential Revision:" line in a commit message unless there was actual review there. I've not heard about it and have not found it anywhere written. At least it is convenient to specify, since it closes the review request automatically and keeps the track. So, I think it is better to specify, but I have no strong opinion. (That's separate from the issue of creating a bunch of reviews that no one will ever look at — which is a different kind of spam.) Yes in this particular case these 2 hundreds of patches is the result of 2 years of development. Why are they being committed now, hundreds at a time, instead of as they were developed over the last two years? It is simple - had no time and had different priorities from SF. Also there are some benefits in delay - patches are more clear now since many fixes are squashed in. In any case I'll try to avoid so huge delays in the future. Andrew. ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r341327 - head/sys/dev/sfxge
On 30.11.2018 20:30, John Baldwin wrote: On 11/29/18 11:11 PM, Andrew Rybchenko wrote: Author: arybchik Date: Fri Nov 30 07:11:05 2018 New Revision: 341327 URL: https://svnweb.freebsd.org/changeset/base/341327 Log: sfxge(4): rollback last seen VLAN TCI if Tx packet is dropped Early processing of a packet on transmit may change last seen VLAN TCI in the queue context. If such a packet is eventually dropped, last seen VLAN TCI must be set to its previous value. Submitted by: Ivan Malov Sponsored by: Solarflare Communications, Inc. MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D18288 Just as a general comment. There's no point in creating a review in phabricator if you aren't going to get any actual review feedback via the tool. That just adds noise. (I've spotchecked a few of the recent sfxge commits and they all seem to create a review that then gets committed a few hours later without any feedback, etc.) All these changesets is the result of development in Solarflare. All these changesets were reviewed internally and in fact many have later fixes which are simply squashed in. We have discussed it with George (gnn@) some time ago and he asked to submit reviews anyway and wait at least a day or two before commit. Yes in this particular case these 2 hundreds of patches is the result of 2 years of development. So, I'd waited some time and started to commit in blocks. This time I've not included np@ and bz@ in reviewers since I've not got reviewed before and it would be too much spam. We have discussed it with Philip (philip@) shortly. As I understand he has no time now to review it. Basically I'm ready to follow any sensible policy. I don't think it makes to wait forever. If there are any volunteers I'll be happy to include more people in reviewers. Andrew. ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r341327 - head/sys/dev/sfxge
Author: arybchik
Date: Fri Nov 30 07:11:05 2018
New Revision: 341327
URL: https://svnweb.freebsd.org/changeset/base/341327
Log:
sfxge(4): rollback last seen VLAN TCI if Tx packet is dropped
Early processing of a packet on transmit may change last seen
VLAN TCI in the queue context. If such a packet is eventually
dropped, last seen VLAN TCI must be set to its previous value.
Submitted by: Ivan Malov
Sponsored by: Solarflare Communications, Inc.
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D18288
Modified:
head/sys/dev/sfxge/sfxge_tx.c
Modified: head/sys/dev/sfxge/sfxge_tx.c
==
--- head/sys/dev/sfxge/sfxge_tx.c Fri Nov 30 07:10:54 2018
(r341326)
+++ head/sys/dev/sfxge/sfxge_tx.c Fri Nov 30 07:11:05 2018
(r341327)
@@ -361,6 +361,7 @@ static int sfxge_tx_queue_mbuf(struct sfxge_txq *txq,
int rc;
int i;
int eop;
+ uint16_t hw_vlan_tci_prev;
int vlan_tagged;
KASSERT(!txq->blocked, ("txq->blocked"));
@@ -412,6 +413,8 @@ static int sfxge_tx_queue_mbuf(struct sfxge_txq *txq,
used_map = &stmp->map;
+ hw_vlan_tci_prev = txq->hw_vlan_tci;
+
vlan_tagged = sfxge_tx_maybe_insert_tag(txq, mbuf);
if (vlan_tagged) {
sfxge_next_stmp(txq, &stmp);
@@ -463,6 +466,7 @@ static int sfxge_tx_queue_mbuf(struct sfxge_txq *txq,
return (0);
reject_mapped:
+ txq->hw_vlan_tci = hw_vlan_tci_prev;
bus_dmamap_unload(txq->packet_dma_tag, *used_map);
reject:
/* Drop the packet on the floor. */
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svn commit: r341326 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:10:54 2018
New Revision: 341326
URL: https://svnweb.freebsd.org/changeset/base/341326
Log:
sfxge(4): ensure EvQ poll stops when abort is requested
If an event handler requested an abort, only the inner loop was
guarenteed to be broken out of - the outer loop could continue
if total == batch.
Fix this by poisoning batch to ensure it is different to total.
Submitted by: Mark Spender
Sponsored by: Solarflare Communications, Inc.
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D18287
Modified:
head/sys/dev/sfxge/common/efx_ev.c
Modified: head/sys/dev/sfxge/common/efx_ev.c
==
--- head/sys/dev/sfxge/common/efx_ev.c Fri Nov 30 07:10:43 2018
(r341325)
+++ head/sys/dev/sfxge/common/efx_ev.c Fri Nov 30 07:10:54 2018
(r341326)
@@ -509,6 +509,14 @@ efx_ev_qpoll(
if (should_abort) {
/* Ignore subsequent events */
total = index + 1;
+
+ /*
+* Poison batch to ensure the outer
+* loop is broken out of.
+*/
+ EFSYS_ASSERT(batch <= EFX_EV_BATCH);
+ batch += (EFX_EV_BATCH << 1);
+ EFSYS_ASSERT(total != batch);
break;
}
}
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svn commit: r341323 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:10:20 2018
New Revision: 341323
URL: https://svnweb.freebsd.org/changeset/base/341323
Log:
sfxge(4): correct annotations where NULL input is OK
Correct annotations where NULL input can be permitted
Submitted by: Richard Houldsworth
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18284
Modified:
head/sys/dev/sfxge/common/ef10_impl.h
head/sys/dev/sfxge/common/ef10_rx.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_intr.c
head/sys/dev/sfxge/common/efx_rx.c
Modified: head/sys/dev/sfxge/common/ef10_impl.h
==
--- head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:10:09 2018
(r341322)
+++ head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:10:20 2018
(r341323)
@@ -1038,7 +1038,7 @@ ef10_rx_qcreate(
__inunsigned int index,
__inunsigned int label,
__inefx_rxq_type_t type,
- __inconst union efx_rxq_type_data_u *type_data,
+ __in_optconst union efx_rxq_type_data_u *type_data,
__inefsys_mem_t *esmp,
__insize_t ndescs,
__inuint32_t id,
Modified: head/sys/dev/sfxge/common/ef10_rx.c
==
--- head/sys/dev/sfxge/common/ef10_rx.c Fri Nov 30 07:10:09 2018
(r341322)
+++ head/sys/dev/sfxge/common/ef10_rx.c Fri Nov 30 07:10:20 2018
(r341323)
@@ -1015,7 +1015,7 @@ ef10_rx_qcreate(
__inunsigned int index,
__inunsigned int label,
__inefx_rxq_type_t type,
- __inconst efx_rxq_type_data_t *type_data,
+ __in_optconst efx_rxq_type_data_t *type_data,
__inefsys_mem_t *esmp,
__insize_t ndescs,
__inuint32_t id,
@@ -1058,6 +1058,10 @@ ef10_rx_qcreate(
break;
#if EFSYS_OPT_RX_PACKED_STREAM
case EFX_RXQ_TYPE_PACKED_STREAM:
+ if (type_data == NULL) {
+ rc = EINVAL;
+ goto fail3;
+ }
switch (type_data->ertd_packed_stream.eps_buf_size) {
case EFX_RXQ_PACKED_STREAM_BUF_SIZE_1M:
ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M;
@@ -1076,12 +1080,16 @@ ef10_rx_qcreate(
break;
default:
rc = ENOTSUP;
- goto fail3;
+ goto fail4;
}
break;
#endif /* EFSYS_OPT_RX_PACKED_STREAM */
#if EFSYS_OPT_RX_ES_SUPER_BUFFER
case EFX_RXQ_TYPE_ES_SUPER_BUFFER:
+ if (type_data == NULL) {
+ rc = EINVAL;
+ goto fail5;
+ }
ps_buf_size = 0;
es_bufs_per_desc =
type_data->ertd_es_super_buffer.eessb_bufs_per_desc;
@@ -1095,7 +1103,7 @@ ef10_rx_qcreate(
#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
default:
rc = ENOTSUP;
- goto fail4;
+ goto fail6;
}
#if EFSYS_OPT_RX_PACKED_STREAM
@@ -1103,13 +,13 @@ ef10_rx_qcreate(
/* Check if datapath firmware supports packed stream mode */
if (encp->enc_rx_packed_stream_supported == B_FALSE) {
rc = ENOTSUP;
- goto fail5;
+ goto fail7;
}
/* Check if packed stream allows configurable buffer sizes */
if ((ps_buf_size != MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M) &&
(encp->enc_rx_var_packed_stream_supported == B_FALSE)) {
rc = ENOTSUP;
- goto fail6;
+ goto fail8;
}
}
#else /* EFSYS_OPT_RX_PACKED_STREAM */
@@ -1120,17 +1128,17 @@ ef10_rx_qcreate(
if (es_bufs_per_desc > 0) {
if (encp->enc_rx_es_super_buffer_supported == B_FALSE) {
rc = ENOTSUP;
- goto fail7;
+ goto fail9;
}
if (!IS_P2ALIGNED(es_max_dma_len,
EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) {
rc = EINVAL;
- goto fail8;
+ goto fail10;
}
if (!IS_P2ALIGNED(es_buf_stride,
EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) {
rc = EINVAL;
- goto fail9;
+ goto fail11;
}
}
#else /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
@@ -1152,7 +1160,7 @@ ef10_rx_qcreate(
esmp, disable_scatt
svn commit: r341320 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:09:46 2018
New Revision: 341320
URL: https://svnweb.freebsd.org/changeset/base/341320
Log:
sfxge(4): add accessor to whole link status
Add a function which makes an MCDI GET_LINK request and
packages up the results. Currently, the get-link function
is triggered from several entry points which then pass
on or store selected parts of the data. When the driver
needs to obtain the current link state, it is more
efficient to do this in a single call.
Submitted by: Richard Houldsworth
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18281
Modified:
head/sys/dev/sfxge/common/ef10_impl.h
head/sys/dev/sfxge/common/ef10_mac.c
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/ef10_phy.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_impl.h
head/sys/dev/sfxge/common/efx_phy.c
Modified: head/sys/dev/sfxge/common/ef10_impl.h
==
--- head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:09:34 2018
(r341319)
+++ head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:09:46 2018
(r341320)
@@ -619,11 +619,7 @@ ef10_nvram_buffer_finish(
/* PHY */
typedef struct ef10_link_state_s {
- uint32_tels_adv_cap_mask;
- uint32_tels_lp_cap_mask;
- unsigned intels_fcntl;
- efx_phy_fec_type_t els_fec;
- efx_link_mode_t els_link_mode;
+ efx_phy_link_state_tepls;
#if EFSYS_OPT_LOOPBACK
efx_loopback_type_t els_loopback;
#endif
@@ -660,9 +656,9 @@ ef10_phy_oui_get(
__out uint32_t *ouip);
extern __checkReturn efx_rc_t
-ef10_phy_fec_type_get(
+ef10_phy_link_state_get(
__inefx_nic_t *enp,
- __out efx_phy_fec_type_t *fecp);
+ __out efx_phy_link_state_t *eplsp);
#if EFSYS_OPT_PHY_STATS
Modified: head/sys/dev/sfxge/common/ef10_mac.c
==
--- head/sys/dev/sfxge/common/ef10_mac.cFri Nov 30 07:09:34 2018
(r341319)
+++ head/sys/dev/sfxge/common/ef10_mac.cFri Nov 30 07:09:46 2018
(r341320)
@@ -49,10 +49,10 @@ ef10_mac_poll(
if ((rc = ef10_phy_get_link(enp, &els)) != 0)
goto fail1;
- epp->ep_adv_cap_mask = els.els_adv_cap_mask;
- epp->ep_fcntl = els.els_fcntl;
+ epp->ep_adv_cap_mask = els.epls.epls_adv_cap_mask;
+ epp->ep_fcntl = els.epls.epls_fcntl;
- *link_modep = els.els_link_mode;
+ *link_modep = els.epls.epls_link_mode;
return (0);
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:09:34 2018
(r341319)
+++ head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:09:46 2018
(r341320)
@@ -1879,8 +1879,8 @@ ef10_nic_board_cfg(
/* Obtain the default PHY advertised capabilities */
if ((rc = ef10_phy_get_link(enp, &els)) != 0)
goto fail7;
- epp->ep_default_adv_cap_mask = els.els_adv_cap_mask;
- epp->ep_adv_cap_mask = els.els_adv_cap_mask;
+ epp->ep_default_adv_cap_mask = els.epls.epls_adv_cap_mask;
+ epp->ep_adv_cap_mask = els.epls.epls_adv_cap_mask;
/* Check capabilities of running datapath firmware */
if ((rc = ef10_get_datapath_caps(enp)) != 0)
Modified: head/sys/dev/sfxge/common/ef10_phy.c
==
--- head/sys/dev/sfxge/common/ef10_phy.cFri Nov 30 07:09:34 2018
(r341319)
+++ head/sys/dev/sfxge/common/ef10_phy.cFri Nov 30 07:09:46 2018
(r341320)
@@ -313,9 +313,9 @@ ef10_phy_get_link(
}
mcdi_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_CAP),
- &elsp->els_adv_cap_mask);
+ &elsp->epls.epls_adv_cap_mask);
mcdi_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_LP_CAP),
- &elsp->els_lp_cap_mask);
+ &elsp->epls.epls_lp_cap_mask);
if (req.emr_out_length_used < MC_CMD_GET_LINK_OUT_V2_LEN)
fec = MC_CMD_FEC_NONE;
@@ -325,9 +325,17 @@ ef10_phy_get_link(
mcdi_phy_decode_link_mode(enp, MCDI_OUT_DWORD(req, GET_LINK_OUT_FLAGS),
MCDI_OUT_DWORD(req, GET_LINK_OUT_LINK_SPEED),
MCDI_OUT_DWORD(req, GET_LINK_OUT_FCNTL),
- fec, &elsp->els_link_mode,
- &elsp->els_fcntl, &elsp->els_fec);
+ fec, &elsp->epls.epls_link_mode,
+ &elsp->epls.epls_fcntl, &elsp->epls.epls_fec);
+ if (req.emr_out_length_use
svn commit: r341322 - head/sys/dev/sfxge
Author: arybchik
Date: Fri Nov 30 07:10:09 2018
New Revision: 341322
URL: https://svnweb.freebsd.org/changeset/base/341322
Log:
sfxge(4): support new link modes in the driver
Submitted by: Andy Moreton
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18283
Modified:
head/sys/dev/sfxge/sfxge_port.c
Modified: head/sys/dev/sfxge/sfxge_port.c
==
--- head/sys/dev/sfxge/sfxge_port.c Fri Nov 30 07:09:58 2018
(r341321)
+++ head/sys/dev/sfxge/sfxge_port.c Fri Nov 30 07:10:09 2018
(r341322)
@@ -308,7 +308,10 @@ static const uint64_t sfxge_link_baudrate[EFX_LINK_NMO
[EFX_LINK_1000HDX] = IF_Gbps(1),
[EFX_LINK_1000FDX] = IF_Gbps(1),
[EFX_LINK_1FDX] = IF_Gbps(10),
+ [EFX_LINK_25000FDX] = IF_Gbps(25),
[EFX_LINK_4FDX] = IF_Gbps(40),
+ [EFX_LINK_5FDX] = IF_Gbps(50),
+ [EFX_LINK_10FDX]= IF_Gbps(100),
};
void
@@ -836,12 +839,16 @@ static const int sfxge_link_mode[EFX_PHY_MEDIA_NTYPES]
[EFX_PHY_MEDIA_QSFP_PLUS] = {
/* Don't know the module type, but assume SR for now. */
[EFX_LINK_1FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR,
+ [EFX_LINK_25000FDX] = IFM_ETHER | IFM_FDX | IFM_25G_SR,
[EFX_LINK_4FDX] = IFM_ETHER | IFM_FDX | IFM_40G_CR4,
+ [EFX_LINK_5FDX] = IFM_ETHER | IFM_FDX | IFM_50G_SR,
+ [EFX_LINK_10FDX]= IFM_ETHER | IFM_FDX | IFM_100G_SR2,
},
[EFX_PHY_MEDIA_SFP_PLUS] = {
/* Don't know the module type, but assume SX/SR for now. */
[EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_SX,
[EFX_LINK_1FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR,
+ [EFX_LINK_25000FDX] = IFM_ETHER | IFM_FDX | IFM_25G_SR,
},
[EFX_PHY_MEDIA_BASE_T] = {
[EFX_LINK_10HDX]= IFM_ETHER | IFM_HDX | IFM_10_T,
@@ -897,8 +904,14 @@ sfxge_link_mode_to_phy_cap(efx_link_mode_t mode)
return (EFX_PHY_CAP_1000FDX);
case EFX_LINK_1FDX:
return (EFX_PHY_CAP_1FDX);
+ case EFX_LINK_25000FDX:
+ return (EFX_PHY_CAP_25000FDX);
case EFX_LINK_4FDX:
return (EFX_PHY_CAP_4FDX);
+ case EFX_LINK_5FDX:
+ return (EFX_PHY_CAP_5FDX);
+ case EFX_LINK_10FDX:
+ return (EFX_PHY_CAP_10FDX);
default:
return (EFX_PHY_CAP_INVALID);
}
___
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svn commit: r341325 - in head: share/man/man4 sys/dev/sfxge sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:10:43 2018
New Revision: 341325
URL: https://svnweb.freebsd.org/changeset/base/341325
Log:
sfxge(4): support Medford2
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18286
Modified:
head/share/man/man4/sfxge.4
head/sys/dev/sfxge/common/efsys.h
head/sys/dev/sfxge/sfxge.c
Modified: head/share/man/man4/sfxge.4
==
--- head/share/man/man4/sfxge.4 Fri Nov 30 07:10:32 2018(r341324)
+++ head/share/man/man4/sfxge.4 Fri Nov 30 07:10:43 2018(r341325)
@@ -52,7 +52,7 @@ sfxge_load="YES"
The
.Nm
driver provides support for 10Gb Ethernet adapters based on
-Solarflare SFC9000 family controllers.
+Solarflare SFC9000 and XtremeScale X2 family controllers.
The driver supports jumbo
frames, transmit/receive checksum offload, TCP Segmentation Offload
(TSO), Large Receive Offload (LRO), VLAN checksum offload, VLAN TSO,
@@ -163,8 +163,8 @@ Period in milliseconds to refresh interface statistics
The accepted range is 0 to 65535, the default is 1000 (1 second).
Use zero value to disable periodic statistics update.
Supported on SFN8xxx series adapters with firmware v6.2.1.1033 and later and
-SFN5xxx and SFN6xxx series adapters.
-SFN7xxx series adapters and SFN8xxx series with earlier firmware use a
+SFN5xxx, SFN6xxx and XtremeScale X2xxx series adapters.
+SFN7xxx series adapters and sfN8xxx series with earlier firmware use a
fixed 1000 milliseconds statistics update period.
The period may also be changed after the driver is loaded using the sysctl
.Va dev.sfxge.%d.stats_update_period_ms .
Modified: head/sys/dev/sfxge/common/efsys.h
==
--- head/sys/dev/sfxge/common/efsys.h Fri Nov 30 07:10:32 2018
(r341324)
+++ head/sys/dev/sfxge/common/efsys.h Fri Nov 30 07:10:43 2018
(r341325)
@@ -202,7 +202,7 @@ sfxge_map_mbuf_fast(bus_dma_tag_t tag, bus_dmamap_t ma
#defineEFSYS_OPT_SIENA 1
#defineEFSYS_OPT_HUNTINGTON 1
#defineEFSYS_OPT_MEDFORD 1
-#defineEFSYS_OPT_MEDFORD2 0
+#defineEFSYS_OPT_MEDFORD2 1
#ifdef DEBUG
#defineEFSYS_OPT_CHECK_REG 1
#else
Modified: head/sys/dev/sfxge/sfxge.c
==
--- head/sys/dev/sfxge/sfxge.c Fri Nov 30 07:10:32 2018(r341324)
+++ head/sys/dev/sfxge/sfxge.c Fri Nov 30 07:10:43 2018(r341325)
@@ -1182,6 +1182,11 @@ sfxge_probe(device_t dev)
return (0);
}
+ if (family == EFX_FAMILY_MEDFORD2) {
+ device_set_desc(dev, "Solarflare SFC9250 family");
+ return (0);
+ }
+
DBGPRINT(dev, "impossible controller family %d", family);
return (ENXIO);
}
___
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svn commit: r341317 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:09:23 2018
New Revision: 341317
URL: https://svnweb.freebsd.org/changeset/base/341317
Log:
sfxge(4): infer port mode bandwidth from max link speed
Limit the port mode bandwidth calculations by the maximum
reported link speed. This system detects 25G vs 10G cards,
and 100G port modes vs 40G.
Submitted by: Richard Houldsworth
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18279
Modified:
head/sys/dev/sfxge/common/ef10_nic.c
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:09:11 2018
(r341316)
+++ head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:09:23 2018
(r341317)
@@ -160,9 +160,11 @@ ef10_nic_get_port_mode_bandwidth(
{
uint32_t port_modes;
uint32_t current_mode;
- uint32_t single_lane = 1;
- uint32_t dual_lane = 5;
- uint32_t quad_lane = 4;
+ efx_port_t *epp = &(enp->en_port);
+
+ uint32_t single_lane;
+ uint32_t dual_lane;
+ uint32_t quad_lane;
uint32_t bandwidth;
efx_rc_t rc;
@@ -171,6 +173,21 @@ ef10_nic_get_port_mode_bandwidth(
/* No port mode info available. */
goto fail1;
}
+
+ if (epp->ep_phy_cap_mask & (1 << EFX_PHY_CAP_25000FDX))
+ single_lane = 25000;
+ else
+ single_lane = 1;
+
+ if (epp->ep_phy_cap_mask & (1 << EFX_PHY_CAP_5FDX))
+ dual_lane = 5;
+ else
+ dual_lane = 2;
+
+ if (epp->ep_phy_cap_mask & (1 << EFX_PHY_CAP_10FDX))
+ quad_lane = 10;
+ else
+ quad_lane = 4;
switch (current_mode) {
case TLV_PORT_MODE_1x1_NA: /* mode 0 */
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svn commit: r341324 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:10:32 2018
New Revision: 341324
URL: https://svnweb.freebsd.org/changeset/base/341324
Log:
sfxge(4): update external port number calculation
Revise the external port calculation to support all
X2 port modes. The previous algorithm could not
handle different port numbering schemes on each cage.
Submitted by: Richard Houldsworth
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18285
Modified:
head/sys/dev/sfxge/common/ef10_nic.c
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:10:20 2018
(r341323)
+++ head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:10:32 2018
(r341324)
@@ -1468,6 +1468,9 @@ fail1:
}
+#defineEFX_EXT_PORT_MAX4
+#defineEFX_EXT_PORT_NA 0xFF
+
/*
* Table of mapping schemes from port number to external number.
*
@@ -1481,7 +1484,7 @@ fail1:
* port mapping (n:1)
* |
* v
- * External port number (normally 1-based)
+ * External port number (1-based)
* |
* fixed (1:1) or cable assembly (1:m)
* |
@@ -1493,9 +1496,8 @@ fail1:
* how to determine which external cage/magjack corresponds to the port
* numbers used by the driver.
*
- * The count of adjacent port numbers that map to each external number,
- * and the offset in the numbering, is determined by the chip family and
- * current port mode.
+ * The count of consecutive port numbers that map to each external number,
+ * is determined by the chip family and the current port mode.
*
* For the Huntington family, the current port mode cannot be discovered,
* but a single mapping is used by all modes for a given chip variant,
@@ -1506,8 +1508,7 @@ fail1:
static struct ef10_external_port_map_s {
efx_family_tfamily;
uint32_tmodes_mask;
- int32_t count;
- int32_t offset;
+ uint8_t base_port[EFX_EXT_PORT_MAX];
} __ef10_external_port_mappings[] = {
/*
* Modes used by Huntington family controllers where each port
@@ -1526,8 +1527,7 @@ static struct ef10_external_port_map_s {
(1U << TLV_PORT_MODE_10G) | /* mode 0 */
(1U << TLV_PORT_MODE_10G_10G) | /* mode 2 */
(1U << TLV_PORT_MODE_10G_10G_10G_10G), /* mode 4 */
- 1, /* ports per cage */
- 1 /* first cage */
+ { 0, 1, 2, 3 }
},
/*
* Modes which for Huntington identify a chip variant where 2
@@ -1544,8 +1544,7 @@ static struct ef10_external_port_map_s {
(1U << TLV_PORT_MODE_40G_40G) | /* mode 3 */
(1U << TLV_PORT_MODE_40G_10G_10G) | /* mode 6 */
(1U << TLV_PORT_MODE_10G_10G_40G), /* mode 7 */
- 2, /* ports per cage */
- 1 /* first cage */
+ { 0, 2, EFX_EXT_PORT_NA, EFX_EXT_PORT_NA }
},
/*
* Modes that on Medford allocate each port number to a separate
@@ -1559,8 +1558,7 @@ static struct ef10_external_port_map_s {
EFX_FAMILY_MEDFORD,
(1U << TLV_PORT_MODE_1x1_NA) | /* mode 0 */
(1U << TLV_PORT_MODE_1x1_1x1), /* mode 2 */
- 1, /* ports per cage */
- 1 /* first cage */
+ { 0, 1, 2, 3 }
},
/*
* Modes that on Medford allocate 2 adjacent port numbers to each
@@ -1578,8 +1576,7 @@ static struct ef10_external_port_map_s {
(1U << TLV_PORT_MODE_2x1_1x4) | /* mode 7 */
/* Do not use 10G_10G_10G_10G_Q1_Q2 (see bug63270) */
(1U << TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2),/* mode 9 */
- 2, /* ports per cage */
- 1 /* first cage */
+ { 0, 2, EFX_EXT_PORT_NA, EFX_EXT_PORT_NA }
},
/*
* Modes that on Medford allocate 4 adjacent port numbers to each
@@ -1594,8 +1591,7 @@ static struct ef10_external_port_map_s {
(1U << TLV_PORT_MODE_2x1_2x1) | /* mode 5 */
/* Do not use 10G_10G_10G_10G_Q1 (see bug63270) */
(1U << TLV_PORT_MODE_4x1_NA), /* mode 4 */
- 4, /* ports per cage */
- 1 /* first cage */
+ { 0, EFX_EXT_PORT_NA, EFX_EXT_PORT_NA, EFX_EXT_PORT_NA }
},
/*
* Modes that on Medford allocate 4 adjacent port numbers to each
@@ -1608,8 +1604,7 @@ static struct ef10_external_port_map_s {
{
EFX_FAMILY_MEDFORD,
(1U << TLV_PORT_MODE_NA_4x1), /* mod
svn commit: r341319 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:09:34 2018
New Revision: 341319
URL: https://svnweb.freebsd.org/changeset/base/341319
Log:
sfxge(4): guard Rx scale code with corresponding option
Previously only some of the code was guarded by this which caused
a build error when EFSYS_OPT_RX_SCALE is 0 (e.g. in manftest).
Submitted by: Tom Millington
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18280
Modified:
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/siena_nic.c
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:09:29 2018
(r341318)
+++ head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:09:34 2018
(r341319)
@@ -1113,11 +1113,13 @@ ef10_get_datapath_caps(
}
encp->enc_rx_prefix_size = 14;
+#if EFSYS_OPT_RX_SCALE
/* Check if the firmware supports additional RSS modes */
if (CAP_FLAGS1(req, ADDITIONAL_RSS_MODES))
encp->enc_rx_scale_additional_modes_supported = B_TRUE;
else
encp->enc_rx_scale_additional_modes_supported = B_FALSE;
+#endif /* EFSYS_OPT_RX_SCALE */
/* Check if the firmware supports TSO */
if (CAP_FLAGS1(req, TX_TSO))
@@ -1323,6 +1325,7 @@ ef10_get_datapath_caps(
else
encp->enc_hlb_counters = B_FALSE;
+#if EFSYS_OPT_RX_SCALE
if (CAP_FLAGS1(req, RX_RSS_LIMITED)) {
/* Only one exclusive RSS context is available per port. */
encp->enc_rx_scale_max_exclusive_contexts = 1;
@@ -1372,6 +1375,8 @@ ef10_get_datapath_caps(
*/
encp->enc_rx_scale_l4_hash_supported = B_TRUE;
}
+#endif /* EFSYS_OPT_RX_SCALE */
+
/* Check if the firmware supports "FLAG" and "MARK" filter actions */
if (CAP_FLAGS2(req, FILTER_ACTION_FLAG))
encp->enc_filter_action_flag_supported = B_TRUE;
@@ -1395,8 +1400,10 @@ ef10_get_datapath_caps(
return (0);
+#if EFSYS_OPT_RX_SCALE
fail5:
EFSYS_PROBE(fail5);
+#endif /* EFSYS_OPT_RX_SCALE */
fail4:
EFSYS_PROBE(fail4);
fail3:
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:09:29 2018
(r341318)
+++ head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:09:34 2018
(r341319)
@@ -1309,6 +1309,7 @@ typedef struct efx_nic_cfg_s {
uint32_tenc_rx_prefix_size;
uint32_tenc_rx_buf_align_start;
uint32_tenc_rx_buf_align_end;
+#if EFSYS_OPT_RX_SCALE
uint32_tenc_rx_scale_max_exclusive_contexts;
/*
* Mask of supported hash algorithms.
@@ -1321,6 +1322,7 @@ typedef struct efx_nic_cfg_s {
*/
boolean_t enc_rx_scale_l4_hash_supported;
boolean_t enc_rx_scale_additional_modes_supported;
+#endif /* EFSYS_OPT_RX_SCALE */
#if EFSYS_OPT_LOOPBACK
efx_qword_t enc_loopback_types[EFX_LINK_NMODES];
#endif /* EFSYS_OPT_LOOPBACK */
Modified: head/sys/dev/sfxge/common/siena_nic.c
==
--- head/sys/dev/sfxge/common/siena_nic.c Fri Nov 30 07:09:29 2018
(r341318)
+++ head/sys/dev/sfxge/common/siena_nic.c Fri Nov 30 07:09:34 2018
(r341319)
@@ -143,6 +143,7 @@ siena_board_cfg(
/* Alignment for WPTR updates */
encp->enc_rx_push_align = 1;
+#if EFSYS_OPT_RX_SCALE
/* There is one RSS context per function */
encp->enc_rx_scale_max_exclusive_contexts = 1;
@@ -157,6 +158,7 @@ siena_board_cfg(
/* There is no support for additional RSS modes */
encp->enc_rx_scale_additional_modes_supported = B_FALSE;
+#endif /* EFSYS_OPT_RX_SCALE */
encp->enc_tx_dma_desc_size_max = EFX_MASK32(FSF_AZ_TX_KER_BYTE_COUNT);
/* Fragments must not span 4k boundaries. */
___
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svn commit: r341312 - head/sys/dev/sfxge/common
Author: arybchik Date: Fri Nov 30 07:08:27 2018 New Revision: 341312 URL: https://svnweb.freebsd.org/changeset/base/341312 Log: sfxge(4): expose PHY module device address constants Rearrange so the valid addresses are visible to the caller. Submitted by: Richard Houldsworth Sponsored by: Solarflare Communications, Inc. Differential Revision: https://reviews.freebsd.org/D18274 Modified: head/sys/dev/sfxge/common/efx.h head/sys/dev/sfxge/common/efx_mcdi.c Modified: head/sys/dev/sfxge/common/efx.h == --- head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:08:16 2018 (r341311) +++ head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:08:27 2018 (r341312) @@ -1058,6 +1058,27 @@ efx_phy_media_type_get( __inefx_nic_t *enp, __out efx_phy_media_type_t *typep); +/* + * 2-wire device address of the base information in accordance with SFF-8472 + * Diagnostic Monitoring Interface for Optical Transceivers section + * 4 Memory Organization. + */ +#defineEFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_BASE0xA0 + +/* + * 2-wire device address of the digital diagnostics monitoring interface + * in accordance with SFF-8472 Diagnostic Monitoring Interface for Optical + * Transceivers section 4 Memory Organization. + */ +#defineEFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_DDM 0xA2 + +/* + * Hard wired 2-wire device address for QSFP+ in accordance with SFF-8436 + * QSFP+ 10 Gbs 4X PLUGGABLE TRANSCEIVER section 7.4 Device Addressing and + * Operation. + */ +#defineEFX_PHY_MEDIA_INFO_DEV_ADDR_QSFP0xA0 + extern __checkReturn efx_rc_t efx_phy_module_get_info( __inefx_nic_t *enp, Modified: head/sys/dev/sfxge/common/efx_mcdi.c == --- head/sys/dev/sfxge/common/efx_mcdi.cFri Nov 30 07:08:16 2018 (r341311) +++ head/sys/dev/sfxge/common/efx_mcdi.cFri Nov 30 07:08:27 2018 (r341312) @@ -2239,27 +2239,6 @@ fail1: return (rc); } -/* - * 2-wire device address of the base information in accordance with SFF-8472 - * Diagnostic Monitoring Interface for Optical Transceivers section - * 4 Memory Organization. - */ -#defineEFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_BASE0xA0 - -/* - * 2-wire device address of the digital diagnostics monitoring interface - * in accordance with SFF-8472 Diagnostic Monitoring Interface for Optical - * Transceivers section 4 Memory Organization. - */ -#defineEFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_DDM 0xA2 - -/* - * Hard wired 2-wire device address for QSFP+ in accordance with SFF-8436 - * QSFP+ 10 Gbs 4X PLUGGABLE TRANSCEIVER section 7.4 Device Addressing and - * Operation. - */ -#defineEFX_PHY_MEDIA_INFO_DEV_ADDR_QSFP0xA0 - __checkReturn efx_rc_t efx_mcdi_phy_module_get_info( __inefx_nic_t *enp, ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r341321 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:09:58 2018
New Revision: 341321
URL: https://svnweb.freebsd.org/changeset/base/341321
Log:
sfxge(4): use transceiver ID when reading info
In efx_mcdi_phy_module_get_info() probe the
transceiver identification byte rather than assume
the module matches the fixed port type. This
supports scenarios such as a SFP mounted in a QSFP
port via a QSA module.
Submitted by: Richard Houldsworth
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18282
Modified:
head/sys/dev/sfxge/common/efx_mcdi.c
Modified: head/sys/dev/sfxge/common/efx_mcdi.c
==
--- head/sys/dev/sfxge/common/efx_mcdi.cFri Nov 30 07:09:46 2018
(r341320)
+++ head/sys/dev/sfxge/common/efx_mcdi.cFri Nov 30 07:09:58 2018
(r341321)
@@ -2179,6 +2179,14 @@ fail1:
*/
#defineEFX_PHY_MEDIA_INFO_PAGE_SIZE0x80
+/*
+ * Transceiver identifiers from SFF-8024 Table 4-1.
+ */
+#defineEFX_SFF_TRANSCEIVER_ID_SFP 0x03 /* SFP/SFP+/SFP28
*/
+#defineEFX_SFF_TRANSCEIVER_ID_QSFP 0x0c /* QSFP */
+#defineEFX_SFF_TRANSCEIVER_ID_QSFP_PLUS0x0d /* QSFP+ or later
*/
+#defineEFX_SFF_TRANSCEIVER_ID_QSFP28 0x11 /* QSFP28 or later
*/
+
static __checkReturn efx_rc_t
efx_mcdi_get_phy_media_info(
__inefx_nic_t *enp,
@@ -2251,6 +2259,7 @@ efx_mcdi_phy_module_get_info(
efx_rc_t rc;
uint32_t mcdi_lower_page;
uint32_t mcdi_upper_page;
+ uint8_t id;
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
@@ -2264,6 +2273,25 @@ efx_mcdi_phy_module_get_info(
*/
switch (epp->ep_fixed_port_type) {
case EFX_PHY_MEDIA_SFP_PLUS:
+ case EFX_PHY_MEDIA_QSFP_PLUS:
+ /* Port type supports modules */
+ break;
+ default:
+ rc = ENOTSUP;
+ goto fail1;
+ }
+
+ /*
+* For all supported port types, MCDI page 0 offset 0 holds the
+* transceiver identifier. Probe to determine the data layout.
+* Definitions from SFF-8024 Table 4-1.
+*/
+ rc = efx_mcdi_get_phy_media_info(enp, 0, 0, sizeof (id), &id);
+ if (rc != 0)
+ goto fail2;
+
+ switch (id) {
+ case EFX_SFF_TRANSCEIVER_ID_SFP:
/*
* In accordance with SFF-8472 Diagnostic Monitoring
* Interface for Optical Transceivers section 4 Memory
@@ -2298,10 +2326,12 @@ efx_mcdi_phy_module_get_info(
break;
default:
rc = ENOTSUP;
- goto fail1;
+ goto fail3;
}
break;
- case EFX_PHY_MEDIA_QSFP_PLUS:
+ case EFX_SFF_TRANSCEIVER_ID_QSFP:
+ case EFX_SFF_TRANSCEIVER_ID_QSFP_PLUS:
+ case EFX_SFF_TRANSCEIVER_ID_QSFP28:
switch (dev_addr) {
case EFX_PHY_MEDIA_INFO_DEV_ADDR_QSFP:
/*
@@ -2317,12 +2347,12 @@ efx_mcdi_phy_module_get_info(
break;
default:
rc = ENOTSUP;
- goto fail1;
+ goto fail3;
}
break;
default:
rc = ENOTSUP;
- goto fail1;
+ goto fail3;
}
EFX_STATIC_ASSERT(EFX_PHY_MEDIA_INFO_PAGE_SIZE <= 0xFF);
@@ -2334,7 +2364,7 @@ efx_mcdi_phy_module_get_info(
rc = efx_mcdi_get_phy_media_info(enp,
mcdi_lower_page, (uint8_t)offset, (uint8_t)read_len, data);
if (rc != 0)
- goto fail2;
+ goto fail4;
data += read_len;
len -= read_len;
@@ -2351,11 +2381,15 @@ efx_mcdi_phy_module_get_info(
rc = efx_mcdi_get_phy_media_info(enp,
mcdi_upper_page, (uint8_t)offset, (uint8_t)len, data);
if (rc != 0)
- goto fail3;
+ goto fail5;
}
return (0);
+fail5:
+ EFSYS_PROBE(fail5);
+fail4:
+ EFSYS_PROBE(fail4);
fail3:
EFSYS_PROBE(fail3);
fail2:
___
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svn commit: r341314 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:08:50 2018
New Revision: 341314
URL: https://svnweb.freebsd.org/changeset/base/341314
Log:
sfxge(4): update to current port mode terminology
>From Medford onwards, the newer constants enumerating
port modes should be used.
Submitted by: Richard Houldsworth
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18276
Modified:
head/sys/dev/sfxge/common/ef10_nic.c
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:08:38 2018
(r341313)
+++ head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:08:50 2018
(r341314)
@@ -162,26 +162,29 @@ ef10_nic_get_port_mode_bandwidth(
efx_rc_t rc;
switch (port_mode) {
- case TLV_PORT_MODE_10G:
+ case TLV_PORT_MODE_1x1_NA: /* mode 0 */
bandwidth = 1;
break;
- case TLV_PORT_MODE_10G_10G:
+ case TLV_PORT_MODE_1x1_1x1: /* mode 2 */
bandwidth = 1 * 2;
break;
- case TLV_PORT_MODE_10G_10G_10G_10G:
- case TLV_PORT_MODE_10G_10G_10G_10G_Q:
- case TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2:
- case TLV_PORT_MODE_10G_10G_10G_10G_Q2:
+ case TLV_PORT_MODE_4x1_NA: /* mode 4 */
+ case TLV_PORT_MODE_2x1_2x1: /* mode 5 */
+ case TLV_PORT_MODE_NA_4x1: /* mode 8 */
bandwidth = 1 * 4;
break;
- case TLV_PORT_MODE_40G:
+ /* Legacy Medford-only mode. Do not use (see bug63270) */
+ case TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2: /* mode 9 */
+ bandwidth = 1 * 4;
+ break;
+ case TLV_PORT_MODE_1x4_NA: /* mode 1 */
bandwidth = 4;
break;
- case TLV_PORT_MODE_40G_40G:
+ case TLV_PORT_MODE_1x4_1x4: /* mode 3 */
bandwidth = 4 * 2;
break;
- case TLV_PORT_MODE_40G_10G_10G:
- case TLV_PORT_MODE_10G_10G_40G:
+ case TLV_PORT_MODE_1x4_2x1: /* mode 6 */
+ case TLV_PORT_MODE_2x1_1x4: /* mode 7 */
bandwidth = 4 + (1 * 2);
break;
default:
@@ -1495,8 +1498,8 @@ static struct ef10_external_port_map_s {
*/
{
EFX_FAMILY_MEDFORD,
- (1U << TLV_PORT_MODE_10G) | /* mode 0 */
- (1U << TLV_PORT_MODE_10G_10G), /* mode 2 */
+ (1U << TLV_PORT_MODE_1x1_NA) | /* mode 0 */
+ (1U << TLV_PORT_MODE_1x1_1x1), /* mode 2 */
1, /* ports per cage */
1 /* first cage */
},
@@ -1510,10 +1513,10 @@ static struct ef10_external_port_map_s {
*/
{
EFX_FAMILY_MEDFORD,
- (1U << TLV_PORT_MODE_40G) | /* mode 1 */
- (1U << TLV_PORT_MODE_40G_40G) | /* mode 3 */
- (1U << TLV_PORT_MODE_40G_10G_10G) | /* mode 6 */
- (1U << TLV_PORT_MODE_10G_10G_40G) | /* mode 7 */
+ (1U << TLV_PORT_MODE_1x4_NA) | /* mode 1 */
+ (1U << TLV_PORT_MODE_1x4_1x4) | /* mode 3 */
+ (1U << TLV_PORT_MODE_1x4_2x1) | /* mode 6 */
+ (1U << TLV_PORT_MODE_2x1_1x4) | /* mode 7 */
/* Do not use 10G_10G_10G_10G_Q1_Q2 (see bug63270) */
(1U << TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2),/* mode 9 */
2, /* ports per cage */
@@ -1529,9 +1532,9 @@ static struct ef10_external_port_map_s {
*/
{
EFX_FAMILY_MEDFORD,
- (1U << TLV_PORT_MODE_10G_10G_10G_10G_Q) | /* mode 5 */
+ (1U << TLV_PORT_MODE_2x1_2x1) | /* mode 5 */
/* Do not use 10G_10G_10G_10G_Q1 (see bug63270) */
- (1U << TLV_PORT_MODE_10G_10G_10G_10G_Q1), /* mode 4 */
+ (1U << TLV_PORT_MODE_4x1_NA), /* mode 4 */
4, /* ports per cage */
1 /* first cage */
},
@@ -1545,7 +1548,7 @@ static struct ef10_external_port_map_s {
*/
{
EFX_FAMILY_MEDFORD,
- (1U << TLV_PORT_MODE_10G_10G_10G_10G_Q2), /* mode 8 */
+ (1U << TLV_PORT_MODE_NA_4x1), /* mode 8 */
4, /* ports per cage */
2 /* first cage */
},
___
svn-src-head@freebsd.org ma
svn commit: r341315 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:09:00 2018
New Revision: 341315
URL: https://svnweb.freebsd.org/changeset/base/341315
Log:
sfxge(4): add X2 port modes to bandwidth calculator
Add cases for the new port modes supported by X2 NICs.
Lane bandwidth is calculated for pre-X2 cards so is an
underestimate for X2 in 25G/100G modes.
Submitted by: Richard Houldsworth
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18277
Modified:
head/sys/dev/sfxge/common/ef10_nic.c
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:08:50 2018
(r341314)
+++ head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:09:00 2018
(r341315)
@@ -158,34 +158,59 @@ ef10_nic_get_port_mode_bandwidth(
__inuint32_t port_mode,
__out uint32_t *bandwidth_mbpsp)
{
+ uint32_t single_lane = 1;
+ uint32_t dual_lane = 5;
+ uint32_t quad_lane = 4;
uint32_t bandwidth;
efx_rc_t rc;
switch (port_mode) {
case TLV_PORT_MODE_1x1_NA: /* mode 0 */
- bandwidth = 1;
+ bandwidth = single_lane;
break;
+ case TLV_PORT_MODE_1x2_NA: /* mode 10 */
+ case TLV_PORT_MODE_NA_1x2: /* mode 11 */
+ bandwidth = dual_lane;
+ break;
case TLV_PORT_MODE_1x1_1x1: /* mode 2 */
- bandwidth = 1 * 2;
+ bandwidth = single_lane + single_lane;
break;
case TLV_PORT_MODE_4x1_NA: /* mode 4 */
- case TLV_PORT_MODE_2x1_2x1: /* mode 5 */
case TLV_PORT_MODE_NA_4x1: /* mode 8 */
- bandwidth = 1 * 4;
+ bandwidth = 4 * single_lane;
break;
+ case TLV_PORT_MODE_2x1_2x1: /* mode 5 */
+ bandwidth = (2 * single_lane) + (2 * single_lane);
+ break;
+ case TLV_PORT_MODE_1x2_1x2: /* mode 12 */
+ bandwidth = dual_lane + dual_lane;
+ break;
+ case TLV_PORT_MODE_1x2_2x1: /* mode 17 */
+ case TLV_PORT_MODE_2x1_1x2: /* mode 18 */
+ bandwidth = dual_lane + (2 * single_lane);
+ break;
/* Legacy Medford-only mode. Do not use (see bug63270) */
case TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2: /* mode 9 */
- bandwidth = 1 * 4;
+ bandwidth = 4 * single_lane;
break;
case TLV_PORT_MODE_1x4_NA: /* mode 1 */
- bandwidth = 4;
+ case TLV_PORT_MODE_NA_1x4: /* mode 22 */
+ bandwidth = quad_lane;
break;
- case TLV_PORT_MODE_1x4_1x4: /* mode 3 */
- bandwidth = 4 * 2;
+ case TLV_PORT_MODE_2x2_NA: /* mode 13 */
+ case TLV_PORT_MODE_NA_2x2: /* mode 14 */
+ bandwidth = 2 * dual_lane;
break;
case TLV_PORT_MODE_1x4_2x1: /* mode 6 */
case TLV_PORT_MODE_2x1_1x4: /* mode 7 */
- bandwidth = 4 + (1 * 2);
+ bandwidth = quad_lane + (2 * single_lane);
+ break;
+ case TLV_PORT_MODE_1x4_1x2: /* mode 15 */
+ case TLV_PORT_MODE_1x2_1x4: /* mode 16 */
+ bandwidth = quad_lane + dual_lane;
+ break;
+ case TLV_PORT_MODE_1x4_1x4: /* mode 3 */
+ bandwidth = quad_lane + quad_lane;
break;
default:
rc = EINVAL;
___
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svn commit: r341310 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:08:05 2018
New Revision: 341310
URL: https://svnweb.freebsd.org/changeset/base/341310
Log:
sfxge(4): add helper API to make Geneve filter spec
Submitted by: Vijay Srivastava
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18272
Modified:
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_filter.c
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:07:54 2018
(r341309)
+++ head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:08:05 2018
(r341310)
@@ -2988,9 +2988,23 @@ efx_filter_spec_set_encap_type(
__inefx_filter_inner_frame_match_t inner_frame_match);
extern __checkReturn efx_rc_t
-efx_filter_spec_set_vxlan_full(
+efx_filter_spec_set_vxlan(
__inout efx_filter_spec_t *spec,
- __inconst uint8_t *vxlan_id,
+ __inconst uint8_t *vni,
+ __inconst uint8_t *inner_addr,
+ __inconst uint8_t *outer_addr);
+
+extern __checkReturn efx_rc_t
+efx_filter_spec_set_geneve(
+ __inout efx_filter_spec_t *spec,
+ __inconst uint8_t *vni,
+ __inconst uint8_t *inner_addr,
+ __inconst uint8_t *outer_addr);
+
+extern __checkReturn efx_rc_t
+efx_filter_spec_set_nvgre(
+ __inout efx_filter_spec_t *spec,
+ __inconst uint8_t *vsid,
__inconst uint8_t *inner_addr,
__inconst uint8_t *outer_addr);
Modified: head/sys/dev/sfxge/common/efx_filter.c
==
--- head/sys/dev/sfxge/common/efx_filter.c Fri Nov 30 07:07:54 2018
(r341309)
+++ head/sys/dev/sfxge/common/efx_filter.c Fri Nov 30 07:08:05 2018
(r341310)
@@ -519,27 +519,42 @@ fail1:
}
/*
- * Specify inner and outer Ethernet address and VXLAN ID in filter
+ * Specify inner and outer Ethernet address and VNI or VSID in tunnel filter
* specification.
*/
- __checkReturn efx_rc_t
-efx_filter_spec_set_vxlan_full(
- __inout efx_filter_spec_t *spec,
- __inconst uint8_t *vxlan_id,
+static __checkReturn efx_rc_t
+efx_filter_spec_set_tunnel(
+ __inout efx_filter_spec_t *spec,
+ __inefx_tunnel_protocol_t encap_type,
+ __inconst uint8_t *vni_or_vsid,
__inconst uint8_t *inner_addr,
__inconst uint8_t *outer_addr)
{
+ efx_rc_t rc;
+
EFSYS_ASSERT3P(spec, !=, NULL);
- EFSYS_ASSERT3P(vxlan_id, !=, NULL);
+ EFSYS_ASSERT3P(vni_or_vsid, !=, NULL);
EFSYS_ASSERT3P(inner_addr, !=, NULL);
EFSYS_ASSERT3P(outer_addr, !=, NULL);
- if ((inner_addr == NULL) && (outer_addr == NULL))
- return (EINVAL);
+ switch (encap_type) {
+ case EFX_TUNNEL_PROTOCOL_VXLAN:
+ case EFX_TUNNEL_PROTOCOL_GENEVE:
+ case EFX_TUNNEL_PROTOCOL_NVGRE:
+ break;
+ default:
+ rc = EINVAL;
+ goto fail1;
+ }
- if (vxlan_id != NULL) {
+ if ((inner_addr == NULL) && (outer_addr == NULL)) {
+ rc = EINVAL;
+ goto fail2;
+ }
+
+ if (vni_or_vsid != NULL) {
spec->efs_match_flags |= EFX_FILTER_MATCH_VNI_OR_VSID;
- memcpy(spec->efs_vni_or_vsid, vxlan_id, EFX_VNI_OR_VSID_LEN);
+ memcpy(spec->efs_vni_or_vsid, vni_or_vsid, EFX_VNI_OR_VSID_LEN);
}
if (outer_addr != NULL) {
spec->efs_match_flags |= EFX_FILTER_MATCH_LOC_MAC;
@@ -549,10 +564,63 @@ efx_filter_spec_set_vxlan_full(
spec->efs_match_flags |= EFX_FILTER_MATCH_IFRM_LOC_MAC;
memcpy(spec->efs_ifrm_loc_mac, inner_addr, EFX_MAC_ADDR_LEN);
}
+
spec->efs_match_flags |= EFX_FILTER_MATCH_ENCAP_TYPE;
- spec->efs_encap_type = EFX_TUNNEL_PROTOCOL_VXLAN;
+ spec->efs_encap_type = encap_type;
return (0);
+
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+ return (rc);
+}
+
+/*
+ * Specify inner and outer Ethernet address and VNI in VXLAN filter
+ * specification.
+ */
+__checkReturn efx_rc_t
+efx_filter_spec_set_vxlan(
+ __inout efx_filter_spec_t *spec,
+ __inconst uint8_t *vni,
+ __inconst uint8_t *inner_addr,
+ __inconst uint8_t *outer_addr)
+{
+ return efx_filter_spec_set_tunnel(spec, EFX_TUNNEL_PROTOCOL_VXLAN,
+ vni, inner_addr, outer_addr);
+}
+
+/*
+ * Specify inner and outer Ethernet address and VNI in Geneve filter
+ * specification.
+ */
+__checkReturn efx_rc_t
+efx_filter_spec_set_geneve(
+
svn commit: r341316 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:09:11 2018
New Revision: 341316
URL: https://svnweb.freebsd.org/changeset/base/341316
Log:
sfxge(4): support improvements to bandwidth calculations
Change the interface to ef10_nic_get_port_mode_bandwidth()
so more NIC information can be used to infer bandwidth
requirements. Huntington calculations separated out
completely.
Submitted by: Richard Houldsworth
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18278
Modified:
head/sys/dev/sfxge/common/ef10_impl.h
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/hunt_nic.c
head/sys/dev/sfxge/common/medford2_nic.c
head/sys/dev/sfxge/common/medford_nic.c
Modified: head/sys/dev/sfxge/common/ef10_impl.h
==
--- head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:09:00 2018
(r341315)
+++ head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:09:11 2018
(r341316)
@@ -1200,7 +1200,7 @@ efx_mcdi_get_port_modes(
extern __checkReturn efx_rc_t
ef10_nic_get_port_mode_bandwidth(
- __inuint32_t port_mode,
+ __inefx_nic_t *enp,
__out uint32_t *bandwidth_mbpsp);
extern __checkReturn efx_rc_t
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:09:00 2018
(r341315)
+++ head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:09:11 2018
(r341316)
@@ -155,16 +155,24 @@ fail1:
__checkReturn efx_rc_t
ef10_nic_get_port_mode_bandwidth(
- __inuint32_t port_mode,
+ __inefx_nic_t *enp,
__out uint32_t *bandwidth_mbpsp)
{
+ uint32_t port_modes;
+ uint32_t current_mode;
uint32_t single_lane = 1;
uint32_t dual_lane = 5;
uint32_t quad_lane = 4;
uint32_t bandwidth;
efx_rc_t rc;
- switch (port_mode) {
+ if ((rc = efx_mcdi_get_port_modes(enp, &port_modes,
+ ¤t_mode, NULL)) != 0) {
+ /* No port mode info available. */
+ goto fail1;
+ }
+
+ switch (current_mode) {
case TLV_PORT_MODE_1x1_NA: /* mode 0 */
bandwidth = single_lane;
break;
@@ -214,13 +222,15 @@ ef10_nic_get_port_mode_bandwidth(
break;
default:
rc = EINVAL;
- goto fail1;
+ goto fail2;
}
*bandwidth_mbpsp = bandwidth;
return (0);
+fail2:
+ EFSYS_PROBE(fail2);
fail1:
EFSYS_PROBE1(fail1, efx_rc_t, rc);
Modified: head/sys/dev/sfxge/common/hunt_nic.c
==
--- head/sys/dev/sfxge/common/hunt_nic.cFri Nov 30 07:09:00 2018
(r341315)
+++ head/sys/dev/sfxge/common/hunt_nic.cFri Nov 30 07:09:11 2018
(r341316)
@@ -47,7 +47,6 @@ hunt_nic_get_required_pcie_bandwidth(
__out uint32_t *bandwidth_mbpsp)
{
uint32_t port_modes;
- uint32_t max_port_mode;
uint32_t bandwidth;
efx_rc_t rc;
@@ -74,17 +73,13 @@ hunt_nic_get_required_pcie_bandwidth(
goto fail1;
} else {
if (port_modes & (1U << TLV_PORT_MODE_40G)) {
- max_port_mode = TLV_PORT_MODE_40G;
+ bandwidth = 4;
} else if (port_modes & (1U << TLV_PORT_MODE_10G_10G_10G_10G)) {
- max_port_mode = TLV_PORT_MODE_10G_10G_10G_10G;
+ bandwidth = 4 * 1;
} else {
/* Assume two 10G ports */
- max_port_mode = TLV_PORT_MODE_10G_10G;
+ bandwidth = 2 * 1;
}
-
- if ((rc = ef10_nic_get_port_mode_bandwidth(max_port_mode,
- &bandwidth)) != 0)
- goto fail2;
}
out:
@@ -92,8 +87,6 @@ out:
return (0);
-fail2:
- EFSYS_PROBE(fail2);
fail1:
EFSYS_PROBE1(fail1, efx_rc_t, rc);
Modified: head/sys/dev/sfxge/common/medford2_nic.c
==
--- head/sys/dev/sfxge/common/medford2_nic.cFri Nov 30 07:09:00 2018
(r341315)
+++ head/sys/dev/sfxge/common/medford2_nic.cFri Nov 30 07:09:11 2018
(r341316)
@@ -44,25 +44,15 @@ medford2_nic_get_required_pcie_bandwidth(
__inefx_nic_t *enp,
__out uint32_t *bandwidth_mbpsp)
{
- uint32_t port_modes;
- uint32_t current_mode;
uint32_t bandwidth;
efx_rc_t rc;
svn commit: r341309 - head/sys/dev/sfxge/common
Author: arybchik Date: Fri Nov 30 07:07:54 2018 New Revision: 341309 URL: https://svnweb.freebsd.org/changeset/base/341309 Log: sfxge(4): fix MAC Tx stats for less or equal to 64 bytes This statistic should include 64byte and smaller frames. Fix EF10 calculation to match Siena code. Submitted by: Andy Moreton Sponsored by: Solarflare Communications, Inc. MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D18271 Modified: head/sys/dev/sfxge/common/ef10_mac.c Modified: head/sys/dev/sfxge/common/ef10_mac.c == --- head/sys/dev/sfxge/common/ef10_mac.cFri Nov 30 07:07:43 2018 (r341308) +++ head/sys/dev/sfxge/common/ef10_mac.cFri Nov 30 07:07:54 2018 (r341309) @@ -677,7 +677,7 @@ ef10_mac_stats_update( EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_LT64_PKTS, &value); EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value); EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_64_PKTS, &value); - EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value); + EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value); EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_65_TO_127_PKTS, &value); EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_65_TO_127_PKTS]), &value); ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r341305 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:07:09 2018
New Revision: 341305
URL: https://svnweb.freebsd.org/changeset/base/341305
Log:
sfxge(4): check buffer size for hash flags
The efx_rx_scale_hash_flags_get interface is unsafe, as it does not
have an argument for the size of the output buffer used to return
the flags. While the only caller currently supplies a sufficiently
large buffer, this should be checked at runtime to avoid writing
past the end of the buffer.
Submitted by: Ivan Malov
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18267
Modified:
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_annote.h (contents, props changed)
head/sys/dev/sfxge/common/efx_rx.c
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:06:58 2018
(r341304)
+++ head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:07:09 2018
(r341305)
@@ -2396,7 +2396,8 @@ extern__checkReturn efx_rc_t
efx_rx_scale_hash_flags_get(
__inefx_nic_t *enp,
__inefx_rx_hash_alg_t hash_alg,
- __inout_ecount(EFX_RX_HASH_NFLAGS) unsigned int *flagsp,
+ __out_ecount_part(max_nflags, *nflagsp) unsigned int *flagsp,
+ __inunsigned int max_nflags,
__out unsigned int *nflagsp);
extern __checkReturn efx_rc_t
Modified: head/sys/dev/sfxge/common/efx_annote.h
==
--- head/sys/dev/sfxge/common/efx_annote.h Fri Nov 30 07:06:58 2018
(r341304)
+++ head/sys/dev/sfxge/common/efx_annote.h Fri Nov 30 07:07:09 2018
(r341305)
@@ -61,6 +61,7 @@
#define__out_opt
#define__out_ecount(_n)
#define__out_ecount_opt(_n)
+#define__out_ecount_part(_n, _l)
#define__out_bcount(_n)
#define__out_bcount_opt(_n)
#define__out_bcount_part(_n, _l)
Modified: head/sys/dev/sfxge/common/efx_rx.c
==
--- head/sys/dev/sfxge/common/efx_rx.c Fri Nov 30 07:06:58 2018
(r341304)
+++ head/sys/dev/sfxge/common/efx_rx.c Fri Nov 30 07:07:09 2018
(r341305)
@@ -327,13 +327,12 @@ fail1:
efx_rx_scale_hash_flags_get(
__inefx_nic_t *enp,
__inefx_rx_hash_alg_t hash_alg,
- __inout_ecount(EFX_RX_HASH_NFLAGS) unsigned int *flagsp,
+ __out_ecount_part(max_nflags, *nflagsp) unsigned int *flagsp,
+ __inunsigned int max_nflags,
__out unsigned int *nflagsp)
{
efx_nic_cfg_t *encp = &enp->en_nic_cfg;
- boolean_t l4;
- boolean_t additional_modes;
- unsigned int *entryp = flagsp;
+ unsigned int nflags = 0;
efx_rc_t rc;
if (flagsp == NULL || nflagsp == NULL) {
@@ -342,56 +341,90 @@ efx_rx_scale_hash_flags_get(
}
if ((encp->enc_rx_scale_hash_alg_mask & (1U << hash_alg)) == 0) {
- *nflagsp = 0;
- return 0;
+ nflags = 0;
+ goto done;
}
- l4 = encp->enc_rx_scale_l4_hash_supported;
- additional_modes = encp->enc_rx_scale_additional_modes_supported;
-
-#defineLIST_FLAGS(_entryp, _class, _l4_hashing, _additional_modes)
\
- do {\
- if (_l4_hashing) { \
- *(_entryp++) = EFX_RX_HASH(_class, 4TUPLE); \
- \
- if (_additional_modes) {\
- *(_entryp++) = \
- EFX_RX_HASH(_class, 2TUPLE_DST);\
- *(_entryp++) = \
- EFX_RX_HASH(_class, 2TUPLE_SRC);\
- } \
- } \
- \
- *(_entryp++) = EFX_RX_HASH(_class, 2TUPLE); \
- \
- if (_additional_modes) {\
- *(_entryp++) = EFX_RX_HASH(_class, 1TUPLE_DST); \
- *(_entryp++) = EFX_RX_HASH(_class, 1TUPLE_SRC); \
- }
svn commit: r341308 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:07:43 2018
New Revision: 341308
URL: https://svnweb.freebsd.org/changeset/base/341308
Log:
sfxge(4): modify phy caps to indicate FEC request
The capability bits to request FEC modes are implicitly valid
when the corresponding FEC mode is a supported capability.
Drivers expect that it is only valid to advertise those
capabilities explicitly marked as supported. The capabilities
reported by firmware is modified with the implicit capabilities
to present the explicit model to drivers.
Submitted by: Richard Houldsworth
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18270
Modified:
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/efx_phy.c
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:07:31 2018
(r341307)
+++ head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:07:43 2018
(r341308)
@@ -1799,6 +1799,21 @@ ef10_nic_board_cfg(
if ((rc = efx_mcdi_get_phy_cfg(enp)) != 0)
goto fail6;
+ /*
+* Firmware with support for *_FEC capability bits does not
+* report that the corresponding *_FEC_REQUESTED bits are supported.
+* Add them here so that drivers understand that they are supported.
+*/
+ if (epp->ep_phy_cap_mask & (1u << EFX_PHY_CAP_BASER_FEC))
+ epp->ep_phy_cap_mask |=
+ (1u << EFX_PHY_CAP_BASER_FEC_REQUESTED);
+ if (epp->ep_phy_cap_mask & (1u << EFX_PHY_CAP_RS_FEC))
+ epp->ep_phy_cap_mask |=
+ (1u << EFX_PHY_CAP_RS_FEC_REQUESTED);
+ if (epp->ep_phy_cap_mask & (1u << EFX_PHY_CAP_25G_BASER_FEC))
+ epp->ep_phy_cap_mask |=
+ (1u << EFX_PHY_CAP_25G_BASER_FEC_REQUESTED);
+
/* Obtain the default PHY advertised capabilities */
if ((rc = ef10_phy_get_link(enp, &els)) != 0)
goto fail7;
Modified: head/sys/dev/sfxge/common/efx_phy.c
==
--- head/sys/dev/sfxge/common/efx_phy.c Fri Nov 30 07:07:31 2018
(r341307)
+++ head/sys/dev/sfxge/common/efx_phy.c Fri Nov 30 07:07:43 2018
(r341308)
@@ -221,11 +221,6 @@ efx_phy_adv_cap_get(
}
}
-#defineEFX_PHY_CAP_FEC_REQ_MASK\
- (1U << EFX_PHY_CAP_BASER_FEC_REQUESTED) | \
- (1U << EFX_PHY_CAP_RS_FEC_REQUESTED)| \
- (1U << EFX_PHY_CAP_25G_BASER_FEC_REQUESTED)
-
__checkReturn efx_rc_t
efx_phy_adv_cap_set(
__inefx_nic_t *enp,
@@ -239,8 +234,7 @@ efx_phy_adv_cap_set(
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
- /* Ignore don't care bits of FEC (FEC EFX_PHY_CAP_*_REQUESTED) */
- if ((mask & ~(epp->ep_phy_cap_mask | EFX_PHY_CAP_FEC_REQ_MASK)) != 0) {
+ if ((mask & ~epp->ep_phy_cap_mask) != 0) {
rc = ENOTSUP;
goto fail1;
}
___
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svn commit: r341313 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:08:38 2018
New Revision: 341313
URL: https://svnweb.freebsd.org/changeset/base/341313
Log:
sfxge(4): adjust PHY module info interface
Adjust data types in interface to permit the complete
module information buffer to be obtained in a single
call.
Submitted by: Richard Houldsworth
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18275
Modified:
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_mcdi.c
head/sys/dev/sfxge/common/efx_mcdi.h
head/sys/dev/sfxge/common/efx_phy.c
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:08:27 2018
(r341312)
+++ head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:08:38 2018
(r341313)
@@ -1079,12 +1079,18 @@ efx_phy_media_type_get(
*/
#defineEFX_PHY_MEDIA_INFO_DEV_ADDR_QSFP0xA0
+/*
+ * Maximum accessible data offset for PHY module information.
+ */
+#defineEFX_PHY_MEDIA_INFO_MAX_OFFSET 0x100
+
+
extern __checkReturn efx_rc_t
efx_phy_module_get_info(
__inefx_nic_t *enp,
__inuint8_t dev_addr,
- __inuint8_t offset,
- __inuint8_t len,
+ __insize_t offset,
+ __insize_t len,
__out_bcount(len) uint8_t *data);
#if EFSYS_OPT_PHY_STATS
Modified: head/sys/dev/sfxge/common/efx_mcdi.c
==
--- head/sys/dev/sfxge/common/efx_mcdi.cFri Nov 30 07:08:27 2018
(r341312)
+++ head/sys/dev/sfxge/common/efx_mcdi.cFri Nov 30 07:08:38 2018
(r341313)
@@ -2243,8 +2243,8 @@ fail1:
efx_mcdi_phy_module_get_info(
__inefx_nic_t *enp,
__inuint8_t dev_addr,
- __inuint8_t offset,
- __inuint8_t len,
+ __insize_t offset,
+ __insize_t len,
__out_bcount(len) uint8_t *data)
{
efx_port_t *epp = &(enp->en_port);
@@ -2325,12 +2325,14 @@ efx_mcdi_phy_module_get_info(
goto fail1;
}
+ EFX_STATIC_ASSERT(EFX_PHY_MEDIA_INFO_PAGE_SIZE <= 0xFF);
+
if (offset < EFX_PHY_MEDIA_INFO_PAGE_SIZE) {
- uint8_t read_len =
+ size_t read_len =
MIN(len, EFX_PHY_MEDIA_INFO_PAGE_SIZE - offset);
rc = efx_mcdi_get_phy_media_info(enp,
- mcdi_lower_page, offset, read_len, data);
+ mcdi_lower_page, (uint8_t)offset, (uint8_t)read_len, data);
if (rc != 0)
goto fail2;
@@ -2347,7 +2349,7 @@ efx_mcdi_phy_module_get_info(
EFSYS_ASSERT3U(offset, <, EFX_PHY_MEDIA_INFO_PAGE_SIZE);
rc = efx_mcdi_get_phy_media_info(enp,
- mcdi_upper_page, offset, len, data);
+ mcdi_upper_page, (uint8_t)offset, (uint8_t)len, data);
if (rc != 0)
goto fail3;
}
Modified: head/sys/dev/sfxge/common/efx_mcdi.h
==
--- head/sys/dev/sfxge/common/efx_mcdi.hFri Nov 30 07:08:27 2018
(r341312)
+++ head/sys/dev/sfxge/common/efx_mcdi.hFri Nov 30 07:08:38 2018
(r341313)
@@ -247,8 +247,8 @@ extern __checkReturn efx_rc_t
efx_mcdi_phy_module_get_info(
__inefx_nic_t *enp,
__inuint8_t dev_addr,
- __inuint8_t offset,
- __inuint8_t len,
+ __insize_t offset,
+ __insize_t len,
__out_bcount(len) uint8_t *data);
#defineMCDI_IN(_emr, _type, _ofst)
\
Modified: head/sys/dev/sfxge/common/efx_phy.c
==
--- head/sys/dev/sfxge/common/efx_phy.c Fri Nov 30 07:08:27 2018
(r341312)
+++ head/sys/dev/sfxge/common/efx_phy.c Fri Nov 30 07:08:38 2018
(r341313)
@@ -317,8 +317,8 @@ efx_phy_media_type_get(
efx_phy_module_get_info(
__inefx_nic_t *enp,
__inuint8_t dev_addr,
- __inuint8_t offset,
- __inuint8_t len,
+ __insize_t offset,
+ __insize_t len,
__out_bcount(len) uint8_t *data)
{
efx_rc_t rc;
@@ -326,7 +326,8 @@ efx_phy_module_get_info(
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
EFSYS_ASSERT(data != NULL);
-
svn commit: r341304 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:06:58 2018
New Revision: 341304
URL: https://svnweb.freebsd.org/changeset/base/341304
Log:
sfxge(4): use simpler code to check hash algorithm type
The API which is used to list supported hash flags verifies
hash algorithm choice before writing the output. This check
is based on a switch() statement which has only two options
and no distinctive actions to be conducted for each of them.
Use simpler code instead of switch() to improve readability.
Submitted by: Ivan Malov
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18266
Modified:
head/sys/dev/sfxge/common/efx_rx.c
Modified: head/sys/dev/sfxge/common/efx_rx.c
==
--- head/sys/dev/sfxge/common/efx_rx.c Fri Nov 30 07:06:46 2018
(r341303)
+++ head/sys/dev/sfxge/common/efx_rx.c Fri Nov 30 07:06:58 2018
(r341304)
@@ -341,6 +341,11 @@ efx_rx_scale_hash_flags_get(
goto fail1;
}
+ if ((encp->enc_rx_scale_hash_alg_mask & (1U << hash_alg)) == 0) {
+ *nflagsp = 0;
+ return 0;
+ }
+
l4 = encp->enc_rx_scale_l4_hash_supported;
additional_modes = encp->enc_rx_scale_additional_modes_supported;
@@ -369,41 +374,23 @@ efx_rx_scale_hash_flags_get(
_NOTE(CONSTANTCONDITION)\
} while (B_FALSE)
- switch (hash_alg) {
- case EFX_RX_HASHALG_PACKED_STREAM:
- if ((encp->enc_rx_scale_hash_alg_mask & (1U << hash_alg)) == 0)
- break;
- /* FALLTHRU */
- case EFX_RX_HASHALG_TOEPLITZ:
- if ((encp->enc_rx_scale_hash_alg_mask & (1U << hash_alg)) == 0)
- break;
+ LIST_FLAGS(entryp, IPV4_TCP, l4, additional_modes);
+ LIST_FLAGS(entryp, IPV6_TCP, l4, additional_modes);
- LIST_FLAGS(entryp, IPV4_TCP, l4, additional_modes);
- LIST_FLAGS(entryp, IPV6_TCP, l4, additional_modes);
-
- if (additional_modes) {
- LIST_FLAGS(entryp, IPV4_UDP, l4, additional_modes);
- LIST_FLAGS(entryp, IPV6_UDP, l4, additional_modes);
- }
-
- LIST_FLAGS(entryp, IPV4, B_FALSE, additional_modes);
- LIST_FLAGS(entryp, IPV6, B_FALSE, additional_modes);
- break;
-
- default:
- rc = EINVAL;
- goto fail2;
+ if (additional_modes) {
+ LIST_FLAGS(entryp, IPV4_UDP, l4, additional_modes);
+ LIST_FLAGS(entryp, IPV6_UDP, l4, additional_modes);
}
+ LIST_FLAGS(entryp, IPV4, B_FALSE, additional_modes);
+ LIST_FLAGS(entryp, IPV6, B_FALSE, additional_modes);
+
#undef LIST_FLAGS
*nflagsp = (unsigned int)(entryp - flagsp);
EFSYS_ASSERT3U(*nflagsp, <=, EFX_RX_HASH_NFLAGS);
return (0);
-
-fail2:
- EFSYS_PROBE(fail2);
fail1:
EFSYS_PROBE1(fail1, efx_rc_t, rc);
___
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svn commit: r341307 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:07:31 2018
New Revision: 341307
URL: https://svnweb.freebsd.org/changeset/base/341307
Log:
sfxge(4): improve handling of legacy RSS hash flags
Client drivers may use either legacy flags, for example,
EFX_RX_HASH_TCPIPV4, or generalised flags, for example,
EFX_RX_HASH(IPV4_TCP, 4TUPLE), to configure RSS hash.
The libefx is able to recognise what scheme is used.
Legacy flags may be consumed directly by a chip-specific handler to
configure the NIC, that is, on EF10, these flags can be used to fill
in legacy RSS mode field in MCDI request. Generalised flags can also
be directly used in EF10-specific handler as they are fully compatible
with additional fields of the same MCDI request.
Legacy flags undergo conversion to generalised flags before they
are consumed by a chip-specific handler. This conversion is used to
make sure that chip-specific handlers expect only generalised flags
in the input for the sake of clarity of the code.
Depending on firmware capabilities, a chip-specififc handler either
supplies the input to the NIC directly, for example,
EFX_RX_HASH(IPV4_TCP, 4TUPLE) flag will enable 4 bits in
RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE field on EF10, or takes
the opportunity to translate the input to enable bits which don't map
to the generic flag, like setting
RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN on EF10 when the firmware
claims no support for additional modes.
However, this approach has introduced a severe problem which can be
reproduced with ultra-low-latency firmware variant. In order to enable
IP hash, EF10-specific handler requires the user to request 2-tuple
hash for IP-other, TCP and UDP traffic classes, unconditionally.
In example, IPv4 hash can be enabled using the following input:
EFX_RX_HASH(IPV4_TCP, 2TUPLE) | EFX_RX_HASH(IPV4_UDP, 2TUPLE) |
EFX_RX_HASH(IPV4, 2TUPLE).
At the same time, on ultra-low-latency firmware, the common code will
never report support for any UDP tuple to the client driver. That is,
in the same example, the driver will use EFX_RX_HASH(IPV4_TCP, 2TUPLE) |
EFX_RX_HASH(IPV4, 2TUPLE). This input will not be recognised by
EF10-specific handler, and RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN
bit will not be set in the MCDI request.
In order to solve the problem, the patch removes conversion code
from chip-specific handlers and adds appropriate code to convert
EFX_RX_HASH() flags to their legacy counterparts to the common scale
mode set function. If the firmware does not support additional modes,
the function will convert generalised flags to legacy flags correctly
without any demand for UDP flags and pass the result to a chip-specific
handler.
Submitted by: Ivan Malov
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18269
Modified:
head/sys/dev/sfxge/common/ef10_rx.c
head/sys/dev/sfxge/common/efx_rx.c
Modified: head/sys/dev/sfxge/common/ef10_rx.c
==
--- head/sys/dev/sfxge/common/ef10_rx.c Fri Nov 30 07:07:20 2018
(r341306)
+++ head/sys/dev/sfxge/common/ef10_rx.c Fri Nov 30 07:07:31 2018
(r341307)
@@ -341,11 +341,6 @@ efx_mcdi_rss_context_set_flags(
__inefx_rx_hash_type_t type)
{
efx_nic_cfg_t *encp = &enp->en_nic_cfg;
- efx_rx_hash_type_t type_ipv4;
- efx_rx_hash_type_t type_ipv4_tcp;
- efx_rx_hash_type_t type_ipv6;
- efx_rx_hash_type_t type_ipv6_tcp;
- efx_rx_hash_type_t modes;
efx_mcdi_req_t req;
EFX_MCDI_DECLARE_BUF(payload, MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN,
MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN);
@@ -382,53 +377,38 @@ efx_mcdi_rss_context_set_flags(
MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID,
rss_context);
- type_ipv4 = EFX_RX_HASH(IPV4, 2TUPLE) | EFX_RX_HASH(IPV4_TCP, 2TUPLE) |
- EFX_RX_HASH(IPV4_UDP, 2TUPLE);
- type_ipv4_tcp = EFX_RX_HASH(IPV4_TCP, 4TUPLE);
- type_ipv6 = EFX_RX_HASH(IPV6, 2TUPLE) | EFX_RX_HASH(IPV6_TCP, 2TUPLE) |
- EFX_RX_HASH(IPV6_UDP, 2TUPLE);
- type_ipv6_tcp = EFX_RX_HASH(IPV6_TCP, 4TUPLE);
-
/*
-* Create a copy of the original hash type.
-* The copy will be used to fill in RSS_MODE bits and
-* may be cleared beforehand. The original variable
-* and, thus, EN bits will remain unaffected.
-*/
- modes = type;
-
- /*
* If the firmware lacks support for additional modes, RSS_MODE
* fields must contain zeros, otherwise the operation will fail.
*/
if (encp->enc_rx_scale_additional_modes_supported == B_FALSE)
- modes = 0;
+ type &= EFX_RX_HASH_LEGACY_MASK;
MCDI_IN_POPULATE_DWORD_10(req, RSS_CONTEXT_SET_FLAGS_IN_FLAGS,
svn commit: r341303 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:06:46 2018
New Revision: 341303
URL: https://svnweb.freebsd.org/changeset/base/341303
Log:
sfxge(4): add support to get active FEC type
Submitted by: Vijay Srivastava
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18265
Modified:
head/sys/dev/sfxge/common/ef10_impl.h
head/sys/dev/sfxge/common/ef10_phy.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_impl.h
head/sys/dev/sfxge/common/efx_phy.c
Modified: head/sys/dev/sfxge/common/ef10_impl.h
==
--- head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:06:35 2018
(r341302)
+++ head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:06:46 2018
(r341303)
@@ -622,6 +622,7 @@ typedef struct ef10_link_state_s {
uint32_tels_adv_cap_mask;
uint32_tels_lp_cap_mask;
unsigned intels_fcntl;
+ efx_phy_fec_type_t els_fec;
efx_link_mode_t els_link_mode;
#if EFSYS_OPT_LOOPBACK
efx_loopback_type_t els_loopback;
@@ -657,6 +658,11 @@ extern __checkReturn efx_rc_t
ef10_phy_oui_get(
__inefx_nic_t *enp,
__out uint32_t *ouip);
+
+extern __checkReturn efx_rc_t
+ef10_phy_fec_type_get(
+ __inefx_nic_t *enp,
+ __out efx_phy_fec_type_t *fecp);
#if EFSYS_OPT_PHY_STATS
Modified: head/sys/dev/sfxge/common/ef10_phy.c
==
--- head/sys/dev/sfxge/common/ef10_phy.cFri Nov 30 07:06:35 2018
(r341302)
+++ head/sys/dev/sfxge/common/ef10_phy.cFri Nov 30 07:06:46 2018
(r341303)
@@ -125,8 +125,10 @@ mcdi_phy_decode_link_mode(
__inuint32_t link_flags,
__inunsigned int speed,
__inunsigned int fcntl,
+ __inuint32_t fec,
__out efx_link_mode_t *link_modep,
- __out unsigned int *fcntlp)
+ __out unsigned int *fcntlp,
+ __out efx_phy_fec_type_t *fecp)
{
boolean_t fd = !!(link_flags &
(1 << MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN));
@@ -168,6 +170,22 @@ mcdi_phy_decode_link_mode(
EFSYS_PROBE1(mc_pcol_error, int, fcntl);
*fcntlp = 0;
}
+
+ switch (fec) {
+ case MC_CMD_FEC_NONE:
+ *fecp = EFX_PHY_FEC_NONE;
+ break;
+ case MC_CMD_FEC_BASER:
+ *fecp = EFX_PHY_FEC_BASER;
+ break;
+ case MC_CMD_FEC_RS:
+ *fecp = EFX_PHY_FEC_RS;
+ break;
+ default:
+ EFSYS_PROBE1(mc_pcol_error, int, fec);
+ *fecp = EFX_PHY_FEC_NONE;
+ break;
+ }
}
@@ -181,6 +199,7 @@ ef10_phy_link_ev(
unsigned int link_flags;
unsigned int speed;
unsigned int fcntl;
+ efx_phy_fec_type_t fec = MC_CMD_FEC_NONE;
efx_link_mode_t link_mode;
uint32_t lp_cap_mask;
@@ -218,7 +237,8 @@ ef10_phy_link_ev(
link_flags = MCDI_EV_FIELD(eqp, LINKCHANGE_LINK_FLAGS);
mcdi_phy_decode_link_mode(enp, link_flags, speed,
MCDI_EV_FIELD(eqp, LINKCHANGE_FCNTL),
- &link_mode, &fcntl);
+ MC_CMD_FEC_NONE, &link_mode,
+ &fcntl, &fec);
mcdi_phy_decode_cap(MCDI_EV_FIELD(eqp, LINKCHANGE_LP_CAP),
&lp_cap_mask);
@@ -269,15 +289,16 @@ ef10_phy_get_link(
__out ef10_link_state_t *elsp)
{
efx_mcdi_req_t req;
+ uint32_t fec;
EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_LINK_IN_LEN,
- MC_CMD_GET_LINK_OUT_LEN);
+ MC_CMD_GET_LINK_OUT_V2_LEN);
efx_rc_t rc;
req.emr_cmd = MC_CMD_GET_LINK;
req.emr_in_buf = payload;
req.emr_in_length = MC_CMD_GET_LINK_IN_LEN;
req.emr_out_buf = payload;
- req.emr_out_length = MC_CMD_GET_LINK_OUT_LEN;
+ req.emr_out_length = MC_CMD_GET_LINK_OUT_V2_LEN;
efx_mcdi_execute(enp, &req);
@@ -296,10 +317,16 @@ ef10_phy_get_link(
mcdi_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_LP_CAP),
&elsp->els_lp_cap_mask);
+ if (req.emr_out_length_used < MC_CMD_GET_LINK_OUT_V2_LEN)
+ fec = MC_CMD_FEC_NONE;
+ else
+ fec = MCDI_OUT_DWORD(req, GET_LINK_OUT_V2_FEC_TYPE);
+
mcdi_phy_decode_link_mode(enp, MCDI_OUT_DWORD(req, GET_LINK_OUT_FLAGS),
MCDI_OUT_DWORD(req, GET_LINK_OUT_LINK_SPEED),
MCDI_OUT_DWORD(req, GET_LINK_OUT_FCNTL),
- &elsp->els_link_mode, &elsp->els_fcntl)
svn commit: r341306 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:07:20 2018
New Revision: 341306
URL: https://svnweb.freebsd.org/changeset/base/341306
Log:
sfxge(4): simplify the code to parse RSS hash type
RSS mode bits can be accessed a lot easier in the hash
type value provided that the variable type is uint32_t.
The macro helper can be removed to enhance readability.
Submitted by: Ivan Malov
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18268
Modified:
head/sys/dev/sfxge/common/ef10_rx.c
head/sys/dev/sfxge/common/efx.h
Modified: head/sys/dev/sfxge/common/ef10_rx.c
==
--- head/sys/dev/sfxge/common/ef10_rx.c Fri Nov 30 07:07:09 2018
(r341305)
+++ head/sys/dev/sfxge/common/ef10_rx.c Fri Nov 30 07:07:20 2018
(r341306)
@@ -404,12 +404,6 @@ efx_mcdi_rss_context_set_flags(
if (encp->enc_rx_scale_additional_modes_supported == B_FALSE)
modes = 0;
-#defineEXTRACT_RSS_MODE(_type, _class) \
- (EFX_EXTRACT_NATIVE(_type, 0, 31, \
- EFX_LOW_BIT(EFX_RX_CLASS_##_class), \
- EFX_HIGH_BIT(EFX_RX_CLASS_##_class)) & \
- EFX_MASK32(EFX_RX_CLASS_##_class))
-
MCDI_IN_POPULATE_DWORD_10(req, RSS_CONTEXT_SET_FLAGS_IN_FLAGS,
RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN,
((type & type_ipv4) == type_ipv4) ? 1 : 0,
@@ -420,19 +414,21 @@ efx_mcdi_rss_context_set_flags(
RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN,
((type & type_ipv6_tcp) == type_ipv6_tcp) ? 1 : 0,
RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE,
- EXTRACT_RSS_MODE(modes, IPV4_TCP),
+ (modes >> EFX_RX_CLASS_IPV4_TCP_LBN) &
+ EFX_MASK32(EFX_RX_CLASS_IPV4_TCP),
RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV4_RSS_MODE,
- EXTRACT_RSS_MODE(modes, IPV4_UDP),
+ (modes >> EFX_RX_CLASS_IPV4_UDP_LBN) &
+ EFX_MASK32(EFX_RX_CLASS_IPV4_UDP),
RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE,
- EXTRACT_RSS_MODE(modes, IPV4),
+ (modes >> EFX_RX_CLASS_IPV4_LBN) & EFX_MASK32(EFX_RX_CLASS_IPV4),
RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE,
- EXTRACT_RSS_MODE(modes, IPV6_TCP),
+ (modes >> EFX_RX_CLASS_IPV6_TCP_LBN) &
+ EFX_MASK32(EFX_RX_CLASS_IPV6_TCP),
RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV6_RSS_MODE,
- EXTRACT_RSS_MODE(modes, IPV6_UDP),
+ (modes >> EFX_RX_CLASS_IPV6_UDP_LBN) &
+ EFX_MASK32(EFX_RX_CLASS_IPV6_UDP),
RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE,
- EXTRACT_RSS_MODE(modes, IPV6));
-
-#undef EXTRACT_RSS_MODE
+ (modes >> EFX_RX_CLASS_IPV6_LBN) & EFX_MASK32(EFX_RX_CLASS_IPV6));
efx_mcdi_execute(enp, &req);
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:07:09 2018
(r341305)
+++ head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:07:20 2018
(r341306)
@@ -2295,7 +2295,7 @@ typedef enum efx_rx_hash_alg_e {
* - a combination of legacy flags
* - a combination of EFX_RX_HASH() flags
*/
-typedef unsigned int efx_rx_hash_type_t;
+typedef uint32_t efx_rx_hash_type_t;
typedef enum efx_rx_hash_support_e {
EFX_RX_HASH_UNAVAILABLE = 0,/* Hardware hash not inserted */
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svn commit: r341311 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:08:16 2018
New Revision: 341311
URL: https://svnweb.freebsd.org/changeset/base/341311
Log:
sfxge(4): make last byte of module information available
Adjust bounds so the interface supports reading
the last available byte of data.
Submitted by: Richard Houldsworth
Sponsored by: Solarflare Communications, Inc.
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D18273
Modified:
head/sys/dev/sfxge/common/efx_phy.c
Modified: head/sys/dev/sfxge/common/efx_phy.c
==
--- head/sys/dev/sfxge/common/efx_phy.c Fri Nov 30 07:08:05 2018
(r341310)
+++ head/sys/dev/sfxge/common/efx_phy.c Fri Nov 30 07:08:16 2018
(r341311)
@@ -326,7 +326,7 @@ efx_phy_module_get_info(
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
EFSYS_ASSERT(data != NULL);
- if ((uint32_t)offset + len > 0xff) {
+ if ((uint32_t)offset + len > 0x100) {
rc = EINVAL;
goto fail1;
}
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svn commit: r341301 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:06:24 2018
New Revision: 341301
URL: https://svnweb.freebsd.org/changeset/base/341301
Log:
sfxge(4): prevent access to the NIC config before probe
NIC config is initialized during NIC probe.
Submitted by: Mark Spender
Sponsored by: Solarflare Communications, Inc.
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D18263
Modified:
head/sys/dev/sfxge/common/efx_nic.c
Modified: head/sys/dev/sfxge/common/efx_nic.c
==
--- head/sys/dev/sfxge/common/efx_nic.c Fri Nov 30 07:06:13 2018
(r341300)
+++ head/sys/dev/sfxge/common/efx_nic.c Fri Nov 30 07:06:24 2018
(r341301)
@@ -624,6 +624,7 @@ efx_nic_cfg_get(
__inefx_nic_t *enp)
{
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
+ EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
return (&(enp->en_nic_cfg));
}
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svn commit: r341300 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:06:13 2018
New Revision: 341300
URL: https://svnweb.freebsd.org/changeset/base/341300
Log:
sfxge(4): fix ID retrieval in v3 licensing
Submitted by: Andy Moreton
Sponsored by: Solarflare Communications, Inc.
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D18262
Modified:
head/sys/dev/sfxge/common/efx_lic.c
Modified: head/sys/dev/sfxge/common/efx_lic.c
==
--- head/sys/dev/sfxge/common/efx_lic.c Fri Nov 30 07:06:01 2018
(r341299)
+++ head/sys/dev/sfxge/common/efx_lic.c Fri Nov 30 07:06:13 2018
(r341300)
@@ -1010,27 +1010,15 @@ efx_mcdi_licensing_v3_get_id(
{
efx_mcdi_req_t req;
EFX_MCDI_DECLARE_BUF(payload, MC_CMD_LICENSING_GET_ID_V3_IN_LEN,
- MC_CMD_LICENSING_GET_ID_V3_OUT_LENMIN);
+ MC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX);
efx_rc_t rc;
req.emr_cmd = MC_CMD_LICENSING_GET_ID_V3;
+ req.emr_in_buf = payload;
+ req.emr_in_length = MC_CMD_LICENSING_GET_ID_V3_IN_LEN;
+ req.emr_out_buf = payload;
+ req.emr_out_length = MC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX;
- if (bufferp == NULL) {
- /* Request id type and length only */
- req.emr_in_buf = bufferp;
- req.emr_in_length = MC_CMD_LICENSING_GET_ID_V3_IN_LEN;
- req.emr_out_buf = bufferp;
- req.emr_out_length = MC_CMD_LICENSING_GET_ID_V3_OUT_LENMIN;
- } else {
- /* Request full buffer */
- req.emr_in_buf = bufferp;
- req.emr_in_length = MC_CMD_LICENSING_GET_ID_V3_IN_LEN;
- req.emr_out_buf = bufferp;
- req.emr_out_length =
- MIN(buffer_size, MC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX);
- (void) memset(bufferp, 0, req.emr_out_length);
- }
-
efx_mcdi_execute_quiet(enp, &req);
if (req.emr_rc != 0) {
@@ -1047,19 +1035,10 @@ efx_mcdi_licensing_v3_get_id(
*lengthp =
MCDI_OUT_DWORD(req, LICENSING_GET_ID_V3_OUT_LICENSE_ID_LENGTH);
- if (bufferp == NULL) {
- /*
-* Modify length requirements to indicate to caller the extra
-* buffering needed to read the complete output.
-*/
- *lengthp += MC_CMD_LICENSING_GET_ID_V3_OUT_LENMIN;
- } else {
- /* Shift ID down to start of buffer */
- memmove(bufferp,
- bufferp + MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_OFST,
- *lengthp);
- memset(bufferp + (*lengthp), 0,
- MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_OFST);
+ if (bufferp != NULL) {
+ memcpy(bufferp,
+ payload + MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_OFST,
+ MIN(buffer_size, *lengthp));
}
return (0);
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svn commit: r341302 - head/sys/dev/sfxge/common
Author: arybchik Date: Fri Nov 30 07:06:35 2018 New Revision: 341302 URL: https://svnweb.freebsd.org/changeset/base/341302 Log: sfxge(4): fix a typo in unicast filter insertion comment Submitted by: Ivan Malov Sponsored by: Solarflare Communications, Inc. MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D18264 Modified: head/sys/dev/sfxge/common/ef10_filter.c Modified: head/sys/dev/sfxge/common/ef10_filter.c == --- head/sys/dev/sfxge/common/ef10_filter.c Fri Nov 30 07:06:24 2018 (r341301) +++ head/sys/dev/sfxge/common/ef10_filter.c Fri Nov 30 07:06:35 2018 (r341302) @@ -1605,7 +1605,7 @@ ef10_filter_reconfigure( /* * Insert or renew unicast filters. * -* Frimware does not perform chaining on unicast filters. As traffic is +* Firmware does not perform chaining on unicast filters. As traffic is * therefore only delivered to the first matching filter, we should * always insert the specific filter for our MAC address, to try and * ensure we get that traffic. ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r341295 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:05:12 2018
New Revision: 341295
URL: https://svnweb.freebsd.org/changeset/base/341295
Log:
sfxge(4): avoid usage of too big arrays on stack
Found by PreFAST static analysis.
Submitted by: Martin Harvey
Sponsored by: Solarflare Communications, Inc.
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D18257
Modified:
head/sys/dev/sfxge/common/ef10_phy.c
head/sys/dev/sfxge/common/efx_nvram.c
Modified: head/sys/dev/sfxge/common/ef10_phy.c
==
--- head/sys/dev/sfxge/common/ef10_phy.cFri Nov 30 07:05:00 2018
(r341294)
+++ head/sys/dev/sfxge/common/ef10_phy.cFri Nov 30 07:05:12 2018
(r341295)
@@ -610,14 +610,26 @@ ef10_bist_poll(
unsigned long *valuesp,
__insize_t count)
{
+ /*
+* MCDI_CTL_SDU_LEN_MAX_V1 is large enough cover all BIST results,
+* whilst not wasting stack.
+*/
+ uint8_t payload[MAX(MC_CMD_POLL_BIST_IN_LEN, MCDI_CTL_SDU_LEN_MAX_V1)];
efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
efx_mcdi_req_t req;
- uint8_t payload[MAX(MC_CMD_POLL_BIST_IN_LEN,
- MCDI_CTL_SDU_LEN_MAX)];
uint32_t value_mask = 0;
uint32_t result;
efx_rc_t rc;
+ EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_LEN <=
+ MCDI_CTL_SDU_LEN_MAX_V1);
+ EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_SFT9001_LEN <=
+ MCDI_CTL_SDU_LEN_MAX_V1);
+ EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_MRSFP_LEN <=
+ MCDI_CTL_SDU_LEN_MAX_V1);
+ EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_MEM_LEN <=
+ MCDI_CTL_SDU_LEN_MAX_V1);
+
_NOTE(ARGUNUSED(type))
(void) memset(payload, 0, sizeof (payload));
@@ -625,7 +637,7 @@ ef10_bist_poll(
req.emr_in_buf = payload;
req.emr_in_length = MC_CMD_POLL_BIST_IN_LEN;
req.emr_out_buf = payload;
- req.emr_out_length = MCDI_CTL_SDU_LEN_MAX;
+ req.emr_out_length = MCDI_CTL_SDU_LEN_MAX_V1;
efx_mcdi_execute(enp, &req);
Modified: head/sys/dev/sfxge/common/efx_nvram.c
==
--- head/sys/dev/sfxge/common/efx_nvram.c Fri Nov 30 07:05:00 2018
(r341294)
+++ head/sys/dev/sfxge/common/efx_nvram.c Fri Nov 30 07:05:12 2018
(r341295)
@@ -898,23 +898,27 @@ efx_mcdi_nvram_write(
__insize_t size)
{
efx_mcdi_req_t req;
- uint8_t payload[MAX(MCDI_CTL_SDU_LEN_MAX_V1,
- MCDI_CTL_SDU_LEN_MAX_V2)];
+ uint8_t *payload;
efx_rc_t rc;
size_t max_data_size;
+ size_t payload_len = enp->en_nic_cfg.enc_mcdi_max_payload_length;
- max_data_size = enp->en_nic_cfg.enc_mcdi_max_payload_length
- - MC_CMD_NVRAM_WRITE_IN_LEN(0);
- EFSYS_ASSERT3U(enp->en_nic_cfg.enc_mcdi_max_payload_length, >, 0);
- EFSYS_ASSERT3U(max_data_size, <,
- enp->en_nic_cfg.enc_mcdi_max_payload_length);
+ max_data_size = payload_len - MC_CMD_NVRAM_WRITE_IN_LEN(0);
+ EFSYS_ASSERT3U(payload_len, >, 0);
+ EFSYS_ASSERT3U(max_data_size, <, payload_len);
if (size > max_data_size) {
rc = EINVAL;
goto fail1;
}
- (void) memset(payload, 0, sizeof (payload));
+ EFSYS_KMEM_ALLOC(enp->en_esip, payload_len, payload);
+ if (payload == NULL) {
+ rc = ENOMEM;
+ goto fail2;
+ }
+
+ (void) memset(payload, 0, payload_len);
req.emr_cmd = MC_CMD_NVRAM_WRITE;
req.emr_in_buf = payload;
req.emr_in_length = MC_CMD_NVRAM_WRITE_IN_LEN(size);
@@ -932,11 +936,16 @@ efx_mcdi_nvram_write(
if (req.emr_rc != 0) {
rc = req.emr_rc;
- goto fail2;
+ goto fail3;
}
+ EFSYS_KMEM_FREE(enp->en_esip, payload_len, payload);
+
return (0);
+fail3:
+ EFSYS_PROBE(fail3);
+ EFSYS_KMEM_FREE(enp->en_esip, payload_len, payload);
fail2:
EFSYS_PROBE(fail2);
fail1:
___
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svn commit: r341294 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:05:00 2018
New Revision: 341294
URL: https://svnweb.freebsd.org/changeset/base/341294
Log:
sfxge(4): generalise EF10 NVRAM buffer interface
The SFN driver's PartitionControl WMI object requires an API to parse
and filter partition data in TLV format, particularly for the Dynamic
Config partition. The ef10_nvram_buffer functions provide this
functionality but are tied to use with license partition only.
Modify functions so they are applicable to all TLV partitions and add
functions to support in-place tag modification.
Submitted by: Richard Houldsworth
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18256
Modified:
head/sys/dev/sfxge/common/ef10_impl.h
head/sys/dev/sfxge/common/ef10_nvram.c
head/sys/dev/sfxge/common/efx_impl.h
head/sys/dev/sfxge/common/efx_lic.c
head/sys/dev/sfxge/common/efx_nvram.c
Modified: head/sys/dev/sfxge/common/ef10_impl.h
==
--- head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:04:48 2018
(r341293)
+++ head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:05:00 2018
(r341294)
@@ -503,17 +503,21 @@ ef10_nvram_partn_set_version(
extern __checkReturn efx_rc_t
ef10_nvram_buffer_validate(
- __inefx_nic_t *enp,
__inuint32_t partn,
__in_bcount(buffer_size)
caddr_t bufferp,
__insize_t buffer_size);
+extern void
+ef10_nvram_buffer_init(
+ __out_bcount(buffer_size)
+ caddr_t bufferp,
+ __insize_t buffer_size);
+
extern __checkReturn efx_rc_t
ef10_nvram_buffer_create(
- __inefx_nic_t *enp,
- __inuint16_t partn_type,
- __in_bcount(buffer_size)
+ __inuint32_t partn_type,
+ __out_bcount(buffer_size)
caddr_t bufferp,
__insize_t buffer_size);
@@ -542,15 +546,26 @@ ef10_nvram_buffer_find_item(
__out uint32_t *lengthp);
extern __checkReturn efx_rc_t
+ef10_nvram_buffer_peek_item(
+ __in_bcount(buffer_size)
+ caddr_t bufferp,
+ __insize_t buffer_size,
+ __inuint32_t offset,
+ __out uint32_t *tagp,
+ __out uint32_t *lengthp,
+ __out uint32_t *value_offsetp);
+
+extern __checkReturn efx_rc_t
ef10_nvram_buffer_get_item(
__in_bcount(buffer_size)
caddr_t bufferp,
__insize_t buffer_size,
__inuint32_t offset,
__inuint32_t length,
- __out_bcount_part(item_max_size, *lengthp)
- caddr_t itemp,
- __insize_t item_max_size,
+ __out uint32_t *tagp,
+ __out_bcount_part(value_max_size, *lengthp)
+ caddr_t valuep,
+ __insize_t value_max_size,
__out uint32_t *lengthp);
extern __checkReturn efx_rc_t
@@ -559,7 +574,19 @@ ef10_nvram_buffer_insert_item(
caddr_t bufferp,
__insize_t buffer_size,
__inuint32_t offset,
- __in_bcount(length) caddr_t keyp,
+ __inuint32_t tag,
+ __in_bcount(length) caddr_t valuep,
+ __inuint32_t length,
+ __out uint32_t *lengthp);
+
+extern __checkReturn efx_rc_t
+ef10_nvram_buffer_modify_item(
+ __in_bcount(buffer_size)
+ caddr_t bufferp,
+ __insize_t buffer_size,
+ __inuint32_t offset,
+ __inuint32_t tag,
+ __in_bcount(length) caddr_t valuep,
__inuint32_t length,
__out uint32_t *lengthp);
Modified: head/sys/dev/sfxge/common/ef10_nvram.c
==
--- head/sys/dev/sfxge/common/ef10_nvram.c Fri Nov 30 07:04:48 2018
(r341293)
+++ head/sys/dev/sfxge/common/ef10_nvram.c Fri Nov 30 07:05:00 2018
(r341294)
@@ -230,14 +230,14 @@ tlv_validate_state(
if (tlv_tag(cursor) != TLV_TAG_END) {
/* Check current item has space for tag and length */
- if (cursor->current > (cursor->limit - 2)) {
+ if (cursor->current > (cursor->limit - 1)) {
cursor->current = NUL
svn commit: r341298 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:05:49 2018
New Revision: 341298
URL: https://svnweb.freebsd.org/changeset/base/341298
Log:
sfxge(4): add routine to check for hardware presence
Add efx_nic_hw_unavailable() routine to check for hardware presence
before continuing with NIC operations.
Submitted by: Andy Moreton
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18260
Modified:
head/sys/dev/sfxge/common/ef10_ev.c
head/sys/dev/sfxge/common/ef10_impl.h
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_impl.h
head/sys/dev/sfxge/common/efx_mcdi.c
head/sys/dev/sfxge/common/efx_nic.c
Modified: head/sys/dev/sfxge/common/ef10_ev.c
==
--- head/sys/dev/sfxge/common/ef10_ev.c Fri Nov 30 07:05:36 2018
(r341297)
+++ head/sys/dev/sfxge/common/ef10_ev.c Fri Nov 30 07:05:49 2018
(r341298)
@@ -890,8 +890,9 @@ ef10_ev_rx(
EFX_EV_QSTAT_INCR(eep, EV_RX);
- /* Discard events after RXQ/TXQ errors */
- if (enp->en_reset_flags & (EFX_RESET_RXQ_ERR | EFX_RESET_TXQ_ERR))
+ /* Discard events after RXQ/TXQ errors, or hardware not available */
+ if (enp->en_reset_flags &
+ (EFX_RESET_RXQ_ERR | EFX_RESET_TXQ_ERR | EFX_RESET_HW_UNAVAIL))
return (B_FALSE);
/* Basic packet information */
@@ -1091,8 +1092,9 @@ ef10_ev_tx(
EFX_EV_QSTAT_INCR(eep, EV_TX);
- /* Discard events after RXQ/TXQ errors */
- if (enp->en_reset_flags & (EFX_RESET_RXQ_ERR | EFX_RESET_TXQ_ERR))
+ /* Discard events after RXQ/TXQ errors, or hardware not available */
+ if (enp->en_reset_flags &
+ (EFX_RESET_RXQ_ERR | EFX_RESET_TXQ_ERR | EFX_RESET_HW_UNAVAIL))
return (B_FALSE);
if (EFX_QWORD_FIELD(*eqp, ESF_DZ_TX_DROP_EVENT) != 0) {
Modified: head/sys/dev/sfxge/common/ef10_impl.h
==
--- head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:05:36 2018
(r341297)
+++ head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:05:49 2018
(r341298)
@@ -216,6 +216,10 @@ extern __checkReturn efx_rc_t
ef10_nic_init(
__inefx_nic_t *enp);
+extern __checkReturn boolean_t
+ef10_nic_hw_unavailable(
+ __inefx_nic_t *enp);
+
#if EFSYS_OPT_DIAG
extern __checkReturn efx_rc_t
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:05:36 2018
(r341297)
+++ head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:05:49 2018
(r341298)
@@ -2331,6 +2331,28 @@ fail1:
return (rc);
}
+ __checkReturn boolean_t
+ef10_nic_hw_unavailable(
+ __inefx_nic_t *enp)
+{
+ efx_dword_t dword;
+
+ if (enp->en_reset_flags & EFX_RESET_HW_UNAVAIL)
+ return (B_TRUE);
+
+ EFX_BAR_READD(enp, ER_DZ_BIU_MC_SFT_STATUS_REG, &dword, B_FALSE);
+ if (EFX_DWORD_FIELD(dword, EFX_DWORD_0) == 0x)
+ goto unavail;
+
+ return (B_FALSE);
+
+unavail:
+ EFSYS_PROBE(hw_unavail);
+ enp->en_reset_flags |= EFX_RESET_HW_UNAVAIL;
+
+ return (B_TRUE);
+}
+
void
ef10_nic_fini(
__inefx_nic_t *enp)
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:05:36 2018
(r341297)
+++ head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:05:49 2018
(r341298)
@@ -183,6 +183,10 @@ extern __checkReturn efx_rc_t
efx_nic_reset(
__inefx_nic_t *enp);
+extern __checkReturn boolean_t
+efx_nic_hw_unavailable(
+ __inefx_nic_t *enp);
+
#if EFSYS_OPT_DIAG
extern __checkReturn efx_rc_t
Modified: head/sys/dev/sfxge/common/efx_impl.h
==
--- head/sys/dev/sfxge/common/efx_impl.hFri Nov 30 07:05:36 2018
(r341297)
+++ head/sys/dev/sfxge/common/efx_impl.hFri Nov 30 07:05:49 2018
(r341298)
@@ -87,6 +87,7 @@ extern "C" {
#defineEFX_RESET_PHY 0x0001
#defineEFX_RESET_RXQ_ERR 0x0002
#defineEFX_RESET_TXQ_ERR 0x0004
+#defineEFX_RESET_HW_UNAVAIL0x0008
typedef enum efx_mac_type_e {
EFX_MAC_INVALID = 0,
@@ -384,6 +385,7 @@ typedef struct efx_nic_ops_s {
efx_rc_t(*eno_get_vi_pool)(efx_nic_t *, uint32_t *);
efx_rc_t(*eno_get_bar_region)(efx_nic_t *, efx_nic_region_t,
uint32_t *, size_t *);
+ boolean_t (
svn commit: r341299 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:06:01 2018
New Revision: 341299
URL: https://svnweb.freebsd.org/changeset/base/341299
Log:
sfxge(4): add API to inform libefx of hardware removal
The efx_nic_hw_unavailable() checks ensure that if the NIC hardware
has failed or has been physically removed then libefx will stop
further attempts to access the hardware.
Add an interface for libefx clients to force unavailability, so the
hardware is treated as dead or removed even if still physically present.
Submitted by: Andy Moreton
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18261
Modified:
head/sys/dev/sfxge/common/ef10_impl.h
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_impl.h
head/sys/dev/sfxge/common/efx_nic.c
Modified: head/sys/dev/sfxge/common/ef10_impl.h
==
--- head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:05:49 2018
(r341298)
+++ head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:06:01 2018
(r341299)
@@ -220,6 +220,10 @@ extern __checkReturn boolean_t
ef10_nic_hw_unavailable(
__inefx_nic_t *enp);
+extern void
+ef10_nic_set_hw_unavailable(
+ __inefx_nic_t *enp);
+
#if EFSYS_OPT_DIAG
extern __checkReturn efx_rc_t
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:05:49 2018
(r341298)
+++ head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:06:01 2018
(r341299)
@@ -2347,11 +2347,19 @@ ef10_nic_hw_unavailable(
return (B_FALSE);
unavail:
- EFSYS_PROBE(hw_unavail);
- enp->en_reset_flags |= EFX_RESET_HW_UNAVAIL;
+ ef10_nic_set_hw_unavailable(enp);
return (B_TRUE);
}
+
+ void
+ef10_nic_set_hw_unavailable(
+ __inefx_nic_t *enp)
+{
+ EFSYS_PROBE(hw_unavail);
+ enp->en_reset_flags |= EFX_RESET_HW_UNAVAIL;
+}
+
void
ef10_nic_fini(
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:05:49 2018
(r341298)
+++ head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:06:01 2018
(r341299)
@@ -187,6 +187,10 @@ extern __checkReturn boolean_t
efx_nic_hw_unavailable(
__inefx_nic_t *enp);
+extern void
+efx_nic_set_hw_unavailable(
+ __inefx_nic_t *enp);
+
#if EFSYS_OPT_DIAG
extern __checkReturn efx_rc_t
Modified: head/sys/dev/sfxge/common/efx_impl.h
==
--- head/sys/dev/sfxge/common/efx_impl.hFri Nov 30 07:05:49 2018
(r341298)
+++ head/sys/dev/sfxge/common/efx_impl.hFri Nov 30 07:06:01 2018
(r341299)
@@ -386,6 +386,7 @@ typedef struct efx_nic_ops_s {
efx_rc_t(*eno_get_bar_region)(efx_nic_t *, efx_nic_region_t,
uint32_t *, size_t *);
boolean_t (*eno_hw_unavailable)(efx_nic_t *);
+ void(*eno_set_hw_unavailable)(efx_nic_t *);
#if EFSYS_OPT_DIAG
efx_rc_t(*eno_register_test)(efx_nic_t *);
#endif /* EFSYS_OPT_DIAG */
Modified: head/sys/dev/sfxge/common/efx_nic.c
==
--- head/sys/dev/sfxge/common/efx_nic.c Fri Nov 30 07:05:49 2018
(r341298)
+++ head/sys/dev/sfxge/common/efx_nic.c Fri Nov 30 07:06:01 2018
(r341299)
@@ -130,6 +130,7 @@ static const efx_nic_ops_t __efx_nic_siena_ops = {
NULL, /* eno_get_vi_pool */
NULL, /* eno_get_bar_region */
NULL, /* eno_hw_unavailable */
+ NULL, /* eno_set_hw_unavailable */
#if EFSYS_OPT_DIAG
siena_nic_register_test,/* eno_register_test */
#endif /* EFSYS_OPT_DIAG */
@@ -150,6 +151,7 @@ static const efx_nic_ops_t __efx_nic_hunt_ops = {
ef10_nic_get_vi_pool, /* eno_get_vi_pool */
ef10_nic_get_bar_region,/* eno_get_bar_region */
ef10_nic_hw_unavailable,/* eno_hw_unavailable */
+ ef10_nic_set_hw_unavailable,/* eno_set_hw_unavailable */
#if EFSYS_OPT_DIAG
ef10_nic_register_test, /* eno_register_test */
#endif /* EFSYS_OPT_DIAG */
@@ -170,6 +172,7 @@ static const efx_nic_ops_t __efx_nic_medford_ops = {
ef10_nic_get_vi_pool, /* eno_get_vi_pool */
ef10_nic_get_bar_region,/* eno_get_bar_region */
ef10_nic_hw_unavailable,/* eno_hw_unavailabl
svn commit: r341297 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:05:36 2018
New Revision: 341297
URL: https://svnweb.freebsd.org/changeset/base/341297
Log:
sfxge(4): fix out of bounds read when dereferencing sdup
Introduce and use macro to make sure that MCDI buffers allocated
on stack are rounded up properly.
Submitted by: Gautam Dawar
Sponsored by: Solarflare Communications, Inc.
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D18259
Modified:
head/sys/dev/sfxge/common/ef10_ev.c
head/sys/dev/sfxge/common/ef10_filter.c
head/sys/dev/sfxge/common/ef10_intr.c
head/sys/dev/sfxge/common/ef10_mac.c
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/ef10_phy.c
head/sys/dev/sfxge/common/ef10_rx.c
head/sys/dev/sfxge/common/ef10_tx.c
head/sys/dev/sfxge/common/efx_lic.c
head/sys/dev/sfxge/common/efx_mcdi.c
head/sys/dev/sfxge/common/efx_mcdi.h
head/sys/dev/sfxge/common/efx_nic.c
head/sys/dev/sfxge/common/efx_nvram.c
head/sys/dev/sfxge/common/efx_tunnel.c
head/sys/dev/sfxge/common/mcdi_mon.c
head/sys/dev/sfxge/common/siena_mac.c
head/sys/dev/sfxge/common/siena_nic.c
head/sys/dev/sfxge/common/siena_nvram.c
head/sys/dev/sfxge/common/siena_phy.c
Modified: head/sys/dev/sfxge/common/ef10_ev.c
==
--- head/sys/dev/sfxge/common/ef10_ev.c Fri Nov 30 07:05:23 2018
(r341296)
+++ head/sys/dev/sfxge/common/ef10_ev.c Fri Nov 30 07:05:36 2018
(r341297)
@@ -100,11 +100,10 @@ efx_mcdi_set_evq_tmr(
__inuint32_t timer_ns)
{
efx_mcdi_req_t req;
- uint8_t payload[MAX(MC_CMD_SET_EVQ_TMR_IN_LEN,
- MC_CMD_SET_EVQ_TMR_OUT_LEN)];
+ EFX_MCDI_DECLARE_BUF(payload, MC_CMD_SET_EVQ_TMR_IN_LEN,
+ MC_CMD_SET_EVQ_TMR_OUT_LEN);
efx_rc_t rc;
- (void) memset(payload, 0, sizeof (payload));
req.emr_cmd = MC_CMD_SET_EVQ_TMR;
req.emr_in_buf = payload;
req.emr_in_length = MC_CMD_SET_EVQ_TMR_IN_LEN;
@@ -150,9 +149,9 @@ efx_mcdi_init_evq(
__inboolean_t low_latency)
{
efx_mcdi_req_t req;
- uint8_t payload[
- MAX(MC_CMD_INIT_EVQ_IN_LEN(EFX_EVQ_NBUFS(EFX_EVQ_MAXNEVS)),
- MC_CMD_INIT_EVQ_OUT_LEN)];
+ EFX_MCDI_DECLARE_BUF(payload,
+ MC_CMD_INIT_EVQ_IN_LEN(EFX_EVQ_NBUFS(EFX_EVQ_MAXNEVS)),
+ MC_CMD_INIT_EVQ_OUT_LEN);
efx_qword_t *dma_addr;
uint64_t addr;
int npages;
@@ -167,7 +166,6 @@ efx_mcdi_init_evq(
goto fail1;
}
- (void) memset(payload, 0, sizeof (payload));
req.emr_cmd = MC_CMD_INIT_EVQ;
req.emr_in_buf = payload;
req.emr_in_length = MC_CMD_INIT_EVQ_IN_LEN(npages);
@@ -287,9 +285,9 @@ efx_mcdi_init_evq_v2(
__inuint32_t flags)
{
efx_mcdi_req_t req;
- uint8_t payload[
- MAX(MC_CMD_INIT_EVQ_V2_IN_LEN(EFX_EVQ_NBUFS(EFX_EVQ_MAXNEVS)),
- MC_CMD_INIT_EVQ_V2_OUT_LEN)];
+ EFX_MCDI_DECLARE_BUF(payload,
+ MC_CMD_INIT_EVQ_V2_IN_LEN(EFX_EVQ_NBUFS(EFX_EVQ_MAXNEVS)),
+ MC_CMD_INIT_EVQ_V2_OUT_LEN);
boolean_t interrupting;
unsigned int evq_type;
efx_qword_t *dma_addr;
@@ -304,7 +302,6 @@ efx_mcdi_init_evq_v2(
goto fail1;
}
- (void) memset(payload, 0, sizeof (payload));
req.emr_cmd = MC_CMD_INIT_EVQ;
req.emr_in_buf = payload;
req.emr_in_length = MC_CMD_INIT_EVQ_V2_IN_LEN(npages);
@@ -411,11 +408,10 @@ efx_mcdi_fini_evq(
__inuint32_t instance)
{
efx_mcdi_req_t req;
- uint8_t payload[MAX(MC_CMD_FINI_EVQ_IN_LEN,
- MC_CMD_FINI_EVQ_OUT_LEN)];
+ EFX_MCDI_DECLARE_BUF(payload, MC_CMD_FINI_EVQ_IN_LEN,
+ MC_CMD_FINI_EVQ_OUT_LEN);
efx_rc_t rc;
- (void) memset(payload, 0, sizeof (payload));
req.emr_cmd = MC_CMD_FINI_EVQ;
req.emr_in_buf = payload;
req.emr_in_length = MC_CMD_FINI_EVQ_IN_LEN;
@@ -630,8 +626,8 @@ efx_mcdi_driver_event(
__inefx_qword_t data)
{
efx_mcdi_req_t req;
- uint8_t payload[MAX(MC_CMD_DRIVER_EVENT_IN_LEN,
- MC_CMD_DRIVER_EVENT_OUT_LEN)];
+ EFX_MCDI_DECLARE_BUF(payload, MC_CMD_DRIVER_EVENT_IN_LEN,
+ MC_CMD_DRIVER_EVENT_OUT_LEN);
efx_rc_t rc;
req.emr_cmd = MC_CMD_DRIVER_EVENT;
Modified: head/sys/dev/sfxge/common/ef10_filter.c
==
--- head/sys/dev/sfxge/common/ef10_filter.c Fri Nov 30 07:05:23 2018
(r341296)
+++ head/sys/dev/sfxge/common/ef10_filter.c Fri Nov 30 07:05:36 2018
(r341297)
@@ -199,12 +199,11 @@ efx_mcdi_filter_op_add(
__inout ef10_filter_handle_t *handle)
{
efx_mcdi_req_t req;
- uint8_t p
svn commit: r341296 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:05:23 2018
New Revision: 341296
URL: https://svnweb.freebsd.org/changeset/base/341296
Log:
sfxge(4): add information if TSO workaround is required
In SF bug 61297 it's been confirmed that the hardware does not always
calculate the TCP checksum correctly with TSO sends.
The value of the Total Length field (IPv4) or Payload Length field
(IPv6) is the critical factor. We're sufficiently confident that if
these fields are zero then the checksum will be calculated correctly.
The information may be used by the drivers to check if the workaround is
required when FATSOv2 is implemented.
Submitted by: Mark Spender
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18258
Modified:
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/hunt_nic.c
head/sys/dev/sfxge/common/medford2_nic.c
head/sys/dev/sfxge/common/medford_nic.c
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:05:12 2018
(r341295)
+++ head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:05:23 2018
(r341296)
@@ -1320,6 +1320,7 @@ typedef struct efx_nic_cfg_s {
boolean_t enc_bug35388_workaround;
boolean_t enc_bug41750_workaround;
boolean_t enc_bug61265_workaround;
+ boolean_t enc_bug61297_workaround;
boolean_t enc_rx_batching_enabled;
/* Maximum number of descriptors completed in an rx event. */
uint32_tenc_rx_batch_max;
Modified: head/sys/dev/sfxge/common/hunt_nic.c
==
--- head/sys/dev/sfxge/common/hunt_nic.cFri Nov 30 07:05:12 2018
(r341295)
+++ head/sys/dev/sfxge/common/hunt_nic.cFri Nov 30 07:05:23 2018
(r341296)
@@ -217,6 +217,9 @@ hunt_board_cfg(
encp->enc_bug61265_workaround = B_FALSE; /* Medford only */
+ /* Checksums for TSO sends can be incorrect on Huntington. */
+ encp->enc_bug61297_workaround = B_TRUE;
+
/* Alignment for receive packet DMA buffers */
encp->enc_rx_buf_align_start = 1;
encp->enc_rx_buf_align_end = 64; /* RX DMA end padding */
Modified: head/sys/dev/sfxge/common/medford2_nic.c
==
--- head/sys/dev/sfxge/common/medford2_nic.cFri Nov 30 07:05:12 2018
(r341295)
+++ head/sys/dev/sfxge/common/medford2_nic.cFri Nov 30 07:05:23 2018
(r341296)
@@ -125,6 +125,9 @@ medford2_board_cfg(
else
goto fail1;
+ /* Checksums for TSO sends should always be correct on Medford2. */
+ encp->enc_bug61297_workaround = B_FALSE;
+
/* Get clock frequencies (in MHz). */
if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)
goto fail2;
Modified: head/sys/dev/sfxge/common/medford_nic.c
==
--- head/sys/dev/sfxge/common/medford_nic.c Fri Nov 30 07:05:12 2018
(r341295)
+++ head/sys/dev/sfxge/common/medford_nic.c Fri Nov 30 07:05:23 2018
(r341296)
@@ -121,6 +121,9 @@ medford_board_cfg(
else
goto fail1;
+ /* Checksums for TSO sends can be incorrect on Medford. */
+ encp->enc_bug61297_workaround = B_TRUE;
+
/* Get clock frequencies (in MHz). */
if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)
goto fail2;
___
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svn commit: r341292 - head/sys/dev/sfxge/common
Author: arybchik Date: Fri Nov 30 07:04:37 2018 New Revision: 341292 URL: https://svnweb.freebsd.org/changeset/base/341292 Log: sfxge(4): add buffer editing functions to boot config Functions to process the DHCP option list format used by the expansion ROM config buffers, to support extracting and updating of individual options. The initial use case is the driver presenting the global and per-PF options as separate items, with the driver implementing the synchronization of global options across the configuration buffers for all PFs. Submitted by: Richard Houldsworth Sponsored by: Solarflare Communications, Inc. Differential Revision: https://reviews.freebsd.org/D18254 Modified: head/sys/dev/sfxge/common/efx.h head/sys/dev/sfxge/common/efx_annote.h (contents, props changed) head/sys/dev/sfxge/common/efx_bootcfg.c Modified: head/sys/dev/sfxge/common/efx.h == --- head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:04:25 2018 (r341291) +++ head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:04:37 2018 (r341292) @@ -1690,6 +1690,87 @@ efx_bootcfg_write( __in_bcount(size) uint8_t *data, __insize_t size); + +/* + * Processing routines for buffers arranged in the DHCP/BOOTP option format + * (see https://tools.ietf.org/html/rfc1533) + * + * Summarising the format: the buffer is a sequence of options. All options + * begin with a tag octet, which uniquely identifies the option. Fixed- + * length options without data consist of only a tag octet. Only options PAD + * (0) and END (255) are fixed length. All other options are variable-length + * with a length octet following the tag octet. The value of the length + * octet does not include the two octets specifying the tag and length. The + * length octet is followed by "length" octets of data. + * + * Option data may be a sequence of sub-options in the same format. The data + * content of the encapsulating option is one or more encapsulated sub-options, + * with no terminating END tag is required. + * + * To be valid, the top-level sequence of options should be terminated by an + * END tag. The buffer should be padded with the PAD byte. + * + * When stored to NVRAM, the DHCP option format buffer is preceded by a + * checksum octet. The full buffer (including after the END tag) contributes + * to the checksum, hence the need to fill the buffer to the end with PAD. + */ + +#defineEFX_DHCP_END ((uint8_t)0xff) +#defineEFX_DHCP_PAD ((uint8_t)0) + +#defineEFX_DHCP_ENCAP_OPT(encapsulator, encapsulated) \ + (uint16_t)(((encapsulator) << 8) | (encapsulated)) + +extern __checkReturn uint8_t +efx_dhcp_csum( + __in_bcount(size) uint8_t const *data, + __insize_t size); + +extern __checkReturn efx_rc_t +efx_dhcp_verify( + __in_bcount(size) uint8_t const *data, + __insize_t size, + __out_opt size_t *usedp); + +extern __checkReturn efx_rc_t +efx_dhcp_find_tag( + __in_bcount(buffer_length) uint8_t *bufferp, + __insize_t buffer_length, + __inuint16_t opt, + __deref_out uint8_t **valuepp, + __out size_t *value_lengthp); + +extern __checkReturn efx_rc_t +efx_dhcp_find_end( + __in_bcount(buffer_length) uint8_t *bufferp, + __insize_t buffer_length, + __deref_out uint8_t **endpp); + + +extern __checkReturn efx_rc_t +efx_dhcp_delete_tag( + __inout_bcount(buffer_length) uint8_t *bufferp, + __insize_t buffer_length, + __inuint16_t opt); + +extern __checkReturn efx_rc_t +efx_dhcp_add_tag( + __inout_bcount(buffer_length) uint8_t *bufferp, + __insize_t buffer_length, + __inuint16_t opt, + __in_bcount_opt(value_length) uint8_t *valuep, + __insize_t value_length); + +extern __checkReturn efx_rc_t +efx_dhcp_update_tag( + __inout_bcount(buffer_length) uint8_t *bufferp, + __insize_t buffer_length, + __inuint16_t opt, + __inuint8_t *value_locationp, + __in_bcount_opt(value_length) uint8_t *valuep, + __insize_t value_length); + + #endif /* EFSYS_OPT_BOOTCFG */ #if EFSYS_OPT_IMAGE_LAYOUT Modified: head/sys/dev/sfxge/common/efx_annote.h == --- head/sys/dev/sfxge/common/efx_annote.h Fri Nov 30 07:04:25 2018 (r341291) +++ head/sys/dev/sfxge/comm
svn commit: r341293 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:04:48 2018
New Revision: 341293
URL: https://svnweb.freebsd.org/changeset/base/341293
Log:
sfxge(4): add accessor for default port mode
Extend efx_mcdi_get_port_modes() to optionally pass on the default
port mode field. This provides a more direct way of handling the case
where the dynamic config does not specify the port mode than the
alternative of a lookup table indexed by MCFW subtype.
Submitted by: Richard Houldsworth
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18255
Modified:
head/sys/dev/sfxge/common/ef10_impl.h
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/hunt_nic.c
head/sys/dev/sfxge/common/medford2_nic.c
head/sys/dev/sfxge/common/medford_nic.c
Modified: head/sys/dev/sfxge/common/ef10_impl.h
==
--- head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:04:37 2018
(r341292)
+++ head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:04:48 2018
(r341293)
@@ -1154,7 +1154,8 @@ extern__checkReturn efx_rc_t
efx_mcdi_get_port_modes(
__inefx_nic_t *enp,
__out uint32_t *modesp,
- __out_opt uint32_t *current_modep);
+ __out_opt uint32_t *current_modep,
+ __out_opt uint32_t *default_modep);
extern __checkReturn efx_rc_t
ef10_nic_get_port_mode_bandwidth(
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:04:37 2018
(r341292)
+++ head/sys/dev/sfxge/common/ef10_nic.cFri Nov 30 07:04:48 2018
(r341293)
@@ -90,7 +90,8 @@ fail1:
efx_mcdi_get_port_modes(
__inefx_nic_t *enp,
__out uint32_t *modesp,
- __out_opt uint32_t *current_modep)
+ __out_opt uint32_t *current_modep,
+ __out_opt uint32_t *default_modep)
{
efx_mcdi_req_t req;
uint8_t payload[MAX(MC_CMD_GET_PORT_MODES_IN_LEN,
@@ -137,6 +138,11 @@ efx_mcdi_get_port_modes(
GET_PORT_MODES_OUT_CURRENT_MODE);
}
+ if (default_modep != NULL) {
+ *default_modep = MCDI_OUT_DWORD(req,
+ GET_PORT_MODES_OUT_DEFAULT_MODE);
+ }
+
return (0);
fail3:
@@ -1662,13 +1668,14 @@ ef10_external_port_mapping(
int32_t count = 1; /* Default 1-1 mapping */
int32_t offset = 1; /* Default starting external port number */
- if ((rc = efx_mcdi_get_port_modes(enp, &port_modes, ¤t)) != 0) {
+ if ((rc = efx_mcdi_get_port_modes(enp, &port_modes, ¤t,
+ NULL)) != 0) {
/*
* No current port mode information (i.e. Huntington)
* - infer mapping from available modes
*/
if ((rc = efx_mcdi_get_port_modes(enp,
- &port_modes, NULL)) != 0) {
+ &port_modes, NULL, NULL)) != 0) {
/*
* No port mode information available
* - use default mapping
Modified: head/sys/dev/sfxge/common/hunt_nic.c
==
--- head/sys/dev/sfxge/common/hunt_nic.cFri Nov 30 07:04:37 2018
(r341292)
+++ head/sys/dev/sfxge/common/hunt_nic.cFri Nov 30 07:04:48 2018
(r341293)
@@ -57,7 +57,8 @@ hunt_nic_get_required_pcie_bandwidth(
* capable mode is in use.
*/
- if ((rc = efx_mcdi_get_port_modes(enp, &port_modes, NULL)) != 0) {
+ if ((rc = efx_mcdi_get_port_modes(enp, &port_modes,
+ NULL, NULL)) != 0) {
/* No port mode info available */
bandwidth = 0;
goto out;
Modified: head/sys/dev/sfxge/common/medford2_nic.c
==
--- head/sys/dev/sfxge/common/medford2_nic.cFri Nov 30 07:04:37 2018
(r341292)
+++ head/sys/dev/sfxge/common/medford2_nic.cFri Nov 30 07:04:48 2018
(r341293)
@@ -52,7 +52,7 @@ medford2_nic_get_required_pcie_bandwidth(
/* FIXME: support new Medford2 dynamic port modes */
if ((rc = efx_mcdi_get_port_modes(enp, &port_modes,
- ¤t_mode)) != 0) {
+ ¤t_mode, NULL)) != 0) {
/* No port mode info available. */
bandwidth = 0;
goto out;
Modified: head/sys/dev/sfxge/common/medford_nic.c
==
--- head/sys/dev/sfxge/common/medford_nic.c Fri Nov 30 07:04:37 2018
(r341292)
+++ hea
svn commit: r341290 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:04:13 2018
New Revision: 341290
URL: https://svnweb.freebsd.org/changeset/base/341290
Log:
sfxge(4): check size of memory to read sensors data to
Size of provided memory should be consistent with specified size.
Submitted by: Martin Harvey
Sponsored by: Solarflare Communications, Inc.
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D18252
Modified:
head/sys/dev/sfxge/common/mcdi_mon.c
Modified: head/sys/dev/sfxge/common/mcdi_mon.c
==
--- head/sys/dev/sfxge/common/mcdi_mon.cFri Nov 30 06:47:01 2018
(r341289)
+++ head/sys/dev/sfxge/common/mcdi_mon.cFri Nov 30 07:04:13 2018
(r341290)
@@ -221,7 +221,13 @@ efx_mcdi_read_sensors(
uint8_t payload[MAX(MC_CMD_READ_SENSORS_EXT_IN_LEN,
MC_CMD_READ_SENSORS_EXT_OUT_LEN)];
uint32_t addr_lo, addr_hi;
+ efx_rc_t rc;
+ if (EFSYS_MEM_SIZE(esmp) < size) {
+ rc = EINVAL;
+ goto fail1;
+ }
+
req.emr_cmd = MC_CMD_READ_SENSORS;
req.emr_in_buf = payload;
req.emr_in_length = MC_CMD_READ_SENSORS_EXT_IN_LEN;
@@ -238,6 +244,11 @@ efx_mcdi_read_sensors(
efx_mcdi_execute(enp, &req);
return (req.emr_rc);
+
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+ return (rc);
}
static __checkReturn efx_rc_t
___
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svn commit: r341291 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 07:04:25 2018
New Revision: 341291
URL: https://svnweb.freebsd.org/changeset/base/341291
Log:
sfxge(4): add API to retrieve sensor limits
Submitted by: Martin Harvey
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18253
Modified:
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_impl.h
head/sys/dev/sfxge/common/efx_mon.c
head/sys/dev/sfxge/common/mcdi_mon.c
head/sys/dev/sfxge/common/mcdi_mon.h
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:04:13 2018
(r341290)
+++ head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:04:25 2018
(r341291)
@@ -802,6 +802,13 @@ typedef struct efx_mon_stat_value_s {
efx_mon_stat_unit_t emsv_unit;
} efx_mon_stat_value_t;
+typedef struct efx_mon_limit_value_s {
+ uint16_temlv_warning_min;
+ uint16_temlv_warning_max;
+ uint16_temlv_fatal_min;
+ uint16_temlv_fatal_max;
+} efx_mon_stat_limits_t;
+
typedef enum efx_mon_stat_portmask_e {
EFX_MON_STAT_PORTMAP_NONE = 0,
EFX_MON_STAT_PORTMAP_PORT0 = 1,
@@ -846,6 +853,11 @@ efx_mon_stats_update(
__inefx_nic_t *enp,
__inefsys_mem_t *esmp,
__inout_ecount(EFX_MON_NSTATS) efx_mon_stat_value_t *values);
+
+extern __checkReturn efx_rc_t
+efx_mon_limits_update(
+ __inefx_nic_t *enp,
+ __inout_ecount(EFX_MON_NSTATS) efx_mon_stat_limits_t *values);
#endif /* EFSYS_OPT_MON_STATS */
Modified: head/sys/dev/sfxge/common/efx_impl.h
==
--- head/sys/dev/sfxge/common/efx_impl.hFri Nov 30 07:04:13 2018
(r341290)
+++ head/sys/dev/sfxge/common/efx_impl.hFri Nov 30 07:04:25 2018
(r341291)
@@ -345,6 +345,8 @@ typedef struct efx_mon_ops_s {
#if EFSYS_OPT_MON_STATS
efx_rc_t(*emo_stats_update)(efx_nic_t *, efsys_mem_t *,
efx_mon_stat_value_t *);
+ efx_rc_t(*emo_limits_update)(efx_nic_t *,
+efx_mon_stat_limits_t *);
#endif /* EFSYS_OPT_MON_STATS */
} efx_mon_ops_t;
Modified: head/sys/dev/sfxge/common/efx_mon.c
==
--- head/sys/dev/sfxge/common/efx_mon.c Fri Nov 30 07:04:13 2018
(r341290)
+++ head/sys/dev/sfxge/common/efx_mon.c Fri Nov 30 07:04:25 2018
(r341291)
@@ -67,7 +67,8 @@ efx_mon_name(
#if EFSYS_OPT_MON_MCDI
static const efx_mon_ops_t __efx_mon_mcdi_ops = {
#if EFSYS_OPT_MON_STATS
- mcdi_mon_stats_update /* emo_stats_update */
+ mcdi_mon_stats_update, /* emo_stats_update */
+ mcdi_mon_limits_update, /* emo_limits_update */
#endif /* EFSYS_OPT_MON_STATS */
};
#endif
@@ -842,6 +843,20 @@ efx_mon_stats_update(
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MON);
return (emop->emo_stats_update(enp, esmp, values));
+}
+
+ __checkReturn efx_rc_t
+efx_mon_limits_update(
+ __inefx_nic_t *enp,
+ __inout_ecount(EFX_MON_NSTATS) efx_mon_stat_limits_t *values)
+{
+ efx_mon_t *emp = &(enp->en_mon);
+ const efx_mon_ops_t *emop = emp->em_emop;
+
+ EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
+ EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MON);
+
+ return (emop->emo_limits_update(enp, values));
}
#endif /* EFSYS_OPT_MON_STATS */
Modified: head/sys/dev/sfxge/common/mcdi_mon.c
==
--- head/sys/dev/sfxge/common/mcdi_mon.cFri Nov 30 07:04:13 2018
(r341290)
+++ head/sys/dev/sfxge/common/mcdi_mon.cFri Nov 30 07:04:25 2018
(r341291)
@@ -361,6 +361,87 @@ fail1:
return (rc);
}
+static __checkReturn efx_rc_t
+efx_mcdi_sensor_info_page(
+ __inefx_nic_t *enp,
+ __inuint32_t page,
+ __out uint32_t *mask_part,
+ __out_ecount((sizeof (*mask_part) * 8) - 1)
+ efx_mon_stat_limits_t *limits)
+{
+ efx_mcdi_req_t req;
+ uint8_t payload[MAX(MC_CMD_SENSOR_INFO_EXT_IN_LEN,
+ MC_CMD_SENSOR_INFO_OUT_LENMAX)];
+ efx_rc_t rc;
+ uint32_t mask_copy;
+ efx_dword_t *maskp;
+ efx_qword_t *limit_info;
+
+ EFSYS_ASSERT(mask_part != NULL);
+ EFSYS_ASSERT(limits != NULL);
+
+ memset(limits, 0,
+ ((sizeof (*mask_part) * 8) - 1) * sizeof (efx_mon_stat_limi
svn commit: r341286 - in head/sys: dev/sfxge/common modules/sfxge
Author: arybchik
Date: Fri Nov 30 05:54:30 2018
New Revision: 341286
URL: https://svnweb.freebsd.org/changeset/base/341286
Log:
sfxge(4): add generated description of sensors
Description of sensors is generated from firmware sources.
Submitted by: Martin Harvey
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18251
Added:
head/sys/dev/sfxge/common/efx_regs_mcdi_strs.h (contents, props changed)
Modified:
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_mcdi.h
head/sys/dev/sfxge/common/efx_mon.c
head/sys/modules/sfxge/Makefile
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Fri Nov 30 05:54:19 2018
(r341285)
+++ head/sys/dev/sfxge/common/efx.h Fri Nov 30 05:54:30 2018
(r341286)
@@ -819,6 +819,11 @@ efx_mon_stat_name(
__inefx_nic_t *enp,
__inefx_mon_stat_t id);
+extern const char *
+efx_mon_stat_description(
+ __inefx_nic_t *enp,
+ __inefx_mon_stat_t id);
+
#endif /* EFSYS_OPT_NAMES */
extern __checkReturn boolean_t
Modified: head/sys/dev/sfxge/common/efx_mcdi.h
==
--- head/sys/dev/sfxge/common/efx_mcdi.hFri Nov 30 05:54:19 2018
(r341285)
+++ head/sys/dev/sfxge/common/efx_mcdi.hFri Nov 30 05:54:30 2018
(r341286)
@@ -38,6 +38,10 @@
#include "efx.h"
#include "efx_regs_mcdi.h"
+#if EFSYS_OPT_NAMES
+#include "efx_regs_mcdi_strs.h"
+#endif /* EFSYS_OPT_NAMES */
+
#ifdef __cplusplus
extern "C" {
#endif
Modified: head/sys/dev/sfxge/common/efx_mon.c
==
--- head/sys/dev/sfxge/common/efx_mon.c Fri Nov 30 05:54:19 2018
(r341285)
+++ head/sys/dev/sfxge/common/efx_mon.c Fri Nov 30 05:54:30 2018
(r341286)
@@ -214,7 +214,124 @@ static const char * const __mon_stat_name[] = {
/* END MKCONFIG GENERATED MonitorStatNamesBlock */
-/* START MKCONFIG GENERATED MonitorMcdiMappingBlock 362875db87a4e7da */
+ const char *
+efx_mon_stat_name(
+ __inefx_nic_t *enp,
+ __inefx_mon_stat_t id)
+{
+ _NOTE(ARGUNUSED(enp))
+ EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
+
+ EFSYS_ASSERT3U(id, <, EFX_MON_NSTATS);
+ return (__mon_stat_name[id]);
+}
+
+typedef struct _stat_description_t {
+ efx_mon_stat_t stat;
+ const char *desc;
+} stat_description_t;
+
+/* START MKCONFIG GENERATED MonitorStatDescriptionsBlock f072138f16d2e1f8 */
+static const char *__mon_stat_description[] = {
+ MC_CMD_SENSOR_CONTROLLER_TEMP_ENUM_STR,
+ MC_CMD_SENSOR_PHY_COMMON_TEMP_ENUM_STR,
+ MC_CMD_SENSOR_CONTROLLER_COOLING_ENUM_STR,
+ MC_CMD_SENSOR_PHY0_TEMP_ENUM_STR,
+ MC_CMD_SENSOR_PHY0_COOLING_ENUM_STR,
+ MC_CMD_SENSOR_PHY1_TEMP_ENUM_STR,
+ MC_CMD_SENSOR_PHY1_COOLING_ENUM_STR,
+ MC_CMD_SENSOR_IN_1V0_ENUM_STR,
+ MC_CMD_SENSOR_IN_1V2_ENUM_STR,
+ MC_CMD_SENSOR_IN_1V8_ENUM_STR,
+ MC_CMD_SENSOR_IN_2V5_ENUM_STR,
+ MC_CMD_SENSOR_IN_3V3_ENUM_STR,
+ MC_CMD_SENSOR_IN_12V0_ENUM_STR,
+ MC_CMD_SENSOR_IN_1V2A_ENUM_STR,
+ MC_CMD_SENSOR_IN_VREF_ENUM_STR,
+ MC_CMD_SENSOR_OUT_VAOE_ENUM_STR,
+ MC_CMD_SENSOR_AOE_TEMP_ENUM_STR,
+ MC_CMD_SENSOR_PSU_AOE_TEMP_ENUM_STR,
+ MC_CMD_SENSOR_PSU_TEMP_ENUM_STR,
+ MC_CMD_SENSOR_FAN_0_ENUM_STR,
+ MC_CMD_SENSOR_FAN_1_ENUM_STR,
+ MC_CMD_SENSOR_FAN_2_ENUM_STR,
+ MC_CMD_SENSOR_FAN_3_ENUM_STR,
+ MC_CMD_SENSOR_FAN_4_ENUM_STR,
+ MC_CMD_SENSOR_IN_VAOE_ENUM_STR,
+ MC_CMD_SENSOR_OUT_IAOE_ENUM_STR,
+ MC_CMD_SENSOR_IN_IAOE_ENUM_STR,
+ MC_CMD_SENSOR_NIC_POWER_ENUM_STR,
+ MC_CMD_SENSOR_IN_0V9_ENUM_STR,
+ MC_CMD_SENSOR_IN_I0V9_ENUM_STR,
+ MC_CMD_SENSOR_IN_I1V2_ENUM_STR,
+ MC_CMD_SENSOR_IN_0V9_ADC_ENUM_STR,
+ MC_CMD_SENSOR_CONTROLLER_2_TEMP_ENUM_STR,
+ MC_CMD_SENSOR_VREG_INTERNAL_TEMP_ENUM_STR,
+ MC_CMD_SENSOR_VREG_0V9_TEMP_ENUM_STR,
+ MC_CMD_SENSOR_VREG_1V2_TEMP_ENUM_STR,
+ MC_CMD_SENSOR_CONTROLLER_VPTAT_ENUM_STR,
+ MC_CMD_SENSOR_CONTROLLER_INTERNAL_TEMP_ENUM_STR,
+ MC_CMD_SENSOR_CONTROLLER_VPTAT_EXTADC_ENUM_STR,
+ MC_CMD_SENSOR_CONTROLLER_INTERNAL_TEMP_EXTADC_ENUM_STR,
+ MC_CMD_SENSOR_AMBIENT_TEMP_ENUM_STR,
+ MC_CMD_SENSOR_AIRFLOW_ENUM_STR,
+ MC_CMD_SENSOR_VDD08D_VSS08D_CSR_ENUM_STR,
+ MC_CMD_SENSOR_VDD08D_VSS08D_CSR_EXTADC_ENUM_STR,
+ MC_CMD_SENSOR_HOTPOINT_TEMP_ENUM_STR,
+ MC_CMD_SENSOR_PHY_POWER_PORT0_ENUM_STR,
+
svn commit: r341284 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 05:54:07 2018
New Revision: 341284
URL: https://svnweb.freebsd.org/changeset/base/341284
Log:
sfxge(4): refactor monitors support
Remove obsolete monitor types since Falcon SFN4000 series adapters
no longer supported by libefx.
Rename MCDI monitors to be consistent with YML.
The code may be simplified and generalized since only MCDI monitors
remain.
Submitted by: Martin Harvey
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18249
Modified:
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_mon.c
head/sys/dev/sfxge/common/mcdi_mon.c
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Fri Nov 30 05:50:01 2018
(r341283)
+++ head/sys/dev/sfxge/common/efx.h Fri Nov 30 05:54:07 2018
(r341284)
@@ -690,77 +690,74 @@ efx_mon_init(
#defineEFX_MON_STATS_PAGE_SIZE 0x100
#defineEFX_MON_MASK_ELEMENT_SIZE 32
-/* START MKCONFIG GENERATED MonitorHeaderStatsBlock 400fdb0517af1fca */
+/* START MKCONFIG GENERATED MonitorHeaderStatsBlock 78b65c8d5af9747b */
typedef enum efx_mon_stat_e {
- EFX_MON_STAT_2_5V,
- EFX_MON_STAT_VCCP1,
- EFX_MON_STAT_VCC,
- EFX_MON_STAT_5V,
- EFX_MON_STAT_12V,
- EFX_MON_STAT_VCCP2,
- EFX_MON_STAT_EXT_TEMP,
- EFX_MON_STAT_INT_TEMP,
- EFX_MON_STAT_AIN1,
- EFX_MON_STAT_AIN2,
- EFX_MON_STAT_INT_COOLING,
- EFX_MON_STAT_EXT_COOLING,
- EFX_MON_STAT_1V,
- EFX_MON_STAT_1_2V,
- EFX_MON_STAT_1_8V,
- EFX_MON_STAT_3_3V,
- EFX_MON_STAT_1_2VA,
- EFX_MON_STAT_VREF,
- EFX_MON_STAT_VAOE,
+ EFX_MON_STAT_CONTROLLER_TEMP,
+ EFX_MON_STAT_PHY_COMMON_TEMP,
+ EFX_MON_STAT_CONTROLLER_COOLING,
+ EFX_MON_STAT_PHY0_TEMP,
+ EFX_MON_STAT_PHY0_COOLING,
+ EFX_MON_STAT_PHY1_TEMP,
+ EFX_MON_STAT_PHY1_COOLING,
+ EFX_MON_STAT_IN_1V0,
+ EFX_MON_STAT_IN_1V2,
+ EFX_MON_STAT_IN_1V8,
+ EFX_MON_STAT_IN_2V5,
+ EFX_MON_STAT_IN_3V3,
+ EFX_MON_STAT_IN_12V0,
+ EFX_MON_STAT_IN_1V2A,
+ EFX_MON_STAT_IN_VREF,
+ EFX_MON_STAT_OUT_VAOE,
EFX_MON_STAT_AOE_TEMP,
EFX_MON_STAT_PSU_AOE_TEMP,
EFX_MON_STAT_PSU_TEMP,
- EFX_MON_STAT_FAN0,
- EFX_MON_STAT_FAN1,
- EFX_MON_STAT_FAN2,
- EFX_MON_STAT_FAN3,
- EFX_MON_STAT_FAN4,
- EFX_MON_STAT_VAOE_IN,
- EFX_MON_STAT_IAOE,
- EFX_MON_STAT_IAOE_IN,
+ EFX_MON_STAT_FAN_0,
+ EFX_MON_STAT_FAN_1,
+ EFX_MON_STAT_FAN_2,
+ EFX_MON_STAT_FAN_3,
+ EFX_MON_STAT_FAN_4,
+ EFX_MON_STAT_IN_VAOE,
+ EFX_MON_STAT_OUT_IAOE,
+ EFX_MON_STAT_IN_IAOE,
EFX_MON_STAT_NIC_POWER,
- EFX_MON_STAT_0_9V,
- EFX_MON_STAT_I0_9V,
- EFX_MON_STAT_I1_2V,
- EFX_MON_STAT_0_9V_ADC,
- EFX_MON_STAT_INT_TEMP2,
- EFX_MON_STAT_VREG_TEMP,
- EFX_MON_STAT_VREG_0_9V_TEMP,
- EFX_MON_STAT_VREG_1_2V_TEMP,
- EFX_MON_STAT_INT_VPTAT,
- EFX_MON_STAT_INT_ADC_TEMP,
- EFX_MON_STAT_EXT_VPTAT,
- EFX_MON_STAT_EXT_ADC_TEMP,
+ EFX_MON_STAT_IN_0V9,
+ EFX_MON_STAT_IN_I0V9,
+ EFX_MON_STAT_IN_I1V2,
+ EFX_MON_STAT_IN_0V9_ADC,
+ EFX_MON_STAT_CONTROLLER_2_TEMP,
+ EFX_MON_STAT_VREG_INTERNAL_TEMP,
+ EFX_MON_STAT_VREG_0V9_TEMP,
+ EFX_MON_STAT_VREG_1V2_TEMP,
+ EFX_MON_STAT_CONTROLLER_VPTAT,
+ EFX_MON_STAT_CONTROLLER_INTERNAL_TEMP,
+ EFX_MON_STAT_CONTROLLER_VPTAT_EXTADC,
+ EFX_MON_STAT_CONTROLLER_INTERNAL_TEMP_EXTADC,
EFX_MON_STAT_AMBIENT_TEMP,
EFX_MON_STAT_AIRFLOW,
EFX_MON_STAT_VDD08D_VSS08D_CSR,
EFX_MON_STAT_VDD08D_VSS08D_CSR_EXTADC,
EFX_MON_STAT_HOTPOINT_TEMP,
- EFX_MON_STAT_PHY_POWER_SWITCH_PORT0,
- EFX_MON_STAT_PHY_POWER_SWITCH_PORT1,
+ EFX_MON_STAT_PHY_POWER_PORT0,
+ EFX_MON_STAT_PHY_POWER_PORT1,
EFX_MON_STAT_MUM_VCC,
- EFX_MON_STAT_0V9_A,
- EFX_MON_STAT_I0V9_A,
- EFX_MON_STAT_0V9_A_TEMP,
- EFX_MON_STAT_0V9_B,
- EFX_MON_STAT_I0V9_B,
- EFX_MON_STAT_0V9_B_TEMP,
+ EFX_MON_STAT_IN_0V9_A,
+ EFX_MON_STAT_IN_I0V9_A,
+ EFX_MON_STAT_VREG_0V9_A_TEMP,
+ EFX_MON_STAT_IN_0V9_B,
+ EFX_MON_STAT_IN_I0V9_B,
+ EFX_MON_STAT_VREG_0V9_B_TEMP,
EFX_MON_STAT_CCOM_AVREG_1V2_SUPPLY,
- EFX_MON_STAT_CCOM_AVREG_1V2_SUPPLY_EXT_ADC,
+ EFX_MON_STAT_CCOM_AVREG_1V2_SUPPLY_EXTADC,
EFX_MON_STAT_CCOM_AVREG_1V8_SUPPLY,
- EFX_MON_STAT_CCOM_AVREG_1V8_SUPPLY_EXT_ADC,
+ EFX_MON_STAT_CCOM_AVREG_1V8_SUPPLY_EXTADC,
EFX_MON_STAT_CONTROLLER_MASTER_VPTAT,
EFX_MON_STAT_CONTROLLER_MASTER_INTERNAL_TEMP,
- EFX_MON_STAT_CONTROLLER_MASTER_VPTAT_EXT_ADC,
- EFX_MON_STAT_CONTROLLER_MASTER_INT
svn commit: r341285 - head/sys/dev/sfxge/common
Author: arybchik
Date: Fri Nov 30 05:54:19 2018
New Revision: 341285
URL: https://svnweb.freebsd.org/changeset/base/341285
Log:
sfxge(4): remove probes when a Tx queue is too full
No need for probe messages when a TxQ is too full for a post to be done.
Existing drivers check if there is room in the queue before posting
descriptors, even though efx_tx_qdesc_post() does the check itself.
The new SFN Windows driver doesn't perform the check before calling
efx_tx_qdesc_post(), but that means these probes can get frequently
printed out. It's normal driver behaviour so there's no need to print
an error.
Submitted by: Mark Spender
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18250
Modified:
head/sys/dev/sfxge/common/ef10_tx.c
head/sys/dev/sfxge/common/efx_tx.c
Modified: head/sys/dev/sfxge/common/ef10_tx.c
==
--- head/sys/dev/sfxge/common/ef10_tx.c Fri Nov 30 05:54:07 2018
(r341284)
+++ head/sys/dev/sfxge/common/ef10_tx.c Fri Nov 30 05:54:19 2018
(r341285)
@@ -568,12 +568,9 @@ ef10_tx_qdesc_post(
{
unsigned int added = *addedp;
unsigned int i;
- efx_rc_t rc;
- if (added - completed + ndescs > EFX_TXQ_LIMIT(etp->et_mask + 1)) {
- rc = ENOSPC;
- goto fail1;
- }
+ if (added - completed + ndescs > EFX_TXQ_LIMIT(etp->et_mask + 1))
+ return (ENOSPC);
for (i = 0; i < ndescs; i++) {
efx_desc_t *edp = &ed[i];
@@ -593,11 +590,6 @@ ef10_tx_qdesc_post(
*addedp = added;
return (0);
-
-fail1:
- EFSYS_PROBE1(fail1, efx_rc_t, rc);
-
- return (rc);
}
void
Modified: head/sys/dev/sfxge/common/efx_tx.c
==
--- head/sys/dev/sfxge/common/efx_tx.c Fri Nov 30 05:54:07 2018
(r341284)
+++ head/sys/dev/sfxge/common/efx_tx.c Fri Nov 30 05:54:19 2018
(r341285)
@@ -601,19 +601,10 @@ efx_tx_qdesc_post(
{
efx_nic_t *enp = etp->et_enp;
const efx_tx_ops_t *etxop = enp->en_etxop;
- efx_rc_t rc;
EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC);
- if ((rc = etxop->etxo_qdesc_post(etp, ed,
- ndescs, completed, addedp)) != 0)
- goto fail1;
-
- return (0);
-
-fail1:
- EFSYS_PROBE1(fail1, efx_rc_t, rc);
- return (rc);
+ return (etxop->etxo_qdesc_post(etp, ed, ndescs, completed, addedp));
}
void
@@ -792,10 +783,9 @@ siena_tx_qpost(
{
unsigned int added = *addedp;
unsigned int i;
- int rc = ENOSPC;
if (added - completed + ndescs > EFX_TXQ_LIMIT(etp->et_mask + 1))
- goto fail1;
+ return (ENOSPC);
for (i = 0; i < ndescs; i++) {
efx_buffer_t *ebp = &eb[i];
@@ -817,11 +807,6 @@ siena_tx_qpost(
*addedp = added;
return (0);
-
-fail1:
- EFSYS_PROBE1(fail1, efx_rc_t, rc);
-
- return (rc);
}
static void
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svn commit: r341283 - in head/sys: dev/sfxge/common modules/sfxge
Author: arybchik
Date: Fri Nov 30 05:50:01 2018
New Revision: 341283
URL: https://svnweb.freebsd.org/changeset/base/341283
Log:
sfxge(4): move empty efsys definitions to EFX headers
Move empty definitions for platform-specific annotations from efsys.h
to EFX headers.
Submitted by: Martin Harvey
Submitted by: Andrew Lee
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18248
Added:
head/sys/dev/sfxge/common/efx_annote.h (contents, props changed)
Modified:
head/sys/dev/sfxge/common/efsys.h
head/sys/dev/sfxge/common/efx.h
head/sys/modules/sfxge/Makefile
Modified: head/sys/dev/sfxge/common/efsys.h
==
--- head/sys/dev/sfxge/common/efsys.h Fri Nov 30 04:59:43 2018
(r341282)
+++ head/sys/dev/sfxge/common/efsys.h Fri Nov 30 05:50:01 2018
(r341283)
@@ -77,11 +77,6 @@ extern "C" {
#definememmove(d, s, l) bcopy(s, d, l)
#endif
-/* FreeBSD equivalents of Solaris things */
-#ifndef _NOTE
-#define_NOTE(s)
-#endif
-
#ifndef B_FALSE
#defineB_FALSE FALSE
#endif
@@ -198,40 +193,6 @@ sfxge_map_mbuf_fast(bus_dma_tag_t tag, bus_dmamap_t ma
bus_dmamap_load_mbuf_sg(tag, map, m, seg, &nsegstmp, 0);
#endif
}
-
-/* Modifiers used for Windows builds */
-#define__in
-#define__in_opt
-#define__in_ecount(_n)
-#define__in_ecount_opt(_n)
-#define__in_bcount(_n)
-#define__in_bcount_opt(_n)
-
-#define__out
-#define__out_opt
-#define__out_ecount(_n)
-#define__out_ecount_opt(_n)
-#define__out_bcount(_n)
-#define__out_bcount_opt(_n)
-#define__out_bcount_part(_n, _l)
-#define__out_bcount_part_opt(_n, _l)
-
-#define__deref_out
-
-#define__inout
-#define__inout_opt
-#define__inout_ecount(_n)
-#define__inout_ecount_opt(_n)
-#define__inout_bcount(_n)
-#define__inout_bcount_opt(_n)
-#define__inout_bcount_full_opt(_n)
-
-#define__deref_out_bcount_opt(n)
-
-#define__checkReturn
-#define__success(_x)
-
-#define__drv_when(_p, _c)
/* Code inclusion options */
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Fri Nov 30 04:59:43 2018
(r341282)
+++ head/sys/dev/sfxge/common/efx.h Fri Nov 30 05:50:01 2018
(r341283)
@@ -35,6 +35,7 @@
#ifndef_SYS_EFX_H
#define_SYS_EFX_H
+#include "efx_annote.h"
#include "efsys.h"
#include "efx_check.h"
#include "efx_phy_ids.h"
Added: head/sys/dev/sfxge/common/efx_annote.h
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/sfxge/common/efx_annote.h Fri Nov 30 05:50:01 2018
(r341283)
@@ -0,0 +1,129 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2018 Solarflare Communications Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *this list of conditions and the following disclaimer in the documentation
+ *and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * The views and conclusions contained in the software and documentation are
+ * those of the authors and should not be interpreted as representing official
+ * policies, either expressed or implied, of the FreeBSD Project.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef_SYS_EFX_ANNOTE_H
+#define_SYS_EFX_ANNOTE_H
+
+#if defined(_WIN32) || defined(_WIN64)
+#defineEFX_HAVE_WINDOWS_ANNOTATIONS 1
+#else
+#defineEFX_HAVE_WINDOWS_ANNOTATIONS 0
+#endif /* defined(_WIN32)
svn commit: r341214 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:47:19 2018
New Revision: 341214
URL: https://svnweb.freebsd.org/changeset/base/341214
Log:
sfxge(4): fix SAL annotation for input buffers
Submitted by: Martin Harvey
Sponsored by: Solarflare Communications, Inc.
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D18245
Modified:
head/sys/dev/sfxge/common/ef10_impl.h
head/sys/dev/sfxge/common/ef10_nvram.c
head/sys/dev/sfxge/common/efx_impl.h
head/sys/dev/sfxge/common/efx_nvram.c
Modified: head/sys/dev/sfxge/common/ef10_impl.h
==
--- head/sys/dev/sfxge/common/ef10_impl.h Thu Nov 29 06:47:06 2018
(r341213)
+++ head/sys/dev/sfxge/common/ef10_impl.h Thu Nov 29 06:47:19 2018
(r341214)
@@ -456,7 +456,7 @@ ef10_nvram_partn_read(
__inefx_nic_t *enp,
__inuint32_t partn,
__inunsigned int offset,
- __out_bcount(size) caddr_t data,
+ __in_bcount(size) caddr_t data,
__insize_t size);
extern __checkReturn efx_rc_t
Modified: head/sys/dev/sfxge/common/ef10_nvram.c
==
--- head/sys/dev/sfxge/common/ef10_nvram.c Thu Nov 29 06:47:06 2018
(r341213)
+++ head/sys/dev/sfxge/common/ef10_nvram.c Thu Nov 29 06:47:19 2018
(r341214)
@@ -2027,7 +2027,7 @@ ef10_nvram_partn_write(
__inefx_nic_t *enp,
__inuint32_t partn,
__inunsigned int offset,
- __out_bcount(size) caddr_t data,
+ __in_bcount(size) caddr_t data,
__insize_t size)
{
size_t chunk;
Modified: head/sys/dev/sfxge/common/efx_impl.h
==
--- head/sys/dev/sfxge/common/efx_impl.hThu Nov 29 06:47:06 2018
(r341213)
+++ head/sys/dev/sfxge/common/efx_impl.hThu Nov 29 06:47:19 2018
(r341214)
@@ -611,7 +611,7 @@ efx_mcdi_nvram_write(
__inefx_nic_t *enp,
__inuint32_t partn,
__inuint32_t offset,
- __out_bcount(size) caddr_t data,
+ __in_bcount(size) caddr_t data,
__insize_t size);
__checkReturn efx_rc_t
Modified: head/sys/dev/sfxge/common/efx_nvram.c
==
--- head/sys/dev/sfxge/common/efx_nvram.c Thu Nov 29 06:47:06 2018
(r341213)
+++ head/sys/dev/sfxge/common/efx_nvram.c Thu Nov 29 06:47:19 2018
(r341214)
@@ -894,7 +894,7 @@ efx_mcdi_nvram_write(
__inefx_nic_t *enp,
__inuint32_t partn,
__inuint32_t offset,
- __out_bcount(size) caddr_t data,
+ __in_bcount(size) caddr_t data,
__insize_t size)
{
efx_mcdi_req_t req;
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svn commit: r341213 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:47:06 2018
New Revision: 341213
URL: https://svnweb.freebsd.org/changeset/base/341213
Log:
sfxge(4): fix PreFAST warnings because of unused return
Submitted by: Martin Harvey
Sponsored by: Solarflare Communications, Inc.
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D18244
Modified:
head/sys/dev/sfxge/common/ef10_filter.c
head/sys/dev/sfxge/common/ef10_mac.c
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/ef10_nvram.c
head/sys/dev/sfxge/common/ef10_tx.c
head/sys/dev/sfxge/common/efx_port.c
Modified: head/sys/dev/sfxge/common/ef10_filter.c
==
--- head/sys/dev/sfxge/common/ef10_filter.c Thu Nov 29 06:46:55 2018
(r341212)
+++ head/sys/dev/sfxge/common/ef10_filter.c Thu Nov 29 06:47:06 2018
(r341213)
@@ -1171,12 +1171,15 @@ ef10_filter_insert_unicast(
efx_filter_spec_init_rx(&spec, EFX_FILTER_PRI_AUTO,
filter_flags,
eftp->eft_default_rxq);
- efx_filter_spec_set_eth_local(&spec, EFX_FILTER_SPEC_VID_UNSPEC, addr);
+ rc = efx_filter_spec_set_eth_local(&spec, EFX_FILTER_SPEC_VID_UNSPEC,
+ addr);
+ if (rc != 0)
+ goto fail1;
rc = ef10_filter_add_internal(enp, &spec, B_TRUE,
&eftp->eft_unicst_filter_indexes[eftp->eft_unicst_filter_count]);
if (rc != 0)
- goto fail1;
+ goto fail2;
eftp->eft_unicst_filter_count++;
EFSYS_ASSERT(eftp->eft_unicst_filter_count <=
@@ -1184,6 +1187,8 @@ ef10_filter_insert_unicast(
return (0);
+fail2:
+ EFSYS_PROBE(fail2);
fail1:
EFSYS_PROBE1(fail1, efx_rc_t, rc);
return (rc);
@@ -1202,11 +1207,13 @@ ef10_filter_insert_all_unicast(
efx_filter_spec_init_rx(&spec, EFX_FILTER_PRI_AUTO,
filter_flags,
eftp->eft_default_rxq);
- efx_filter_spec_set_uc_def(&spec);
+ rc = efx_filter_spec_set_uc_def(&spec);
+ if (rc != 0)
+ goto fail1;
rc = ef10_filter_add_internal(enp, &spec, B_TRUE,
&eftp->eft_unicst_filter_indexes[eftp->eft_unicst_filter_count]);
if (rc != 0)
- goto fail1;
+ goto fail2;
eftp->eft_unicst_filter_count++;
EFSYS_ASSERT(eftp->eft_unicst_filter_count <=
@@ -1214,6 +1221,8 @@ ef10_filter_insert_all_unicast(
return (0);
+fail2:
+ EFSYS_PROBE(fail2);
fail1:
EFSYS_PROBE1(fail1, efx_rc_t, rc);
return (rc);
@@ -1255,9 +1264,21 @@ ef10_filter_insert_multicast_list(
filter_flags,
eftp->eft_default_rxq);
- efx_filter_spec_set_eth_local(&spec,
+ rc = efx_filter_spec_set_eth_local(&spec,
EFX_FILTER_SPEC_VID_UNSPEC,
&addrs[i * EFX_MAC_ADDR_LEN]);
+ if (rc != 0) {
+ if (rollback == B_TRUE) {
+ /* Only stop upon failure if told to rollback */
+ goto rollback;
+ } else {
+ /*
+* Don't try to add a filter with a corrupt
+* specification.
+*/
+ continue;
+ }
+ }
rc = ef10_filter_add_internal(enp, &spec, B_TRUE,
&filter_index);
@@ -1280,8 +1301,12 @@ ef10_filter_insert_multicast_list(
eftp->eft_default_rxq);
EFX_MAC_BROADCAST_ADDR_SET(addr);
- efx_filter_spec_set_eth_local(&spec, EFX_FILTER_SPEC_VID_UNSPEC,
- addr);
+ rc = efx_filter_spec_set_eth_local(&spec,
+ EFX_FILTER_SPEC_VID_UNSPEC, addr);
+ if ((rc != 0) && (rollback == B_TRUE)) {
+ /* Only stop upon failure if told to rollback */
+ goto rollback;
+ }
rc = ef10_filter_add_internal(enp, &spec, B_TRUE,
&filter_index);
@@ -1329,12 +1354,14 @@ ef10_filter_insert_all_multicast(
efx_filter_spec_init_rx(&spec, EFX_FILTER_PRI_AUTO,
filter_flags,
eftp->eft_default_rxq);
- efx_filter_spec_set_mc_def(&spec);
+ rc = efx_filter_spec_set_mc_def(&spec);
+ if (rc != 0)
+ goto fail1;
rc = ef10_filter_add_internal(enp, &spec, B_TRUE,
&eftp->eft_mulcst_filter_indexes[0]);
if (rc != 0)
- goto fail1;
+ goto fail2;
eftp->eft_mulcst_filter_count = 1;
eftp->eft_using_all_mulcst = B_TRUE;
@@ -1345,6 +1372,8 @@ ef10_filter_insert_all_multicast(
return (0);
+fa
svn commit: r341212 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:46:55 2018
New Revision: 341212
URL: https://svnweb.freebsd.org/changeset/base/341212
Log:
sfxge(4): add Medford2 head-of-line blocking stats
These stats are availble on Medford2 DPDK firmware variant
which support equal stride super-buffer Rx mode. RXDP_HLB_IDLE
capability bit is set when the stats are available.
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18243
Modified:
head/sys/dev/sfxge/common/ef10_mac.c
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/efx.h
Modified: head/sys/dev/sfxge/common/ef10_mac.c
==
--- head/sys/dev/sfxge/common/ef10_mac.cThu Nov 29 06:46:44 2018
(r341211)
+++ head/sys/dev/sfxge/common/ef10_mac.cThu Nov 29 06:46:55 2018
(r341212)
@@ -571,8 +571,19 @@ ef10_mac_stats_get_mask(
goto fail8;
}
+ if (encp->enc_hlb_counters) {
+ const struct efx_mac_stats_range ef10_hlb[] = {
+ { EFX_MAC_RXDP_HLB_IDLE, EFX_MAC_RXDP_HLB_TIMEOUT },
+ };
+ if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
+ ef10_hlb, EFX_ARRAY_SIZE(ef10_hlb))) != 0)
+ goto fail9;
+ }
+
return (0);
+fail9:
+ EFSYS_PROBE(fail9);
fail8:
EFSYS_PROBE(fail8);
fail7:
@@ -1025,6 +1036,13 @@ ef10_mac_stats_update(
&value);
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_SCATTER_DISABLED_TRUNC]),
&value);
+
+ /* Head-of-line blocking */
+ EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_HLB_IDLE, &value);
+ EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_HLB_IDLE]), &value);
+
+ EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_HLB_TIMEOUT, &value);
+ EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_HLB_TIMEOUT]), &value);
done:
/* Read START generation counter */
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cThu Nov 29 06:46:44 2018
(r341211)
+++ head/sys/dev/sfxge/common/ef10_nic.cThu Nov 29 06:46:55 2018
(r341212)
@@ -1272,6 +1272,12 @@ ef10_get_datapath_caps(
else
encp->enc_fec_counters = B_FALSE;
+ /* Check if the firmware provides head-of-line blocking counters */
+ if (CAP_FLAGS2(req, RXDP_HLB_IDLE))
+ encp->enc_hlb_counters = B_TRUE;
+ else
+ encp->enc_hlb_counters = B_FALSE;
+
if (CAP_FLAGS1(req, RX_RSS_LIMITED)) {
/* Only one exclusive RSS context is available per port. */
encp->enc_rx_scale_max_exclusive_contexts = 1;
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:46:44 2018
(r341211)
+++ head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:46:55 2018
(r341212)
@@ -1324,6 +1324,7 @@ typedef struct efx_nic_cfg_s {
/* Firmware support for extended MAC_STATS buffer */
uint32_tenc_mac_stats_nstats;
boolean_t enc_fec_counters;
+ boolean_t enc_hlb_counters;
/* Firmware support for "FLAG" and "MARK" filter actions */
boolean_t enc_filter_action_flag_supported;
boolean_t enc_filter_action_mark_supported;
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svn commit: r341209 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:46:21 2018
New Revision: 341209
URL: https://svnweb.freebsd.org/changeset/base/341209
Log:
sfxge(4): get max supported value for action MARK
The mark value for MATCH_ACTION_MARK has a maximum value.
Requesting a value larger than the maximum will cause the
filter insertion to fail with EINVAL. This patch allows the
driver to check the value at the filter validation.
Submitted by: Roman Zhukov
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18240
Modified:
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/siena_nic.c
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cThu Nov 29 06:46:10 2018
(r341208)
+++ head/sys/dev/sfxge/common/ef10_nic.cThu Nov 29 06:46:21 2018
(r341209)
@@ -1023,7 +1023,7 @@ ef10_get_datapath_caps(
efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
efx_mcdi_req_t req;
uint8_t payload[MAX(MC_CMD_GET_CAPABILITIES_IN_LEN,
- MC_CMD_GET_CAPABILITIES_V4_OUT_LEN)];
+ MC_CMD_GET_CAPABILITIES_V5_OUT_LEN)];
efx_rc_t rc;
if ((rc = ef10_mcdi_get_pf_count(enp, &encp->enc_hw_pf_count)) != 0)
@@ -1035,7 +1035,7 @@ ef10_get_datapath_caps(
req.emr_in_buf = payload;
req.emr_in_length = MC_CMD_GET_CAPABILITIES_IN_LEN;
req.emr_out_buf = payload;
- req.emr_out_length = MC_CMD_GET_CAPABILITIES_V4_OUT_LEN;
+ req.emr_out_length = MC_CMD_GET_CAPABILITIES_V5_OUT_LEN;
efx_mcdi_execute_quiet(enp, &req);
@@ -1331,6 +1331,13 @@ ef10_get_datapath_caps(
encp->enc_filter_action_mark_supported = B_TRUE;
else
encp->enc_filter_action_mark_supported = B_FALSE;
+
+ /* Get maximum supported value for "MARK" filter action */
+ if (req.emr_out_length_used >= MC_CMD_GET_CAPABILITIES_V5_OUT_LEN)
+ encp->enc_filter_action_mark_max = MCDI_OUT_DWORD(req,
+ GET_CAPABILITIES_V5_OUT_FILTER_ACTION_MARK_MAX);
+ else
+ encp->enc_filter_action_mark_max = 0;
#undef CAP_FLAGS1
#undef CAP_FLAGS2
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:46:10 2018
(r341208)
+++ head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:46:21 2018
(r341209)
@@ -1324,6 +1324,7 @@ typedef struct efx_nic_cfg_s {
/* Firmware support for "FLAG" and "MARK" filter actions */
boolean_t enc_filter_action_flag_supported;
boolean_t enc_filter_action_mark_supported;
+ uint32_tenc_filter_action_mark_max;
} efx_nic_cfg_t;
#defineEFX_PCI_FUNCTION_IS_PF(_encp) ((_encp)->enc_vf == 0x)
Modified: head/sys/dev/sfxge/common/siena_nic.c
==
--- head/sys/dev/sfxge/common/siena_nic.c Thu Nov 29 06:46:10 2018
(r341208)
+++ head/sys/dev/sfxge/common/siena_nic.c Thu Nov 29 06:46:21 2018
(r341209)
@@ -203,6 +203,7 @@ siena_board_cfg(
encp->enc_filter_action_flag_supported = B_FALSE;
encp->enc_filter_action_mark_supported = B_FALSE;
+ encp->enc_filter_action_mark_max = 0;
return (0);
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svn commit: r341208 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:46:10 2018
New Revision: 341208
URL: https://svnweb.freebsd.org/changeset/base/341208
Log:
sfxge(4): support MARK and FLAG actions in filters
This patch adds support for DPDK rte_flow "MARK" and "FLAG" filter
actions to filters on EF10 family NICs.
Submitted by: Roman Zhukov
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18239
Modified:
head/sys/dev/sfxge/common/ef10_filter.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_filter.c
Modified: head/sys/dev/sfxge/common/ef10_filter.c
==
--- head/sys/dev/sfxge/common/ef10_filter.c Thu Nov 29 06:46:01 2018
(r341207)
+++ head/sys/dev/sfxge/common/ef10_filter.c Thu Nov 29 06:46:10 2018
(r341208)
@@ -199,7 +199,7 @@ efx_mcdi_filter_op_add(
__inout ef10_filter_handle_t *handle)
{
efx_mcdi_req_t req;
- uint8_t payload[MAX(MC_CMD_FILTER_OP_EXT_IN_LEN,
+ uint8_t payload[MAX(MC_CMD_FILTER_OP_V3_IN_LEN,
MC_CMD_FILTER_OP_EXT_OUT_LEN)];
efx_filter_match_flags_t match_flags;
efx_rc_t rc;
@@ -207,7 +207,7 @@ efx_mcdi_filter_op_add(
memset(payload, 0, sizeof (payload));
req.emr_cmd = MC_CMD_FILTER_OP;
req.emr_in_buf = payload;
- req.emr_in_length = MC_CMD_FILTER_OP_EXT_IN_LEN;
+ req.emr_in_length = MC_CMD_FILTER_OP_V3_IN_LEN;
req.emr_out_buf = payload;
req.emr_out_length = MC_CMD_FILTER_OP_EXT_OUT_LEN;
@@ -343,16 +343,37 @@ efx_mcdi_filter_op_add(
spec->efs_ifrm_loc_mac, EFX_MAC_ADDR_LEN);
}
+ /*
+* Set the "MARK" or "FLAG" action for all packets matching this filter
+* if necessary (only useful with equal stride packed stream Rx mode
+* which provide the information in pseudo-header).
+* These actions require MC_CMD_FILTER_OP_V3_IN msgrequest.
+*/
+ if ((spec->efs_flags & EFX_FILTER_FLAG_ACTION_MARK) &&
+ (spec->efs_flags & EFX_FILTER_FLAG_ACTION_FLAG)) {
+ rc = EINVAL;
+ goto fail3;
+ }
+ if (spec->efs_flags & EFX_FILTER_FLAG_ACTION_MARK) {
+ MCDI_IN_SET_DWORD(req, FILTER_OP_V3_IN_MATCH_ACTION,
+ MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_MARK);
+ MCDI_IN_SET_DWORD(req, FILTER_OP_V3_IN_MATCH_MARK_VALUE,
+ spec->efs_mark);
+ } else if (spec->efs_flags & EFX_FILTER_FLAG_ACTION_FLAG) {
+ MCDI_IN_SET_DWORD(req, FILTER_OP_V3_IN_MATCH_ACTION,
+ MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_FLAG);
+ }
+
efx_mcdi_execute(enp, &req);
if (req.emr_rc != 0) {
rc = req.emr_rc;
- goto fail3;
+ goto fail4;
}
if (req.emr_out_length_used < MC_CMD_FILTER_OP_EXT_OUT_LEN) {
rc = EMSGSIZE;
- goto fail4;
+ goto fail5;
}
handle->efh_lo = MCDI_OUT_DWORD(req, FILTER_OP_EXT_OUT_HANDLE_LO);
@@ -360,6 +381,8 @@ efx_mcdi_filter_op_add(
return (0);
+fail5:
+ EFSYS_PROBE(fail5);
fail4:
EFSYS_PROBE(fail4);
fail3:
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:46:01 2018
(r341207)
+++ head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:46:10 2018
(r341208)
@@ -2651,6 +2651,10 @@ efx_tx_qdestroy(
#defineEFX_FILTER_FLAG_RX 0x08
/* Filter is for TX */
#defineEFX_FILTER_FLAG_TX 0x10
+/* Set match flag on the received packet */
+#defineEFX_FILTER_FLAG_ACTION_FLAG 0x20
+/* Set match mark on the received packet */
+#defineEFX_FILTER_FLAG_ACTION_MARK 0x40
typedef uint8_t efx_filter_flags_t;
@@ -2723,6 +2727,8 @@ typedef struct efx_filter_spec_s {
efx_filter_flags_t efs_flags;
uint16_tefs_dmaq_id;
uint32_tefs_rss_context;
+ uint32_tefs_mark;
+ /* Fields below here are hashed for software filter lookup */
uint16_tefs_outer_vid;
uint16_tefs_inner_vid;
uint8_t efs_loc_mac[EFX_MAC_ADDR_LEN];
Modified: head/sys/dev/sfxge/common/efx_filter.c
==
--- head/sys/dev/sfxge/common/efx_filter.c Thu Nov 29 06:46:01 2018
(r341207)
+++ head/sys/dev/sfxge/common/efx_filter.c Thu Nov 29 06:46:10 2018
(r341208)
@@ -103,12 +103,33 @@ efx_filter_insert(
__inout efx_filter_spec_t *spec)
{
const efx_filter_ops_t *efop = enp->en_efop;
+
svn commit: r341215 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:47:30 2018
New Revision: 341215
URL: https://svnweb.freebsd.org/changeset/base/341215
Log:
sfxge(4): fix build because of no declaration
Functions declared in mcdi_mon.h are implemented in mcdi_mon.c.
The build fails if compiler options require declaration before definition.
Sponsored by: Solarflare Communications, Inc.
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D18246
Modified:
head/sys/dev/sfxge/common/mcdi_mon.c
Modified: head/sys/dev/sfxge/common/mcdi_mon.c
==
--- head/sys/dev/sfxge/common/mcdi_mon.cThu Nov 29 06:47:19 2018
(r341214)
+++ head/sys/dev/sfxge/common/mcdi_mon.cThu Nov 29 06:47:30 2018
(r341215)
@@ -33,6 +33,7 @@ __FBSDID("$FreeBSD$");
#include "efx.h"
#include "efx_impl.h"
+#include "mcdi_mon.h"
#if EFSYS_OPT_MON_MCDI
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svn commit: r341216 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:47:41 2018
New Revision: 341216
URL: https://svnweb.freebsd.org/changeset/base/341216
Log:
sfxge(4): add more definitions of partitions
Add definitions of dynamic config and expansion ROM backup
partitions.
Submitted by: Paul Fox
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18247
Modified:
head/sys/dev/sfxge/common/ef10_nvram.c
head/sys/dev/sfxge/common/efx.h
Modified: head/sys/dev/sfxge/common/ef10_nvram.c
==
--- head/sys/dev/sfxge/common/ef10_nvram.c Thu Nov 29 06:47:30 2018
(r341215)
+++ head/sys/dev/sfxge/common/ef10_nvram.c Thu Nov 29 06:47:41 2018
(r341216)
@@ -2195,6 +2195,8 @@ static ef10_parttbl_entry_t medford2_parttbl[] = {
PARTN_MAP_ENTRY(LICENSE,ALL,LICENSE),
PARTN_MAP_ENTRY(EXPANSION_UEFI, ALL,UEFIROM),
PARTN_MAP_ENTRY(MUM_FIRMWARE, ALL,MUM_FIRMWARE),
+ PARTN_MAP_ENTRY(DYNCONFIG_DEFAULTS, ALL,DYNCONFIG_DEFAULTS),
+ PARTN_MAP_ENTRY(ROMCONFIG_DEFAULTS, ALL,ROMCONFIG_DEFAULTS),
};
static __checkReturn efx_rc_t
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:47:30 2018
(r341215)
+++ head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:47:41 2018
(r341216)
@@ -1511,6 +1511,8 @@ typedef enum efx_nvram_type_e {
EFX_NVRAM_LICENSE,
EFX_NVRAM_UEFIROM,
EFX_NVRAM_MUM_FIRMWARE,
+ EFX_NVRAM_DYNCONFIG_DEFAULTS,
+ EFX_NVRAM_ROMCONFIG_DEFAULTS,
EFX_NVRAM_NTYPES,
} efx_nvram_type_t;
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svn commit: r341210 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:46:33 2018
New Revision: 341210
URL: https://svnweb.freebsd.org/changeset/base/341210
Log:
sfxge(4): generate Medford2 RxDP stats
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18241
Modified:
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_mac.c
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:46:21 2018
(r341209)
+++ head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:46:33 2018
(r341210)
@@ -364,7 +364,7 @@ efx_intr_fini(
#if EFSYS_OPT_MAC_STATS
-/* START MKCONFIG GENERATED EfxHeaderMacBlock 7d59c0d68431a5d1 */
+/* START MKCONFIG GENERATED EfxHeaderMacBlock ea466a9bc8789994 */
typedef enum efx_mac_stat_e {
EFX_MAC_RX_OCTETS,
EFX_MAC_RX_PKTS,
@@ -469,6 +469,9 @@ typedef enum efx_mac_stat_e {
EFX_MAC_CTPIO_FALLBACK,
EFX_MAC_CTPIO_POISON,
EFX_MAC_CTPIO_ERASE,
+ EFX_MAC_RXDP_SCATTER_DISABLED_TRUNC,
+ EFX_MAC_RXDP_HLB_IDLE,
+ EFX_MAC_RXDP_HLB_TIMEOUT,
EFX_MAC_NSTATS
} efx_mac_stat_t;
Modified: head/sys/dev/sfxge/common/efx_mac.c
==
--- head/sys/dev/sfxge/common/efx_mac.c Thu Nov 29 06:46:21 2018
(r341209)
+++ head/sys/dev/sfxge/common/efx_mac.c Thu Nov 29 06:46:33 2018
(r341210)
@@ -521,7 +521,7 @@ efx_mac_filter_default_rxq_clear(
#if EFSYS_OPT_NAMES
-/* START MKCONFIG GENERATED EfxMacStatNamesBlock 3cfa8780abd28993 */
+/* START MKCONFIG GENERATED EfxMacStatNamesBlock 1a45a82fcfb30c1b */
static const char * const __efx_mac_stat_name[] = {
"rx_octets",
"rx_pkts",
@@ -626,6 +626,9 @@ static const char * const __efx_mac_stat_name[] = {
"ctpio_fallback",
"ctpio_poison",
"ctpio_erase",
+ "rxdp_scatter_disabled_trunc",
+ "rxdp_hlb_idle",
+ "rxdp_hlb_timeout",
};
/* END MKCONFIG GENERATED EfxMacStatNamesBlock */
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svn commit: r341211 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:46:44 2018
New Revision: 341211
URL: https://svnweb.freebsd.org/changeset/base/341211
Log:
sfxge(4): support RxDP scatter disabled truncate counter
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18242
Modified:
head/sys/dev/sfxge/common/ef10_mac.c
Modified: head/sys/dev/sfxge/common/ef10_mac.c
==
--- head/sys/dev/sfxge/common/ef10_mac.cThu Nov 29 06:46:33 2018
(r341210)
+++ head/sys/dev/sfxge/common/ef10_mac.cThu Nov 29 06:46:44 2018
(r341211)
@@ -560,8 +560,21 @@ ef10_mac_stats_get_mask(
goto fail7;
}
+ if (encp->enc_mac_stats_nstats >= MC_CMD_MAC_NSTATS_V4) {
+ const struct efx_mac_stats_range ef10_rxdp_sdt[] = {
+ { EFX_MAC_RXDP_SCATTER_DISABLED_TRUNC,
+ EFX_MAC_RXDP_SCATTER_DISABLED_TRUNC },
+ };
+
+ if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
+ ef10_rxdp_sdt, EFX_ARRAY_SIZE(ef10_rxdp_sdt))) != 0)
+ goto fail8;
+ }
+
return (0);
+fail8:
+ EFSYS_PROBE(fail8);
fail7:
EFSYS_PROBE(fail7);
fail6:
@@ -1004,6 +1017,14 @@ ef10_mac_stats_update(
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_ERASE, &value);
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_ERASE]), &value);
+
+ if (encp->enc_mac_stats_nstats < MC_CMD_MAC_NSTATS_V4)
+ goto done;
+
+ EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_SCATTER_DISABLED_TRUNC,
+ &value);
+ EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_SCATTER_DISABLED_TRUNC]),
+ &value);
done:
/* Read START generation counter */
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svn commit: r341197 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:44:09 2018
New Revision: 341197
URL: https://svnweb.freebsd.org/changeset/base/341197
Log:
sfxge(4): fix comparison always true warning
Loopback type used as bit index has efx_loopback_type_t type
which is enum. clang complains that it is always true when it
is compared with qword (64 bit) bits number boundary.
Sponsored by: Solarflare Communications, Inc.
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D18228
Modified:
head/sys/dev/sfxge/common/efx_port.c
Modified: head/sys/dev/sfxge/common/efx_port.c
==
--- head/sys/dev/sfxge/common/efx_port.cThu Nov 29 06:43:57 2018
(r341196)
+++ head/sys/dev/sfxge/common/efx_port.cThu Nov 29 06:44:09 2018
(r341197)
@@ -149,7 +149,7 @@ efx_port_loopback_set(
EFSYS_ASSERT(link_mode < EFX_LINK_NMODES);
if (EFX_TEST_QWORD_BIT(encp->enc_loopback_types[link_mode],
- loopback_type) == 0) {
+ (int)loopback_type) == 0) {
rc = ENOTSUP;
goto fail1;
}
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svn commit: r341195 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:43:46 2018
New Revision: 341195
URL: https://svnweb.freebsd.org/changeset/base/341195
Log:
sfxge(4): report no Tx checksum FW subvariant support
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18226
Modified:
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/siena_nic.c
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cThu Nov 29 06:43:34 2018
(r341194)
+++ head/sys/dev/sfxge/common/ef10_nic.cThu Nov 29 06:43:46 2018
(r341195)
@@ -1135,6 +1135,12 @@ ef10_get_datapath_caps(
else
encp->enc_rx_var_packed_stream_supported = B_FALSE;
+ /* Check if the firmware supports FW subvariant w/o Tx checksumming */
+ if (CAP_FLAGS2(req, FW_SUBVARIANT_NO_TX_CSUM))
+ encp->enc_fw_subvariant_no_tx_csum_supported = B_TRUE;
+ else
+ encp->enc_fw_subvariant_no_tx_csum_supported = B_FALSE;
+
/* Check if the firmware supports set mac with running filters */
if (CAP_FLAGS1(req, VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED))
encp->enc_allow_set_mac_with_installed_filters = B_TRUE;
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:43:34 2018
(r341194)
+++ head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:43:46 2018
(r341195)
@@ -1287,6 +1287,7 @@ typedef struct efx_nic_cfg_s {
boolean_t enc_init_evq_v2_supported;
boolean_t enc_rx_packed_stream_supported;
boolean_t enc_rx_var_packed_stream_supported;
+ boolean_t enc_fw_subvariant_no_tx_csum_supported;
boolean_t enc_pm_and_rxdp_counters;
boolean_t enc_mac_stats_40g_tx_size_bins;
uint32_tenc_tunnel_encapsulations_supported;
Modified: head/sys/dev/sfxge/common/siena_nic.c
==
--- head/sys/dev/sfxge/common/siena_nic.c Thu Nov 29 06:43:34 2018
(r341194)
+++ head/sys/dev/sfxge/common/siena_nic.c Thu Nov 29 06:43:46 2018
(r341195)
@@ -178,6 +178,7 @@ siena_board_cfg(
encp->enc_allow_set_mac_with_installed_filters = B_TRUE;
encp->enc_rx_packed_stream_supported = B_FALSE;
encp->enc_rx_var_packed_stream_supported = B_FALSE;
+ encp->enc_fw_subvariant_no_tx_csum_supported = B_FALSE;
/* Siena supports two 10G ports, and 8 lanes of PCIe Gen2 */
encp->enc_required_pcie_bandwidth_mbps = 2 * 1;
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svn commit: r341206 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:45:50 2018
New Revision: 341206
URL: https://svnweb.freebsd.org/changeset/base/341206
Log:
sfxge(4): add equal stride super-buffer prefix layout
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18237
Modified:
head/sys/dev/sfxge/common/efx_regs_ef10.h
Modified: head/sys/dev/sfxge/common/efx_regs_ef10.h
==
--- head/sys/dev/sfxge/common/efx_regs_ef10.h Thu Nov 29 06:45:38 2018
(r341205)
+++ head/sys/dev/sfxge/common/efx_regs_ef10.h Thu Nov 29 06:45:50 2018
(r341206)
@@ -726,6 +726,21 @@ extern "C" {
#defineES_DZ_PS_RX_PREFIX_ORIG_LEN_LBN 48
#defineES_DZ_PS_RX_PREFIX_ORIG_LEN_WIDTH 16
+/* Equal stride super-buffer RX packet prefix (see SF-119419-TC) */
+#defineES_EZ_ESSB_RX_PREFIX_LEN 8
+#defineES_EZ_ESSB_RX_PREFIX_DATA_LEN_LBN 0
+#defineES_EZ_ESSB_RX_PREFIX_DATA_LEN_WIDTH 16
+#defineES_EZ_ESSB_RX_PREFIX_MARK_LBN 16
+#defineES_EZ_ESSB_RX_PREFIX_MARK_WIDTH 8
+#defineES_EZ_ESSB_RX_PREFIX_HASH_VALID_LBN 28
+#defineES_EZ_ESSB_RX_PREFIX_HASH_VALID_WIDTH 1
+#defineES_EZ_ESSB_RX_PREFIX_MARK_VALID_LBN 29
+#defineES_EZ_ESSB_RX_PREFIX_MARK_VALID_WIDTH 1
+#defineES_EZ_ESSB_RX_PREFIX_MATCH_FLAG_LBN 30
+#defineES_EZ_ESSB_RX_PREFIX_MATCH_FLAG_WIDTH 1
+#defineES_EZ_ESSB_RX_PREFIX_HASH_LBN 32
+#defineES_EZ_ESSB_RX_PREFIX_HASH_WIDTH 32
+
/*
* An extra flag for the packed stream mode,
* signalling the start of a new buffer
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svn commit: r341207 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:46:01 2018
New Revision: 341207
URL: https://svnweb.freebsd.org/changeset/base/341207
Log:
sfxge(4): get actions MARK and FLAG support
Filter actions MARK and FLAG are supported on Medford2 by DPDK
firmware variant.
Submitted by: Roman Zhukov
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18238
Modified:
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/siena_nic.c
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cThu Nov 29 06:45:50 2018
(r341206)
+++ head/sys/dev/sfxge/common/ef10_nic.cThu Nov 29 06:46:01 2018
(r341207)
@@ -1321,6 +1321,16 @@ ef10_get_datapath_caps(
*/
encp->enc_rx_scale_l4_hash_supported = B_TRUE;
}
+ /* Check if the firmware supports "FLAG" and "MARK" filter actions */
+ if (CAP_FLAGS2(req, FILTER_ACTION_FLAG))
+ encp->enc_filter_action_flag_supported = B_TRUE;
+ else
+ encp->enc_filter_action_flag_supported = B_FALSE;
+
+ if (CAP_FLAGS2(req, FILTER_ACTION_MARK))
+ encp->enc_filter_action_mark_supported = B_TRUE;
+ else
+ encp->enc_filter_action_mark_supported = B_FALSE;
#undef CAP_FLAGS1
#undef CAP_FLAGS2
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:45:50 2018
(r341206)
+++ head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:46:01 2018
(r341207)
@@ -1321,6 +1321,9 @@ typedef struct efx_nic_cfg_s {
/* Firmware support for extended MAC_STATS buffer */
uint32_tenc_mac_stats_nstats;
boolean_t enc_fec_counters;
+ /* Firmware support for "FLAG" and "MARK" filter actions */
+ boolean_t enc_filter_action_flag_supported;
+ boolean_t enc_filter_action_mark_supported;
} efx_nic_cfg_t;
#defineEFX_PCI_FUNCTION_IS_PF(_encp) ((_encp)->enc_vf == 0x)
Modified: head/sys/dev/sfxge/common/siena_nic.c
==
--- head/sys/dev/sfxge/common/siena_nic.c Thu Nov 29 06:45:50 2018
(r341206)
+++ head/sys/dev/sfxge/common/siena_nic.c Thu Nov 29 06:46:01 2018
(r341207)
@@ -201,6 +201,9 @@ siena_board_cfg(
encp->enc_mac_stats_nstats = MC_CMD_MAC_NSTATS;
+ encp->enc_filter_action_flag_supported = B_FALSE;
+ encp->enc_filter_action_mark_supported = B_FALSE;
+
return (0);
fail2:
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svn commit: r341201 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:44:51 2018
New Revision: 341201
URL: https://svnweb.freebsd.org/changeset/base/341201
Log:
sfxge(4): honour packed stream RSS restriction
Packed stream firmware variant on EF10 adapters has a
number of properties which must be taken into account:
- Only one exclusive RSS context is available per port.
- Only IP addresses can contribute to the hash value.
Huntington and Medford have one more limitation which
is important for the drivers capable of packed stream:
- Hash algorithm is non-standard (i.e. non-Toeplitz).
This implies XORing together source + destination
IP addresses (or last four bytes in the case of IPv6)
and using the result as the input to a Toeplitz hash.
This patch provides a number of improvements in order
to treat the mentioned limitations in the common code.
If the firmware variant is packed stream, the list of
supported hash tuples will include less variants, and
the maximum number of RSS contexts will be set to one.
Submitted by: Ivan Malov
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18232
Modified:
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/ef10_rx.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_rx.c
head/sys/dev/sfxge/common/siena_nic.c
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cThu Nov 29 06:44:39 2018
(r341200)
+++ head/sys/dev/sfxge/common/ef10_nic.cThu Nov 29 06:44:51 2018
(r341201)
@@ -1266,11 +1266,63 @@ ef10_get_datapath_caps(
else
encp->enc_fec_counters = B_FALSE;
+ if (CAP_FLAGS1(req, RX_RSS_LIMITED)) {
+ /* Only one exclusive RSS context is available per port. */
+ encp->enc_rx_scale_max_exclusive_contexts = 1;
+
+ switch (enp->en_family) {
+ case EFX_FAMILY_MEDFORD2:
+ encp->enc_rx_scale_hash_alg_mask =
+ (1U << EFX_RX_HASHALG_TOEPLITZ);
+ break;
+
+ case EFX_FAMILY_MEDFORD:
+ case EFX_FAMILY_HUNTINGTON:
+ /*
+* Packed stream firmware variant maintains a
+* non-standard algorithm for hash computation.
+* It implies explicit XORing together
+* source + destination IP addresses (or last
+* four bytes in the case of IPv6) and using the
+* resulting value as the input to a Toeplitz hash.
+*/
+ encp->enc_rx_scale_hash_alg_mask =
+ (1U << EFX_RX_HASHALG_PACKED_STREAM);
+ break;
+
+ default:
+ rc = EINVAL;
+ goto fail5;
+ }
+
+ /* Port numbers cannot contribute to the hash value */
+ encp->enc_rx_scale_l4_hash_supported = B_FALSE;
+ } else {
+ /*
+* Maximum number of exclusive RSS contexts.
+* EF10 hardware supports 64 in total, but 6 are reserved
+* for shared contexts. They are a global resource so
+* not all may be available.
+*/
+ encp->enc_rx_scale_max_exclusive_contexts = 64 - 6;
+
+ encp->enc_rx_scale_hash_alg_mask =
+ (1U << EFX_RX_HASHALG_TOEPLITZ);
+
+ /*
+* It is possible to use port numbers as
+* the input data for hash computation.
+*/
+ encp->enc_rx_scale_l4_hash_supported = B_TRUE;
+ }
+
#undef CAP_FLAGS1
#undef CAP_FLAGS2
return (0);
+fail5:
+ EFSYS_PROBE(fail5);
fail4:
EFSYS_PROBE(fail4);
fail3:
@@ -1739,13 +1791,6 @@ ef10_nic_board_cfg(
/* Alignment for WPTR updates */
encp->enc_rx_push_align = EF10_RX_WPTR_ALIGN;
-
- /*
-* Maximum number of exclusive RSS contexts. EF10 hardware supports 64
-* in total, but 6 are reserved for shared contexts. They are a global
-* resource so not all may be available.
-*/
- encp->enc_rx_scale_max_exclusive_contexts = 64 - 6;
encp->enc_tx_dma_desc_size_max = EFX_MASK32(ESF_DZ_RX_KER_BYTE_CNT);
/* No boundary crossing limits */
Modified: head/sys/dev/sfxge/common/ef10_rx.c
==
--- head/sys/dev/sfxge/common/ef10_rx.c Thu Nov 29 06:44:39 2018
(r341200)
+++ head/sys/dev/sfxge/common/ef10_rx.c Thu Nov 29 06:44:51 2018
(r341201)
@@ -643,12 +643,13 @@ ef10_rx_scale_mode_set(
__inefx_rx_hash_type_t
svn commit: r341202 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:45:04 2018
New Revision: 341202
URL: https://svnweb.freebsd.org/changeset/base/341202
Log:
sfxge(4): update autogenerated MCDI and TLV headers
Equal stride super-buffer is a new name instead of deprecated equal
stride packed stream to avoid confusion with previous packed stream.
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18233
Modified:
head/sys/dev/sfxge/common/ef10_tlv_layout.h
head/sys/dev/sfxge/common/efx_regs_mcdi.h
Modified: head/sys/dev/sfxge/common/ef10_tlv_layout.h
==
--- head/sys/dev/sfxge/common/ef10_tlv_layout.h Thu Nov 29 06:44:51 2018
(r341201)
+++ head/sys/dev/sfxge/common/ef10_tlv_layout.h Thu Nov 29 06:45:04 2018
(r341202)
@@ -30,6 +30,14 @@
* $FreeBSD$
*/
+/*
+ * This is NOT the original source file. Do NOT edit it.
+ * To update the tlv layout, please edit the copy in
+ * the sfregistry repo and then, in that repo,
+ * "make tlv_headers" or "make export" to
+ * regenerate and export all types of headers.
+ */
+
/* These structures define the layouts for the TLV items stored in static and
* dynamic configuration partitions in NVRAM for EF10 (Huntington etc.).
*
@@ -435,6 +443,7 @@ struct tlv_firmware_options {
MC_CMD_FW_PACKED_STREAM_HASH_MODE_1
#define TLV_FIRMWARE_VARIANT_RULES_ENGINEMC_CMD_FW_RULES_ENGINE
#define TLV_FIRMWARE_VARIANT_DPDKMC_CMD_FW_DPDK
+#define TLV_FIRMWARE_VARIANT_L3XUDP MC_CMD_FW_L3XUDP
};
/* Voltage settings
@@ -518,6 +527,17 @@ struct tlv_0v9_atb_target {
uint16_t reserved;
};
+/* Factory settings for amplitude calibration of the PCIE TX serdes */
+#define TLV_TAG_TX_PCIE_AMP_CONFIG (0x0022)
+struct tlv_pcie_tx_amp_config {
+ uint32_t tag;
+ uint32_t length;
+ uint8_t quad_tx_imp2k[4];
+ uint8_t quad_tx_imp50[4];
+ uint8_t lane_amp[16];
+};
+
+
/* Global PCIe configuration, second revision. This represents the visible PFs
* by a bitmap rather than having the number of the highest visible one. As
such
* it can (for a 16-PF chip) represent a superset of what
TLV_TAG_GLOBAL_PCIE_CONFIG
@@ -851,20 +871,6 @@ struct tlv_tx_event_merging_config {
#define TLV_TX_EVENT_MERGING_TIMEOUT_NS_DEFAULT (0x)
#define TLV_TX_EVENT_MERGING_QEMPTY_TIMEOUT_NS_DEFAULT (0x)
-/* BIU mode
- *
- * Medford2 tag for selecting VI window decode (see values below)
- */
-#define TLV_TAG_BIU_VI_WINDOW_MODE (0x1028)
-struct tlv_biu_vi_window_mode {
- uint32_t tag;
- uint32_t length;
- uint8_t mode;
-#define TLV_BIU_VI_WINDOW_MODE_8K0 /* 8k per VI, CTPIO not mapped,
medford/hunt compatible */
-#define TLV_BIU_VI_WINDOW_MODE_16K 1 /* 16k per VI, CTPIO mapped */
-#define TLV_BIU_VI_WINDOW_MODE_64K 2 /* 64k per VI, CTPIO mapped,
POWER-friendly */
-};
-
#define TLV_TAG_LICENSE (0x3080)
typedef struct tlv_license {
@@ -985,6 +991,47 @@ struct tlv_tx_vfifo_ull_mode {
uint32_t length;
uint8_t mode;
#define TLV_TX_VFIFO_ULL_MODE_DEFAULT0
+};
+
+/* BIU mode
+ *
+ * Medford2 tag for selecting VI window decode (see values below)
+ */
+#define TLV_TAG_BIU_VI_WINDOW_MODE (0x1028)
+struct tlv_biu_vi_window_mode {
+ uint32_t tag;
+ uint32_t length;
+ uint8_t mode;
+#define TLV_BIU_VI_WINDOW_MODE_8K0 /* 8k per VI, CTPIO not mapped,
medford/hunt compatible */
+#define TLV_BIU_VI_WINDOW_MODE_16K 1 /* 16k per VI, CTPIO mapped */
+#define TLV_BIU_VI_WINDOW_MODE_64K 2 /* 64k per VI, CTPIO mapped,
POWER-friendly */
+};
+
+/* FastPD mode
+ *
+ * Medford2 tag for configuring the FastPD mode (see values below)
+ */
+#define TLV_TAG_FASTPD_MODE(port) (0x1029 + (port))
+struct tlv_fastpd_mode {
+ uint32_t tag;
+ uint32_t length;
+ uint8_t mode;
+#define TLV_FASTPD_MODE_SOFT_ALL 0 /* All packets to the SoftPD */
+#define TLV_FASTPD_MODE_FAST_ALL 1 /* All packets to the FastPD */
+#define TLV_FASTPD_MODE_FAST_SUPPORTED 2 /* Supported packet types to the
FastPD; everything else to the SoftPD */
+};
+
+/* L3xUDP datapath firmware UDP port configuration
+ *
+ * Sets the list of UDP ports on which the encapsulation will be handled.
+ * The number of ports in the list is implied by the length of the TLV item.
+ */
+#define TLV_TAG_L3XUDP_PORTS(0x102a)
+struct tlv_l3xudp_ports {
+ uint32_t tag;
+ uint32_t length;
+ uint16_t ports[];
+#define TLV_TAG_L3XUDP_PORTS_MAX_NUM_PORTS 16
};
#endif /* CI_MGMT_TLV_LAYOUT_H */
Modified: head/sys/dev/sfxge/common/efx_regs_mcdi.h
==
--- head/sys/dev/sfxge/common/efx_regs_mcdi.h Thu Nov 29 06:44:51 2018
(r341201)
+++ head/sys/dev/sfxge/common/efx_regs_mcdi.h Thu Nov 29 06:45:04 2018
(r341202)
@@ -2761,6 +2761,8 @@
#defineMC_CMD_DRV_
svn commit: r341205 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:45:38 2018
New Revision: 341205
URL: https://svnweb.freebsd.org/changeset/base/341205
Log:
sfxge(4): support equal stride super-buffer Rx mode
Equal stride super-buffer Rx mode is supported by DPDK firmware
variant. One Rx descriptor provides many Rx buffers to firmware.
Rx buffers follow each other with specified stride.
Also it supports head of line blocking with timeout to address
drops when no Rx descriptors are available. So it gives extra time
to the driver to provide Rx descriptors before drop.
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18236
Modified:
head/sys/dev/sfxge/common/ef10_ev.c
head/sys/dev/sfxge/common/ef10_impl.h
head/sys/dev/sfxge/common/ef10_rx.c
head/sys/dev/sfxge/common/efsys.h
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_check.h
head/sys/dev/sfxge/common/efx_impl.h
head/sys/dev/sfxge/common/efx_rx.c
Modified: head/sys/dev/sfxge/common/ef10_ev.c
==
--- head/sys/dev/sfxge/common/ef10_ev.c Thu Nov 29 06:45:26 2018
(r341204)
+++ head/sys/dev/sfxge/common/ef10_ev.c Thu Nov 29 06:45:38 2018
(r341205)
@@ -776,7 +776,7 @@ ef10_ev_qstats_update(
}
#endif /* EFSYS_OPT_QSTATS */
-#if EFSYS_OPT_RX_PACKED_STREAM
+#if EFSYS_OPT_RX_PACKED_STREAM || EFSYS_OPT_RX_ES_SUPER_BUFFER
static __checkReturn boolean_t
ef10_ev_rx_packed_stream(
@@ -815,7 +815,18 @@ ef10_ev_rx_packed_stream(
if (new_buffer) {
flags |= EFX_PKT_PACKED_STREAM_NEW_BUFFER;
+#if EFSYS_OPT_RX_PACKED_STREAM
+ /*
+* If both packed stream and equal stride super-buffer
+* modes are compiled in, in theory credits should be
+* be maintained for packed stream only, but right now
+* these modes are not distinguished in the event queue
+* Rx queue state and it is OK to increment the counter
+* regardless (it might be event cheaper than branching
+* since neighbour structure member are updated as well).
+*/
eersp->eers_rx_packed_stream_credits++;
+#endif
eersp->eers_rx_read_ptr++;
}
current_id = eersp->eers_rx_read_ptr & eersp->eers_rx_mask;
@@ -857,7 +868,7 @@ deliver:
return (should_abort);
}
-#endif /* EFSYS_OPT_RX_PACKED_STREAM */
+#endif /* EFSYS_OPT_RX_PACKED_STREAM || EFSYS_OPT_RX_ES_SUPER_BUFFER */
static __checkReturn boolean_t
ef10_ev_rx(
@@ -891,7 +902,7 @@ ef10_ev_rx(
label = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_QLABEL);
eersp = &eep->ee_rxq_state[label];
-#if EFSYS_OPT_RX_PACKED_STREAM
+#if EFSYS_OPT_RX_PACKED_STREAM || EFSYS_OPT_RX_ES_SUPER_BUFFER
/*
* Packed stream events are very different,
* so handle them separately
@@ -1391,8 +1402,9 @@ ef10_ev_rxlabel_init(
__inefx_rxq_type_t type)
{
efx_evq_rxq_state_t *eersp;
-#if EFSYS_OPT_RX_PACKED_STREAM
+#if EFSYS_OPT_RX_PACKED_STREAM || EFSYS_OPT_RX_ES_SUPER_BUFFER
boolean_t packed_stream = (type == EFX_RXQ_TYPE_PACKED_STREAM);
+ boolean_t es_super_buffer = (type == EFX_RXQ_TYPE_ES_SUPER_BUFFER);
#endif
_NOTE(ARGUNUSED(type))
@@ -1414,9 +1426,11 @@ ef10_ev_rxlabel_init(
eersp->eers_rx_read_ptr = 0;
#endif
eersp->eers_rx_mask = erp->er_mask;
-#if EFSYS_OPT_RX_PACKED_STREAM
+#if EFSYS_OPT_RX_PACKED_STREAM || EFSYS_OPT_RX_ES_SUPER_BUFFER
eersp->eers_rx_stream_npackets = 0;
- eersp->eers_rx_packed_stream = packed_stream;
+ eersp->eers_rx_packed_stream = packed_stream || es_super_buffer;
+#endif
+#if EFSYS_OPT_RX_PACKED_STREAM
if (packed_stream) {
eersp->eers_rx_packed_stream_credits = (eep->ee_mask + 1) /
EFX_DIV_ROUND_UP(EFX_RX_PACKED_STREAM_MEM_PER_CREDIT,
@@ -1450,9 +1464,11 @@ ef10_ev_rxlabel_fini(
eersp->eers_rx_read_ptr = 0;
eersp->eers_rx_mask = 0;
-#if EFSYS_OPT_RX_PACKED_STREAM
+#if EFSYS_OPT_RX_PACKED_STREAM || EFSYS_OPT_RX_ES_SUPER_BUFFER
eersp->eers_rx_stream_npackets = 0;
eersp->eers_rx_packed_stream = B_FALSE;
+#endif
+#if EFSYS_OPT_RX_PACKED_STREAM
eersp->eers_rx_packed_stream_credits = 0;
#endif
}
Modified: head/sys/dev/sfxge/common/ef10_impl.h
==
--- head/sys/dev/sfxge/common/ef10_impl.h Thu Nov 29 06:45:26 2018
(r341204)
+++ head/sys/dev/sfxge/common/ef10_impl.h Thu Nov 29 06:45:38 2018
(r341205)
@@ -1242,6 +1242,16 @@ efx_mcdi_set_nic_global(
#endif /* EFSYS_OPT_RX_PACKED_STREAM */
+#if EFSYS_OPT_RX_ES_SUPER_BUFFER
+
+/*
+ * Maximum DMA length and buffer stride alignment.
+ * (see SF-119419-TC, 3.2)
+ */
+#defineEFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT64
+
+#
svn commit: r341204 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:45:26 2018
New Revision: 341204
URL: https://svnweb.freebsd.org/changeset/base/341204
Log:
sfxge(4): detect equal stride super-buffer support
Equal stride super-buffer Rx mode is supported on Medford2 by
DPDK firmware variant.
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18235
Modified:
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/siena_nic.c
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cThu Nov 29 06:45:15 2018
(r341203)
+++ head/sys/dev/sfxge/common/ef10_nic.cThu Nov 29 06:45:26 2018
(r341204)
@@ -1141,6 +1141,12 @@ ef10_get_datapath_caps(
else
encp->enc_rx_var_packed_stream_supported = B_FALSE;
+ /* Check if the firmware supports equal stride super-buffer mode */
+ if (CAP_FLAGS2(req, EQUAL_STRIDE_SUPER_BUFFER))
+ encp->enc_rx_es_super_buffer_supported = B_TRUE;
+ else
+ encp->enc_rx_es_super_buffer_supported = B_FALSE;
+
/* Check if the firmware supports FW subvariant w/o Tx checksumming */
if (CAP_FLAGS2(req, FW_SUBVARIANT_NO_TX_CSUM))
encp->enc_fw_subvariant_no_tx_csum_supported = B_TRUE;
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:45:15 2018
(r341203)
+++ head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:45:26 2018
(r341204)
@@ -1298,6 +1298,7 @@ typedef struct efx_nic_cfg_s {
boolean_t enc_init_evq_v2_supported;
boolean_t enc_rx_packed_stream_supported;
boolean_t enc_rx_var_packed_stream_supported;
+ boolean_t enc_rx_es_super_buffer_supported;
boolean_t enc_fw_subvariant_no_tx_csum_supported;
boolean_t enc_pm_and_rxdp_counters;
boolean_t enc_mac_stats_40g_tx_size_bins;
Modified: head/sys/dev/sfxge/common/siena_nic.c
==
--- head/sys/dev/sfxge/common/siena_nic.c Thu Nov 29 06:45:15 2018
(r341203)
+++ head/sys/dev/sfxge/common/siena_nic.c Thu Nov 29 06:45:26 2018
(r341204)
@@ -190,6 +190,7 @@ siena_board_cfg(
encp->enc_allow_set_mac_with_installed_filters = B_TRUE;
encp->enc_rx_packed_stream_supported = B_FALSE;
encp->enc_rx_var_packed_stream_supported = B_FALSE;
+ encp->enc_rx_es_super_buffer_supported = B_FALSE;
encp->enc_fw_subvariant_no_tx_csum_supported = B_FALSE;
/* Siena supports two 10G ports, and 8 lanes of PCIe Gen2 */
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svn commit: r341199 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:44:28 2018
New Revision: 341199
URL: https://svnweb.freebsd.org/changeset/base/341199
Log:
sfxge(4): add a new means to control RSS hash
Currently, libefx has no support for additional RSS modes
available with later controllers. In order to support this,
libefx should be able to list available hash configurations.
This patch provides basic infrastructure for the new interface.
The client drivers will be able to query the list of supported
hash configurations for a particular hash algorithm. Also, it
will be possible to configure hashing by means of new definitions.
Submitted by: Ivan Malov
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18230
Modified:
head/sys/dev/sfxge/common/ef10_rx.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_rx.c
Modified: head/sys/dev/sfxge/common/ef10_rx.c
==
--- head/sys/dev/sfxge/common/ef10_rx.c Thu Nov 29 06:44:20 2018
(r341198)
+++ head/sys/dev/sfxge/common/ef10_rx.c Thu Nov 29 06:44:28 2018
(r341199)
@@ -325,11 +325,32 @@ efx_mcdi_rss_context_set_flags(
__inuint32_t rss_context,
__inefx_rx_hash_type_t type)
{
+ efx_rx_hash_type_t type_ipv4;
+ efx_rx_hash_type_t type_ipv4_tcp;
+ efx_rx_hash_type_t type_ipv6;
+ efx_rx_hash_type_t type_ipv6_tcp;
efx_mcdi_req_t req;
uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN,
MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN)];
efx_rc_t rc;
+ EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV4_TCP_LBN ==
+ MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE_LBN);
+ EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV4_TCP_WIDTH ==
+ MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE_WIDTH);
+ EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV4_LBN ==
+ MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE_LBN);
+ EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV4_WIDTH ==
+ MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE_WIDTH);
+ EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV6_TCP_LBN ==
+ MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE_LBN);
+ EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV6_TCP_WIDTH ==
+ MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE_WIDTH);
+ EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV6_LBN ==
+ MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE_LBN);
+ EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV6_WIDTH ==
+ MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE_WIDTH);
+
if (rss_context == EF10_RSS_CONTEXT_INVALID) {
rc = EINVAL;
goto fail1;
@@ -345,15 +366,20 @@ efx_mcdi_rss_context_set_flags(
MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID,
rss_context);
+ type_ipv4 = EFX_RX_HASH(IPV4, 2TUPLE) | EFX_RX_HASH(IPV4_TCP, 2TUPLE);
+ type_ipv4_tcp = EFX_RX_HASH(IPV4_TCP, 4TUPLE);
+ type_ipv6 = EFX_RX_HASH(IPV6, 2TUPLE) | EFX_RX_HASH(IPV6_TCP, 2TUPLE);
+ type_ipv6_tcp = EFX_RX_HASH(IPV6_TCP, 4TUPLE);
+
MCDI_IN_POPULATE_DWORD_4(req, RSS_CONTEXT_SET_FLAGS_IN_FLAGS,
RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN,
- (type & EFX_RX_HASH_IPV4) ? 1 : 0,
+ ((type & type_ipv4) == type_ipv4) ? 1 : 0,
RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN,
- (type & EFX_RX_HASH_TCPIPV4) ? 1 : 0,
+ ((type & type_ipv4_tcp) == type_ipv4_tcp) ? 1 : 0,
RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN,
- (type & EFX_RX_HASH_IPV6) ? 1 : 0,
+ ((type & type_ipv6) == type_ipv6) ? 1 : 0,
RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN,
- (type & EFX_RX_HASH_TCPIPV6) ? 1 : 0);
+ ((type & type_ipv6_tcp) == type_ipv6_tcp) ? 1 : 0);
efx_mcdi_execute(enp, &req);
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:44:20 2018
(r341198)
+++ head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:44:28 2018
(r341199)
@@ -2098,11 +2098,30 @@ typedef enum efx_rx_hash_alg_e {
EFX_RX_HASHALG_TOEPLITZ
} efx_rx_hash_alg_t;
+/*
+ * Legacy hash type flags.
+ *
+ * They represent standard tuples for distinct traffic classes.
+ */
#defineEFX_RX_HASH_IPV4(1U << 0)
#defineEFX_RX_HASH_TCPIPV4 (1U << 1)
#defineEFX_RX_HASH_IPV6(1U << 2)
#defineEFX_RX_HASH_TCPIPV6 (1U << 3)
+#defineEFX_RX_HASH_LEGACY_MASK \
+ (EFX_RX_HASH_IPV4 | \
+ EFX_RX_HASH_TCPIPV4 | \
+ EFX_RX_HASH_IPV6| \
+ EFX_RX_HASH_TCPIPV6)
+
+/*
+ * The type of the argument used by
svn commit: r341203 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:45:15 2018
New Revision: 341203
URL: https://svnweb.freebsd.org/changeset/base/341203
Log:
sfxge(4): make RxQ type data an union
The type is an internal interface. Single integer is insufficient
to carry RxQ type-specific information in the case of equal stride
super-buffer Rx mode (packet buffers per bucket, maximum DMA length,
packet stride, head of line block timeout).
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18234
Modified:
head/sys/dev/sfxge/common/ef10_impl.h
head/sys/dev/sfxge/common/ef10_rx.c
head/sys/dev/sfxge/common/efx_impl.h
head/sys/dev/sfxge/common/efx_rx.c
Modified: head/sys/dev/sfxge/common/ef10_impl.h
==
--- head/sys/dev/sfxge/common/ef10_impl.h Thu Nov 29 06:45:04 2018
(r341202)
+++ head/sys/dev/sfxge/common/ef10_impl.h Thu Nov 29 06:45:15 2018
(r341203)
@@ -993,13 +993,15 @@ externvoid
ef10_rx_qenable(
__inefx_rxq_t *erp);
+union efx_rxq_type_data_u;
+
extern __checkReturn efx_rc_t
ef10_rx_qcreate(
__inefx_nic_t *enp,
__inunsigned int index,
__inunsigned int label,
__inefx_rxq_type_t type,
- __inuint32_t type_data,
+ __inconst union efx_rxq_type_data_u *type_data,
__inefsys_mem_t *esmp,
__insize_t ndescs,
__inuint32_t id,
Modified: head/sys/dev/sfxge/common/ef10_rx.c
==
--- head/sys/dev/sfxge/common/ef10_rx.c Thu Nov 29 06:45:04 2018
(r341202)
+++ head/sys/dev/sfxge/common/ef10_rx.c Thu Nov 29 06:45:15 2018
(r341203)
@@ -1027,7 +1027,7 @@ ef10_rx_qcreate(
__inunsigned int index,
__inunsigned int label,
__inefx_rxq_type_t type,
- __inuint32_t type_data,
+ __inconst efx_rxq_type_data_t *type_data,
__inefsys_mem_t *esmp,
__insize_t ndescs,
__inuint32_t id,
@@ -1066,7 +1066,7 @@ ef10_rx_qcreate(
break;
#if EFSYS_OPT_RX_PACKED_STREAM
case EFX_RXQ_TYPE_PACKED_STREAM:
- switch (type_data) {
+ switch (type_data->ertd_packed_stream.eps_buf_size) {
case EFX_RXQ_PACKED_STREAM_BUF_SIZE_1M:
ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M;
break;
Modified: head/sys/dev/sfxge/common/efx_impl.h
==
--- head/sys/dev/sfxge/common/efx_impl.hThu Nov 29 06:45:04 2018
(r341202)
+++ head/sys/dev/sfxge/common/efx_impl.hThu Nov 29 06:45:15 2018
(r341203)
@@ -157,6 +157,16 @@ typedef struct efx_tx_ops_s {
#endif
} efx_tx_ops_t;
+typedef union efx_rxq_type_data_u {
+ /* Dummy member to have non-empty union if no options are enabled */
+ uint32_tertd_dummy;
+#if EFSYS_OPT_RX_PACKED_STREAM
+ struct {
+ uint32_teps_buf_size;
+ } ertd_packed_stream;
+#endif
+} efx_rxq_type_data_t;
+
typedef struct efx_rx_ops_s {
efx_rc_t(*erxo_init)(efx_nic_t *);
void(*erxo_fini)(efx_nic_t *);
@@ -193,7 +203,8 @@ typedef struct efx_rx_ops_s {
efx_rc_t(*erxo_qflush)(efx_rxq_t *);
void(*erxo_qenable)(efx_rxq_t *);
efx_rc_t(*erxo_qcreate)(efx_nic_t *enp, unsigned int,
- unsigned int, efx_rxq_type_t, uint32_t,
+ unsigned int, efx_rxq_type_t,
+ const efx_rxq_type_data_t *,
efsys_mem_t *, size_t, uint32_t,
unsigned int,
efx_evq_t *, efx_rxq_t *);
Modified: head/sys/dev/sfxge/common/efx_rx.c
==
--- head/sys/dev/sfxge/common/efx_rx.c Thu Nov 29 06:45:04 2018
(r341202)
+++ head/sys/dev/sfxge/common/efx_rx.c Thu Nov 29 06:45:15 2018
(r341203)
@@ -136,7 +136,7 @@ siena_rx_qcreate(
__inunsigned int index,
__inunsigned int label,
__inefx_rxq_type_t type,
- __inuint32_t type_data,
+ __inconst efx_rxq_type_data_t *type_data,
__inefsys_mem_t *esmp,
__insize_t ndescs,
__inuint32_t id,
@@ -780,7 +780,7 @@ efx_rx_qcreate_internal(
__inunsigned int index,
__inunsigned int label,
__in
svn commit: r341192 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:43:12 2018
New Revision: 341192
URL: https://svnweb.freebsd.org/changeset/base/341192
Log:
sfxge(4): add values for RxDPCPU firmware id recognition
Submitted by: Roman Zhukov
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18223
Modified:
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_nic.c
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:43:00 2018
(r341191)
+++ head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:43:12 2018
(r341192)
@@ -1322,6 +1322,13 @@ extern const efx_nic_cfg_t *
efx_nic_cfg_get(
__inefx_nic_t *enp);
+/* RxDPCPU firmware id values by which FW variant can be identified */
+#defineEFX_RXDP_FULL_FEATURED_FW_ID0x0
+#defineEFX_RXDP_LOW_LATENCY_FW_ID 0x1
+#defineEFX_RXDP_PACKED_STREAM_FW_ID0x2
+#defineEFX_RXDP_RULES_ENGINE_FW_ID 0x5
+#defineEFX_RXDP_DPDK_FW_ID 0x6
+
typedef struct efx_nic_fw_info_s {
/* Basic FW version information */
uint16_tenfi_mc_fw_version[4];
Modified: head/sys/dev/sfxge/common/efx_nic.c
==
--- head/sys/dev/sfxge/common/efx_nic.c Thu Nov 29 06:43:00 2018
(r341191)
+++ head/sys/dev/sfxge/common/efx_nic.c Thu Nov 29 06:43:12 2018
(r341192)
@@ -636,6 +636,18 @@ efx_nic_get_fw_version(
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
+ /* Ensure RXDP_FW_ID codes match with MC_CMD_GET_CAPABILITIES codes */
+ EFX_STATIC_ASSERT(EFX_RXDP_FULL_FEATURED_FW_ID ==
+ MC_CMD_GET_CAPABILITIES_OUT_RXDP);
+ EFX_STATIC_ASSERT(EFX_RXDP_LOW_LATENCY_FW_ID ==
+ MC_CMD_GET_CAPABILITIES_OUT_RXDP_LOW_LATENCY);
+ EFX_STATIC_ASSERT(EFX_RXDP_PACKED_STREAM_FW_ID ==
+ MC_CMD_GET_CAPABILITIES_OUT_RXDP_PACKED_STREAM);
+ EFX_STATIC_ASSERT(EFX_RXDP_RULES_ENGINE_FW_ID ==
+ MC_CMD_GET_CAPABILITIES_OUT_RXDP_RULES_ENGINE);
+ EFX_STATIC_ASSERT(EFX_RXDP_DPDK_FW_ID ==
+ MC_CMD_GET_CAPABILITIES_OUT_RXDP_DPDK);
+
rc = efx_mcdi_version(enp, mc_fw_version, NULL, NULL);
if (rc != 0)
goto fail2;
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svn commit: r341200 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:44:39 2018
New Revision: 341200
URL: https://svnweb.freebsd.org/changeset/base/341200
Log:
sfxge(4): support more RSS hash configurations
Modern firmwares on EF10 adapters have support for
more traffic classes eligible for hash computation.
Also, it has become possible to adjust hashing per
individual class and select distinct packet fields
which will be able to contribute to the hash value.
This patch adds support for the mentioned features.
Submitted by: Ivan Malov
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18231
Modified:
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/ef10_rx.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_rx.c
head/sys/dev/sfxge/common/siena_nic.c
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cThu Nov 29 06:44:28 2018
(r341199)
+++ head/sys/dev/sfxge/common/ef10_nic.cThu Nov 29 06:44:39 2018
(r341200)
@@ -1068,6 +1068,12 @@ ef10_get_datapath_caps(
}
encp->enc_rx_prefix_size = 14;
+ /* Check if the firmware supports additional RSS modes */
+ if (CAP_FLAGS1(req, ADDITIONAL_RSS_MODES))
+ encp->enc_rx_scale_additional_modes_supported = B_TRUE;
+ else
+ encp->enc_rx_scale_additional_modes_supported = B_FALSE;
+
/* Check if the firmware supports TSO */
if (CAP_FLAGS1(req, TX_TSO))
encp->enc_fw_assisted_tso_enabled = B_TRUE;
Modified: head/sys/dev/sfxge/common/ef10_rx.c
==
--- head/sys/dev/sfxge/common/ef10_rx.c Thu Nov 29 06:44:28 2018
(r341199)
+++ head/sys/dev/sfxge/common/ef10_rx.c Thu Nov 29 06:44:39 2018
(r341200)
@@ -325,10 +325,12 @@ efx_mcdi_rss_context_set_flags(
__inuint32_t rss_context,
__inefx_rx_hash_type_t type)
{
+ efx_nic_cfg_t *encp = &enp->en_nic_cfg;
efx_rx_hash_type_t type_ipv4;
efx_rx_hash_type_t type_ipv4_tcp;
efx_rx_hash_type_t type_ipv6;
efx_rx_hash_type_t type_ipv6_tcp;
+ efx_rx_hash_type_t modes;
efx_mcdi_req_t req;
uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN,
MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN)];
@@ -366,12 +368,35 @@ efx_mcdi_rss_context_set_flags(
MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID,
rss_context);
- type_ipv4 = EFX_RX_HASH(IPV4, 2TUPLE) | EFX_RX_HASH(IPV4_TCP, 2TUPLE);
+ type_ipv4 = EFX_RX_HASH(IPV4, 2TUPLE) | EFX_RX_HASH(IPV4_TCP, 2TUPLE) |
+ EFX_RX_HASH(IPV4_UDP, 2TUPLE);
type_ipv4_tcp = EFX_RX_HASH(IPV4_TCP, 4TUPLE);
- type_ipv6 = EFX_RX_HASH(IPV6, 2TUPLE) | EFX_RX_HASH(IPV6_TCP, 2TUPLE);
+ type_ipv6 = EFX_RX_HASH(IPV6, 2TUPLE) | EFX_RX_HASH(IPV6_TCP, 2TUPLE) |
+ EFX_RX_HASH(IPV6_UDP, 2TUPLE);
type_ipv6_tcp = EFX_RX_HASH(IPV6_TCP, 4TUPLE);
- MCDI_IN_POPULATE_DWORD_4(req, RSS_CONTEXT_SET_FLAGS_IN_FLAGS,
+ /*
+* Create a copy of the original hash type.
+* The copy will be used to fill in RSS_MODE bits and
+* may be cleared beforehand. The original variable
+* and, thus, EN bits will remain unaffected.
+*/
+ modes = type;
+
+ /*
+* If the firmware lacks support for additional modes, RSS_MODE
+* fields must contain zeros, otherwise the operation will fail.
+*/
+ if (encp->enc_rx_scale_additional_modes_supported == B_FALSE)
+ modes = 0;
+
+#defineEXTRACT_RSS_MODE(_type, _class) \
+ (EFX_EXTRACT_NATIVE(_type, 0, 31, \
+ EFX_LOW_BIT(EFX_RX_CLASS_##_class), \
+ EFX_HIGH_BIT(EFX_RX_CLASS_##_class)) & \
+ EFX_MASK32(EFX_RX_CLASS_##_class))
+
+ MCDI_IN_POPULATE_DWORD_10(req, RSS_CONTEXT_SET_FLAGS_IN_FLAGS,
RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN,
((type & type_ipv4) == type_ipv4) ? 1 : 0,
RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN,
@@ -379,7 +404,21 @@ efx_mcdi_rss_context_set_flags(
RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN,
((type & type_ipv6) == type_ipv6) ? 1 : 0,
RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN,
- ((type & type_ipv6_tcp) == type_ipv6_tcp) ? 1 : 0);
+ ((type & type_ipv6_tcp) == type_ipv6_tcp) ? 1 : 0,
+ RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE,
+ EXTRACT_RSS_MODE(modes, IPV4_TCP),
+ RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV4_RSS_MODE,
+ EXTRACT_RSS_MODE(modes, IPV4_UDP),
+ RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE,
+ EXTRACT_RSS_MODE(modes, IPV4),
+ RSS_CONTEXT_SET_FLAGS
svn commit: r341190 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:42:49 2018
New Revision: 341190
URL: https://svnweb.freebsd.org/changeset/base/341190
Log:
sfxge(4): support drop filters on EF10 family NICs
Add support for filters which drop packets when forming MCDI request
for a filter.
Submitted by: Roman Zhukov
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18221
Modified:
head/sys/dev/sfxge/common/ef10_filter.c
Modified: head/sys/dev/sfxge/common/ef10_filter.c
==
--- head/sys/dev/sfxge/common/ef10_filter.c Thu Nov 29 06:42:38 2018
(r341189)
+++ head/sys/dev/sfxge/common/ef10_filter.c Thu Nov 29 06:42:49 2018
(r341190)
@@ -238,10 +238,15 @@ efx_mcdi_filter_op_add(
EVB_PORT_ID_ASSIGNED);
MCDI_IN_SET_DWORD(req, FILTER_OP_EXT_IN_MATCH_FIELDS,
match_flags);
- MCDI_IN_SET_DWORD(req, FILTER_OP_EXT_IN_RX_DEST,
- MC_CMD_FILTER_OP_EXT_IN_RX_DEST_HOST);
- MCDI_IN_SET_DWORD(req, FILTER_OP_EXT_IN_RX_QUEUE,
- spec->efs_dmaq_id);
+ if (spec->efs_dmaq_id == EFX_FILTER_SPEC_RX_DMAQ_ID_DROP) {
+ MCDI_IN_SET_DWORD(req, FILTER_OP_EXT_IN_RX_DEST,
+ MC_CMD_FILTER_OP_EXT_IN_RX_DEST_DROP);
+ } else {
+ MCDI_IN_SET_DWORD(req, FILTER_OP_EXT_IN_RX_DEST,
+ MC_CMD_FILTER_OP_EXT_IN_RX_DEST_HOST);
+ MCDI_IN_SET_DWORD(req, FILTER_OP_EXT_IN_RX_QUEUE,
+ spec->efs_dmaq_id);
+ }
#if EFSYS_OPT_RX_SCALE
if (spec->efs_flags & EFX_FILTER_FLAG_RX_RSS) {
___
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svn commit: r341196 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:43:57 2018
New Revision: 341196
URL: https://svnweb.freebsd.org/changeset/base/341196
Log:
sfxge(4): support FW subvariant choice
If DPDK application or OS does not need checksumming on transmit,
it may be disabled in firmware to achieve higher packet rates.
Choice must be done before VIS allocation and is allowed if
no other non-preboot and firmware subvariant-unaware drivers are
attached.
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18227
Modified:
head/sys/dev/sfxge/common/ef10_impl.h
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_nic.c
Modified: head/sys/dev/sfxge/common/ef10_impl.h
==
--- head/sys/dev/sfxge/common/ef10_impl.h Thu Nov 29 06:43:46 2018
(r341195)
+++ head/sys/dev/sfxge/common/ef10_impl.h Thu Nov 29 06:43:57 2018
(r341196)
@@ -1193,6 +1193,22 @@ ef10_get_privilege_mask(
__inefx_nic_t *enp,
__out uint32_t *maskp);
+#if EFSYS_OPT_FW_SUBVARIANT_AWARE
+
+extern __checkReturn efx_rc_t
+efx_mcdi_get_nic_global(
+ __inefx_nic_t *enp,
+ __inuint32_t key,
+ __out uint32_t *valuep);
+
+extern __checkReturn efx_rc_t
+efx_mcdi_set_nic_global(
+ __inefx_nic_t *enp,
+ __inuint32_t key,
+ __inuint32_t value);
+
+#endif /* EFSYS_OPT_FW_SUBVARIANT_AWARE */
+
#if EFSYS_OPT_RX_PACKED_STREAM
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cThu Nov 29 06:43:46 2018
(r341195)
+++ head/sys/dev/sfxge/common/ef10_nic.cThu Nov 29 06:43:57 2018
(r341196)
@@ -2324,5 +2324,87 @@ fail1:
#endif /* EFSYS_OPT_DIAG */
+#if EFSYS_OPT_FW_SUBVARIANT_AWARE
+
+ __checkReturn efx_rc_t
+efx_mcdi_get_nic_global(
+ __inefx_nic_t *enp,
+ __inuint32_t key,
+ __out uint32_t *valuep)
+{
+ efx_mcdi_req_t req;
+ uint8_t payload[MAX(MC_CMD_GET_NIC_GLOBAL_IN_LEN,
+ MC_CMD_GET_NIC_GLOBAL_OUT_LEN)];
+ efx_rc_t rc;
+
+ (void) memset(payload, 0, sizeof (payload));
+ req.emr_cmd = MC_CMD_GET_NIC_GLOBAL;
+ req.emr_in_buf = payload;
+ req.emr_in_length = MC_CMD_GET_NIC_GLOBAL_IN_LEN;
+ req.emr_out_buf = payload;
+ req.emr_out_length = MC_CMD_GET_NIC_GLOBAL_OUT_LEN;
+
+ MCDI_IN_SET_DWORD(req, GET_NIC_GLOBAL_IN_KEY, key);
+
+ efx_mcdi_execute(enp, &req);
+
+ if (req.emr_rc != 0) {
+ rc = req.emr_rc;
+ goto fail1;
+ }
+
+ if (req.emr_out_length_used != MC_CMD_GET_NIC_GLOBAL_OUT_LEN) {
+ rc = EMSGSIZE;
+ goto fail2;
+ }
+
+ *valuep = MCDI_OUT_DWORD(req, GET_NIC_GLOBAL_OUT_VALUE);
+
+ return (0);
+
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+ return (rc);
+}
+
+ __checkReturn efx_rc_t
+efx_mcdi_set_nic_global(
+ __inefx_nic_t *enp,
+ __inuint32_t key,
+ __inuint32_t value)
+{
+ efx_mcdi_req_t req;
+ uint8_t payload[MC_CMD_SET_NIC_GLOBAL_IN_LEN];
+ efx_rc_t rc;
+
+ (void) memset(payload, 0, sizeof (payload));
+ req.emr_cmd = MC_CMD_SET_NIC_GLOBAL;
+ req.emr_in_buf = payload;
+ req.emr_in_length = MC_CMD_SET_NIC_GLOBAL_IN_LEN;
+ req.emr_out_buf = NULL;
+ req.emr_out_length = 0;
+
+ MCDI_IN_SET_DWORD(req, SET_NIC_GLOBAL_IN_KEY, key);
+ MCDI_IN_SET_DWORD(req, SET_NIC_GLOBAL_IN_VALUE, value);
+
+ efx_mcdi_execute(enp, &req);
+
+ if (req.emr_rc != 0) {
+ rc = req.emr_rc;
+ goto fail1;
+ }
+
+ return (0);
+
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+ return (rc);
+}
+
+#endif /* EFSYS_OPT_FW_SUBVARIANT_AWARE */
#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:43:46 2018
(r341195)
+++ head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:43:57 2018
(r341196)
@@ -2891,6 +2891,38 @@ efx_tunnel_reconfigure(
#endif /* EFSYS_OPT_TUNNEL */
+#if EFSYS_OPT_FW_SUBVARIANT_AWARE
+
+/**
+ * Firmware subvariant choice options.
+ *
+ * It may be switched to no Tx checksum if attached drivers are either
+ * preboot or firmware subvariant aware and no VIS are allocated.
+ * If may be always switched to default explicitly using set request or
+ * implicitly if unaware driver
svn commit: r341198 - head/sys/dev/sfxge/common
Author: arybchik Date: Thu Nov 29 06:44:20 2018 New Revision: 341198 URL: https://svnweb.freebsd.org/changeset/base/341198 Log: sfxge(4): cope with clang warning on negative shift clang 4.0.1-6 on Ubuntu generates false positive warning that shift is negative. It is done regardless of the fact that the branch is not taken because of previous check. The warning is generate in EFX_INSERT_NATIVE32 used by EFX_INSERT_FIELD_NATIVE32. All similar cases are fixed as well. It is undesirable to suppress the warning completely. Sponsored by: Solarflare Communications, Inc. Differential Revision: https://reviews.freebsd.org/D18229 Modified: head/sys/dev/sfxge/common/efx_types.h Modified: head/sys/dev/sfxge/common/efx_types.h == --- head/sys/dev/sfxge/common/efx_types.h Thu Nov 29 06:44:09 2018 (r341197) +++ head/sys/dev/sfxge/common/efx_types.h Thu Nov 29 06:44:20 2018 (r341198) @@ -357,6 +357,16 @@ extern int fix_lint; #endif /* + * Saturation arithmetic subtract with minimum equal to zero. + * + * Use saturating arithmetic to ensure a non-negative result. This + * avoids undefined behaviour (and compiler warnings) when used as a + * shift count. + */ +#defineEFX_SSUB(_val, _sub) \ + ((_val) > (_sub) ? ((_val) - (_sub)) : 0) + +/* * Extract bit field portion [low,high) from the native-endian element * which contains bits [min,max). * @@ -375,8 +385,8 @@ extern int fix_lint; ((FIX_LINT(_low > _max) || FIX_LINT(_high < _min)) ?\ 0U :\ ((_low > _min) ?\ - ((_element) >> (_low - _min)) : \ - ((_element) << (_min - _low + ((_element) >> EFX_SSUB(_low, _min)) : \ + ((_element) << EFX_SSUB(_min, _low /* * Extract bit field portion [low,high) from the 64-bit little-endian @@ -565,29 +575,29 @@ extern int fix_lint; (((_low > _max) || (_high < _min)) ?\ 0U :\ ((_low > _min) ?\ - (((uint64_t)(_value)) << (_low - _min)) : \ - (((uint64_t)(_value)) >> (_min - _low + (((uint64_t)(_value)) << EFX_SSUB(_low, _min)) :\ + (((uint64_t)(_value)) >> EFX_SSUB(_min, _low #defineEFX_INSERT_NATIVE32(_min, _max, _low, _high, _value) \ (((_low > _max) || (_high < _min)) ?\ 0U :\ ((_low > _min) ?\ - (((uint32_t)(_value)) << (_low - _min)) : \ - (((uint32_t)(_value)) >> (_min - _low + (((uint32_t)(_value)) << EFX_SSUB(_low, _min)) :\ + (((uint32_t)(_value)) >> EFX_SSUB(_min, _low #defineEFX_INSERT_NATIVE16(_min, _max, _low, _high, _value) \ (((_low > _max) || (_high < _min)) ?\ 0U :\ (uint16_t)((_low > _min) ? \ - ((_value) << (_low - _min)) : \ - ((_value) >> (_min - _low + ((_value) << EFX_SSUB(_low, _min)) :\ + ((_value) >> EFX_SSUB(_min, _low #defineEFX_INSERT_NATIVE8(_min, _max, _low, _high, _value) \ (((_low > _max) || (_high < _min)) ?\ 0U :\ (uint8_t)((_low > _min) ? \ - ((_value) << (_low - _min)) : \ - ((_value) >> (_min - _low + ((_value) << EFX_SSUB(_low, _min)) :\ + ((_value) >> EFX_SSUB(_min, _low /* * Construct bit field portion @@ -1316,22 +1326,22 @@ extern int fix_lint; #defineEFX_SHIFT64(_bit, _base) \ (((_bit) >= (_base) && (_bit) < (_base) + 64) ? \ - ((uint64_t)1 << ((_bit) - (_base))) : \ + ((uint64_t)1 << EFX_SSUB((_bit), (_base))) :\ 0U) #defineEFX_SHIFT32(_bit, _base) \ (((_bit) >= (_base) && (_bit) < (_base) + 32) ? \
svn commit: r341194 - head/sys/dev/sfxge/common
Author: arybchik Date: Thu Nov 29 06:43:34 2018 New Revision: 341194 URL: https://svnweb.freebsd.org/changeset/base/341194 Log: sfxge(4): add firmware subvariant aware driver option FW subvariants allow to tweak NIC global features. For example, if no drivers require checksumming on transmit, it may be disabled in FW to increase packet rate. Sponsored by: Solarflare Communications, Inc. Differential Revision: https://reviews.freebsd.org/D18225 Modified: head/sys/dev/sfxge/common/efsys.h head/sys/dev/sfxge/common/efx_check.h head/sys/dev/sfxge/common/efx_mcdi.c Modified: head/sys/dev/sfxge/common/efsys.h == --- head/sys/dev/sfxge/common/efsys.h Thu Nov 29 06:43:23 2018 (r341193) +++ head/sys/dev/sfxge/common/efsys.h Thu Nov 29 06:43:34 2018 (r341194) @@ -287,6 +287,8 @@ sfxge_map_mbuf_fast(bus_dma_tag_t tag, bus_dmamap_t ma #defineEFSYS_OPT_TUNNEL 0 +#defineEFSYS_OPT_FW_SUBVARIANT_AWARE 0 + /* ID */ typedef struct __efsys_identifier_sefsys_identifier_t; Modified: head/sys/dev/sfxge/common/efx_check.h == --- head/sys/dev/sfxge/common/efx_check.h Thu Nov 29 06:43:23 2018 (r341193) +++ head/sys/dev/sfxge/common/efx_check.h Thu Nov 29 06:43:34 2018 (r341194) @@ -377,4 +377,11 @@ # endif #endif /* EFSYS_OPT_TUNNEL */ +#if EFSYS_OPT_FW_SUBVARIANT_AWARE +/* Advertise that the driver is firmware subvariant aware */ +# if !(EFSYS_OPT_MEDFORD2) +# error "FW_SUBVARIANT_AWARE requires MEDFORD2" +# endif +#endif + #endif /* _SYS_EFX_CHECK_H */ Modified: head/sys/dev/sfxge/common/efx_mcdi.c == --- head/sys/dev/sfxge/common/efx_mcdi.cThu Nov 29 06:43:23 2018 (r341193) +++ head/sys/dev/sfxge/common/efx_mcdi.cThu Nov 29 06:43:34 2018 (r341194) @@ -1303,7 +1303,9 @@ efx_mcdi_drv_attach( * FULL_FEATURED datapath firmware type first and fall backs to * DONT_CARE datapath firmware type if MC_CMD_DRV_ATTACH fails. */ - MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_NEW_STATE, attach ? 1 : 0); + MCDI_IN_POPULATE_DWORD_2(req, DRV_ATTACH_IN_NEW_STATE, + DRV_ATTACH_IN_ATTACH, attach ? 1 : 0, + DRV_ATTACH_IN_SUBVARIANT_AWARE, EFSYS_OPT_FW_SUBVARIANT_AWARE); MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_UPDATE, 1); MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_FIRMWARE_ID, enp->efv); ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r341193 - head/sys/dev/sfxge/common
Author: arybchik Date: Thu Nov 29 06:43:23 2018 New Revision: 341193 URL: https://svnweb.freebsd.org/changeset/base/341193 Log: sfxge(4): update MCDI headers Sponsored by: Solarflare Communications, Inc. Differential Revision: https://reviews.freebsd.org/D18224 Modified: head/sys/dev/sfxge/common/efx_regs_mcdi.h head/sys/dev/sfxge/common/efx_regs_mcdi_aoe.h Modified: head/sys/dev/sfxge/common/efx_regs_mcdi.h == --- head/sys/dev/sfxge/common/efx_regs_mcdi.h Thu Nov 29 06:43:12 2018 (r341192) +++ head/sys/dev/sfxge/common/efx_regs_mcdi.h Thu Nov 29 06:43:23 2018 (r341193) @@ -301,7 +301,8 @@ #define MC_CMD_ERR_NO_PRIVILEGE 0x1013 /* Workaround 26807 could not be turned on/off because some functions * have already installed filters. See the comment at - * MC_CMD_WORKAROUND_BUG26807. */ + * MC_CMD_WORKAROUND_BUG26807. + * May also returned for other operations such as sub-variant switching. */ #define MC_CMD_ERR_FILTERS_PRESENT 0x1014 /* The clock whose frequency you've attempted to set set * doesn't exist on this NIC */ @@ -320,6 +321,10 @@ * away. This is distinct from MC_CMD_ERR_DATAPATH_DISABLED in that the * datapath absence may be temporary*/ #define MC_CMD_ERR_NO_DATAPATH 0x1019 +/* The operation could not complete because some VIs are allocated */ +#define MC_CMD_ERR_VIS_PRESENT 0x101a +/* The operation could not complete because some PIO buffers are allocated */ +#define MC_CMD_ERR_PIOBUFS_PRESENT 0x101b #define MC_CMD_ERR_CODE_OFST 0 @@ -404,7 +409,7 @@ #defineMCDI_EVENT_LEVEL_LBN 33 #defineMCDI_EVENT_LEVEL_WIDTH 3 /* enum: Info. */ -#defineMCDI_EVENT_LEVEL_INFO 0x0 +#defineMCDI_EVENT_LEVEL_INFO 0x0 /* enum: Warning. */ #defineMCDI_EVENT_LEVEL_WARN 0x1 /* enum: Error. */ @@ -424,21 +429,21 @@ #defineMCDI_EVENT_LINKCHANGE_SPEED_LBN 16 #defineMCDI_EVENT_LINKCHANGE_SPEED_WIDTH 4 /* enum: Link is down or link speed could not be determined */ -#defineMCDI_EVENT_LINKCHANGE_SPEED_UNKNOWN 0x0 +#defineMCDI_EVENT_LINKCHANGE_SPEED_UNKNOWN 0x0 /* enum: 100Mbs */ -#defineMCDI_EVENT_LINKCHANGE_SPEED_100M 0x1 +#defineMCDI_EVENT_LINKCHANGE_SPEED_100M 0x1 /* enum: 1Gbs */ -#defineMCDI_EVENT_LINKCHANGE_SPEED_1G 0x2 +#defineMCDI_EVENT_LINKCHANGE_SPEED_1G 0x2 /* enum: 10Gbs */ -#defineMCDI_EVENT_LINKCHANGE_SPEED_10G 0x3 +#defineMCDI_EVENT_LINKCHANGE_SPEED_10G 0x3 /* enum: 40Gbs */ -#defineMCDI_EVENT_LINKCHANGE_SPEED_40G 0x4 +#defineMCDI_EVENT_LINKCHANGE_SPEED_40G 0x4 /* enum: 25Gbs */ -#defineMCDI_EVENT_LINKCHANGE_SPEED_25G 0x5 +#defineMCDI_EVENT_LINKCHANGE_SPEED_25G 0x5 /* enum: 50Gbs */ -#defineMCDI_EVENT_LINKCHANGE_SPEED_50G 0x6 +#defineMCDI_EVENT_LINKCHANGE_SPEED_50G 0x6 /* enum: 100Gbs */ -#defineMCDI_EVENT_LINKCHANGE_SPEED_100G 0x7 +#defineMCDI_EVENT_LINKCHANGE_SPEED_100G 0x7 #defineMCDI_EVENT_LINKCHANGE_FCNTL_LBN 20 #defineMCDI_EVENT_LINKCHANGE_FCNTL_WIDTH 4 #defineMCDI_EVENT_LINKCHANGE_LINK_FLAGS_LBN 24 @@ -645,23 +650,23 @@ /* enum: Transmit error */ #defineMCDI_EVENT_CODE_TX_ERR 0xb /* enum: Tx flush has completed */ -#defineMCDI_EVENT_CODE_TX_FLUSH 0xc +#defineMCDI_EVENT_CODE_TX_FLUSH 0xc /* enum: PTP packet received timestamp */ -#defineMCDI_EVENT_CODE_PTP_RX 0xd +#defineMCDI_EVENT_CODE_PTP_RX 0xd /* enum: PTP NIC failure */ -#defineMCDI_EVENT_CODE_PTP_FAULT 0xe +#defineMCDI_EVENT_CODE_PTP_FAULT 0xe /* enum: PTP PPS event */ -#defineMCDI_EVENT_CODE_PTP_PPS 0xf +#defineMCDI_EVENT_CODE_PTP_PPS 0xf /* enum: Rx flush has completed */ -#defineMCDI_EVENT_CODE_RX_FLUSH 0x10 +#defineMCDI_EVENT_CODE_RX_FLUSH 0x10 /* enum: Receive error */ #defineMCDI_EVENT_CODE_RX_ERR 0x11 /* enum: AOE fault */ -#defineMCDI_EVENT_CODE_AOE 0x12 +#defineMCDI_EVENT_CODE_AOE 0x12 /* enum: Network port calibration failed (VCAL). */ -#defineMCDI_EVENT_CODE_VCAL_FAIL 0x13 +#defineMCDI_EVENT_CODE_VCAL_FAIL 0x13 /* enum: HW PPS event */ -#defineMCDI_EVENT_CODE_HW_PPS 0x14 +#defineMCDI_EVENT_CODE_HW_PPS 0x14 /* enum: The MC has rebooted (huntington and later, siena uses CODE_REBOOT and * a different format) */ @@ -693,7 +698,7 @@ /* enum: Artificial event generated by host and posted via MC for test * purposes. */ -#defineMCDI_EVENT_CODE_TESTGEN 0xfa +#defineMCDI_EVENT_CODE_TESTGEN 0xfa #defineMCDI_EVENT_CMDDONE_DATA_OFST 0 #defineMCDI_EVENT_CMDDONE_DATA_LEN 4 #defineMCDI_EVENT_CMDDONE_DATA_LBN 0 @@ -823,7 +828,7 @@ #defineFCDI_EVENT_LEVEL_LBN 33 #defineFCDI_EVENT_LEVEL_WIDTH 3 /* enum: Info. */ -#defineFCDI_EVENT_LEVEL_INFO 0x0 +#define
svn commit: r341191 - in head/sys/dev/sfxge: . common
Author: arybchik
Date: Thu Nov 29 06:43:00 2018
New Revision: 341191
URL: https://svnweb.freebsd.org/changeset/base/341191
Log:
sfxge(4): support choosing firmware variant
Submitted by: Gautam Dawar
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18222
Modified:
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_impl.h
head/sys/dev/sfxge/common/efx_mcdi.c
head/sys/dev/sfxge/common/efx_nic.c
head/sys/dev/sfxge/sfxge.c
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:42:49 2018
(r341190)
+++ head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:43:00 2018
(r341191)
@@ -157,9 +157,22 @@ efx_nic_create(
__inefsys_lock_t *eslp,
__deref_out efx_nic_t **enpp);
+/* EFX_FW_VARIANT codes map one to one on MC_CMD_FW codes */
+typedef enum efx_fw_variant_e {
+ EFX_FW_VARIANT_FULL_FEATURED,
+ EFX_FW_VARIANT_LOW_LATENCY,
+ EFX_FW_VARIANT_PACKED_STREAM,
+ EFX_FW_VARIANT_HIGH_TX_RATE,
+ EFX_FW_VARIANT_PACKED_STREAM_HASH_MODE_1,
+ EFX_FW_VARIANT_RULES_ENGINE,
+ EFX_FW_VARIANT_DPDK,
+ EFX_FW_VARIANT_DONT_CARE = 0x
+} efx_fw_variant_t;
+
extern __checkReturn efx_rc_t
efx_nic_probe(
- __inefx_nic_t *enp);
+ __inefx_nic_t *enp,
+ __inefx_fw_variant_t efv);
extern __checkReturn efx_rc_t
efx_nic_init(
Modified: head/sys/dev/sfxge/common/efx_impl.h
==
--- head/sys/dev/sfxge/common/efx_impl.hThu Nov 29 06:42:49 2018
(r341190)
+++ head/sys/dev/sfxge/common/efx_impl.hThu Nov 29 06:43:00 2018
(r341191)
@@ -675,6 +675,7 @@ struct efx_nic_s {
const efx_ev_ops_t *en_eevop;
const efx_tx_ops_t *en_etxop;
const efx_rx_ops_t *en_erxop;
+ efx_fw_variant_tefv;
#if EFSYS_OPT_FILTER
efx_filter_ten_filter;
const efx_filter_ops_t *en_efop;
Modified: head/sys/dev/sfxge/common/efx_mcdi.c
==
--- head/sys/dev/sfxge/common/efx_mcdi.cThu Nov 29 06:42:49 2018
(r341190)
+++ head/sys/dev/sfxge/common/efx_mcdi.cThu Nov 29 06:43:00 2018
(r341191)
@@ -1293,13 +1293,19 @@ efx_mcdi_drv_attach(
req.emr_out_length = MC_CMD_DRV_ATTACH_EXT_OUT_LEN;
/*
-* Use DONT_CARE for the datapath firmware type to ensure that the
-* driver can attach to an unprivileged function. The datapath firmware
-* type to use is controlled by the 'sfboot' utility.
+* Typically, client drivers use DONT_CARE for the datapath firmware
+* type to ensure that the driver can attach to an unprivileged
+* function. The datapath firmware type to use is controlled by the
+* 'sfboot' utility.
+* If a client driver wishes to attach with a specific datapath firmware
+* type, that can be passed in second argument of efx_nic_probe API. One
+* such example is the ESXi native driver that attempts attaching with
+* FULL_FEATURED datapath firmware type first and fall backs to
+* DONT_CARE datapath firmware type if MC_CMD_DRV_ATTACH fails.
*/
MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_NEW_STATE, attach ? 1 : 0);
MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_UPDATE, 1);
- MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_DONT_CARE);
+ MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_FIRMWARE_ID, enp->efv);
efx_mcdi_execute(enp, &req);
Modified: head/sys/dev/sfxge/common/efx_nic.c
==
--- head/sys/dev/sfxge/common/efx_nic.c Thu Nov 29 06:42:49 2018
(r341190)
+++ head/sys/dev/sfxge/common/efx_nic.c Thu Nov 29 06:43:00 2018
(r341191)
@@ -319,7 +319,8 @@ fail1:
__checkReturn efx_rc_t
efx_nic_probe(
- __inefx_nic_t *enp)
+ __inefx_nic_t *enp,
+ __inefx_fw_variant_t efv)
{
const efx_nic_ops_t *enop;
efx_rc_t rc;
@@ -330,7 +331,27 @@ efx_nic_probe(
#endif /* EFSYS_OPT_MCDI */
EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_PROBE));
+ /* Ensure FW variant codes match with MC_CMD_FW codes */
+ EFX_STATIC_ASSERT(EFX_FW_VARIANT_FULL_FEATURED ==
+ MC_CMD_FW_FULL_FEATURED);
+ EFX_STATIC_ASSERT(EFX_FW_VARIANT_LOW_LATENCY ==
+ MC_CMD_FW_LOW_LATENCY);
+ EFX_STATIC_ASSERT(EFX_FW_VARIANT_PACKED_STREAM ==
+ MC_CMD_FW_PACKED_STREAM);
+ EFX_STATIC_ASSERT(EFX_FW_VARIANT_HIGH_TX_RATE ==
+ MC_CMD_FW_HIGH_TX_RATE);
+ EFX_STATIC_ASSERT(EFX_FW_VARIANT_PACKED_STREAM_HA
svn commit: r341188 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:42:26 2018
New Revision: 341188
URL: https://svnweb.freebsd.org/changeset/base/341188
Log:
sfxge(4): support VXLAN filter creation
Submitted by: Vijay Srivastava
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18219
Modified:
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_filter.c
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:42:15 2018
(r341187)
+++ head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:42:26 2018
(r341188)
@@ -2653,6 +2653,13 @@ efx_filter_spec_set_encap_type(
__inefx_tunnel_protocol_t encap_type,
__inefx_filter_inner_frame_match_t inner_frame_match);
+extern __checkReturn efx_rc_t
+efx_filter_spec_set_vxlan_full(
+ __inout efx_filter_spec_t *spec,
+ __inconst uint8_t *vxlan_id,
+ __inconst uint8_t *inner_addr,
+ __inconst uint8_t *outer_addr);
+
#if EFSYS_OPT_RX_SCALE
extern __checkReturn efx_rc_t
efx_filter_spec_set_rss_context(
Modified: head/sys/dev/sfxge/common/efx_filter.c
==
--- head/sys/dev/sfxge/common/efx_filter.c Thu Nov 29 06:42:15 2018
(r341187)
+++ head/sys/dev/sfxge/common/efx_filter.c Thu Nov 29 06:42:26 2018
(r341188)
@@ -497,6 +497,42 @@ fail1:
return (rc);
}
+/*
+ * Specify inner and outer Ethernet address and VXLAN ID in filter
+ * specification.
+ */
+ __checkReturn efx_rc_t
+efx_filter_spec_set_vxlan_full(
+ __inout efx_filter_spec_t *spec,
+ __inconst uint8_t *vxlan_id,
+ __inconst uint8_t *inner_addr,
+ __inconst uint8_t *outer_addr)
+{
+ EFSYS_ASSERT3P(spec, !=, NULL);
+ EFSYS_ASSERT3P(vxlan_id, !=, NULL);
+ EFSYS_ASSERT3P(inner_addr, !=, NULL);
+ EFSYS_ASSERT3P(outer_addr, !=, NULL);
+
+ if ((inner_addr == NULL) && (outer_addr == NULL))
+ return (EINVAL);
+
+ if (vxlan_id != NULL) {
+ spec->efs_match_flags |= EFX_FILTER_MATCH_VNI_OR_VSID;
+ memcpy(spec->efs_vni_or_vsid, vxlan_id, EFX_VNI_OR_VSID_LEN);
+ }
+ if (outer_addr != NULL) {
+ spec->efs_match_flags |= EFX_FILTER_MATCH_LOC_MAC;
+ memcpy(spec->efs_loc_mac, outer_addr, EFX_MAC_ADDR_LEN);
+ }
+ if (inner_addr != NULL) {
+ spec->efs_match_flags |= EFX_FILTER_MATCH_IFRM_LOC_MAC;
+ memcpy(spec->efs_ifrm_loc_mac, inner_addr, EFX_MAC_ADDR_LEN);
+ }
+ spec->efs_encap_type = EFX_TUNNEL_PROTOCOL_VXLAN;
+
+ return (0);
+}
+
#if EFSYS_OPT_RX_SCALE
__checkReturn efx_rc_t
efx_filter_spec_set_rss_context(
___
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svn commit: r341187 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:42:15 2018
New Revision: 341187
URL: https://svnweb.freebsd.org/changeset/base/341187
Log:
sfxge(4): support VNI/VSID and inner frame local MAC
This supports VNI/VSID and inner frame local MAC fields to
match in VXLAN, GENEVE, or NVGRE packets.
Submitted by: Roman Zhukov
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18218
Modified:
head/sys/dev/sfxge/common/ef10_filter.c
head/sys/dev/sfxge/common/efx.h
Modified: head/sys/dev/sfxge/common/ef10_filter.c
==
--- head/sys/dev/sfxge/common/ef10_filter.c Thu Nov 29 06:42:04 2018
(r341186)
+++ head/sys/dev/sfxge/common/ef10_filter.c Thu Nov 29 06:42:15 2018
(r341187)
@@ -146,6 +146,10 @@ ef10_filter_init(
MATCH_MASK(MC_CMD_FILTER_OP_EXT_IN_MATCH_OUTER_VLAN));
EFX_STATIC_ASSERT(EFX_FILTER_MATCH_IP_PROTO ==
MATCH_MASK(MC_CMD_FILTER_OP_EXT_IN_MATCH_IP_PROTO));
+ EFX_STATIC_ASSERT(EFX_FILTER_MATCH_VNI_OR_VSID ==
+ MATCH_MASK(MC_CMD_FILTER_OP_EXT_IN_MATCH_VNI_OR_VSID));
+ EFX_STATIC_ASSERT(EFX_FILTER_MATCH_IFRM_LOC_MAC ==
+ MATCH_MASK(MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_MAC));
EFX_STATIC_ASSERT(EFX_FILTER_MATCH_IFRM_UNKNOWN_MCAST_DST ==
MATCH_MASK(MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_MCAST_DST));
EFX_STATIC_ASSERT(EFX_FILTER_MATCH_IFRM_UNKNOWN_UCAST_DST ==
@@ -319,6 +323,12 @@ efx_mcdi_filter_op_add(
rc = EINVAL;
goto fail2;
}
+
+ memcpy(MCDI_IN2(req, uint8_t, FILTER_OP_EXT_IN_VNI_OR_VSID),
+ spec->efs_vni_or_vsid, EFX_VNI_OR_VSID_LEN);
+
+ memcpy(MCDI_IN2(req, uint8_t, FILTER_OP_EXT_IN_IFRM_DST_MAC),
+ spec->efs_ifrm_loc_mac, EFX_MAC_ADDR_LEN);
}
efx_mcdi_execute(enp, &req);
@@ -442,6 +452,12 @@ ef10_filter_equal(
return (B_FALSE);
if (left->efs_encap_type != right->efs_encap_type)
return (B_FALSE);
+ if (memcmp(left->efs_vni_or_vsid, right->efs_vni_or_vsid,
+ EFX_VNI_OR_VSID_LEN))
+ return (B_FALSE);
+ if (memcmp(left->efs_ifrm_loc_mac, right->efs_ifrm_loc_mac,
+ EFX_MAC_ADDR_LEN))
+ return (B_FALSE);
return (B_TRUE);
@@ -1015,6 +1031,8 @@ ef10_filter_supported_filters(
EFX_FILTER_MATCH_LOC_MAC | EFX_FILTER_MATCH_LOC_PORT |
EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_INNER_VID |
EFX_FILTER_MATCH_OUTER_VID | EFX_FILTER_MATCH_IP_PROTO |
+ EFX_FILTER_MATCH_VNI_OR_VSID |
+ EFX_FILTER_MATCH_IFRM_LOC_MAC |
EFX_FILTER_MATCH_IFRM_UNKNOWN_MCAST_DST |
EFX_FILTER_MATCH_IFRM_UNKNOWN_UCAST_DST |
EFX_FILTER_MATCH_UNKNOWN_MCAST_DST |
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:42:04 2018
(r341186)
+++ head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:42:15 2018
(r341187)
@@ -482,6 +482,8 @@ typedef enum efx_link_mode_e {
#defineEFX_MAC_ADDR_LEN 6
+#defineEFX_VNI_OR_VSID_LEN 3
+
#defineEFX_MAC_ADDR_IS_MULTICAST(_address) (((uint8_t *)_address)[0] &
0x01)
#defineEFX_MAC_MULTICAST_LIST_MAX 256
@@ -2504,6 +2506,10 @@ typedef uint8_t efx_filter_flags_t;
#defineEFX_FILTER_MATCH_OUTER_VID 0x0100
/* Match by IP transport protocol */
#defineEFX_FILTER_MATCH_IP_PROTO 0x0200
+/* Match by VNI or VSID */
+#defineEFX_FILTER_MATCH_VNI_OR_VSID0x0800
+/* For encapsulated packets, match by inner frame local MAC address */
+#defineEFX_FILTER_MATCH_IFRM_LOC_MAC 0x0001
/* For encapsulated packets, match all multicast inner frames */
#defineEFX_FILTER_MATCH_IFRM_UNKNOWN_MCAST_DST 0x0100
/* For encapsulated packets, match all unicast inner frames */
@@ -2550,6 +2556,8 @@ typedef struct efx_filter_spec_s {
uint16_tefs_rem_port;
efx_oword_t efs_rem_host;
efx_oword_t efs_loc_host;
+ uint8_t efs_vni_or_vsid[EFX_VNI_OR_VSID_LEN];
+ uint8_t efs_ifrm_loc_mac[EFX_MAC_ADDR_LEN];
} efx_filter_spec_t;
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svn commit: r341189 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:42:38 2018
New Revision: 341189
URL: https://svnweb.freebsd.org/changeset/base/341189
Log:
sfxge(4): distinguish filters for encapsulated packets
Add filter match flag to distinguish filters applied only to
encapsulated packets.
Match flags set should allow to determine whether a filter
is supported or not. The problem is that if specification
has supported set outer match flags and specified
encapsulation without any inner flags, check says that it
is supported, and filter insertion is performed. However,
there is no filtering of the encapsulated traffic. A new
flag is added to solve this problem and separate the
filters for the encapsulated packets.
Submitted by: Roman Zhukov
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18220
Modified:
head/sys/dev/sfxge/common/ef10_filter.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_filter.c
Modified: head/sys/dev/sfxge/common/ef10_filter.c
==
--- head/sys/dev/sfxge/common/ef10_filter.c Thu Nov 29 06:42:26 2018
(r341188)
+++ head/sys/dev/sfxge/common/ef10_filter.c Thu Nov 29 06:42:38 2018
(r341189)
@@ -201,6 +201,7 @@ efx_mcdi_filter_op_add(
efx_mcdi_req_t req;
uint8_t payload[MAX(MC_CMD_FILTER_OP_EXT_IN_LEN,
MC_CMD_FILTER_OP_EXT_OUT_LEN)];
+ efx_filter_match_flags_t match_flags;
efx_rc_t rc;
memset(payload, 0, sizeof (payload));
@@ -210,6 +211,12 @@ efx_mcdi_filter_op_add(
req.emr_out_buf = payload;
req.emr_out_length = MC_CMD_FILTER_OP_EXT_OUT_LEN;
+ /*
+* Remove match flag for encapsulated filters that does not correspond
+* to the MCDI match flags
+*/
+ match_flags = spec->efs_match_flags & ~EFX_FILTER_MATCH_ENCAP_TYPE;
+
switch (filter_op) {
case MC_CMD_FILTER_OP_IN_OP_REPLACE:
MCDI_IN_SET_DWORD(req, FILTER_OP_EXT_IN_HANDLE_LO,
@@ -230,7 +237,7 @@ efx_mcdi_filter_op_add(
MCDI_IN_SET_DWORD(req, FILTER_OP_EXT_IN_PORT_ID,
EVB_PORT_ID_ASSIGNED);
MCDI_IN_SET_DWORD(req, FILTER_OP_EXT_IN_MATCH_FIELDS,
- spec->efs_match_flags);
+ match_flags);
MCDI_IN_SET_DWORD(req, FILTER_OP_EXT_IN_RX_DEST,
MC_CMD_FILTER_OP_EXT_IN_RX_DEST_HOST);
MCDI_IN_SET_DWORD(req, FILTER_OP_EXT_IN_RX_QUEUE,
@@ -1035,13 +1042,17 @@ ef10_filter_supported_filters(
EFX_FILTER_MATCH_IFRM_LOC_MAC |
EFX_FILTER_MATCH_IFRM_UNKNOWN_MCAST_DST |
EFX_FILTER_MATCH_IFRM_UNKNOWN_UCAST_DST |
+ EFX_FILTER_MATCH_ENCAP_TYPE |
EFX_FILTER_MATCH_UNKNOWN_MCAST_DST |
EFX_FILTER_MATCH_UNKNOWN_UCAST_DST);
/*
* Two calls to MC_CMD_GET_PARSER_DISP_INFO are needed: one to get the
* list of supported filters for ordinary packets, and then another to
-* get the list of supported filters for encapsulated packets.
+* get the list of supported filters for encapsulated packets. To
+* distinguish the second list from the first, the
+* EFX_FILTER_MATCH_ENCAP_TYPE flag is added to each filter for
+* encapsulated packets.
*/
rc = efx_mcdi_get_parser_disp_info(enp, buffer, buffer_length, B_FALSE,
&mcdi_list_length);
@@ -1069,6 +1080,10 @@ ef10_filter_supported_filters(
no_space = B_TRUE;
else
goto fail2;
+ } else {
+ for (i = next_buf_idx;
+ i < next_buf_idx + mcdi_encap_list_length; i++)
+ buffer[i] |= EFX_FILTER_MATCH_ENCAP_TYPE;
}
} else {
mcdi_encap_list_length = 0;
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:42:26 2018
(r341188)
+++ head/sys/dev/sfxge/common/efx.h Thu Nov 29 06:42:38 2018
(r341189)
@@ -2514,6 +2514,11 @@ typedef uint8_t efx_filter_flags_t;
#defineEFX_FILTER_MATCH_IFRM_UNKNOWN_MCAST_DST 0x0100
/* For encapsulated packets, match all unicast inner frames */
#defineEFX_FILTER_MATCH_IFRM_UNKNOWN_UCAST_DST 0x0200
+/*
+ * Match by encap type, this flag does not correspond to
+ * the MCDI match flags and any unoccupied value may be used
+ */
+#defineEFX_FILTER_MATCH_ENCAP_TYPE 0x2000
/* Match otherwise-unmatched multicast and broadcast packets */
#defineEFX_FILTER_MATCH_UNKNOWN_MCAST_DST 0x4000
/* Match otherwise-unmatched unicast packets */
Modified: head/sys/dev/sfxge/common/efx_filter.c
==
svn commit: r341186 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:42:04 2018
New Revision: 341186
URL: https://svnweb.freebsd.org/changeset/base/341186
Log:
sfxge(4): support filters for encapsulated packets
This adds filters for encapsulated packets to the list
returned by ef10_filter_supported_filters().
Submitted by: Roman Zhukov
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18217
Modified:
head/sys/dev/sfxge/common/ef10_filter.c
Modified: head/sys/dev/sfxge/common/ef10_filter.c
==
--- head/sys/dev/sfxge/common/ef10_filter.c Thu Nov 29 06:41:53 2018
(r341185)
+++ head/sys/dev/sfxge/common/ef10_filter.c Thu Nov 29 06:42:04 2018
(r341186)
@@ -922,6 +922,7 @@ efx_mcdi_get_parser_disp_info(
__inefx_nic_t *enp,
__out_ecount(buffer_length) uint32_t *buffer,
__insize_t buffer_length,
+ __inboolean_t encap,
__out size_t *list_lengthp)
{
efx_mcdi_req_t req;
@@ -938,7 +939,8 @@ efx_mcdi_get_parser_disp_info(
req.emr_out_buf = payload;
req.emr_out_length = MC_CMD_GET_PARSER_DISP_INFO_OUT_LENMAX;
- MCDI_IN_SET_DWORD(req, GET_PARSER_DISP_INFO_OUT_OP,
+ MCDI_IN_SET_DWORD(req, GET_PARSER_DISP_INFO_OUT_OP, encap ?
+ MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_ENCAP_RX_MATCHES :
MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_RX_MATCHES);
efx_mcdi_execute(enp, &req);
@@ -998,30 +1000,68 @@ ef10_filter_supported_filters(
__insize_t buffer_length,
__out size_t *list_lengthp)
{
-
+ efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
size_t mcdi_list_length;
+ size_t mcdi_encap_list_length;
size_t list_length;
uint32_t i;
+ uint32_t next_buf_idx;
+ size_t next_buf_length;
efx_rc_t rc;
+ boolean_t no_space = B_FALSE;
efx_filter_match_flags_t all_filter_flags =
(EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_LOC_HOST |
EFX_FILTER_MATCH_REM_MAC | EFX_FILTER_MATCH_REM_PORT |
EFX_FILTER_MATCH_LOC_MAC | EFX_FILTER_MATCH_LOC_PORT |
EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_INNER_VID |
EFX_FILTER_MATCH_OUTER_VID | EFX_FILTER_MATCH_IP_PROTO |
+ EFX_FILTER_MATCH_IFRM_UNKNOWN_MCAST_DST |
+ EFX_FILTER_MATCH_IFRM_UNKNOWN_UCAST_DST |
EFX_FILTER_MATCH_UNKNOWN_MCAST_DST |
EFX_FILTER_MATCH_UNKNOWN_UCAST_DST);
- rc = efx_mcdi_get_parser_disp_info(enp, buffer, buffer_length,
- &mcdi_list_length);
+ /*
+* Two calls to MC_CMD_GET_PARSER_DISP_INFO are needed: one to get the
+* list of supported filters for ordinary packets, and then another to
+* get the list of supported filters for encapsulated packets.
+*/
+ rc = efx_mcdi_get_parser_disp_info(enp, buffer, buffer_length, B_FALSE,
+ &mcdi_list_length);
if (rc != 0) {
- if (rc == ENOSPC) {
- /* Pass through mcdi_list_length for the list length */
- *list_lengthp = mcdi_list_length;
+ if (rc == ENOSPC)
+ no_space = B_TRUE;
+ else
+ goto fail1;
+ }
+
+ if (no_space) {
+ next_buf_idx = 0;
+ next_buf_length = 0;
+ } else {
+ EFSYS_ASSERT(mcdi_list_length <= buffer_length);
+ next_buf_idx = mcdi_list_length;
+ next_buf_length = buffer_length - mcdi_list_length;
+ }
+
+ if (encp->enc_tunnel_encapsulations_supported != 0) {
+ rc = efx_mcdi_get_parser_disp_info(enp, &buffer[next_buf_idx],
+ next_buf_length, B_TRUE, &mcdi_encap_list_length);
+ if (rc != 0) {
+ if (rc == ENOSPC)
+ no_space = B_TRUE;
+ else
+ goto fail2;
}
- goto fail1;
+ } else {
+ mcdi_encap_list_length = 0;
}
+ if (no_space) {
+ *list_lengthp = mcdi_list_length + mcdi_encap_list_length;
+ rc = ENOSPC;
+ goto fail3;
+ }
+
/*
* The static assertions in ef10_filter_init() ensure that the values of
* the EFX_FILTER_MATCH flags match those used by MCDI, so they don't
@@ -1032,9 +1072,10 @@ ef10_filter_supported_filters(
* of the matches is preserved as they are ordered from highest to
* lowest priority.
*/
- EFSYS_ASSERT(mcdi_list_length <= buffer_length);
+ EFSYS_ASSERT(mcdi_li
svn commit: r341185 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:41:53 2018
New Revision: 341185
URL: https://svnweb.freebsd.org/changeset/base/341185
Log:
sfxge(4): sync MCDI headers and TLV layout
Regenerate MCDI and TLV layout headers from firmwaresrc to
pick up DPDK firmware variant and related Rx queue and filtering
extensions.
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18216
Modified:
head/sys/dev/sfxge/common/ef10_tlv_layout.h
head/sys/dev/sfxge/common/efx_regs_mcdi.h
Modified: head/sys/dev/sfxge/common/ef10_tlv_layout.h
==
--- head/sys/dev/sfxge/common/ef10_tlv_layout.h Thu Nov 29 06:41:41 2018
(r341184)
+++ head/sys/dev/sfxge/common/ef10_tlv_layout.h Thu Nov 29 06:41:53 2018
(r341185)
@@ -434,6 +434,7 @@ struct tlv_firmware_options {
#define TLV_FIRMWARE_VARIANT_PACKED_STREAM_HASH_MODE_1 \
MC_CMD_FW_PACKED_STREAM_HASH_MODE_1
#define TLV_FIRMWARE_VARIANT_RULES_ENGINEMC_CMD_FW_RULES_ENGINE
+#define TLV_FIRMWARE_VARIANT_DPDKMC_CMD_FW_DPDK
};
/* Voltage settings
@@ -562,6 +563,17 @@ struct tlv_global_port_mode {
uint32_t length;
uint32_t port_mode;
#define TLV_PORT_MODE_DEFAULT (0x) /* Default for given
platform */
+
+/* Huntington port modes */
+#define TLV_PORT_MODE_10G(0)
+#define TLV_PORT_MODE_40G(1)
+#define TLV_PORT_MODE_10G_10G(2)
+#define TLV_PORT_MODE_40G_40G(3)
+#define TLV_PORT_MODE_10G_10G_10G_10G(4)
+#define TLV_PORT_MODE_40G_10G_10G(6)
+#define TLV_PORT_MODE_10G_10G_40G(7)
+
+/* Medford (and later) port modes */
#define TLV_PORT_MODE_1x1_NA (0) /* Single 10G/25G on mdi0
*/
#define TLV_PORT_MODE_1x4_NA (1) /* Single 100G/40G on
mdi0 */
#define TLV_PORT_MODE_NA_1x4 (22) /* Single 100G/40G on
mdi1 */
@@ -569,8 +581,8 @@ struct tlv_global_port_mode {
#define TLV_PORT_MODE_NA_1x2 (11) /* Single 50G on mdi1 */
#define TLV_PORT_MODE_1x1_1x1(2) /* Single 10G/25G on
mdi0, single 10G/25G on mdi1 */
#define TLV_PORT_MODE_1x4_1x4(3) /* Single 40G on mdi0,
single 40G on mdi1 */
-#define TLV_PORT_MODE_2x1_2x1(4) /* Dual 10G/25G on mdi0,
dual 10G/25G on mdi1 - WARNING: bug3720: On Newport only, this is actually Quad
10G on mdi0 */
-#define TLV_PORT_MODE_4x1_NA (5) /* Quad 10G/25G on mdi0 */
+#define TLV_PORT_MODE_2x1_2x1(5) /* Dual 10G/25G on mdi0,
dual 10G/25G on mdi1 */
+#define TLV_PORT_MODE_4x1_NA (4) /* Quad 10G/25G on mdi0 */
#define TLV_PORT_MODE_NA_4x1 (8) /* Quad 10G/25G on mdi1 */
#define TLV_PORT_MODE_1x4_2x1(6) /* Single 40G on mdi0,
dual 10G/25G on mdi1 */
#define TLV_PORT_MODE_2x1_1x4(7) /* Dual 10G/25G on mdi0,
single 40G on mdi1 */
@@ -581,7 +593,13 @@ struct tlv_global_port_mode {
#define TLV_PORT_MODE_1x2_1x4(16) /* Single 50G on mdi0,
single 40G on mdi1 */
#define TLV_PORT_MODE_1x2_2x1(17) /* Single 50G on mdi0,
dual 10G/25G on mdi1 */
#define TLV_PORT_MODE_2x1_1x2(18) /* Dual 10G/25G on mdi0,
single 50G on mdi1 */
-/* Below modes are eftest only, to allow snapper explicit selection between
multi-channel and LLPCS. In production, this selection is automatic and outside
world should not care about LLPCS */
+
+/* Snapper-only Medford2 port modes.
+ * These modes are eftest only, to allow snapper explicit
+ * selection between multi-channel and LLPCS. In production,
+ * this selection is automatic and outside world should not
+ * care about LLPCS.
+ */
#define TLV_PORT_MODE_2x1_2x1_LL (19) /* Dual 10G/25G on mdi0,
dual 10G/25G on mdi1, low-latency PCS */
#define TLV_PORT_MODE_4x1_NA_LL (20) /* Quad 10G/25G on mdi0,
low-latency PCS */
#define TLV_PORT_MODE_NA_4x1_LL (21) /* Quad 10G/25G on mdi1,
low-latency PCS */
@@ -590,42 +608,13 @@ struct tlv_global_port_mode {
#define TLV_PORT_MODE_BUG63720_DO_NOT_USE(9) /* bug63720: Do not use */
#define TLV_PORT_MODE_MAX TLV_PORT_MODE_1x1_1x1_LL
-/* Deprecated aliases */
-#define TLV_PORT_MODE_10GTLV_PORT_MODE_1x1_NA
-#define TLV_PORT_MODE_40GTLV_PORT_MODE_1x4_NA
-#define TLV_PORT_MODE_10G_10GTLV_PORT_MODE_1x1_1x1
-#define TLV_PORT_MODE_40G_40GTLV_PORT_MODE_1x4_1x4
-#define TLV_PORT_MODE_10G_10G_10G_10GTLV_PORT_MODE_2x1_2x1
-#define TLV_PORT_MODE_10G_10G_10G_10G_Q1 TLV_PORT_MODE_2x1_2x1 /*
bug63720: Do not use */
-#define TLV_PORT_MODE_10G_10G_10G_10G_Q TLV_
svn commit: r341184 - head/sys/dev/sfxge/common
Author: arybchik
Date: Thu Nov 29 06:41:41 2018
New Revision: 341184
URL: https://svnweb.freebsd.org/changeset/base/341184
Log:
sfxge(4): add signed image layout support
Submitted by: Andy Moreton
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18215
Modified:
head/sys/dev/sfxge/common/ef10_image.c (contents, props changed)
head/sys/dev/sfxge/common/efx.h
Modified: head/sys/dev/sfxge/common/ef10_image.c
==
--- head/sys/dev/sfxge/common/ef10_image.c Thu Nov 29 06:29:24 2018
(r341183)
+++ head/sys/dev/sfxge/common/ef10_image.c Thu Nov 29 06:41:41 2018
(r341184)
@@ -40,7 +40,873 @@ __FBSDID("$FreeBSD$");
#if EFSYS_OPT_IMAGE_LAYOUT
-#include "ef10_signed_image_layout.h"
+/*
+ * Utility routines to support limited parsing of ASN.1 tags. This is not a
+ * general purpose ASN.1 parser, but is sufficient to locate the required
+ * objects in a signed image with CMS headers.
+ */
+
+/* DER encodings for ASN.1 tags (see ITU-T X.690) */
+#defineASN1_TAG_INTEGER(0x02)
+#defineASN1_TAG_OCTET_STRING (0x04)
+#defineASN1_TAG_OBJ_ID (0x06)
+#defineASN1_TAG_SEQUENCE (0x30)
+#defineASN1_TAG_SET(0x31)
+
+#defineASN1_TAG_IS_PRIM(tag) ((tag & 0x20) == 0)
+
+#defineASN1_TAG_PRIM_CONTEXT(n)(0x80 + (n))
+#defineASN1_TAG_CONS_CONTEXT(n)(0xA0 + (n))
+
+typedef struct efx_asn1_cursor_s {
+ uint8_t *buffer;
+ uint32_tlength;
+
+ uint8_t tag;
+ uint32_thdr_size;
+ uint32_tval_size;
+} efx_asn1_cursor_t;
+
+
+/* Parse header of DER encoded ASN.1 TLV and match tag */
+static __checkReturn efx_rc_t
+efx_asn1_parse_header_match_tag(
+ __inout efx_asn1_cursor_t *cursor,
+ __inuint8_t tag)
+{
+ efx_rc_t rc;
+
+ if (cursor == NULL || cursor->buffer == NULL || cursor->length < 2) {
+ rc = EINVAL;
+ goto fail1;
+ }
+
+ cursor->tag = cursor->buffer[0];
+ if (cursor->tag != tag) {
+ /* Tag not matched */
+ rc = ENOENT;
+ goto fail2;
+ }
+
+ if ((cursor->tag & 0x1F) == 0x1F) {
+ /* Long tag format not used in CMS syntax */
+ rc = EINVAL;
+ goto fail3;
+ }
+
+ if ((cursor->buffer[1] & 0x80) == 0) {
+ /* Short form: length is 0..127 */
+ cursor->hdr_size = 2;
+ cursor->val_size = cursor->buffer[1];
+ } else {
+ /* Long form: length encoded as [0x80+nbytes][length bytes] */
+ uint32_t nbytes = cursor->buffer[1] & 0x7F;
+ uint32_t offset;
+
+ if (nbytes == 0) {
+ /* Indefinite length not allowed in DER encoding */
+ rc = EINVAL;
+ goto fail4;
+ }
+ if (2 + nbytes > cursor->length) {
+ /* Header length overflows image buffer */
+ rc = EINVAL;
+ goto fail6;
+ }
+ if (nbytes > sizeof (uint32_t)) {
+ /* Length encoding too big */
+ rc = E2BIG;
+ goto fail5;
+ }
+ cursor->hdr_size = 2 + nbytes;
+ cursor->val_size = 0;
+ for (offset = 2; offset < cursor->hdr_size; offset++) {
+ cursor->val_size =
+ (cursor->val_size << 8) | cursor->buffer[offset];
+ }
+ }
+
+ if ((cursor->hdr_size + cursor->val_size) > cursor->length) {
+ /* Length overflows image buffer */
+ rc = E2BIG;
+ goto fail7;
+ }
+
+ return (0);
+
+fail7:
+ EFSYS_PROBE(fail7);
+fail6:
+ EFSYS_PROBE(fail6);
+fail5:
+ EFSYS_PROBE(fail5);
+fail4:
+ EFSYS_PROBE(fail4);
+fail3:
+ EFSYS_PROBE(fail3);
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+ return (rc);
+}
+
+/* Enter nested ASN.1 TLV (contained in value of current TLV) */
+static __checkReturn efx_rc_t
+efx_asn1_enter_tag(
+ __inout efx_asn1_cursor_t *cursor,
+ __inuint8_t tag)
+{
+ efx_rc_t rc;
+
+ if (cursor == NULL) {
+ rc = EINVAL;
+ goto fail1;
+ }
+
+ if (ASN1_TAG_IS_PRIM(tag)) {
+ /* Cannot enter a primitive tag */
+ rc = ENOTSUP;
+ goto fail2;
+ }
+ rc = efx_asn1_parse_header_match_tag(cursor, tag);
+ if (rc != 0) {
+ /* Invalid TLV or wrong tag */
+
svn commit: r341183 - in head/sys: conf dev/sfxge/common modules/sfxge
Author: arybchik
Date: Thu Nov 29 06:29:24 2018
New Revision: 341183
URL: https://svnweb.freebsd.org/changeset/base/341183
Log:
sfxge(4): add firmware image layout option
Submitted by: Andy Moreton
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18214
Added:
head/sys/dev/sfxge/common/ef10_image.c (contents, props changed)
head/sys/dev/sfxge/common/ef10_signed_image_layout.h (contents, props
changed)
Modified:
head/sys/conf/files.amd64
head/sys/dev/sfxge/common/efsys.h
head/sys/dev/sfxge/common/efx_check.h
head/sys/modules/sfxge/Makefile
Modified: head/sys/conf/files.amd64
==
--- head/sys/conf/files.amd64 Thu Nov 29 05:17:16 2018(r341182)
+++ head/sys/conf/files.amd64 Thu Nov 29 06:29:24 2018(r341183)
@@ -413,6 +413,7 @@ dev/qlnx/qlnxe/qlnx_os.coptionalqlnxe pci \
compile-with "${LINUXKPI_C}"
dev/sfxge/common/ef10_ev.c optionalsfxge pci
dev/sfxge/common/ef10_filter.c optionalsfxge pci
+dev/sfxge/common/ef10_image.c optionalsfxge pci
dev/sfxge/common/ef10_intr.c optionalsfxge pci
dev/sfxge/common/ef10_mac.coptionalsfxge pci
dev/sfxge/common/ef10_mcdi.c optionalsfxge pci
Added: head/sys/dev/sfxge/common/ef10_image.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/sfxge/common/ef10_image.c Thu Nov 29 06:29:24 2018
(r341183)
@@ -0,0 +1,49 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2017-2018 Solarflare Communications Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *this list of conditions and the following disclaimer in the documentation
+ *and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * The views and conclusions contained in the software and documentation are
+ * those of the authors and should not be interpreted as representing official
+ * policies, either expressed or implied, of the FreeBSD Project.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include "efx.h"
+#include "efx_impl.h"
+
+#if EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+
+#if EFSYS_OPT_IMAGE_LAYOUT
+
+#include "ef10_signed_image_layout.h"
+
+
+
+#endif /* EFSYS_OPT_IMAGE_LAYOUT */
+
+#endif /* EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
Added: head/sys/dev/sfxge/common/ef10_signed_image_layout.h
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/sfxge/common/ef10_signed_image_layout.hThu Nov 29
06:29:24 2018(r341183)
@@ -0,0 +1,104 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2016-2018 Solarflare Communications Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *this list of conditions and the following disclaimer in the documentation
+ *and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
svn commit: r341138 - in head/sys/dev/sfxge: . common
Author: arybchik
Date: Wed Nov 28 09:25:43 2018
New Revision: 341138
URL: https://svnweb.freebsd.org/changeset/base/341138
Log:
sfxge(4): add outer IP ID parameter to TSOv2 descriptor
Set outer_ip_id in the TX option descriptor for encapsulated packets.
Submitted by: Vijay Srivastava
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18213
Modified:
head/sys/dev/sfxge/common/ef10_impl.h
head/sys/dev/sfxge/common/ef10_tx.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_impl.h
head/sys/dev/sfxge/common/efx_tx.c
head/sys/dev/sfxge/sfxge_tx.c
Modified: head/sys/dev/sfxge/common/ef10_impl.h
==
--- head/sys/dev/sfxge/common/ef10_impl.h Wed Nov 28 09:25:31 2018
(r341137)
+++ head/sys/dev/sfxge/common/ef10_impl.h Wed Nov 28 09:25:43 2018
(r341138)
@@ -782,6 +782,7 @@ extern void
ef10_tx_qdesc_tso2_create(
__inefx_txq_t *etp,
__inuint16_t ipv4_id,
+ __inuint16_t outer_ipv4_id,
__inuint32_t tcp_seq,
__inuint16_t tcp_mss,
__out_ecount(count) efx_desc_t *edp,
Modified: head/sys/dev/sfxge/common/ef10_tx.c
==
--- head/sys/dev/sfxge/common/ef10_tx.c Wed Nov 28 09:25:31 2018
(r341137)
+++ head/sys/dev/sfxge/common/ef10_tx.c Wed Nov 28 09:25:43 2018
(r341138)
@@ -650,6 +650,7 @@ ef10_tx_qdesc_tso_create(
ef10_tx_qdesc_tso2_create(
__inefx_txq_t *etp,
__inuint16_t ipv4_id,
+ __inuint16_t outer_ipv4_id,
__inuint32_t tcp_seq,
__inuint16_t tcp_mss,
__out_ecount(count) efx_desc_t *edp,
@@ -671,13 +672,14 @@ ef10_tx_qdesc_tso2_create(
ESE_DZ_TX_TSO_OPTION_DESC_FATSO2A,
ESF_DZ_TX_TSO_IP_ID, ipv4_id,
ESF_DZ_TX_TSO_TCP_SEQNO, tcp_seq);
- EFX_POPULATE_QWORD_4(edp[1].ed_eq,
+ EFX_POPULATE_QWORD_5(edp[1].ed_eq,
ESF_DZ_TX_DESC_IS_OPT, 1,
ESF_DZ_TX_OPTION_TYPE,
ESE_DZ_TX_OPTION_DESC_TSO,
ESF_DZ_TX_TSO_OPTION_TYPE,
ESE_DZ_TX_TSO_OPTION_DESC_FATSO2B,
- ESF_DZ_TX_TSO_TCP_MSS, tcp_mss);
+ ESF_DZ_TX_TSO_TCP_MSS, tcp_mss,
+ ESF_DZ_TX_TSO_OUTER_IPID, outer_ipv4_id);
}
void
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Wed Nov 28 09:25:31 2018
(r341137)
+++ head/sys/dev/sfxge/common/efx.h Wed Nov 28 09:25:43 2018
(r341138)
@@ -2323,6 +2323,7 @@ externvoid
efx_tx_qdesc_tso2_create(
__inefx_txq_t *etp,
__inuint16_t ipv4_id,
+ __inuint16_t outer_ipv4_id,
__inuint32_t tcp_seq,
__inuint16_t tcp_mss,
__out_ecount(count) efx_desc_t *edp,
Modified: head/sys/dev/sfxge/common/efx_impl.h
==
--- head/sys/dev/sfxge/common/efx_impl.hWed Nov 28 09:25:31 2018
(r341137)
+++ head/sys/dev/sfxge/common/efx_impl.hWed Nov 28 09:25:43 2018
(r341138)
@@ -145,7 +145,7 @@ typedef struct efx_tx_ops_s {
uint32_t, uint8_t,
efx_desc_t *);
void(*etxo_qdesc_tso2_create)(efx_txq_t *, uint16_t,
- uint32_t, uint16_t,
+ uint16_t, uint32_t, uint16_t,
efx_desc_t *, int);
void(*etxo_qdesc_vlantci_create)(efx_txq_t *, uint16_t,
efx_desc_t *);
Modified: head/sys/dev/sfxge/common/efx_tx.c
==
--- head/sys/dev/sfxge/common/efx_tx.c Wed Nov 28 09:25:31 2018
(r341137)
+++ head/sys/dev/sfxge/common/efx_tx.c Wed Nov 28 09:25:43 2018
(r341138)
@@ -654,6 +654,7 @@ efx_tx_qdesc_tso_create(
efx_tx_qdesc_tso2_create(
__inefx_txq_t *etp,
__inuint16_t ipv4_id,
+ __inuint16_t outer_ipv4_id,
__inuint32_t tcp_seq,
__inuint16_t mss,
__out_ecount
svn commit: r341137 - head/sys/dev/sfxge/common
Author: arybchik
Date: Wed Nov 28 09:25:31 2018
New Revision: 341137
URL: https://svnweb.freebsd.org/changeset/base/341137
Log:
sfxge(4): add encapsulated TSOv2 capability
Submitted by: Vijay Srivastava
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18212
Modified:
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/efx.h
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cWed Nov 28 09:25:21 2018
(r341136)
+++ head/sys/dev/sfxge/common/ef10_nic.cWed Nov 28 09:25:31 2018
(r341137)
@@ -1084,6 +1084,12 @@ ef10_get_datapath_caps(
encp->enc_fw_assisted_tso_v2_n_contexts = 0;
}
+ /* Check if the firmware supports FATSOv2 encap */
+ if (CAP_FLAGS2(req, TX_TSO_V2_ENCAP))
+ encp->enc_fw_assisted_tso_v2_encap_enabled = B_TRUE;
+ else
+ encp->enc_fw_assisted_tso_v2_encap_enabled = B_FALSE;
+
/* Check if the firmware has vadapter/vport/vswitch support */
if (CAP_FLAGS1(req, EVB))
encp->enc_datapath_cap_evb = B_TRUE;
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Wed Nov 28 09:25:21 2018
(r341136)
+++ head/sys/dev/sfxge/common/efx.h Wed Nov 28 09:25:31 2018
(r341137)
@@ -1258,6 +1258,7 @@ typedef struct efx_nic_cfg_s {
uint32_tenc_tx_tso_tcp_header_offset_limit;
boolean_t enc_fw_assisted_tso_enabled;
boolean_t enc_fw_assisted_tso_v2_enabled;
+ boolean_t enc_fw_assisted_tso_v2_encap_enabled;
/* Number of TSO contexts on the NIC (FATSOv2) */
uint32_tenc_fw_assisted_tso_v2_n_contexts;
boolean_t enc_hw_tx_insert_vlan_enabled;
___
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svn commit: r341134 - head/sys/dev/sfxge/common
Author: arybchik Date: Wed Nov 28 09:24:58 2018 New Revision: 341134 URL: https://svnweb.freebsd.org/changeset/base/341134 Log: sfxge(4): add bit to indicate CTPIO availability Submitted by: Guido Barzini Sponsored by: Solarflare Communications, Inc. Differential Revision: https://reviews.freebsd.org/D18209 Modified: head/sys/dev/sfxge/common/efx_regs_mcdi.h Modified: head/sys/dev/sfxge/common/efx_regs_mcdi.h == --- head/sys/dev/sfxge/common/efx_regs_mcdi.h Wed Nov 28 09:24:47 2018 (r341133) +++ head/sys/dev/sfxge/common/efx_regs_mcdi.h Wed Nov 28 09:24:58 2018 (r341134) @@ -9578,6 +9578,8 @@ #defineMC_CMD_GET_CAPABILITIES_V2_OUT_MCDI_BACKGROUND_WIDTH 1 #defineMC_CMD_GET_CAPABILITIES_V2_OUT_MCDI_DB_RETURN_LBN 14 #defineMC_CMD_GET_CAPABILITIES_V2_OUT_MCDI_DB_RETURN_WIDTH 1 +#defineMC_CMD_GET_CAPABILITIES_V2_OUT_CTPIO_LBN 15 +#defineMC_CMD_GET_CAPABILITIES_V2_OUT_CTPIO_WIDTH 1 /* Number of FATSOv2 contexts per datapath supported by this NIC. Not present * on older firmware (check the length). */ @@ -9865,6 +9867,8 @@ #defineMC_CMD_GET_CAPABILITIES_V3_OUT_MCDI_BACKGROUND_WIDTH 1 #defineMC_CMD_GET_CAPABILITIES_V3_OUT_MCDI_DB_RETURN_LBN 14 #defineMC_CMD_GET_CAPABILITIES_V3_OUT_MCDI_DB_RETURN_WIDTH 1 +#defineMC_CMD_GET_CAPABILITIES_V3_OUT_CTPIO_LBN 15 +#defineMC_CMD_GET_CAPABILITIES_V3_OUT_CTPIO_WIDTH 1 /* Number of FATSOv2 contexts per datapath supported by this NIC. Not present * on older firmware (check the length). */ @@ -10177,6 +10181,8 @@ #defineMC_CMD_GET_CAPABILITIES_V4_OUT_MCDI_BACKGROUND_WIDTH 1 #defineMC_CMD_GET_CAPABILITIES_V4_OUT_MCDI_DB_RETURN_LBN 14 #defineMC_CMD_GET_CAPABILITIES_V4_OUT_MCDI_DB_RETURN_WIDTH 1 +#defineMC_CMD_GET_CAPABILITIES_V4_OUT_CTPIO_LBN 15 +#defineMC_CMD_GET_CAPABILITIES_V4_OUT_CTPIO_WIDTH 1 /* Number of FATSOv2 contexts per datapath supported by this NIC. Not present * on older firmware (check the length). */ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r341131 - head/sys/dev/sfxge/common
Author: arybchik Date: Wed Nov 28 09:24:25 2018 New Revision: 341131 URL: https://svnweb.freebsd.org/changeset/base/341131 Log: sfxge(4): document the event type for CTPIO sends Document the TX_EV_TYPE used for TX completion events corresponding to CTPIO sends. Submitted by: Andy Moreton Sponsored by: Solarflare Communications, Inc. Differential Revision: https://reviews.freebsd.org/D18206 Modified: head/sys/dev/sfxge/common/efx_regs_mcdi.h Modified: head/sys/dev/sfxge/common/efx_regs_mcdi.h == --- head/sys/dev/sfxge/common/efx_regs_mcdi.h Wed Nov 28 09:24:14 2018 (r341130) +++ head/sys/dev/sfxge/common/efx_regs_mcdi.h Wed Nov 28 09:24:25 2018 (r341131) @@ -6751,6 +6751,10 @@ #defineTX_TIMESTAMP_EVENT_TX_EV_TYPE_LEN 1 /* enum: This is a TX completion event, not a timestamp */ #defineTX_TIMESTAMP_EVENT_TX_EV_COMPLETION 0x0 +/* enum: This is a TX completion event for a CTPIO transmit. The event format + * is the same as for TX_EV_COMPLETION. + */ +#defineTX_TIMESTAMP_EVENT_TX_EV_CTPIO_COMPLETION 0x11 /* enum: This is the low part of a TX timestamp event */ #defineTX_TIMESTAMP_EVENT_TX_EV_TSTAMP_LO 0x51 /* enum: This is the high part of a TX timestamp event */ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r341132 - head/sys/dev/sfxge/common
Author: arybchik
Date: Wed Nov 28 09:24:36 2018
New Revision: 341132
URL: https://svnweb.freebsd.org/changeset/base/341132
Log:
sfxge(4): run genfwdef to update headers
Submitted by: Andy Moreton
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18207
Modified:
head/sys/dev/sfxge/common/ef10_tlv_layout.h
Modified: head/sys/dev/sfxge/common/ef10_tlv_layout.h
==
--- head/sys/dev/sfxge/common/ef10_tlv_layout.h Wed Nov 28 09:24:25 2018
(r341131)
+++ head/sys/dev/sfxge/common/ef10_tlv_layout.h Wed Nov 28 09:24:36 2018
(r341132)
@@ -58,6 +58,7 @@
*1: dynamic configuration
*2: firmware internal use
*3: license partition
+ *4: tsa configuration
*
* - TTT is a type, which is just a unique value. The same type value
* might appear in both locations, indicating a relationship between
@@ -580,6 +581,7 @@ struct tlv_global_port_mode {
#define TLV_PORT_MODE_1x2_1x4(16) /* Single 50G on mdi0,
single 40G on mdi1 */
#define TLV_PORT_MODE_1x2_2x1(17) /* Single 50G on mdi0,
dual 10G/25G on mdi1 */
#define TLV_PORT_MODE_2x1_1x2(18) /* Dual 10G/25G on mdi0,
single 50G on mdi1 */
+/* Below modes are eftest only, to allow snapper explicit selection between
multi-channel and LLPCS. In production, this selection is automatic and outside
world should not care about LLPCS */
#define TLV_PORT_MODE_2x1_2x1_LL (19) /* Dual 10G/25G on mdi0,
dual 10G/25G on mdi1, low-latency PCS */
#define TLV_PORT_MODE_4x1_NA_LL (20) /* Quad 10G/25G on mdi0,
low-latency PCS */
#define TLV_PORT_MODE_NA_4x1_LL (21) /* Quad 10G/25G on mdi1,
low-latency PCS */
@@ -618,6 +620,7 @@ struct tlv_global_port_mode {
#define TLV_PORT_MODE_50G_40GTLV_PORT_MODE_1x2_1x4/*
Single 50G on mdi0, single 40G on mdi1 */
#define TLV_PORT_MODE_50G_25G_25GTLV_PORT_MODE_1x2_2x1/*
Single 50G on mdi0, dual 25G on mdi1 */
#define TLV_PORT_MODE_25G_25G_50GTLV_PORT_MODE_2x1_1x2/*
Dual 25G on mdi0, single 50G on mdi1 */
+/* eftest only, see comments for _LL modes above */
#define TLV_PORT_MODE_25G_25G_25G_25G_Q1_Q2_LL TLV_PORT_MODE_2x1_2x1_LL /*
Dual 25G on mdi0, dual 25G on mdi1, low-latency PCS */
#define TLV_PORT_MODE_25G_25G_25G_25G_Q1_LL TLV_PORT_MODE_4x1_NA_LL /*
Quad 25G on mdi0, low-latency PCS */
#define TLV_PORT_MODE_25G_25G_25G_25G_Q2_LL TLV_PORT_MODE_NA_4x1_LL /*
Quad 25G on mdi1, low-latency PCS */
@@ -881,7 +884,7 @@ typedef struct tlv_license {
uint8_t data[];
} tlv_license_t;
-/* TSA NIC IP address configuration
+/* TSA NIC IP address configuration (DEPRECATED)
*
* Sets the TSA NIC IP address statically via configuration tool or dynamically
* via DHCP via snooping based on the mode selection (0=Static, 1=DHCP,
2=Snoop)
@@ -891,7 +894,7 @@ typedef struct tlv_license {
* released code yet.
*/
-#define TLV_TAG_TMP_TSAN_CONFIG (0x1022)
+#define TLV_TAG_TMP_TSAN_CONFIG (0x1022) /* DEPRECATED */
#define TLV_TSAN_IP_MODE_STATIC (0)
#define TLV_TSAN_IP_MODE_DHCP (1)
@@ -908,7 +911,7 @@ typedef struct tlv_tsan_config {
uint32_t bind_bkout; /* DEPRECATED */
} tlv_tsan_config_t;
-/* TSA Controller IP address configuration
+/* TSA Controller IP address configuration (DEPRECATED)
*
* Sets the TSA Controller IP address statically via configuration tool
*
@@ -917,7 +920,7 @@ typedef struct tlv_tsan_config {
* released code yet.
*/
-#define TLV_TAG_TMP_TSAC_CONFIG (0x1023)
+#define TLV_TAG_TMP_TSAC_CONFIG (0x1023) /* DEPRECATED */
#define TLV_MAX_TSACS (4)
typedef struct tlv_tsac_config {
@@ -928,7 +931,7 @@ typedef struct tlv_tsac_config {
uint32_t port[TLV_MAX_TSACS];
} tlv_tsac_config_t;
-/* Binding ticket
+/* Binding ticket (DEPRECATED)
*
* Sets the TSA NIC binding ticket used for binding process between the TSA NIC
* and the TSA Controller
@@ -938,7 +941,7 @@ typedef struct tlv_tsac_config {
* released code yet.
*/
-#define TLV_TAG_TMP_BINDING_TICKET (0x1024)
+#define TLV_TAG_TMP_BINDING_TICKET (0x1024) /* DEPRECATED */
typedef struct tlv_binding_ticket {
uint32_t tag;
@@ -963,7 +966,7 @@ typedef struct tlv_pik_sf {
uint8_t bytes[];
} tlv_pik_sf_t;
-/* CA root certificate
+/* CA root certificate (DEPRECATED)
*
* Sets the CA root certificate used for TSA Controller verfication during
* TLS connection setup between the TSA NIC and the TSA Controller
@@ -973,7 +976,7 @@ typedef struct tlv_pik_sf {
* released code yet.
*/
-#define TLV_TAG_TMP_CA_ROOT_CERT(0x1026)
+#define TLV_TAG_TMP_CA_ROOT_CERT(0x1026) /* DEPRECATED */
typedef struct tlv_ca_root_cert {
uint32_
svn commit: r341136 - head/sys/dev/sfxge/common
Author: arybchik Date: Wed Nov 28 09:25:21 2018 New Revision: 341136 URL: https://svnweb.freebsd.org/changeset/base/341136 Log: sfxge(4): support CTPIO stats Submitted by: Andy Moreton Sponsored by: Solarflare Communications, Inc. Differential Revision: https://reviews.freebsd.org/D18211 Modified: head/sys/dev/sfxge/common/ef10_mac.c Modified: head/sys/dev/sfxge/common/ef10_mac.c == --- head/sys/dev/sfxge/common/ef10_mac.cWed Nov 28 09:25:09 2018 (r341135) +++ head/sys/dev/sfxge/common/ef10_mac.cWed Nov 28 09:25:21 2018 (r341136) @@ -950,6 +950,61 @@ ef10_mac_stats_update( EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_FEC_CORRECTED_SYMBOLS_LANE3]), &value); + if (encp->enc_mac_stats_nstats < MC_CMD_MAC_NSTATS_V3) + goto done; + + /* CTPIO exceptions */ + EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_VI_BUSY_FALLBACK, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_VI_BUSY_FALLBACK]), &value); + + EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_LONG_WRITE_SUCCESS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_LONG_WRITE_SUCCESS]), &value); + + EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_MISSING_DBELL_FAIL, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_MISSING_DBELL_FAIL]), &value); + + EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_OVERFLOW_FAIL, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_OVERFLOW_FAIL]), &value); + + EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_UNDERFLOW_FAIL, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_UNDERFLOW_FAIL]), &value); + + EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_TIMEOUT_FAIL, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_TIMEOUT_FAIL]), &value); + + EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_NONCONTIG_WR_FAIL, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_NONCONTIG_WR_FAIL]), &value); + + EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_FRM_CLOBBER_FAIL, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_FRM_CLOBBER_FAIL]), &value); + + EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_INVALID_WR_FAIL, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_INVALID_WR_FAIL]), &value); + + EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_VI_CLOBBER_FALLBACK, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_VI_CLOBBER_FALLBACK]), + &value); + + EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_UNQUALIFIED_FALLBACK, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_UNQUALIFIED_FALLBACK]), + &value); + + EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_RUNT_FALLBACK, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_RUNT_FALLBACK]), &value); + + /* CTPIO per-port stats */ + EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_SUCCESS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_SUCCESS]), &value); + + EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_FALLBACK, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_FALLBACK]), &value); + + EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_POISON, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_POISON]), &value); + + EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_CTPIO_ERASE, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_CTPIO_ERASE]), &value); + done: /* Read START generation counter */ EFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFSYS_MEM_SIZE(esmp)); ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r341130 - head/sys/dev/sfxge/common
Author: arybchik
Date: Wed Nov 28 09:24:14 2018
New Revision: 341130
URL: https://svnweb.freebsd.org/changeset/base/341130
Log:
sfxge(4): add 1.3V voltage and current sensors
Submitted by: Andy Moreton
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18205
Modified:
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_mon.c
head/sys/dev/sfxge/common/mcdi_mon.c
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Wed Nov 28 09:24:03 2018
(r341129)
+++ head/sys/dev/sfxge/common/efx.h Wed Nov 28 09:24:14 2018
(r341130)
@@ -655,7 +655,7 @@ efx_mon_init(
#defineEFX_MON_STATS_PAGE_SIZE 0x100
#defineEFX_MON_MASK_ELEMENT_SIZE 32
-/* START MKCONFIG GENERATED MonitorHeaderStatsBlock fcc1b6748432e1ac */
+/* START MKCONFIG GENERATED MonitorHeaderStatsBlock 400fdb0517af1fca */
typedef enum efx_mon_stat_e {
EFX_MON_STAT_2_5V,
EFX_MON_STAT_VCCP1,
@@ -738,6 +738,8 @@ typedef enum efx_mon_stat_e {
EFX_MON_STAT_I2V5,
EFX_MON_STAT_I3V3,
EFX_MON_STAT_I12V0,
+ EFX_MON_STAT_1_3V,
+ EFX_MON_STAT_I1V3,
EFX_MON_NSTATS
} efx_mon_stat_t;
Modified: head/sys/dev/sfxge/common/efx_mon.c
==
--- head/sys/dev/sfxge/common/efx_mon.c Wed Nov 28 09:24:03 2018
(r341129)
+++ head/sys/dev/sfxge/common/efx_mon.c Wed Nov 28 09:24:14 2018
(r341130)
@@ -128,7 +128,7 @@ fail1:
#if EFSYS_OPT_NAMES
-/* START MKCONFIG GENERATED MonitorStatNamesBlock a808884b01444549 */
+/* START MKCONFIG GENERATED MonitorStatNamesBlock 8150a068198c0f96 */
static const char * const __mon_stat_name[] = {
"value_2_5v",
"value_vccp1",
@@ -211,6 +211,8 @@ static const char * const __mon_stat_name[] = {
"i2v5",
"i3v3",
"i12v0",
+ "1v3",
+ "i1v3",
};
/* END MKCONFIG GENERATED MonitorStatNamesBlock */
Modified: head/sys/dev/sfxge/common/mcdi_mon.c
==
--- head/sys/dev/sfxge/common/mcdi_mon.cWed Nov 28 09:24:03 2018
(r341129)
+++ head/sys/dev/sfxge/common/mcdi_mon.cWed Nov 28 09:24:14 2018
(r341130)
@@ -162,6 +162,10 @@ static const struct mcdi_sensor_map_s {
STAT(Px, BOARD_BACK_TEMP), /* 0x50 BOARD_BACK_TEMP */
STAT(Px, I1V8), /* 0x51 IN_I1V8 */
STAT(Px, I2V5), /* 0x52 IN_I2V5 */
+ STAT(Px, I3V3), /* 0x53 IN_I3V3 */
+ STAT(Px, I12V0),/* 0x54 IN_I12V0 */
+ STAT(Px, 1_3V), /* 0x55 IN_1V3 */
+ STAT(Px, I1V3), /* 0x56 IN_I1V3 */
};
#defineMCDI_STATIC_SENSOR_ASSERT(_field)
\
___
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svn commit: r341133 - head/sys/dev/sfxge/common
Author: arybchik Date: Wed Nov 28 09:24:47 2018 New Revision: 341133 URL: https://svnweb.freebsd.org/changeset/base/341133 Log: sfxge(4): add CTPIO statistics Submitted by: Guido Barzini Sponsored by: Solarflare Communications, Inc. Differential Revision: https://reviews.freebsd.org/D18208 Modified: head/sys/dev/sfxge/common/efx_regs_mcdi.h Modified: head/sys/dev/sfxge/common/efx_regs_mcdi.h == --- head/sys/dev/sfxge/common/efx_regs_mcdi.h Wed Nov 28 09:24:36 2018 (r341132) +++ head/sys/dev/sfxge/common/efx_regs_mcdi.h Wed Nov 28 09:24:47 2018 (r341133) @@ -4125,10 +4125,86 @@ #defineMC_CMD_MAC_FEC_CORRECTED_SYMBOLS_LANE2 0x65 /* enum: Number of corrected 10-bit symbol errors, lane 3 (RS-FEC only) */ #defineMC_CMD_MAC_FEC_CORRECTED_SYMBOLS_LANE3 0x66 -/* enum: This includes the final GENERATION_END */ +/* enum: This includes the space at offset 103 which is the final + * GENERATION_END in a MAC_STATS_V2 response and otherwise unused. + */ #defineMC_CMD_MAC_NSTATS_V2 0x68 /*Other enum values, see field(s): */ /* MC_CMD_MAC_STATS_OUT_NO_DMA/STATISTICS */ + +/* MC_CMD_MAC_STATS_V3_OUT_DMA msgresponse */ +#defineMC_CMD_MAC_STATS_V3_OUT_DMA_LEN 0 + +/* MC_CMD_MAC_STATS_V3_OUT_NO_DMA msgresponse */ +#defineMC_CMD_MAC_STATS_V3_OUT_NO_DMA_LEN (((MC_CMD_MAC_NSTATS_V3*64))>>3) +#defineMC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_OFST 0 +#defineMC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LEN 8 +#defineMC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_OFST 0 +#defineMC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_OFST 4 +#defineMC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V3 +/* enum: Start of CTPIO stats buffer space, Medford2 and up */ +#defineMC_CMD_MAC_CTPIO_DMABUF_START 0x68 +/* enum: Number of CTPIO fallbacks because a DMA packet was in progress on the + * target VI + */ +#defineMC_CMD_MAC_CTPIO_VI_BUSY_FALLBACK 0x68 +/* enum: Number of times a CTPIO send wrote beyond frame end (informational + * only) + */ +#defineMC_CMD_MAC_CTPIO_LONG_WRITE_SUCCESS 0x69 +/* enum: Number of CTPIO failures because the TX doorbell was written before + * the end of the frame data + */ +#defineMC_CMD_MAC_CTPIO_MISSING_DBELL_FAIL 0x6a +/* enum: Number of CTPIO failures because the internal FIFO overflowed */ +#defineMC_CMD_MAC_CTPIO_OVERFLOW_FAIL 0x6b +/* enum: Number of CTPIO failures because the host did not deliver data fast + * enough to avoid MAC underflow + */ +#defineMC_CMD_MAC_CTPIO_UNDERFLOW_FAIL 0x6c +/* enum: Number of CTPIO failures because the host did not deliver all the + * frame data within the timeout + */ +#defineMC_CMD_MAC_CTPIO_TIMEOUT_FAIL 0x6d +/* enum: Number of CTPIO failures because the frame data arrived out of order + * or with gaps + */ +#defineMC_CMD_MAC_CTPIO_NONCONTIG_WR_FAIL 0x6e +/* enum: Number of CTPIO failures because the host started a new frame before + * completing the previous one + */ +#defineMC_CMD_MAC_CTPIO_FRM_CLOBBER_FAIL 0x6f +/* enum: Number of CTPIO failures because a write was not a multiple of 32 bits + * or not 32-bit aligned + */ +#defineMC_CMD_MAC_CTPIO_INVALID_WR_FAIL 0x70 +/* enum: Number of CTPIO fallbacks because another VI on the same port was + * sending a CTPIO frame + */ +#defineMC_CMD_MAC_CTPIO_VI_CLOBBER_FALLBACK 0x71 +/* enum: Number of CTPIO fallbacks because target VI did not have CTPIO enabled + */ +#defineMC_CMD_MAC_CTPIO_UNQUALIFIED_FALLBACK 0x72 +/* enum: Number of CTPIO fallbacks because length in header was less than 29 + * bytes + */ +#defineMC_CMD_MAC_CTPIO_RUNT_FALLBACK 0x73 +/* enum: Total number of successful CTPIO sends on this port */ +#defineMC_CMD_MAC_CTPIO_SUCCESS 0x74 +/* enum: Total number of CTPIO fallbacks on this port */ +#defineMC_CMD_MAC_CTPIO_FALLBACK 0x75 +/* enum: Total number of CTPIO poisoned frames on this port, whether erased or + * not + */ +#defineMC_CMD_MAC_CTPIO_POISON 0x76 +/* enum: Total number of CTPIO erased frames on this port */ +#defineMC_CMD_MAC_CTPIO_ERASE 0x77 +/* enum: This includes the space at offset 120 which is the final + * GENERATION_END in a MAC_STATS_V3 response and otherwise unused. + */ +#defineMC_CMD_MAC_NSTATS_V3 0x79 +/*Other enum values, see field(s): */ +/* MC_CMD_MAC_STATS_V2_OUT_NO_DMA/STATISTICS */ /***/ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r341135 - head/sys/dev/sfxge/common
Author: arybchik
Date: Wed Nov 28 09:25:09 2018
New Revision: 341135
URL: https://svnweb.freebsd.org/changeset/base/341135
Log:
sfxge(4): regenerate headers to pick up CTPIO stats
Submitted by: Andy Moreton
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18210
Modified:
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_mac.c
Modified: head/sys/dev/sfxge/common/efx.h
==
--- head/sys/dev/sfxge/common/efx.h Wed Nov 28 09:24:58 2018
(r341134)
+++ head/sys/dev/sfxge/common/efx.h Wed Nov 28 09:25:09 2018
(r341135)
@@ -351,7 +351,7 @@ efx_intr_fini(
#if EFSYS_OPT_MAC_STATS
-/* START MKCONFIG GENERATED EfxHeaderMacBlock 7b5f45054a3b45bc */
+/* START MKCONFIG GENERATED EfxHeaderMacBlock 7d59c0d68431a5d1 */
typedef enum efx_mac_stat_e {
EFX_MAC_RX_OCTETS,
EFX_MAC_RX_PKTS,
@@ -440,6 +440,22 @@ typedef enum efx_mac_stat_e {
EFX_MAC_FEC_CORRECTED_SYMBOLS_LANE1,
EFX_MAC_FEC_CORRECTED_SYMBOLS_LANE2,
EFX_MAC_FEC_CORRECTED_SYMBOLS_LANE3,
+ EFX_MAC_CTPIO_VI_BUSY_FALLBACK,
+ EFX_MAC_CTPIO_LONG_WRITE_SUCCESS,
+ EFX_MAC_CTPIO_MISSING_DBELL_FAIL,
+ EFX_MAC_CTPIO_OVERFLOW_FAIL,
+ EFX_MAC_CTPIO_UNDERFLOW_FAIL,
+ EFX_MAC_CTPIO_TIMEOUT_FAIL,
+ EFX_MAC_CTPIO_NONCONTIG_WR_FAIL,
+ EFX_MAC_CTPIO_FRM_CLOBBER_FAIL,
+ EFX_MAC_CTPIO_INVALID_WR_FAIL,
+ EFX_MAC_CTPIO_VI_CLOBBER_FALLBACK,
+ EFX_MAC_CTPIO_UNQUALIFIED_FALLBACK,
+ EFX_MAC_CTPIO_RUNT_FALLBACK,
+ EFX_MAC_CTPIO_SUCCESS,
+ EFX_MAC_CTPIO_FALLBACK,
+ EFX_MAC_CTPIO_POISON,
+ EFX_MAC_CTPIO_ERASE,
EFX_MAC_NSTATS
} efx_mac_stat_t;
Modified: head/sys/dev/sfxge/common/efx_mac.c
==
--- head/sys/dev/sfxge/common/efx_mac.c Wed Nov 28 09:24:58 2018
(r341134)
+++ head/sys/dev/sfxge/common/efx_mac.c Wed Nov 28 09:25:09 2018
(r341135)
@@ -521,7 +521,7 @@ efx_mac_filter_default_rxq_clear(
#if EFSYS_OPT_NAMES
-/* START MKCONFIG GENERATED EfxMacStatNamesBlock 8726fc355b6e7c1a */
+/* START MKCONFIG GENERATED EfxMacStatNamesBlock 3cfa8780abd28993 */
static const char * const __efx_mac_stat_name[] = {
"rx_octets",
"rx_pkts",
@@ -610,6 +610,22 @@ static const char * const __efx_mac_stat_name[] = {
"fec_corrected_symbols_lane1",
"fec_corrected_symbols_lane2",
"fec_corrected_symbols_lane3",
+ "ctpio_vi_busy_fallback",
+ "ctpio_long_write_success",
+ "ctpio_missing_dbell_fail",
+ "ctpio_overflow_fail",
+ "ctpio_underflow_fail",
+ "ctpio_timeout_fail",
+ "ctpio_noncontig_wr_fail",
+ "ctpio_frm_clobber_fail",
+ "ctpio_invalid_wr_fail",
+ "ctpio_vi_clobber_fallback",
+ "ctpio_unqualified_fallback",
+ "ctpio_runt_fallback",
+ "ctpio_success",
+ "ctpio_fallback",
+ "ctpio_poison",
+ "ctpio_erase",
};
/* END MKCONFIG GENERATED EfxMacStatNamesBlock */
___
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svn commit: r341128 - head/sys/dev/sfxge/common
Author: arybchik
Date: Wed Nov 28 09:23:52 2018
New Revision: 341128
URL: https://svnweb.freebsd.org/changeset/base/341128
Log:
sfxge(4): add Medford2 support for tunnel encapsulations
Submitted by: Andy Moreton
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18203
Modified:
head/sys/dev/sfxge/common/efx_check.h
head/sys/dev/sfxge/common/efx_tunnel.c
Modified: head/sys/dev/sfxge/common/efx_check.h
==
--- head/sys/dev/sfxge/common/efx_check.h Wed Nov 28 09:23:41 2018
(r341127)
+++ head/sys/dev/sfxge/common/efx_check.h Wed Nov 28 09:23:52 2018
(r341128)
@@ -365,8 +365,8 @@
/* Support hardware assistance for tunnels */
#if EFSYS_OPT_TUNNEL
-# if !EFSYS_OPT_MEDFORD
-# error "TUNNEL requires MEDFORD"
+# if !(EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2)
+# error "TUNNEL requires MEDFORD or MEDFORD2"
# endif
#endif /* EFSYS_OPT_TUNNEL */
Modified: head/sys/dev/sfxge/common/efx_tunnel.c
==
--- head/sys/dev/sfxge/common/efx_tunnel.c Wed Nov 28 09:23:41 2018
(r341127)
+++ head/sys/dev/sfxge/common/efx_tunnel.c Wed Nov 28 09:23:52 2018
(r341128)
@@ -46,20 +46,20 @@ static const efx_tunnel_ops_t __efx_tunnel_dummy_ops =
};
#endif /* EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON */
-#if EFSYS_OPT_MEDFORD
+#if EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
static __checkReturn boolean_t
-medford_udp_encap_supported(
+ef10_udp_encap_supported(
__inefx_nic_t *enp);
static __checkReturn efx_rc_t
-medford_tunnel_reconfigure(
+ef10_tunnel_reconfigure(
__inefx_nic_t *enp);
-static const efx_tunnel_ops_t __efx_tunnel_medford_ops = {
- medford_udp_encap_supported,/* eto_udp_encap_supported */
- medford_tunnel_reconfigure, /* eto_reconfigure */
+static const efx_tunnel_ops_t __efx_tunnel_ef10_ops = {
+ ef10_udp_encap_supported, /* eto_udp_encap_supported */
+ ef10_tunnel_reconfigure,/* eto_reconfigure */
};
-#endif /* EFSYS_OPT_MEDFORD */
+#endif /* EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
static __checkReturn efx_rc_t
efx_mcdi_set_tunnel_encap_udp_ports(
@@ -190,10 +190,16 @@ efx_tunnel_init(
#if EFSYS_OPT_MEDFORD
case EFX_FAMILY_MEDFORD:
- etop = &__efx_tunnel_medford_ops;
+ etop = &__efx_tunnel_ef10_ops;
break;
#endif /* EFSYS_OPT_MEDFORD */
+#if EFSYS_OPT_MEDFORD2
+ case EFX_FAMILY_MEDFORD2:
+ etop = &__efx_tunnel_ef10_ops;
+ break;
+#endif /* EFSYS_OPT_MEDFORD2 */
+
default:
EFSYS_ASSERT(0);
rc = ENOTSUP;
@@ -423,9 +429,9 @@ fail1:
return (rc);
}
-#if EFSYS_OPT_MEDFORD
+#if EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
static __checkReturn boolean_t
-medford_udp_encap_supported(
+ef10_udp_encap_supported(
__inefx_nic_t *enp)
{
const efx_nic_cfg_t *encp = &enp->en_nic_cfg;
@@ -439,7 +445,7 @@ medford_udp_encap_supported(
}
static __checkReturn efx_rc_t
-medford_tunnel_reconfigure(
+ef10_tunnel_reconfigure(
__inefx_nic_t *enp)
{
efx_tunnel_cfg_t *etcp = &enp->en_tunnel_cfg;
@@ -452,7 +458,7 @@ medford_tunnel_reconfigure(
memcpy(&etc, etcp, sizeof (etc));
EFSYS_UNLOCK(enp->en_eslp, state);
- if (medford_udp_encap_supported(enp) == B_FALSE) {
+ if (ef10_udp_encap_supported(enp) == B_FALSE) {
/*
* It is OK to apply empty UDP tunnel ports when UDP
* tunnel encapsulations are not supported - just nothing
@@ -487,6 +493,6 @@ fail1:
return (rc);
}
-#endif /* EFSYS_OPT_MEDFORD */
+#endif /* EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
#endif /* EFSYS_OPT_TUNNEL */
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svn commit: r341129 - head/sys/dev/sfxge/common
Author: arybchik Date: Wed Nov 28 09:24:03 2018 New Revision: 341129 URL: https://svnweb.freebsd.org/changeset/base/341129 Log: sfxge(4): provide a flag for controlling CTPIO mode Either cut-through or store-and-forward mode. Submitted by: Guido Barzini Sponsored by: Solarflare Communications, Inc. Differential Revision: https://reviews.freebsd.org/D18204 Modified: head/sys/dev/sfxge/common/efx_regs_mcdi.h Modified: head/sys/dev/sfxge/common/efx_regs_mcdi.h == --- head/sys/dev/sfxge/common/efx_regs_mcdi.h Wed Nov 28 09:23:52 2018 (r341128) +++ head/sys/dev/sfxge/common/efx_regs_mcdi.h Wed Nov 28 09:24:03 2018 (r341129) @@ -7304,6 +7304,8 @@ #defineMC_CMD_INIT_TXQ_EXT_IN_FLAG_TSOV2_EN_WIDTH 1 #defineMC_CMD_INIT_TXQ_EXT_IN_FLAG_CTPIO_LBN 13 #defineMC_CMD_INIT_TXQ_EXT_IN_FLAG_CTPIO_WIDTH 1 +#defineMC_CMD_INIT_TXQ_EXT_IN_FLAG_CTPIO_UTHRESH_LBN 14 +#defineMC_CMD_INIT_TXQ_EXT_IN_FLAG_CTPIO_UTHRESH_WIDTH 1 /* Owner ID to use if in buffer mode (zero if physical) */ #defineMC_CMD_INIT_TXQ_EXT_IN_OWNER_ID_OFST 20 #defineMC_CMD_INIT_TXQ_EXT_IN_OWNER_ID_LEN 4 ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r341127 - head/sys/dev/sfxge/common
Author: arybchik
Date: Wed Nov 28 09:23:41 2018
New Revision: 341127
URL: https://svnweb.freebsd.org/changeset/base/341127
Log:
sfxge(4): add Medford2 support for licensing
Submitted by: Andy Moreton
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18202
Modified:
head/sys/dev/sfxge/common/efx_lic.c
Modified: head/sys/dev/sfxge/common/efx_lic.c
==
--- head/sys/dev/sfxge/common/efx_lic.c Wed Nov 28 09:23:30 2018
(r341126)
+++ head/sys/dev/sfxge/common/efx_lic.c Wed Nov 28 09:23:41 2018
(r341127)
@@ -192,7 +192,7 @@ static const efx_lic_ops_t __efx_lic_v2_ops = {
#endif /* EFSYS_OPT_HUNTINGTON */
-#if EFSYS_OPT_MEDFORD
+#if EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
static __checkReturn efx_rc_t
efx_mcdi_licensing_v3_update_licenses(
@@ -316,7 +316,7 @@ static const efx_lic_ops_t __efx_lic_v3_ops = {
efx_lic_v3_finish_partition,/* elo_finish_partition */
};
-#endif /* EFSYS_OPT_MEDFORD */
+#endif /* EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
/* V1 Licensing - used in Siena Modena only */
@@ -849,7 +849,7 @@ fail1:
/* V3 Licensing - used starting from Medford family. See SF-114884-SW */
-#if EFSYS_OPT_MEDFORD
+#if EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
static __checkReturn efx_rc_t
efx_mcdi_licensing_v3_update_licenses(
@@ -859,7 +859,8 @@ efx_mcdi_licensing_v3_update_licenses(
uint8_t payload[MC_CMD_LICENSING_V3_IN_LEN];
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_MEDFORD);
+ EFSYS_ASSERT((enp->en_family == EFX_FAMILY_MEDFORD) ||
+ (enp->en_family == EFX_FAMILY_MEDFORD2));
(void) memset(payload, 0, sizeof (payload));
req.emr_cmd = MC_CMD_LICENSING_V3;
@@ -896,7 +897,8 @@ efx_mcdi_licensing_v3_report_license(
MC_CMD_LICENSING_V3_OUT_LEN)];
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_MEDFORD);
+ EFSYS_ASSERT((enp->en_family == EFX_FAMILY_MEDFORD) ||
+ (enp->en_family == EFX_FAMILY_MEDFORD2));
(void) memset(payload, 0, sizeof (payload));
req.emr_cmd = MC_CMD_LICENSING_V3;
@@ -960,7 +962,8 @@ efx_mcdi_licensing_v3_app_state(
uint32_t app_state;
efx_rc_t rc;
- EFSYS_ASSERT(enp->en_family == EFX_FAMILY_MEDFORD);
+ EFSYS_ASSERT((enp->en_family == EFX_FAMILY_MEDFORD) ||
+ (enp->en_family == EFX_FAMILY_MEDFORD2));
(void) memset(payload, 0, sizeof (payload));
req.emr_cmd = MC_CMD_GET_LICENSED_V3_APP_STATE;
@@ -1292,7 +1295,7 @@ fail1:
}
-#endif /* EFSYS_OPT_MEDFORD */
+#endif /* EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
__checkReturn efx_rc_t
efx_lic_init(
@@ -1325,6 +1328,12 @@ efx_lic_init(
elop = &__efx_lic_v3_ops;
break;
#endif /* EFSYS_OPT_MEDFORD */
+
+#if EFSYS_OPT_MEDFORD2
+ case EFX_FAMILY_MEDFORD2:
+ elop = &__efx_lic_v3_ops;
+ break;
+#endif /* EFSYS_OPT_MEDFORD2 */
default:
EFSYS_ASSERT(0);
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svn commit: r341126 - head/sys/dev/sfxge/common
Author: arybchik
Date: Wed Nov 28 09:23:30 2018
New Revision: 341126
URL: https://svnweb.freebsd.org/changeset/base/341126
Log:
sfxge(4): add Medford2 support for external port numbers
Submitted by: Andy Moreton
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18201
Modified:
head/sys/dev/sfxge/common/ef10_nic.c
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cWed Nov 28 09:23:19 2018
(r341125)
+++ head/sys/dev/sfxge/common/ef10_nic.cWed Nov 28 09:23:30 2018
(r341126)
@@ -1460,6 +1460,93 @@ static struct ef10_external_port_map_s {
4, /* ports per cage */
2 /* first cage */
},
+ /*
+* Modes that on Medford2 allocate each port number to a separate
+* cage.
+* port 0 -> cage 1
+* port 1 -> cage 2
+* port 2 -> cage 3
+* port 3 -> cage 4
+*/
+ {
+ EFX_FAMILY_MEDFORD2,
+ (1U << TLV_PORT_MODE_1x1_NA) | /* mode 0 */
+ (1U << TLV_PORT_MODE_1x4_NA) | /* mode 1 */
+ (1U << TLV_PORT_MODE_1x1_1x1) | /* mode 2 */
+ (1U << TLV_PORT_MODE_1x2_NA) | /* mode 10 */
+ (1U << TLV_PORT_MODE_1x2_1x2) | /* mode 12 */
+ (1U << TLV_PORT_MODE_1x4_1x2) | /* mode 15 */
+ (1U << TLV_PORT_MODE_1x2_1x4), /* mode 16 */
+ 1, /* ports per cage */
+ 1 /* first cage */
+ },
+ /*
+* FIXME: Some port modes are not representable in this mapping:
+* - TLV_PORT_MODE_1x2_2x1 (mode 17):
+* port 0 -> cage 1
+* port 1 -> cage 2
+* port 2 -> cage 2
+*/
+ /*
+* Modes that on Medford2 allocate 2 adjacent port numbers to each
+* cage, starting on cage 1.
+* port 0 -> cage 1
+* port 1 -> cage 1
+* port 2 -> cage 2
+* port 3 -> cage 2
+*/
+ {
+ EFX_FAMILY_MEDFORD2,
+ (1U << TLV_PORT_MODE_1x4_1x4) | /* mode 3 */
+ (1U << TLV_PORT_MODE_2x1_2x1) | /* mode 4 */
+ (1U << TLV_PORT_MODE_1x4_2x1) | /* mode 6 */
+ (1U << TLV_PORT_MODE_2x1_1x4) | /* mode 7 */
+ (1U << TLV_PORT_MODE_2x2_NA) | /* mode 13 */
+ (1U << TLV_PORT_MODE_2x1_1x2), /* mode 18 */
+ 2, /* ports per cage */
+ 1 /* first cage */
+ },
+ /*
+* Modes that on Medford2 allocate 2 adjacent port numbers to each
+* cage, starting on cage 2.
+* port 0 -> cage 2
+* port 1 -> cage 2
+*/
+ {
+ EFX_FAMILY_MEDFORD2,
+ (1U << TLV_PORT_MODE_NA_2x2), /* mode 14 */
+ 2, /* ports per cage */
+ 2 /* first cage */
+ },
+ /*
+* Modes that on Medford2 allocate 4 adjacent port numbers to each
+* connector, starting on cage 1.
+* port 0 -> cage 1
+* port 1 -> cage 1
+* port 2 -> cage 1
+* port 3 -> cage 1
+*/
+ {
+ EFX_FAMILY_MEDFORD2,
+ (1U << TLV_PORT_MODE_4x1_NA), /* mode 5 */
+ 4, /* ports per cage */
+ 1 /* first cage */
+ },
+ /*
+* Modes that on Medford2 allocate 4 adjacent port numbers to each
+* connector, starting on cage 2.
+* port 0 -> cage 2
+* port 1 -> cage 2
+* port 2 -> cage 2
+* port 3 -> cage 2
+*/
+ {
+ EFX_FAMILY_MEDFORD2,
+ (1U << TLV_PORT_MODE_NA_4x1) | /* mode 8 */
+ (1U << TLV_PORT_MODE_NA_1x2), /* mode 11 */
+ 4, /* ports per cage */
+ 2 /* first cage */
+ },
};
static __checkReturn efx_rc_t
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svn commit: r341124 - head/sys/dev/sfxge/common
Author: arybchik
Date: Wed Nov 28 09:23:05 2018
New Revision: 341124
URL: https://svnweb.freebsd.org/changeset/base/341124
Log:
sfxge(4): clarify port mode names and masks
New port mode names are defined for Medford2 and later, and
the existing names are aliased to them. Add comments with the
numeric port mode to clarify the external port modes table.
Submitted by: Andy Moreton
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18199
Modified:
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/hunt_nic.c
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==
--- head/sys/dev/sfxge/common/ef10_nic.cWed Nov 28 09:22:53 2018
(r341123)
+++ head/sys/dev/sfxge/common/ef10_nic.cWed Nov 28 09:23:05 2018
(r341124)
@@ -1372,11 +1372,11 @@ static struct ef10_external_port_map_s {
*/
{
EFX_FAMILY_HUNTINGTON,
- (1 << TLV_PORT_MODE_10G) |
- (1 << TLV_PORT_MODE_10G_10G) |
- (1 << TLV_PORT_MODE_10G_10G_10G_10G),
- 1,
- 1
+ (1U << TLV_PORT_MODE_10G) | /* mode 0 */
+ (1U << TLV_PORT_MODE_10G_10G) | /* mode 2 */
+ (1U << TLV_PORT_MODE_10G_10G_10G_10G), /* mode 4 */
+ 1, /* ports per cage */
+ 1 /* first cage */
},
/*
* Modes that on Medford allocate each port number to a separate
@@ -1388,10 +1388,10 @@ static struct ef10_external_port_map_s {
*/
{
EFX_FAMILY_MEDFORD,
- (1 << TLV_PORT_MODE_10G) |
- (1 << TLV_PORT_MODE_10G_10G),
- 1,
- 1
+ (1U << TLV_PORT_MODE_10G) | /* mode 0 */
+ (1U << TLV_PORT_MODE_10G_10G), /* mode 2 */
+ 1, /* ports per cage */
+ 1 /* first cage */
},
/*
* Modes which for Huntington identify a chip variant where 2
@@ -1404,12 +1404,12 @@ static struct ef10_external_port_map_s {
*/
{
EFX_FAMILY_HUNTINGTON,
- (1 << TLV_PORT_MODE_40G) |
- (1 << TLV_PORT_MODE_40G_40G) |
- (1 << TLV_PORT_MODE_40G_10G_10G) |
- (1 << TLV_PORT_MODE_10G_10G_40G),
- 2,
- 1
+ (1U << TLV_PORT_MODE_40G) | /* mode 1 */
+ (1U << TLV_PORT_MODE_40G_40G) | /* mode 3 */
+ (1U << TLV_PORT_MODE_40G_10G_10G) | /* mode 6 */
+ (1U << TLV_PORT_MODE_10G_10G_40G), /* mode 7 */
+ 2, /* ports per cage */
+ 1 /* first cage */
},
/*
* Modes that on Medford allocate 2 adjacent port numbers to each
@@ -1421,13 +1421,14 @@ static struct ef10_external_port_map_s {
*/
{
EFX_FAMILY_MEDFORD,
- (1 << TLV_PORT_MODE_40G) |
- (1 << TLV_PORT_MODE_40G_40G) |
- (1 << TLV_PORT_MODE_40G_10G_10G) |
- (1 << TLV_PORT_MODE_10G_10G_40G) |
- (1 << TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2),
- 2,
- 1
+ (1U << TLV_PORT_MODE_40G) | /* mode 1 */
+ (1U << TLV_PORT_MODE_40G_40G) | /* mode 3 */
+ (1U << TLV_PORT_MODE_40G_10G_10G) | /* mode 6 */
+ (1U << TLV_PORT_MODE_10G_10G_40G) | /* mode 7 */
+ /* Do not use 10G_10G_10G_10G_Q1_Q2 (see bug63270) */
+ (1U << TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2),/* mode 9 */
+ 2, /* ports per cage */
+ 1 /* first cage */
},
/*
* Modes that on Medford allocate 4 adjacent port numbers to each
@@ -1439,10 +1440,11 @@ static struct ef10_external_port_map_s {
*/
{
EFX_FAMILY_MEDFORD,
- (1 << TLV_PORT_MODE_10G_10G_10G_10G_Q) |
- (1 << TLV_PORT_MODE_10G_10G_10G_10G_Q1),
- 4,
- 1,
+ (1U << TLV_PORT_MODE_10G_10G_10G_10G_Q) | /* mode 5 */
+ /* Do not use 10G_10G_10G_10G_Q1 (see bug63270) */
+ (1U << TLV_PORT_MODE_10G_10G_10G_10G_Q1), /* mode 4 */
+ 4, /* ports per cage */
+ 1 /* first cage */
},
/*
* Modes that on Medford allocate 4 adjacent port numbers to each
@@ -1454,9 +1456,9 @@ static struct ef10_external_port_map_s {
*/
{
EFX_FAMILY_MEDFORD,
- (1 << TLV_PORT_MODE_10G_10G_10G_10G_Q2),
- 4,
- 2
+
