svn commit: r263957 - in head/sys: dev/age dev/alc dev/ale dev/bce dev/bge dev/fxp dev/jme dev/msk dev/nfe dev/sge pci
Author: yongari Date: Mon Mar 31 01:54:59 2014 New Revision: 263957 URL: http://svnweb.freebsd.org/changeset/base/263957 Log: Increase the number of TX DMA segments from 32 to 35. It turned out 32 is not enough to support a full sized TSO packet. While I'm here fix a long standing bug introduced in r169632 in bce(4) where it didn't include L2 header length of TSO packet in the maximum DMA segment size calculation. In collaboration with:rmacklem MFC after:2 weeks Modified: head/sys/dev/age/if_agevar.h head/sys/dev/alc/if_alcvar.h head/sys/dev/ale/if_alevar.h head/sys/dev/bce/if_bcereg.h head/sys/dev/bge/if_bgereg.h head/sys/dev/fxp/if_fxpreg.h head/sys/dev/jme/if_jmevar.h head/sys/dev/msk/if_mskreg.h head/sys/dev/nfe/if_nfereg.h head/sys/dev/sge/if_sgereg.h head/sys/pci/if_rlreg.h Modified: head/sys/dev/age/if_agevar.h == --- head/sys/dev/age/if_agevar.hMon Mar 31 01:04:40 2014 (r263956) +++ head/sys/dev/age/if_agevar.hMon Mar 31 01:54:59 2014 (r263957) @@ -42,7 +42,7 @@ #defineAGE_TSO_MAXSEGSIZE 4096 #defineAGE_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header)) -#defineAGE_MAXTXSEGS 32 +#defineAGE_MAXTXSEGS 35 #defineAGE_RX_BUF_ALIGN8 #ifndef __NO_STRICT_ALIGNMENT #defineAGE_RX_BUF_SIZE (MCLBYTES - AGE_RX_BUF_ALIGN) Modified: head/sys/dev/alc/if_alcvar.h == --- head/sys/dev/alc/if_alcvar.hMon Mar 31 01:04:40 2014 (r263956) +++ head/sys/dev/alc/if_alcvar.hMon Mar 31 01:54:59 2014 (r263957) @@ -42,7 +42,7 @@ #defineALC_TSO_MAXSEGSIZE 4096 #defineALC_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header)) -#defineALC_MAXTXSEGS 32 +#defineALC_MAXTXSEGS 35 #defineALC_ADDR_LO(x) ((uint64_t) (x) 0x) #defineALC_ADDR_HI(x) ((uint64_t) (x) 32) Modified: head/sys/dev/ale/if_alevar.h == --- head/sys/dev/ale/if_alevar.hMon Mar 31 01:04:40 2014 (r263956) +++ head/sys/dev/ale/if_alevar.hMon Mar 31 01:54:59 2014 (r263957) @@ -40,7 +40,7 @@ #defineALE_TSO_MAXSEGSIZE 4096 #defineALE_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header)) -#defineALE_MAXTXSEGS 32 +#defineALE_MAXTXSEGS 35 #defineALE_ADDR_LO(x) ((uint64_t) (x) 0x) #defineALE_ADDR_HI(x) ((uint64_t) (x) 32) Modified: head/sys/dev/bce/if_bcereg.h == --- head/sys/dev/bce/if_bcereg.hMon Mar 31 01:04:40 2014 (r263956) +++ head/sys/dev/bce/if_bcereg.hMon Mar 31 01:54:59 2014 (r263957) @@ -6309,8 +6309,8 @@ struct fw_info { #define BCE_TX_TIMEOUT 5 -#define BCE_MAX_SEGMENTS 32 -#define BCE_TSO_MAX_SIZE 65536 +#define BCE_MAX_SEGMENTS 35 +#define BCE_TSO_MAX_SIZE (65535 + sizeof(struct ether_vlan_header)) #define BCE_TSO_MAX_SEG_SIZE 4096 #define BCE_DMA_ALIGN 8 Modified: head/sys/dev/bge/if_bgereg.h == --- head/sys/dev/bge/if_bgereg.hMon Mar 31 01:04:40 2014 (r263956) +++ head/sys/dev/bge/if_bgereg.hMon Mar 31 01:54:59 2014 (r263957) @@ -2852,7 +2852,7 @@ struct bge_gib { */ #defineBGE_NSEG_JUMBO 4 -#defineBGE_NSEG_NEW32 +#defineBGE_NSEG_NEW35 #defineBGE_TSOSEG_SZ 4096 /* Maximum DMA address for controllers that have 40bit DMA address bug. */ Modified: head/sys/dev/fxp/if_fxpreg.h == --- head/sys/dev/fxp/if_fxpreg.hMon Mar 31 01:04:40 2014 (r263956) +++ head/sys/dev/fxp/if_fxpreg.hMon Mar 31 01:54:59 2014 (r263957) @@ -250,7 +250,7 @@ struct fxp_cb_ucode { /* * Number of DMA segments in a TxCB. */ -#define FXP_NTXSEG 32 +#define FXP_NTXSEG 35 struct fxp_tbd { uint32_t tb_addr; Modified: head/sys/dev/jme/if_jmevar.h == --- head/sys/dev/jme/if_jmevar.hMon Mar 31 01:04:40 2014 (r263956) +++ head/sys/dev/jme/if_jmevar.hMon Mar 31 01:54:59 2014 (r263957) @@ -49,7 +49,7 @@ #defineJME_RX_RING_ALIGN 16 #defineJME_TSO_MAXSEGSIZE 4096 #defineJME_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header)) -#defineJME_MAXTXSEGS 32 +#define
Re: svn commit: r263957 - in head/sys: dev/age dev/alc dev/ale dev/bce dev/bge dev/fxp dev/jme dev/msk dev/nfe dev/sge pci
Pyun YongHyeon wrote this message on Mon, Mar 31, 2014 at 01:54 +: Author: yongari Date: Mon Mar 31 01:54:59 2014 New Revision: 263957 URL: http://svnweb.freebsd.org/changeset/base/263957 Log: Increase the number of TX DMA segments from 32 to 35. It turned out 32 is not enough to support a full sized TSO packet. While I'm here fix a long standing bug introduced in r169632 in bce(4) where it didn't include L2 header length of TSO packet in the maximum DMA segment size calculation. I assume all of the hardware supports this increase? Also, is there a reason to only increase up to 35 and not something larger, like 64? Is there a memory or performance penalty? -- John-Mark Gurney Voice: +1 415 225 5579 All that I will do, has been done, All that I have, has not. ___ svn-src-head@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to svn-src-head-unsubscr...@freebsd.org
Re: svn commit: r263957 - in head/sys: dev/age dev/alc dev/ale dev/bce dev/bge dev/fxp dev/jme dev/msk dev/nfe dev/sge pci
On Sun, Mar 30, 2014 at 09:00:59PM -0700, John-Mark Gurney wrote: Pyun YongHyeon wrote this message on Mon, Mar 31, 2014 at 01:54 +: Author: yongari Date: Mon Mar 31 01:54:59 2014 New Revision: 263957 URL: http://svnweb.freebsd.org/changeset/base/263957 Log: Increase the number of TX DMA segments from 32 to 35. It turned out 32 is not enough to support a full sized TSO packet. While I'm here fix a long standing bug introduced in r169632 in bce(4) where it didn't include L2 header length of TSO packet in the maximum DMA segment size calculation. I assume all of the hardware supports this increase? Yes. Data sheet does not mention about such limitation. txp(4) has a limitation on the number of TX segments but I didn't implement TSO in txp(4). Also, is there a reason to only increase up to 35 and not something larger, like 64? Is there a memory or performance penalty? If 64 does not overflow kernel stack we can also bump the number to 64. ___ svn-src-head@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to svn-src-head-unsubscr...@freebsd.org
Re: svn commit: r263957 - in head/sys: dev/age dev/alc dev/ale dev/bce dev/bge dev/fxp dev/jme dev/msk dev/nfe dev/sge pci
On Mon, Mar 31, 2014 at 01:25:35PM +0900, Yonghyeon PYUN wrote: On Sun, Mar 30, 2014 at 09:00:59PM -0700, John-Mark Gurney wrote: Pyun YongHyeon wrote this message on Mon, Mar 31, 2014 at 01:54 +: Author: yongari Date: Mon Mar 31 01:54:59 2014 New Revision: 263957 URL: http://svnweb.freebsd.org/changeset/base/263957 Log: Increase the number of TX DMA segments from 32 to 35. It turned out 32 is not enough to support a full sized TSO packet. While I'm here fix a long standing bug introduced in r169632 in bce(4) where it didn't include L2 header length of TSO packet in the maximum DMA segment size calculation. I assume all of the hardware supports this increase? Yes. Data sheet does not mention about such limitation. txp(4) has a limitation on the number of TX segments but I didn't implement TSO in txp(4). Also, is there a reason to only increase up to 35 and not something larger, like 64? Is there a memory or performance penalty? If 64 does not overflow kernel stack we can also bump the number to 64. Hmm, I think I didn't answer on performance penalty. If hardware allows only a single outstanding DMA read operation, having multiple TX buffers would result in lower performance. However it's common to have multiple TX buffers in TSO so I don't think it could change performance number in TSO path. And I think most high end server NICs support multiple outstanding DMA read operation. ___ svn-src-head@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to svn-src-head-unsubscr...@freebsd.org