Re: em(4) IPv4, TCP, UDP checksum offloading

2022-11-05 Thread Moritz Buhl
Looking for OKs.

On Sat, Oct 15, 2022 at 10:01:53PM +0200, Moritz Buhl wrote:
> With the previous diffs I am seeing sporadic connection problems in tcpbench
> via IPv6 on Intel 82546GB.
> The diff was too big anyways. Here is a smaller diff that introduces
> checksum offloading for the controllers that use the advanced descriptors.
> 
> I tested this diff on i350 and 82571EB, receive, send, forwarding,
> icmp4, icmp6, tcp4, tcp6, udp4, udp6, also over vlan and veb.
> 
> I am still looking for testing. Any feedback?
> 
> mbuhl
> 
> Index: dev/pci/if_em.c
> ===
> RCS file: /cvs/src/sys/dev/pci/if_em.c,v
> retrieving revision 1.362
> diff -u -p -r1.362 if_em.c
> --- dev/pci/if_em.c   23 Jun 2022 09:38:28 -  1.362
> +++ dev/pci/if_em.c   15 Oct 2022 19:49:12 -
> @@ -37,6 +37,8 @@ POSSIBILITY OF SUCH DAMAGE.
>  #include 
>  #include 
>  
> +#include 
> +
>  /*
>   *  Driver version
>   */
> @@ -278,6 +280,8 @@ void em_receive_checksum(struct em_softc
>struct mbuf *);
>  u_intem_transmit_checksum_setup(struct em_queue *, struct mbuf *, 
> u_int,
>   u_int32_t *, u_int32_t *);
> +u_intem_tx_ctx_setup(struct em_queue *, struct mbuf *, u_int, 
> u_int32_t *,
> + u_int32_t *);
>  void em_iff(struct em_softc *);
>  void em_update_link_status(struct em_softc *);
>  int  em_get_buf(struct em_queue *, int);
> @@ -1220,10 +1224,9 @@ em_encap(struct em_queue *que, struct mb
>   BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
>   }
>  
> - if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
> - sc->hw.mac_type != em_82576 &&
> - sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i210 &&
> - sc->hw.mac_type != em_i350) {
> + if (sc->hw.mac_type >= em_82575 && sc->hw.mac_type <= em_i210) {
> + used += em_tx_ctx_setup(que, m, head, _upper, _lower);
> + } else if (sc->hw.mac_type >= em_82543) {
>   used += em_transmit_checksum_setup(que, m, head,
>   _upper, _lower);
>   } else {
> @@ -1278,7 +1281,8 @@ em_encap(struct em_queue *que, struct mb
>  
>  #if NVLAN > 0
>   /* Find out if we are in VLAN mode */
> - if (m->m_flags & M_VLANTAG) {
> + if (m->m_flags & M_VLANTAG && (sc->hw.mac_type < em_82575 ||
> + sc->hw.mac_type > em_i210)) {
>   /* Set the VLAN id */
>   desc->upper.fields.special = htole16(m->m_pkthdr.ether_vtag);
>  
> @@ -1964,17 +1968,16 @@ em_setup_interface(struct em_softc *sc)
>   ifp->if_capabilities = IFCAP_VLAN_MTU;
>  
>  #if NVLAN > 0
> - if (sc->hw.mac_type != em_82575 && sc->hw.mac_type != em_82580 &&
> - sc->hw.mac_type != em_82576 &&
> - sc->hw.mac_type != em_i210 && sc->hw.mac_type != em_i350)
> - ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
> + ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
>  #endif
>  
> - if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
> - sc->hw.mac_type != em_82576 &&
> - sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i210 &&
> - sc->hw.mac_type != em_i350)
> + if (sc->hw.mac_type >= em_82543) {
>   ifp->if_capabilities |= IFCAP_CSUM_TCPv4 | IFCAP_CSUM_UDPv4;
> + }
> + if (sc->hw.mac_type >= em_82575 && sc->hw.mac_type <= em_i210) {
> + ifp->if_capabilities |= IFCAP_CSUM_IPv4;
> + ifp->if_capabilities |= IFCAP_CSUM_TCPv6 | IFCAP_CSUM_UDPv6;
> + }
>  
>   /* 
>* Specify the media types supported by this adapter and register
> @@ -2389,6 +2392,108 @@ em_free_transmit_structures(struct em_so
>   0, que->tx.sc_tx_dma.dma_map->dm_mapsize,
>   BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
>   }
> +}
> +
> +u_int
> +em_tx_ctx_setup(struct em_queue *que, struct mbuf *mp, u_int head,
> +u_int32_t *olinfo_status, u_int32_t *cmd_type_len)
> +{
> + struct e1000_adv_tx_context_desc *TD;
> + struct ether_header *eh = mtod(mp, struct ether_header *);
> + struct mbuf *m;
> + uint32_t vlan_macip_lens = 0, type_tucmd_mlhl = 0, mss_l4len_idx = 0;
> + int off = 0, hoff;
> + uint8_t ipproto, iphlen;
> +
> + *olinfo_status = 0;
> + *cmd_type_len = 0;
> + TD = (struct e1000_adv_tx_context_desc *)>tx.sc_tx_desc_ring[head];
> + 
> +#if NVLAN > 0
> + if (ISSET(mp->m_flags, M_VLANTAG)) {
> + uint16_t vtag = htole16(mp->m_pkthdr.ether_vtag);
> + vlan_macip_lens |= vtag << E1000_ADVTXD_VLAN_SHIFT;
> + *cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
> + off = 1;
> + }
> +#endif
> +
> + vlan_macip_lens |= (sizeof(*eh) << E1000_ADVTXD_MACLEN_SHIFT);
> + 
> + switch (ntohs(eh->ether_type)) {
> +   

Re: em(4) IPv4, TCP, UDP checksum offloading

2022-10-18 Thread Hrvoje Popovski
On 15.10.2022. 22:01, Moritz Buhl wrote:
> With the previous diffs I am seeing sporadic connection problems in tcpbench
> via IPv6 on Intel 82546GB.
> The diff was too big anyways. Here is a smaller diff that introduces
> checksum offloading for the controllers that use the advanced descriptors.
> 
> I tested this diff on i350 and 82571EB, receive, send, forwarding,
> icmp4, icmp6, tcp4, tcp6, udp4, udp6, also over vlan and veb.

Hi,

I've tried same thing on i210 and 82576.



Re: em(4) IPv4, TCP, UDP checksum offloading

2022-10-15 Thread Moritz Buhl
With the previous diffs I am seeing sporadic connection problems in tcpbench
via IPv6 on Intel 82546GB.
The diff was too big anyways. Here is a smaller diff that introduces
checksum offloading for the controllers that use the advanced descriptors.

I tested this diff on i350 and 82571EB, receive, send, forwarding,
icmp4, icmp6, tcp4, tcp6, udp4, udp6, also over vlan and veb.

I am still looking for testing. Any feedback?

mbuhl

Index: dev/pci/if_em.c
===
RCS file: /cvs/src/sys/dev/pci/if_em.c,v
retrieving revision 1.362
diff -u -p -r1.362 if_em.c
--- dev/pci/if_em.c 23 Jun 2022 09:38:28 -  1.362
+++ dev/pci/if_em.c 15 Oct 2022 19:49:12 -
@@ -37,6 +37,8 @@ POSSIBILITY OF SUCH DAMAGE.
 #include 
 #include 
 
+#include 
+
 /*
  *  Driver version
  */
@@ -278,6 +280,8 @@ void em_receive_checksum(struct em_softc
 struct mbuf *);
 u_int  em_transmit_checksum_setup(struct em_queue *, struct mbuf *, u_int,
u_int32_t *, u_int32_t *);
+u_int  em_tx_ctx_setup(struct em_queue *, struct mbuf *, u_int, u_int32_t *,
+   u_int32_t *);
 void em_iff(struct em_softc *);
 void em_update_link_status(struct em_softc *);
 int  em_get_buf(struct em_queue *, int);
@@ -1220,10 +1224,9 @@ em_encap(struct em_queue *que, struct mb
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
}
 
-   if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
-   sc->hw.mac_type != em_82576 &&
-   sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i210 &&
-   sc->hw.mac_type != em_i350) {
+   if (sc->hw.mac_type >= em_82575 && sc->hw.mac_type <= em_i210) {
+   used += em_tx_ctx_setup(que, m, head, _upper, _lower);
+   } else if (sc->hw.mac_type >= em_82543) {
used += em_transmit_checksum_setup(que, m, head,
_upper, _lower);
} else {
@@ -1278,7 +1281,8 @@ em_encap(struct em_queue *que, struct mb
 
 #if NVLAN > 0
/* Find out if we are in VLAN mode */
-   if (m->m_flags & M_VLANTAG) {
+   if (m->m_flags & M_VLANTAG && (sc->hw.mac_type < em_82575 ||
+   sc->hw.mac_type > em_i210)) {
/* Set the VLAN id */
desc->upper.fields.special = htole16(m->m_pkthdr.ether_vtag);
 
@@ -1964,17 +1968,16 @@ em_setup_interface(struct em_softc *sc)
ifp->if_capabilities = IFCAP_VLAN_MTU;
 
 #if NVLAN > 0
-   if (sc->hw.mac_type != em_82575 && sc->hw.mac_type != em_82580 &&
-   sc->hw.mac_type != em_82576 &&
-   sc->hw.mac_type != em_i210 && sc->hw.mac_type != em_i350)
-   ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
+   ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
 #endif
 
-   if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
-   sc->hw.mac_type != em_82576 &&
-   sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i210 &&
-   sc->hw.mac_type != em_i350)
+   if (sc->hw.mac_type >= em_82543) {
ifp->if_capabilities |= IFCAP_CSUM_TCPv4 | IFCAP_CSUM_UDPv4;
+   }
+   if (sc->hw.mac_type >= em_82575 && sc->hw.mac_type <= em_i210) {
+   ifp->if_capabilities |= IFCAP_CSUM_IPv4;
+   ifp->if_capabilities |= IFCAP_CSUM_TCPv6 | IFCAP_CSUM_UDPv6;
+   }
 
/* 
 * Specify the media types supported by this adapter and register
@@ -2389,6 +2392,108 @@ em_free_transmit_structures(struct em_so
0, que->tx.sc_tx_dma.dma_map->dm_mapsize,
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
}
+}
+
+u_int
+em_tx_ctx_setup(struct em_queue *que, struct mbuf *mp, u_int head,
+u_int32_t *olinfo_status, u_int32_t *cmd_type_len)
+{
+   struct e1000_adv_tx_context_desc *TD;
+   struct ether_header *eh = mtod(mp, struct ether_header *);
+   struct mbuf *m;
+   uint32_t vlan_macip_lens = 0, type_tucmd_mlhl = 0, mss_l4len_idx = 0;
+   int off = 0, hoff;
+   uint8_t ipproto, iphlen;
+
+   *olinfo_status = 0;
+   *cmd_type_len = 0;
+   TD = (struct e1000_adv_tx_context_desc *)>tx.sc_tx_desc_ring[head];
+   
+#if NVLAN > 0
+   if (ISSET(mp->m_flags, M_VLANTAG)) {
+   uint16_t vtag = htole16(mp->m_pkthdr.ether_vtag);
+   vlan_macip_lens |= vtag << E1000_ADVTXD_VLAN_SHIFT;
+   *cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
+   off = 1;
+   }
+#endif
+
+   vlan_macip_lens |= (sizeof(*eh) << E1000_ADVTXD_MACLEN_SHIFT);
+   
+   switch (ntohs(eh->ether_type)) {
+   case ETHERTYPE_IP: {
+   struct ip *ip;
+
+   m = m_getptr(mp, sizeof(*eh), );
+   ip = (struct ip *)(mtod(m, caddr_t) + hoff);
+
+   iphlen = ip->ip_hl << 

Re: em(4) IPv4, TCP, UDP checksum offloading

2022-10-12 Thread Moritz Buhl
Another mistake

On Wed, Oct 12, 2022 at 01:45:30PM +0200, Moritz Buhl wrote:
> On Tue, Oct 11, 2022 at 04:16:15PM +0100, Stuart Henderson wrote:
> > On 2022/10/11 15:03, Moritz Buhl wrote:
> > > Here is a new diff for checksum offloading (ipv4, udp, tcp) for em(4).
> > > 
> > > The previous diff didn't implement hardware vlan tagging for >em82578
> > > which should result in variable ethernet header lengths and thus
> > > wrong checksums inserted at wrong places.
> > > 
> > > The diff below addresses this.
> > > I would appreciate further testing reports with different controllers.
> > > 
> > > mbuhl
> > 
> > I tried this on my laptop which has I219-V em (I run it in a trunk
> > with iwm). It breaks tx (packets don't show up on the other side).
> > rx seems ok.
> 
> The following diff will restrict the usage of the advanced 
> descriptors to 82575, 82576, i350 and i210, and fix what the
> last diff broke for i219.
> 
> Index: dev/pci/if_em.c
> ===
> RCS file: /cvs/src/sys/dev/pci/if_em.c,v
> retrieving revision 1.362
> diff -u -p -r1.362 if_em.c
> --- dev/pci/if_em.c   23 Jun 2022 09:38:28 -  1.362
> +++ dev/pci/if_em.c   11 Oct 2022 16:05:43 -
> @@ -37,6 +37,8 @@ POSSIBILITY OF SUCH DAMAGE.
>  #include 
>  #include 
>  
> +#include 
> +
>  /*
>   *  Driver version
>   */
> @@ -278,6 +280,8 @@ void em_receive_checksum(struct em_softc
>struct mbuf *);
>  u_intem_transmit_checksum_setup(struct em_queue *, struct mbuf *, 
> u_int,
>   u_int32_t *, u_int32_t *);
> +u_intem_tx_ctx_setup(struct em_queue *, struct mbuf *, u_int, 
> u_int32_t *,
> + u_int32_t *);
>  void em_iff(struct em_softc *);
>  void em_update_link_status(struct em_softc *);
>  int  em_get_buf(struct em_queue *, int);
> @@ -1220,10 +1224,9 @@ em_encap(struct em_queue *que, struct mb
>   BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
>   }
>  
> - if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
> - sc->hw.mac_type != em_82576 &&
> - sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i210 &&
> - sc->hw.mac_type != em_i350) {
> + if (sc->hw.mac_type >= em_82575 && sc->hw.mac_type <= em_i210) {
> + used += em_tx_ctx_setup(que, m, head, _upper, _lower);
> + } else if (sc->hw.mac_type >= em_82543) {
>   used += em_transmit_checksum_setup(que, m, head,
>   _upper, _lower);
>   } else {
> @@ -1278,7 +1281,7 @@ em_encap(struct em_queue *que, struct mb
>  
>  #if NVLAN > 0
>   /* Find out if we are in VLAN mode */
> - if (m->m_flags & M_VLANTAG) {
> + if (m->m_flags & M_VLANTAG && sc->hw.mac_type < em_82575) {

I missed this spot, it should be
if (m->m_flags & M_VLANTAG && (sc->hw.mac_type < em_82575 ||
sc->hw.mac_type > em_i210)) {




Re: em(4) IPv4, TCP, UDP checksum offloading

2022-10-12 Thread Moritz Buhl
On Tue, Oct 11, 2022 at 04:16:15PM +0100, Stuart Henderson wrote:
> On 2022/10/11 15:03, Moritz Buhl wrote:
> > Here is a new diff for checksum offloading (ipv4, udp, tcp) for em(4).
> > 
> > The previous diff didn't implement hardware vlan tagging for >em82578
> > which should result in variable ethernet header lengths and thus
> > wrong checksums inserted at wrong places.
> > 
> > The diff below addresses this.
> > I would appreciate further testing reports with different controllers.
> > 
> > mbuhl
> 
> I tried this on my laptop which has I219-V em (I run it in a trunk
> with iwm). It breaks tx (packets don't show up on the other side).
> rx seems ok.

The following diff will restrict the usage of the advanced 
descriptors to 82575, 82576, i350 and i210, and fix what the
last diff broke for i219.

Index: dev/pci/if_em.c
===
RCS file: /cvs/src/sys/dev/pci/if_em.c,v
retrieving revision 1.362
diff -u -p -r1.362 if_em.c
--- dev/pci/if_em.c 23 Jun 2022 09:38:28 -  1.362
+++ dev/pci/if_em.c 11 Oct 2022 16:05:43 -
@@ -37,6 +37,8 @@ POSSIBILITY OF SUCH DAMAGE.
 #include 
 #include 
 
+#include 
+
 /*
  *  Driver version
  */
@@ -278,6 +280,8 @@ void em_receive_checksum(struct em_softc
 struct mbuf *);
 u_int  em_transmit_checksum_setup(struct em_queue *, struct mbuf *, u_int,
u_int32_t *, u_int32_t *);
+u_int  em_tx_ctx_setup(struct em_queue *, struct mbuf *, u_int, u_int32_t *,
+   u_int32_t *);
 void em_iff(struct em_softc *);
 void em_update_link_status(struct em_softc *);
 int  em_get_buf(struct em_queue *, int);
@@ -1220,10 +1224,9 @@ em_encap(struct em_queue *que, struct mb
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
}
 
-   if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
-   sc->hw.mac_type != em_82576 &&
-   sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i210 &&
-   sc->hw.mac_type != em_i350) {
+   if (sc->hw.mac_type >= em_82575 && sc->hw.mac_type <= em_i210) {
+   used += em_tx_ctx_setup(que, m, head, _upper, _lower);
+   } else if (sc->hw.mac_type >= em_82543) {
used += em_transmit_checksum_setup(que, m, head,
_upper, _lower);
} else {
@@ -1278,7 +1281,7 @@ em_encap(struct em_queue *que, struct mb
 
 #if NVLAN > 0
/* Find out if we are in VLAN mode */
-   if (m->m_flags & M_VLANTAG) {
+   if (m->m_flags & M_VLANTAG && sc->hw.mac_type < em_82575) {
/* Set the VLAN id */
desc->upper.fields.special = htole16(m->m_pkthdr.ether_vtag);
 
@@ -1964,17 +1967,14 @@ em_setup_interface(struct em_softc *sc)
ifp->if_capabilities = IFCAP_VLAN_MTU;
 
 #if NVLAN > 0
-   if (sc->hw.mac_type != em_82575 && sc->hw.mac_type != em_82580 &&
-   sc->hw.mac_type != em_82576 &&
-   sc->hw.mac_type != em_i210 && sc->hw.mac_type != em_i350)
-   ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
+   ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
 #endif
 
-   if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
-   sc->hw.mac_type != em_82576 &&
-   sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i210 &&
-   sc->hw.mac_type != em_i350)
+   if (sc->hw.mac_type >= em_82543) {
+   ifp->if_capabilities |= IFCAP_CSUM_IPv4;
ifp->if_capabilities |= IFCAP_CSUM_TCPv4 | IFCAP_CSUM_UDPv4;
+   ifp->if_capabilities |= IFCAP_CSUM_TCPv6 | IFCAP_CSUM_UDPv6;
+   }
 
/* 
 * Specify the media types supported by this adapter and register
@@ -2391,6 +2391,108 @@ em_free_transmit_structures(struct em_so
}
 }
 
+u_int
+em_tx_ctx_setup(struct em_queue *que, struct mbuf *mp, u_int head,
+u_int32_t *olinfo_status, u_int32_t *cmd_type_len)
+{
+   struct e1000_adv_tx_context_desc *TD;
+   struct ether_header *eh = mtod(mp, struct ether_header *);
+   struct mbuf *m;
+   uint32_t vlan_macip_lens = 0, type_tucmd_mlhl = 0, mss_l4len_idx = 0;
+   int off = 0, hoff;
+   uint8_t ipproto, iphlen;
+
+   *olinfo_status = 0;
+   *cmd_type_len = 0;
+   TD = (struct e1000_adv_tx_context_desc *)>tx.sc_tx_desc_ring[head];
+   
+#if NVLAN > 0
+   if (ISSET(mp->m_flags, M_VLANTAG)) {
+   uint16_t vtag = htole16(mp->m_pkthdr.ether_vtag);
+   vlan_macip_lens |= vtag << E1000_ADVTXD_VLAN_SHIFT;
+   *cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
+   off = 1;
+   }
+#endif
+
+   vlan_macip_lens |= (sizeof(*eh) << E1000_ADVTXD_MACLEN_SHIFT);
+   
+   switch (ntohs(eh->ether_type)) {
+   case ETHERTYPE_IP: {
+   struct ip *ip;
+
+   m = 

Re: em(4) IPv4, TCP, UDP checksum offloading

2022-10-11 Thread Hrvoje Popovski
On 11.10.2022. 17:16, Stuart Henderson wrote:

Hi,

> I tried this on my laptop which has I219-V em (I run it in a trunk
> with iwm). It breaks tx (packets don't show up on the other side).
> rx seems ok.
> 
> There is also a "em0: watchdog: head 111 tail 20 TDH 20 TDT 111"

this em log can be triggered with or without em offload diff¸with sh
/etc/netstart, but it seems that with this diff it's little easier to
trigger it ...


> but that was after ~10 mins uptime so may have occurred after
> I switched the active port on the trunk(4) over to the iwm, or
> back again.



Re: em(4) IPv4, TCP, UDP checksum offloading

2022-10-11 Thread Hrvoje Popovski
On 11.10.2022. 15:03, Moritz Buhl wrote:
> Here is a new diff for checksum offloading (ipv4, udp, tcp) for em(4).
> 
> The previous diff didn't implement hardware vlan tagging for >em82578
> which should result in variable ethernet header lengths and thus
> wrong checksums inserted at wrong places.
> 
> The diff below addresses this.
> I would appreciate further testing reports with different controllers.

Hi,

what would be the best thing to do to test this diff?

I have box with

em0 at pci7 dev 0 function 0 "Intel 82576" rev 0x01: msi, address
00:1b:21:61:8a:94
em1 at pci7 dev 0 function 1 "Intel 82576" rev 0x01: msi, address
00:1b:21:61:8a:95
em2 at pci8 dev 0 function 0 "Intel I210" rev 0x03: msi, address
00:25:90:5d:c9:98
em3 at pci9 dev 0 function 0 "Intel I210" rev 0x03: msi, address
00:25:90:5d:c9:99
em4 at pci12 dev 0 function 0 "Intel I350" rev 0x01: msi, address
00:25:90:5d:c9:9a
em5 at pci12 dev 0 function 1 "Intel I350" rev 0x01: msi, address
00:25:90:5d:c9:9b
em6 at pci12 dev 0 function 2 "Intel I350" rev 0x01: msi, address
00:25:90:5d:c9:9c
em7 at pci12 dev 0 function 3 "Intel I350" rev 0x01: msi, address
00:25:90:5d:c9:9d

after this diff I'm seeing

em0: flags=8843 mtu 1500

hwfeatures=1b7
hardmtu 9216
lladdr 00:1b:21:61:8a:94
em1: flags=8843 mtu 1500

hwfeatures=1b7
hardmtu 9216
lladdr 00:1b:21:61:8a:95
em2: flags=8843 mtu 1500

hwfeatures=1b7
hardmtu 9216
lladdr 00:25:90:5d:c9:98
em3: flags=8843 mtu 1500

hwfeatures=1b7
hardmtu 9216
lladdr 00:25:90:5d:c9:99
em4: flags=8843 mtu 1500

hwfeatures=1b7
hardmtu 9216
lladdr 00:25:90:5d:c9:9a
em5: flags=8843 mtu 1500

hwfeatures=1b7
hardmtu 9216
lladdr 00:25:90:5d:c9:9b
em6: flags=8843 mtu 1500

hwfeatures=1b7
hardmtu 9216
lladdr 00:25:90:5d:c9:9c
em7: flags=8802 mtu 1500

hwfeatures=1b7
hardmtu 9216
lladdr 00:25:90:5d:c9:9d


and basic tcp/udp iperf is working as expected over plain interface.




Re: em(4) IPv4, TCP, UDP checksum offloading

2022-10-11 Thread Stuart Henderson
On 2022/10/11 15:03, Moritz Buhl wrote:
> Here is a new diff for checksum offloading (ipv4, udp, tcp) for em(4).
> 
> The previous diff didn't implement hardware vlan tagging for >em82578
> which should result in variable ethernet header lengths and thus
> wrong checksums inserted at wrong places.
> 
> The diff below addresses this.
> I would appreciate further testing reports with different controllers.
> 
> mbuhl

I tried this on my laptop which has I219-V em (I run it in a trunk
with iwm). It breaks tx (packets don't show up on the other side).
rx seems ok.

There is also a "em0: watchdog: head 111 tail 20 TDH 20 TDT 111"
but that was after ~10 mins uptime so may have occurred after
I switched the active port on the trunk(4) over to the iwm, or
back again.

OpenBSD 7.2-current (GENERIC.MP) #64: Tue Oct 11 14:30:52 BST 2022
st...@bamboo.spacehopper.org:/sys/arch/amd64/compile/GENERIC.MP
real mem = 16926281728 (16142MB)
avail mem = 16395878400 (15636MB)
random: good seed from bootblocks
mpath0 at root
scsibus0 at mpath0: 256 targets
mainbus0 at root
bios0 at mainbus0: SMBIOS rev. 3.1 @ 0x77d49000 (64 entries)
bios0: vendor LENOVO version "N2HET63W (1.46 )" date 06/01/2021
bios0: LENOVO 20QF00B2UK
acpi0 at bios0: ACPI 6.1
acpi0: sleep states S0 S3 S4 S5
acpi0: tables DSDT FACP SSDT SSDT SSDT SSDT SSDT TPM2 UEFI SSDT HPET APIC MCFG 
ECDT SSDT SSDT SSDT BOOT SLIC SSDT LPIT WSMT SSDT DBGP DBG2 MSDM BATB NHLT FPDT 
UEFI
acpi0: wakeup devices GLAN(S4) XHC_(S3) XDCI(S4) HDAS(S4) RP01(S4) PXSX(S4) 
RP02(S4) PXSX(S4) PXSX(S4) RP04(S4) PXSX(S4) RP05(S4) PXSX(S4) RP06(S4) 
PXSX(S4) RP07(S4) [...]
acpitimer0 at acpi0: 3579545 Hz, 24 bits
acpihpet0 at acpi0: 2399 Hz
acpimadt0 at acpi0 addr 0xfee0: PC-AT compat
cpu0 at mainbus0: apid 0 (boot processor)
cpu0: Intel(R) Core(TM) i7-8565U CPU @ 1.80GHz, 1795.82 MHz, 06-8e-0c
cpu0: 
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,ABM,3DNOWP,PERF,ITSC,FSGSBASE,TSC_ADJUST,SGX,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID,MPX,RDSEED,ADX,SMAP,CLFLUSHOPT,PT,SRBDS_CTRL,MD_CLEAR,IBRS,IBPB,STIBP,L1DF,SSBD,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES
cpu0: 32KB 64b/line 8-way D-cache, 32KB 64b/line 8-way I-cache, 256KB 64b/line 
4-way L2 cache, 8MB 64b/line 16-way L3 cache
cpu0: smt 0, core 0, package 0
mtrr: Pentium Pro MTRR support, 10 var ranges, 88 fixed ranges
cpu0: apic clock running at 24MHz
cpu0: mwait min=64, max=64, C-substates=0.2.1.2.4.1.1.1, IBE
cpu1 at mainbus0: apid 2 (application processor)
cpu1: Intel(R) Core(TM) i7-8565U CPU @ 1.80GHz, 1795.82 MHz, 06-8e-0c
cpu1: 
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,ABM,3DNOWP,PERF,ITSC,FSGSBASE,TSC_ADJUST,SGX,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID,MPX,RDSEED,ADX,SMAP,CLFLUSHOPT,PT,SRBDS_CTRL,MD_CLEAR,IBRS,IBPB,STIBP,L1DF,SSBD,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES
cpu1: 32KB 64b/line 8-way D-cache, 32KB 64b/line 8-way I-cache, 256KB 64b/line 
4-way L2 cache, 8MB 64b/line 16-way L3 cache
cpu1: smt 0, core 1, package 0
cpu2 at mainbus0: apid 4 (application processor)
cpu2: Intel(R) Core(TM) i7-8565U CPU @ 1.80GHz, 1795.82 MHz, 06-8e-0c
cpu2: 
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,ABM,3DNOWP,PERF,ITSC,FSGSBASE,TSC_ADJUST,SGX,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID,MPX,RDSEED,ADX,SMAP,CLFLUSHOPT,PT,SRBDS_CTRL,MD_CLEAR,IBRS,IBPB,STIBP,L1DF,SSBD,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES
cpu2: 32KB 64b/line 8-way D-cache, 32KB 64b/line 8-way I-cache, 256KB 64b/line 
4-way L2 cache, 8MB 64b/line 16-way L3 cache
cpu2: smt 0, core 2, package 0
cpu3 at mainbus0: apid 6 (application processor)
cpu3: Intel(R) Core(TM) i7-8565U CPU @ 1.80GHz, 1698.73 MHz, 06-8e-0c
cpu3: 
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,ABM,3DNOWP,PERF,ITSC,FSGSBASE,TSC_ADJUST,SGX,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID,MPX,RDSEED,ADX,SMAP,CLFLUSHOPT,PT,SRBDS_CTRL,MD_CLEAR,IBRS,IBPB,STIBP,L1DF,SSBD,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES
cpu3: 32KB 64b/line 8-way D-cache, 32KB 64b/line 8-way I-cache, 256KB 64b/line 
4-way L2 cache, 8MB 64b/line 16-way L3 cache
cpu3: smt 0, core 

em(4) IPv4, TCP, UDP checksum offloading

2022-10-11 Thread Moritz Buhl
Here is a new diff for checksum offloading (ipv4, udp, tcp) for em(4).

The previous diff didn't implement hardware vlan tagging for >em82578
which should result in variable ethernet header lengths and thus
wrong checksums inserted at wrong places.

The diff below addresses this.
I would appreciate further testing reports with different controllers.

mbuhl

Index: dev/pci/if_em.c
===
RCS file: /mount/openbsd/cvs/src/sys/dev/pci/if_em.c,v
retrieving revision 1.362
diff -u -p -r1.362 if_em.c
--- dev/pci/if_em.c 23 Jun 2022 09:38:28 -  1.362
+++ dev/pci/if_em.c 10 Oct 2022 18:01:19 -
@@ -37,6 +37,8 @@ POSSIBILITY OF SUCH DAMAGE.
 #include 
 #include 
 
+#include 
+
 /*
  *  Driver version
  */
@@ -278,6 +280,8 @@ void em_receive_checksum(struct em_softc
 struct mbuf *);
 u_int  em_transmit_checksum_setup(struct em_queue *, struct mbuf *, u_int,
u_int32_t *, u_int32_t *);
+u_int  em_tx_ctx_setup(struct em_queue *, struct mbuf *, u_int, u_int32_t *,
+   u_int32_t *);
 void em_iff(struct em_softc *);
 void em_update_link_status(struct em_softc *);
 int  em_get_buf(struct em_queue *, int);
@@ -1220,10 +1224,9 @@ em_encap(struct em_queue *que, struct mb
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
}
 
-   if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
-   sc->hw.mac_type != em_82576 &&
-   sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i210 &&
-   sc->hw.mac_type != em_i350) {
+   if (sc->hw.mac_type >= em_82575) {
+   used += em_tx_ctx_setup(que, m, head, _upper, _lower);
+   } else if (sc->hw.mac_type >= em_82543) {
used += em_transmit_checksum_setup(que, m, head,
_upper, _lower);
} else {
@@ -1278,7 +1281,7 @@ em_encap(struct em_queue *que, struct mb
 
 #if NVLAN > 0
/* Find out if we are in VLAN mode */
-   if (m->m_flags & M_VLANTAG) {
+   if (m->m_flags & M_VLANTAG && sc->hw.mac_type < em_82575) {
/* Set the VLAN id */
desc->upper.fields.special = htole16(m->m_pkthdr.ether_vtag);
 
@@ -1964,17 +1967,14 @@ em_setup_interface(struct em_softc *sc)
ifp->if_capabilities = IFCAP_VLAN_MTU;
 
 #if NVLAN > 0
-   if (sc->hw.mac_type != em_82575 && sc->hw.mac_type != em_82580 &&
-   sc->hw.mac_type != em_82576 &&
-   sc->hw.mac_type != em_i210 && sc->hw.mac_type != em_i350)
-   ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
+   ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
 #endif
 
-   if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
-   sc->hw.mac_type != em_82576 &&
-   sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i210 &&
-   sc->hw.mac_type != em_i350)
+   if (sc->hw.mac_type >= em_82543) {
+   ifp->if_capabilities |= IFCAP_CSUM_IPv4;
ifp->if_capabilities |= IFCAP_CSUM_TCPv4 | IFCAP_CSUM_UDPv4;
+   ifp->if_capabilities |= IFCAP_CSUM_TCPv6 | IFCAP_CSUM_UDPv6;
+   }
 
/* 
 * Specify the media types supported by this adapter and register
@@ -2391,6 +2391,108 @@ em_free_transmit_structures(struct em_so
}
 }
 
+u_int
+em_tx_ctx_setup(struct em_queue *que, struct mbuf *mp, u_int head,
+u_int32_t *olinfo_status, u_int32_t *cmd_type_len)
+{
+   struct e1000_adv_tx_context_desc *TD;
+   struct ether_header *eh = mtod(mp, struct ether_header *);
+   struct mbuf *m;
+   uint32_t vlan_macip_lens = 0, type_tucmd_mlhl = 0, mss_l4len_idx = 0;
+   int off = 0, hoff;
+   uint8_t ipproto, iphlen;
+
+   *olinfo_status = 0;
+   *cmd_type_len = 0;
+   TD = (struct e1000_adv_tx_context_desc *)>tx.sc_tx_desc_ring[head];
+   
+#if NVLAN > 0
+   if (ISSET(mp->m_flags, M_VLANTAG)) {
+   uint16_t vtag = htole16(mp->m_pkthdr.ether_vtag);
+   vlan_macip_lens |= vtag << E1000_ADVTXD_VLAN_SHIFT;
+   *cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
+   off = 1;
+   }
+#endif
+
+   vlan_macip_lens |= (sizeof(*eh) << E1000_ADVTXD_MACLEN_SHIFT);
+   
+   switch (ntohs(eh->ether_type)) {
+   case ETHERTYPE_IP: {
+   struct ip *ip;
+
+   m = m_getptr(mp, sizeof(*eh), );
+   ip = (struct ip *)(mtod(m, caddr_t) + hoff);
+
+   iphlen = ip->ip_hl << 2;
+   ipproto = ip->ip_p;
+
+   type_tucmd_mlhl |= E1000_ADVTXD_TUCMD_IPV4;
+   if (ISSET(mp->m_pkthdr.csum_flags, M_IPV4_CSUM_OUT)) {
+   *olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
+   off = 1;
+   }
+
+   break;
+   }
+#ifdef INET6
+