Re: Seventh Edition(V7) filesystem support.
On Tue, 24 May 2011 22:48:40 +0900 (JST) UCHIYAMA Yasushi wrote: > This filesystem purpose I intended is that file exchanging with small computer > (such as H8/300, ARM7TDMI...)system. as alternative of FAT. and also, > Tri-endian support. It can mount PDP-11 V7 disk image. > > http://www.vnop.net/~uch/h8/w/tools/patch/netbsd5.99.24-v7fs110524.patch Nice! -- Matt
extend sysmon watchdog modes?
I am seeing a need for a new watchdog mode that is similar to WDOG_MODE_KTICKLE but instead of the watchdog service function running from a callout it needs to run from a (higher level) hardware interrupt. This mode would be useful for example when a system can legitimately spend significant time with callouts blocked, as when handling sustained heavy interrupt loads. It would be especially useful on such systems when the only watchdog timeout behavior is system reset. A simple way to provide such feature would be to add e.g. WDOG_MODE_ITICKLE which if supported on a given system would allow the watchdog to be serviced from a machine-dependent hardware interrupt. Ability to additionally specify what IPL use would be also nice but perhaps not necessary. Has anyone else run into a similar need? Any thoughts on alternative solutions? -cliff-
Re: kmem-pool-uvm
hi, >> Findings after having run the system for a while and having about 1.1gig >> in the pool(9)s: >> Option a: about 3 allocated kernel map_entries (not in the map but >> allocated) >> Option b: about 10 allocated boundary tags. >> Option c: about 40 allocated boundary tags. >> >> With boundary tags beeing about half the size of vm_map_entries the vmem >> version uses slightly more memory but not so much. why did you use different numbers for heap_va_arena's qcache_max (8 * PAGE_SIZE) and VMK_VACACHE_MAP_QUANTUM (32 * PAGE_SIZE)? if i read your patches correctly, the number of map entries/boundary tags will be smaller if these constants are bigger, right? >> Both versions use a modified kmem(9) that interfaces either with vmem or >> the extended kva caches, which has page_aligned memory for allocations >> of page_size and larger and cache_line aligned allocations for >> allocations between cache_line size and page_size. >> This should resolve some problems xen-kernels do have. does the original (solaris) version of kmem_alloc provide aligned allocations? YAMAMOTO Takashi
SOCK_SEQPACKT for Unix sockets
Hi
I am trying to revive a years old submission that implemented
SOCK_SEQPACKET for Unix sockets. Here is the original patch:
http://mail-index.netbsd.org/tech-kern/2003/04/14/0006.html
Attached is my patch against -current
I do not really know what I am doing here and therefore seek comments.
The initial patch contained some code that "changed the way backpressure
is maintained on SOCK_STREAM/SOCK_SEQPACKET". I removed it since it
also touched SOCK_STREAM, but that may be a bad choice, I would like to
hear about that.
Also, I added code to handle SOCK_SEQPACKET at 3 places where it was not
done in the original patch, with the assumption that SOCK_SECPACKET should
really behave just like SOCK_STREAM? except for atomicity. Here are the
3 locations, I am not sure it was really relevant:
unp_attach()
uipc_usrreq()/PRU_SENSE
unp_shutdown()
For the test case, I modified libperfuse/perfused to use SOCK_SEQPACKET
instead of SOCK_STREAM and it seems to work fine. That is supposed to
fix the bug where the kernel sends more data than perfused can handle
just in time, causing packet loss in the FUSE socket if SOCK_DGRAM is used.
The result is a vnode stuck locked in kernel because the operation was
sent but never got a reply. I have not been able to build a test case
for that bug since I have trouble to reproduce it at will for now.
--
Emmanuel Dreyfus
m...@netbsd.org
--- src/sys/kern/uipc_proto.c.orig 2008-04-27 15:16:58.0 +0200
+++ src/sys/kern/uipc_proto.c 2011-05-23 15:24:33.0 +0200
@@ -64,8 +64,15 @@
.pr_flags = PR_ATOMIC|PR_ADDR|PR_RIGHTS,
.pr_ctloutput = uipc_ctloutput,
.pr_usrreq = uipc_usrreq,
}, {
+ .pr_type = SOCK_SEQPACKET,
+ .pr_domain = &unixdomain,
+ .pr_flags = PR_CONNREQUIRED|PR_WANTRCVD|PR_RIGHTS|PR_LISTEN|
+ PR_ATOMIC,
+ .pr_ctloutput = uipc_ctloutput,
+ .pr_usrreq = uipc_usrreq,
+ }, {
.pr_input = raw_input,
.pr_ctlinput = raw_ctlinput,
.pr_usrreq = raw_usrreq,
.pr_init = raw_init,
--- src/sys/kern/uipc_usrreq.c.orig 2010-11-20 01:53:20.0 +0100
+++ src/sys/kern/uipc_usrreq.c 2011-05-23 15:32:58.0 +0200
@@ -123,9 +123,9 @@
/*
* Unix communications domain.
*
* TODO:
- * SEQPACKET, RDM
+ * RDM
* rethink name space problems
* need a proper out-of-band
*
* Notes on locking:
@@ -486,8 +486,9 @@
case SOCK_DGRAM:
panic("uipc 1");
/*NOTREACHED*/
+ case SOCK_SEQPACKET: /* FALLTHROUGH */
case SOCK_STREAM:
#definercv (&so->so_rcv)
#define snd (&so2->so_snd)
if (unp->unp_conn == 0)
@@ -566,8 +567,9 @@
unp_disconnect(unp);
break;
}
+ case SOCK_SEQPACKET: /* FALLTHROUGH */
case SOCK_STREAM:
#definercv (&so2->so_rcv)
#definesnd (&so->so_snd)
if (unp->unp_conn == NULL) {
@@ -578,9 +580,9 @@
KASSERT(solocked2(so, so2));
if (unp->unp_conn->unp_flags & UNP_WANTCRED) {
/*
* Credentials are passed only once on
-* SOCK_STREAM.
+* SOCK_STREAM and SOCK_SEQPACKET.
*/
unp->unp_conn->unp_flags &= ~UNP_WANTCRED;
control = unp_addsockcred(l, control);
}
@@ -591,10 +593,21 @@
*/
if (control) {
if (sbappendcontrol(rcv, m, control) != 0)
control = NULL;
- } else
- sbappend(rcv, m);
+ } else {
+ switch(so->so_type) {
+ case SOCK_SEQPACKET:
+ sbappendrecord(rcv, m);
+ break;
+ case SOCK_STREAM:
+ sbappend(rcv, m);
+ break;
+ default:
+ panic("uipc_usrreq");
+ break;
+ }
+ }
snd->sb_mbmax -=
rcv->sb_mbcnt - unp->unp_conn->unp_mbcnt;
unp->unp_conn->unp_mbcnt = rcv->sb_mbcnt;
newhiwat = snd->sb_hiwat -
@@ -628,12 +641,20 @@
break;
case PRU_SENSE:
pckbc_acpi_attach: couldn't map
I have an amd64 machine which runs the 4.0.1 INSTALL kernel, but fails to run the 4.0.1 GENERIC one. 5.1 works OK (but I wnt to try 4.0.1 for my fs-performance-on-RAID issues). dmesg for INSTALL is: [...] cpu0 at mainbus0: apid 0 (boot processor) cpu0: AMD Athlon(tm) Dual Core Processor 4850e, 2506.72 MHz cpu0: features: ffdbfbff cpu0: features: ffdbfbff cpu0: features: ffdbfbff cpu0: features2: 2001 cpu0: I-cache 64 KB 64B/line 2-way, D-cache 64 KB 64B/line 2-way cpu0: L2 cache 512 KB 64B/line 16-way cpu0: ITLB 32 4 KB entries fully associative, 8 4 MB entries fully associative cpu0: DTLB 32 4 KB entries fully associative, 8 4 MB entries fully associative cpu0: calibrating local timer cpu0: apic clock running at 200 MHz cpu0: 8 page colors cpu1 at mainbus0: apid 1 (application processor) cpu1: not started ioapic0 at mainbus0 apid 2 (I/O APIC) ioapic0: pa 0xfec0, version 21, 24 pins acpi0 at mainbus0: Advanced Configuration and Power Interface acpi0: using Intel ACPI CA subsystem version 20060217 acpi0: X/RSDT: OemId <012411,OEMXSDT ,20110124>, AslId acpi0: SCI interrupting at int 9 acpi0: fixed-feature power button present timecounter: Timecounter "ACPI-Safe" frequency 3579545 Hz quality 900 ACPI-Safe 32-bit timer ACPI Object Type 'Processor' (0x0c) at acpi0 not configured ACPI Object Type 'Processor' (0x0c) at acpi0 not configured ACPI Object Type 'Processor' (0x0c) at acpi0 not configured ACPI Object Type 'Processor' (0x0c) at acpi0 not configured ACPI Object Type 'Processor' (0x0c) at acpi0 not configured ACPI Object Type 'Processor' (0x0c) at acpi0 not configured ACPI Object Type 'Processor' (0x0c) at acpi0 not configured ACPI Object Type 'Processor' (0x0c) at acpi0 not configured ACPI Object Type 'Processor' (0x0c) at acpi0 not configured ACPI Object Type 'Processor' (0x0c) at acpi0 not configured ACPI Object Type 'Processor' (0x0c) at acpi0 not configured ACPI Object Type 'Processor' (0x0c) at acpi0 not configured PNP0A03 at acpi0 not configured PNP0C02 at acpi0 not configured PNP0303 at acpi0 not configured PNP0F03 at acpi0 not configured PNP at acpi0 not configured PNP0200 at acpi0 not configured PNP0100 at acpi0 not configured PNP0B00 at acpi0 not configured PNP0800 at acpi0 not configured PNP0C04 at acpi0 not configured PNP0700 at acpi0 not configured ATK0110 at acpi0 not configured PNP0103 at acpi0 not configured PNP0C02 at acpi0 not configured PNP0C02 at acpi0 not configured PNP0303 at acpi0 not configured PNP0501 at acpi0 not configured PNP0C02 at acpi0 not configured PNP0C02 at acpi0 not configured PNP0C01 at acpi0 not configured PNP0C0C at acpi0 not configured pci0 at mainbus0 bus 0: configuration mode 1 pci0: i/o space, memory space enabled, rd/line, rd/mult, wr/inv ok pchb0 at pci0 dev 0 function 0 pchb0: vendor 0x1022 product 0x9600 (rev. 0x00) ppb0 at pci0 dev 1 function 0: vendor 0x1022 product 0x9602 (rev. 0x00) pci1 at ppb0 bus 1 pci1: i/o space, memory space enabled vga0 at pci1 dev 5 function 0: vendor 0x1002 product 0x9610 (rev. 0x00) wsdisplay0 at vga0 kbdmux 1: console (80x25, vt100 emulation) wsmux1: connecting to wsdisplay0 vendor 0x1002 product 0x960f (multimedia subclass 0x03) at pci1 dev 5 function 1 not configured ppb1 at pci0 dev 6 function 0: vendor 0x1022 product 0x9606 (rev. 0x00) pci2 at ppb1 bus 2 pci2: memory space enabled, rd/line, wr/inv ok vendor 0x1969 product 0x1048 (ethernet network, revision 0xb0) at pci2 dev 0 function 0 not configured ahcisata0 at pci0 dev 17 function 0: vendor 0x1002 product 0x4391 ahcisata0: interrupting at ioapic0 pin 22 (irq 11) ahcisata0: AHCI revision 1.1, 6 ports, 32 command slots, features 0xf722e080 atabus0 at ahcisata0 channel 0 atabus1 at ahcisata0 channel 1 atabus2 at ahcisata0 channel 2 atabus3 at ahcisata0 channel 3 atabus4 at ahcisata0 channel 4 atabus5 at ahcisata0 channel 5 ohci0 at pci0 dev 18 function 0: vendor 0x1002 product 0x4397 (rev. 0x00) ohci0: interrupting at ioapic0 pin 16 (irq 7) ohci0: OHCI version 1.0, legacy support usb0 at ohci0: USB revision 1.0 uhub0 at usb0 uhub0: vendor 0x1002 OHCI root hub, class 9/0, rev 1.00/1.00, addr 1 uhub0: 3 ports with 3 removable, self powered ohci1 at pci0 dev 18 function 1: vendor 0x1002 product 0x4398 (rev. 0x00) ohci1: interrupting at ioapic0 pin 16 (irq 7) ohci1: OHCI version 1.0, legacy support usb1 at ohci1: USB revision 1.0 uhub1 at usb1 uhub1: vendor 0x1002 OHCI root hub, class 9/0, rev 1.00/1.00, addr 1 uhub1: 3 ports with 3 removable, self powered vendor 0x1002 product 0x4396 (USB serial bus, interface 0x20) at pci0 dev 18 function 2 not configured ohci2 at pci0 dev 19 function 0: vendor 0x1002 product 0x4397 (rev. 0x00) ohci2: interrupting at ioapic0 pin 18 (irq 10) ohci2: OHCI version 1.0, legacy support usb2 at ohci2: USB revision 1.0 uhub2 at usb2 uhub2: vendor 0x1002 OHCI root hub, class 9/0, rev 1.00/1.00, addr 1 uhub2: 3 ports with 3 removable, self powered ohci3 at pci0 dev 19 function 1: vendor 0x1002 product 0x4398 (rev. 0x00) ohci3: interrupti
Re: enforcing page color matches
> I'm using a MIPS 74K which needs strict page-coloring enforcement > (4 colors for its Icache and 2 colors for its Dcache) > so this is important to me. VCEI/VCED handlers on R4400 would also be useful to catch aliases. --- Izumi Tsutsui
Re: enforcing page color matches
On May 25, 2011, at 7:35 AM, Masao Uebayashi wrote: > What happens if loaning is done? I've now fixed socket loaning and pipe loaning to do the right thing.
Re: enforcing page color matches
On May 25, 2011, at 8:11 AM, Eduardo Horvath wrote: > On Wed, 25 May 2011, Matt Thomas wrote: > >> I'm using a MIPS 74K which needs strict page-coloring enforcement (4 colors >> for its Icache and 2 colors for its Dcache) so this is important to me. If >> this can be enforced, the code to deal with bad colors can be removed and >> that will greatly simplify the mips pmap code. > > I don't think that you can get rid of the page coloring code. What > happens if you have two processes that have the same file mmap()ed to > different page colors? But reducing the need for it is good. I think the mmap for one of those mappings should fail.
Re: enforcing page color matches
On Wed, 25 May 2011, Matt Thomas wrote: > I'm using a MIPS 74K which needs strict page-coloring enforcement (4 colors > for its Icache and 2 colors for its Dcache) so this is important to me. If > this can be enforced, the code to deal with bad colors can be removed and > that will greatly simplify the mips pmap code. I don't think that you can get rid of the page coloring code. What happens if you have two processes that have the same file mmap()ed to different page colors? But reducing the need for it is good. Eduardo
Re: enforcing page color matches
What happens if loaning is done? Masao On Wed, May 25, 2011 at 4:36 PM, Matt Thomas wrote: > I modified the mips pmap to drop into ddb if there was an attempt to map a > page with an incorrect page color (color(VA) != color(PA)). Then using > UVMHIST I fixed each cause. I can now boot a kernel on my matt-nb5-mips64 > branch into sysinst with no bad color matches. I'm sure I haven't found all > the cases but it's a big step forward. > > The diffs are relatively minor and are at > www.netbsd.org/~matt/uvm-color-diffs.txt for your viewing enjoyment. > > I'm using a MIPS 74K which needs strict page-coloring enforcement (4 colors > for its Icache and 2 colors for its Dcache) so this is important to me. If > this can be enforced, the code to deal with bad colors can be removed and > that will greatly simplify the mips pmap code. > >
Re: Seventh Edition(V7) filesystem support.
On Tue, May 24, 2011 at 10:48:40PM +0900, UCHIYAMA Yasushi wrote: > This filesystem purpose I intended is that file exchanging with small computer > (such as H8/300, ARM7TDMI...)system. as alternative of FAT. and also, > Tri-endian support. It can mount PDP-11 V7 disk image. > > http://www.vnop.net/~uch/h8/w/tools/patch/netbsd5.99.24-v7fs110524.patch This is superb, thank you - I'd love to see this in-tree. Thanks, Alistair
enforcing page color matches
I modified the mips pmap to drop into ddb if there was an attempt to map a page with an incorrect page color (color(VA) != color(PA)). Then using UVMHIST I fixed each cause. I can now boot a kernel on my matt-nb5-mips64 branch into sysinst with no bad color matches. I'm sure I haven't found all the cases but it's a big step forward. The diffs are relatively minor and are at www.netbsd.org/~matt/uvm-color-diffs.txt for your viewing enjoyment. I'm using a MIPS 74K which needs strict page-coloring enforcement (4 colors for its Icache and 2 colors for its Dcache) so this is important to me. If this can be enforced, the code to deal with bad colors can be removed and that will greatly simplify the mips pmap code.
