Re: [time-nuts] Downloaded HPs SmartClock / Size of Lucent modules.
drkir...@kirkbymicrowave.co.uk said: 1) From what I gather, the HP GPS timing receivers can be observed/ controlled with HP SmartClock. But where I download it from? I drew a blank with Google, as well as the Microsemi site It's called satstat rather than SmartClock. 2) Can anyone with these $150 two-part Lucent boxes tell me the size of them. The basic box is 9 5/8 x 6 x 2 1/2 (each) That doesn't include the thickness of the front panel or connectors. The front panel is 11 1/2 x 3 -- These are my opinions. I hate spam. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Downloaded HPs SmartClock / Size of Lucent modules.
Am 29.12.2014 um 00:39 schrieb Dr. David Kirkby (Kirkby Microwave Ltd): 2) Can anyone with these $150 two-part Lucent boxes tell me the size of them. The box itself: 65mm high, 152 mm deep, 244 mm wide Front plate: 76 mm high, 274 mm wide Just a little bit to big to fit into a 4 HU 19 box ( for both). (still doing a night shift on the 5-10MHz doubler, filter 5 chan. distrib amp for it. Or 4 chan 10 dBm 10 MHz one 1pps on SMA ) BTW I once bought a generic chinese power supply as a fallback solution for my Dell laptop. That turned out not to work because Dells talk to their PS. Nobody else seems to do that. It now powers my Lucent duo. I saw that the PS has an additional 12V input. That may ease the task of emergency power from a lead or Li-IronPhosphate battery. regards, Gerhard ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Soekris without a GPS receiver.
From: Paul [] I've avoided asking why you're doing this because -- to misquote Yoda -- Do nor do not, there is only try But if you're not switching out the system clock it doesn't really seem like either a time-nut or ntp-nut project. ___ Thanks for your comments, Paul. The project arose partially because I was offered a net4501 and accepted as I had heard of its good reputation. So far, the best results in terms of reported NTP offset have come from Raspberry Pi systems running a non-tickless Linux. My previous FreeBSD system using the DCD line for PPS had to be converted to Linux, and is now not as good as it was, and perhaps similar in quality to non-tickless Linux on the Raspberry Pi cards. So in the interests of knowing whether the net4501 could be even more precise, and perhaps tying it in with a recently purchased LTElite card, and learning more in the process, is why I'm doing this. I hope that is within the remit of this group. Cheers, David -- SatSignal Software - Quality software written to your requirements Web: http://www.satsignal.eu Email: david-tay...@blueyonder.co.uk ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] KS24361 Ulrich Z83XX software mod works
Some time ago, there was a thread about whether Z38xx writes to the GPSDO's NV memory every second, raising the possibility that it could prematurely wear out the NV memory if it were used continuously to monitor a GPSDO. Here is what Ulrich said (23 April 2013): due to the discussion that evolved concerning Z38XX i looked up the sources and found that indeed every time the current time is read using a :PTIM:TCOD? a :PTIM:TCOD:FORM F2 is sent in advance to make the receiver answer in the format that Z38XX needs. I have not been aware that this could lead to NVRAM wear out but have been thinking this simply sets the format of the next output. I have changed the software so that the FORM F2 command is now only written once after program start. The software can be downloaded from the usual place but I have currently no time to test it. My own experiences with NV memory that can only be written for a limited number of times (EEPROM on ATMEL processors) indicates that a clever made NV writing routine would first compare the NV contents to what shall be written on a byte by byte base and write only changed bytes. Does anyone know for certain whether current vesions of the program really do not pose this potential risk to the NVRAM? Best regards, Charles ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] New GPSDO on EBAY From China
Li Ang wrote: This unit is done by BG7TBL. In his store on taobao.com, there is a adev chart. Please refrer to this link That ADEV chart (see below) raises more questions than it answers. At least the time constant is not too short (a very common problem with DIY GPSDOs). But when the GPS takes over above the crossover (tau ~ 5000 seconds), the ADEV is ~2e-11. GPS should be significantly better than this at 5000 seconds. It appears that something is wrong with the design. Best regards, Charles ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] New GPSDO on EBAY From China
I remember seeing this same unit here on this list some weeks ago. As I remember it is built from some plans that were published. You can see that it uses a surplus OCXO. The seller is good to claim the specs of his GPSDO as being two orders of magnitude above the OCXO. because we don't know what surplus OCXO this unit will be shipped with. If you just want a low cost GPSDO you can build one for maybe $50 total and then it is repairable and should last forever. If you want predictable performance you'll have to buy a name brand commercial unit. This Chinese built unit looks to be aimed at someone who needs a lab bench reference to keep his frequency counter on calibration and does not want to do any soldering. On Sun, Dec 28, 2014 at 7:25 AM, David Smith w...@msn.com wrote: Hello Friends, I found this new inexpensive GPSDO on ebay listed from a seller from China: http://www.ebay.com/itm/GPS-DISCPLINED-CLOCK-GPSDO-10M-OUTPUT-SQUARE-WAVE-/111514491254?pt=LH_DefaultDomain_0hash=item19f6c81976 It looks interesting and tempting BUT the seller doesn't give any spec's on the unit or osc type. The seller has 10 negative and 18 neutral feedback's in the past 6 months out of a total of 2110 for a feedback score of 99.6%; many for poor communication. Does anyone on the list have any experience with this GPSDO? Any advice on buying one? Best regards and Happy New Year! Dave - W6TE ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. -- Chris Albertson Redondo Beach, California ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Soekris without a GPS receiver.
Can't you combine a few Internet pool NTP servers with a local 1PPS source? The Internet servers will name the seconds. Also if you really need a Motorola Oncore you can buy them for $20 on eBay. There is no shortage. I paid $18 with free shipping for a UT+ I run the UT+ and leave the Thunderbolt powered off most of the time because the power used by the TB is so high compared to the very modest power draw of the UT+ On Sat, Dec 27, 2014 at 10:05 PM, Mike Cook michael.c...@sfr.fr wrote: I have had a look at the NTPns package and I don’t think that you will be able do what you want without something naming the seconds. As you have GPSDO’s to give you UTC aligned seconds you may be able to use the voice time service TIM to help you manually set the system clock to the nearest sec and then just have the 1PPS on gpio to get align the seconds to UTC. I have done this and it works ok. However, you won’t get the upcoming leap second adjustment (my bet is on Jun 30 next year, but it could be pushed out to Dec31 ). If you are not using snmp, you will not be able to do monitoring either. I would be inclined to use NTP rather than NTPns as per http://www.febo.com/pages/soekris. I know that the 4501 has only 128Mb , but that is easily enough. Le 27 déc. 2014 à 10:56, David J Taylor david-tay...@blueyonder.co.uk a écrit : I have a Soekris 4501 running with NanoBSD and have got as far as adding the PPS/DCD/GPIO modifications to the hardware. NTPns itself is working, and the red LED is flashing as expected. I would now like to get NTPns working with that more precise timing which is available, but as I don't have an Oncore or a DCF77 receiver I am stuck. Is it possible to use just the PPS/DCD line on its own for the fraction of the seconds, or would I need one or other of those receivers to make it work? If it can be made to work, what are suitable configuration commands? Thanks, David -- SatSignal Software - Quality software written to your requirements Web: http://www.satsignal.eu Email: david-tay...@blueyonder.co.uk ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. -- Chris Albertson Redondo Beach, California ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] schematics of frequency counter
Hi,
Some quick statistic-processing.
Histogram of your data:
1.979 0
1.980 2
1.98146
1.982 173
1.983 523
1.984 1031
1.985 1301
1.986 1131
1.987 648
1.988 236
1.989 8
1.990 1
1.991 0
The total sample count is 5100 (wc -l only gives 5099 since there is a
missing end of line, but word count is 5100).
The average is about 1,985075 ns and it is reasonably gaussian, but with
some systematics, notice how the slope is more abrupt on the higher end
than the lower end. A quick and dirty spreadsheet gives me about 2,243
ps RMS jitter, which isn't all that bad. Yes, it will spread out to that
11 ps peak-to-peak jitter, but it is to be expected.
It's pretty respectable for a home-built.
Cheers,
Magnus
On 12/28/2014 03:19 PM, Li Ang wrote:
Hi Bob,
I did some test according to your suggestions. DUT is a symmetricom x72
rb oscillator. Also, I've tried signal generator as the DUT. RS SMY01 is
not as good as HP8662A but that the best I've got. The signal geneator is
also using FE5650 as ref clock.
According to my test with the TDC today, this unit is not producing very
stable data.
I don't have accurate pulse generator, so this is how I test the TDC:
0) power the board with battery.
1) use FPGA to generate time pulse:
reg [15:0] shift;
always @(posedge refclk10M) begin
shift = {shift[14:0], sw_gate};
end
assign tdc_start = shift[3];
assign tdc_stop1 = shift[5];
2) use MCU to pull down sw_gate, the FPGA sync it to refclk10M domain and
generate input signal for TDC.
3) use TDC to test the time betwen tdc_start and tdc_stop1
The result is in tdc_test.zip. number * 100ns = time between tdc_start and
tdc_stop1. (TDC highspeed clock is refclk10M/2).
There 2 issues from the test:
1) As we can see from the data, the number is around 1.98x not 2.00x. So
there is about 2ns delay between tdc_start and tdc_stop1 for this simple
test code. If it is from the PCB trace and something inside FPGA, this part
should be a constant value at certain temperature. I can calculate it by
measuring 2 cycles and 3 cylces. My current code has not implement this
part, it should provide some improvement. 2ns time error for 1s gate, that
is something.
2) For a 90ps TDC, I think the result should be something like +-0.001
cycle. But I get something like +-0.003 cycle. I do not know the reason for
now.
2014-12-27 22:58 GMT+08:00 Bob Camp kb...@n1k.org:
Hi
(In reply to several posts. It’s easier for me this way)
Ok, that’s good news !!! (and useful data)
Your counter performance degraded a bit when you put in 5 db and not much
when you put in 8 db.
It’s also maybe *too* good news. I suspect that cross talk between the
channels may be impacting your results.
Next step is to try it with two independent sources and a bit more
attenuation. When you try it with two sources, you need to attenuate first
one source and then switch the attenuators to the other source. That will
help you see if crosstalk from one channel is more of a problem than from
the other channel.
One parts hint:
Cable TV attenuators are much cheaper than their fancy 50 ohm MIniCircuits
cousins. They are also something you can pick up down at the corner
electronics store. For this sort of testing they are perfectly fine to use.
At this point in the testing the mismatch between 75 ohms and 50 ohms is
not a big deal. You will need to adapt connectors, but you probably still
will save money.
===
Op-amps that have enough bandwidth and performance for a high input
impedance counter input are rare items. They also are not cheap. Often they
come as some sort of current feedback part with low(er) input impedance. If
you want your counter to work to 300 MHz, it should accept a 300 MHz square
wave. That might mean passing the third or even the fifth harmonic of the
square wave. An input channel with 900 or 1500 MHz bandwidth is quite a
challenge.
One very simple solution is to just grab a high speed comparator like the
one used by Fluke / Pendulum (ADCMP565). Drive it directly with your input
or clock. Make it your front end device. That’s not an ideal solution, but
it will give you the bandwidth and a reasonable input impedance. It
requires messy things like a negative supply or a “fake” ground (so would
the op amp). It also has an ECL output that needs to be converted to match
your FPGA ( hint: use the clock inputs, they are LVPECL compatible).
Driving into the FPGA with a differential signal is probably needed to
reduce crosstalk.
No matter how you do it, input channels are *not* an easy thing to do
properly. Even on commercial counters, they often are easy to fool.
Designing one is only the start. Fully testing it is equally complex.
=
Do not underrate your skills in any way. You are doing far more on this
project than any of the rest of the list members have done. We have talked
and talked forever about these chips. We talk a lot about these ideas. We
suggest lots of complex solutions to various
Re: [time-nuts] Soekris without a GPS receiver.
From: Chris Albertson Can't you combine a few Internet pool NTP servers with a local 1PPS source? The Internet servers will name the seconds. Also if you really need a Motorola Oncore you can buy them for $20 on eBay. There is no shortage. I paid $18 with free shipping for a UT+ I run the UT+ and leave the Thunderbolt powered off most of the time because the power used by the TB is so high compared to the very modest power draw of the UT+ === Chris, Using a mixture of PPS and local servers is exactly what I was aiming for, but: - NTPns doesn't support my PPS source - for testing, using local servers alone, even the seconds don't get named correctly, even though NTPns shows they are being detected and one is even marked as SELECTED. I was thinking that my already purchased LTElite might be a suitable PPS source, and perhaps even be able to drive the net4501's clock (at some point in the future). Cheers, David -- SatSignal Software - Quality software written to your requirements Web: http://www.satsignal.eu Email: david-tay...@blueyonder.co.uk ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] schematics of frequency counter
Hi Magnus,
The unit of these data is not ns but reference clock cycles (100ns).
TDC_GP22 measures the time between the edge of tdc_start and
tdc_stop1, then it measures the reference clock automaticly. The result you
get from it is the ratio of them.
2014-12-29 19:58 GMT+08:00 Magnus Danielson mag...@rubidium.dyndns.org:
Hi,
Some quick statistic-processing.
Histogram of your data:
1.979 0
1.980 2
1.98146
1.982 173
1.983 523
1.984 1031
1.985 1301
1.986 1131
1.987 648
1.988 236
1.989 8
1.990 1
1.991 0
The total sample count is 5100 (wc -l only gives 5099 since there is a
missing end of line, but word count is 5100).
The average is about 1,985075 ns and it is reasonably gaussian, but with
some systematics, notice how the slope is more abrupt on the higher end
than the lower end. A quick and dirty spreadsheet gives me about 2,243 ps
RMS jitter, which isn't all that bad. Yes, it will spread out to that 11 ps
peak-to-peak jitter, but it is to be expected.
It's pretty respectable for a home-built.
Cheers,
Magnus
On 12/28/2014 03:19 PM, Li Ang wrote:
Hi Bob,
I did some test according to your suggestions. DUT is a symmetricom
x72
rb oscillator. Also, I've tried signal generator as the DUT. RS SMY01 is
not as good as HP8662A but that the best I've got. The signal geneator is
also using FE5650 as ref clock.
According to my test with the TDC today, this unit is not producing
very
stable data.
I don't have accurate pulse generator, so this is how I test the TDC:
0) power the board with battery.
1) use FPGA to generate time pulse:
reg [15:0] shift;
always @(posedge refclk10M) begin
shift = {shift[14:0], sw_gate};
end
assign tdc_start = shift[3];
assign tdc_stop1 = shift[5];
2) use MCU to pull down sw_gate, the FPGA sync it to refclk10M domain and
generate input signal for TDC.
3) use TDC to test the time betwen tdc_start and tdc_stop1
The result is in tdc_test.zip. number * 100ns = time between tdc_start and
tdc_stop1. (TDC highspeed clock is refclk10M/2).
There 2 issues from the test:
1) As we can see from the data, the number is around 1.98x not 2.00x. So
there is about 2ns delay between tdc_start and tdc_stop1 for this simple
test code. If it is from the PCB trace and something inside FPGA, this
part
should be a constant value at certain temperature. I can calculate it by
measuring 2 cycles and 3 cylces. My current code has not implement this
part, it should provide some improvement. 2ns time error for 1s gate, that
is something.
2) For a 90ps TDC, I think the result should be something like +-0.001
cycle. But I get something like +-0.003 cycle. I do not know the reason
for
now.
2014-12-27 22:58 GMT+08:00 Bob Camp kb...@n1k.org:
Hi
(In reply to several posts. It’s easier for me this way)
Ok, that’s good news !!! (and useful data)
Your counter performance degraded a bit when you put in 5 db and not much
when you put in 8 db.
It’s also maybe *too* good news. I suspect that cross talk between the
channels may be impacting your results.
Next step is to try it with two independent sources and a bit more
attenuation. When you try it with two sources, you need to attenuate
first
one source and then switch the attenuators to the other source. That will
help you see if crosstalk from one channel is more of a problem than from
the other channel.
One parts hint:
Cable TV attenuators are much cheaper than their fancy 50 ohm
MIniCircuits
cousins. They are also something you can pick up down at the corner
electronics store. For this sort of testing they are perfectly fine to
use.
At this point in the testing the mismatch between 75 ohms and 50 ohms is
not a big deal. You will need to adapt connectors, but you probably still
will save money.
===
Op-amps that have enough bandwidth and performance for a high input
impedance counter input are rare items. They also are not cheap. Often
they
come as some sort of current feedback part with low(er) input impedance.
If
you want your counter to work to 300 MHz, it should accept a 300 MHz
square
wave. That might mean passing the third or even the fifth harmonic of the
square wave. An input channel with 900 or 1500 MHz bandwidth is quite a
challenge.
One very simple solution is to just grab a high speed comparator like the
one used by Fluke / Pendulum (ADCMP565). Drive it directly with your
input
or clock. Make it your front end device. That’s not an ideal solution,
but
it will give you the bandwidth and a reasonable input impedance. It
requires messy things like a negative supply or a “fake” ground (so
would
the op amp). It also has an ECL output that needs to be converted to
match
your FPGA ( hint: use the clock inputs, they are LVPECL compatible).
Driving into the FPGA with a differential signal is probably needed to
reduce crosstalk.
No matter how you do it, input channels are *not* an easy
Re: [time-nuts] New GPSDO on EBAY From China
The OCXO is a Morion (Russia) MV89A. You may download a datasheet from http://www.morion.com.ru/catalog_pdf/MV89-OCXO.pdf Looks decent, stability vs. temperature and aging are as usual. BG7TBL is a Chinese radioamateur, quite known for his designs. 73 - Marco IK1ODO ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] New GPSDO on EBAY From China
Hi Ok, well that’s a move forward on this GPSDO. There is a *lot* more data on that listing than there was a month ago. Thanks for digging it up and posting the link. If you look at the ADEV at 1 second, it’s running at 2.67 x10^-11. That’s all coming from the Erratum Rb that they are using as a reference. At 100 seconds the Rb should be around 2.67 x10^-12 and the MV-89 should be about 2x10^-11. They combine as the square root, so that would be 3.3 ppt or less. The unit is running at 4.8 ppt so the filter is having some impact at that point. Out around 5,000 seconds the unit has a major hump. The Nortel GPSTM has a similar hump, but much closer in. It’s performance at 5K seconds is much better. The Lucent KS boxes beat this part across the entire range. That makes some assumptions, since there is no good ADEV data inside 100 seconds on the plot. The final question about the plot would be - what happens at longer tau? The run was stopped before it really got past the peak in the filter. It would be nice to see some data that at least gets back down to 1 ppt at the longer tau’s. Without that data it’s unclear how well the whole system is doing. That’s not to say it’s not doing well. It could be doing a great job, there’s just no way to know from the data. My guess is that this is very much like your counter project, just a bit further along. They have a nice looking unit, but are still trying to figure out the bugs and finish up the software … Bob On Dec 28, 2014, at 6:19 PM, Li Ang lll...@gmail.com wrote: Hi This unit is done by BG7TBL. In his store on taobao.com, there is a adev chart. Please refrer to this link http://item.taobao.com/item.htm?spm=a1z10.3.w4002-1278071728.49.XHJlQLid=42336500072 2014-12-29 1:56 GMT+08:00 Dan Rae dan...@verizon.net: On 12/28/2014 7:25 AM, David Smith wrote: Hello Friends, I found this new inexpensive GPSDO on ebay listed from a seller from China: Dave, these have been discussed in the past at some length on this list. I would point out that they use a re-cycled Morion OCXO. I have had two of these ovens from China; one worked fine, the other has a very high level of spurious outputs. I would be wary of using these in anything without first testing them thoroughly. Dan ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/ mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] New GPSDO on EBAY From China
You have to give the guy credit for trying. What is a shame here is that he did not publish the schematics and the source code. If anyone knows him he should just ask him. We tend to be sceptics here but that's the nature of the game. However, I don't want anyone to think that we are elitist. I remember my first GPSDO, by Brooks Sherra, on QST. I remember reading the schematic and the source code many times until I got it. It is the reason I got interested in time-nuts to begin with. So, I think we would all benefit from going a bit deeper on this new unit. I hope the designer is reading this. GKH, N2FGX On 12/29/2014 12:50 AM, Charles Steinmetz wrote: Li Ang wrote: This unit is done by BG7TBL. In his store on taobao.com, there is a adev chart. Please refrer to this link That ADEV chart (see below) raises more questions than it answers. At least the time constant is not too short (a very common problem with DIY GPSDOs). But when the GPS takes over above the crossover (tau ~ 5000 seconds), the ADEV is ~2e-11. GPS should be significantly better than this at 5000 seconds. It appears that something is wrong with the design. Best regards, Charles ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Downloaded HPs SmartClock / Size of Lucent modules.
Clearly off-topic, but hopefully it will stop here... The Dell supplies use a 3 wire cable and have a resistor in the power supply connecting the 3rd wire to ground. The value of that resistor tells the laptop the current capability of the supply (they have various models between 3.0 and 4.5A) so that the laptop can determine if it will have enough current to run. This is mostly applicable when the laptop is plugged into a docking station, because the current demand is then quite a bit higher. If the laptop cannot read the resistor value, it may refuse to run (or ask you to press F1 to force it to run anyhow) The 3rd wire is pretty small (because it carries negligible current) and it is sometimes the first one to break. You are then left with a perfectly usable 19.5V power supply that cannot power a Dell laptop but that is fine for many GPSDO and Rb oscillators :) Didier KO4BB On Sun, Dec 28, 2014 at 10:11 PM, Gerhard Hoffmann dk...@arcor.de wrote: Am 29.12.2014 um 00:39 schrieb Dr. David Kirkby (Kirkby Microwave Ltd): 2) Can anyone with these $150 two-part Lucent boxes tell me the size of them. The box itself: 65mm high, 152 mm deep, 244 mm wide Front plate: 76 mm high, 274 mm wide Just a little bit to big to fit into a 4 HU 19 box ( for both). (still doing a night shift on the 5-10MHz doubler, filter 5 chan. distrib amp for it. Or 4 chan 10 dBm 10 MHz one 1pps on SMA ) BTW I once bought a generic chinese power supply as a fallback solution for my Dell laptop. That turned out not to work because Dells talk to their PS. Nobody else seems to do that. It now powers my Lucent duo. I saw that the PS has an additional 12V input. That may ease the task of emergency power from a lead or Li-IronPhosphate battery. regards, Gerhard ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/ mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] schematics of frequency counter
Hi,
Darn, not reading all the notes. Again.
Well, in that case, scaling should be done... then you get average of
198,5075 ns and 149,8 ps RMS jitter, with 1,1 ns peak-to-peak.
The jitter is okish then, but a little better would indeed be nice.
Cheers,
Magnus
On 12/29/2014 01:55 PM, Li Ang wrote:
Hi Magnus,
The unit of these data is not ns but reference clock cycles (100ns).
TDC_GP22 measures the time between the edge of tdc_start and
tdc_stop1, then it measures the reference clock automaticly. The result you
get from it is the ratio of them.
2014-12-29 19:58 GMT+08:00 Magnus Danielson mag...@rubidium.dyndns.org:
Hi,
Some quick statistic-processing.
Histogram of your data:
1.979 0
1.980 2
1.98146
1.982 173
1.983 523
1.984 1031
1.985 1301
1.986 1131
1.987 648
1.988 236
1.989 8
1.990 1
1.991 0
The total sample count is 5100 (wc -l only gives 5099 since there is a
missing end of line, but word count is 5100).
The average is about 1,985075 ns and it is reasonably gaussian, but with
some systematics, notice how the slope is more abrupt on the higher end
than the lower end. A quick and dirty spreadsheet gives me about 2,243 ps
RMS jitter, which isn't all that bad. Yes, it will spread out to that 11 ps
peak-to-peak jitter, but it is to be expected.
It's pretty respectable for a home-built.
Cheers,
Magnus
On 12/28/2014 03:19 PM, Li Ang wrote:
Hi Bob,
I did some test according to your suggestions. DUT is a symmetricom
x72
rb oscillator. Also, I've tried signal generator as the DUT. RS SMY01 is
not as good as HP8662A but that the best I've got. The signal geneator is
also using FE5650 as ref clock.
According to my test with the TDC today, this unit is not producing
very
stable data.
I don't have accurate pulse generator, so this is how I test the TDC:
0) power the board with battery.
1) use FPGA to generate time pulse:
reg [15:0] shift;
always @(posedge refclk10M) begin
shift = {shift[14:0], sw_gate};
end
assign tdc_start = shift[3];
assign tdc_stop1 = shift[5];
2) use MCU to pull down sw_gate, the FPGA sync it to refclk10M domain and
generate input signal for TDC.
3) use TDC to test the time betwen tdc_start and tdc_stop1
The result is in tdc_test.zip. number * 100ns = time between tdc_start and
tdc_stop1. (TDC highspeed clock is refclk10M/2).
There 2 issues from the test:
1) As we can see from the data, the number is around 1.98x not 2.00x. So
there is about 2ns delay between tdc_start and tdc_stop1 for this simple
test code. If it is from the PCB trace and something inside FPGA, this
part
should be a constant value at certain temperature. I can calculate it by
measuring 2 cycles and 3 cylces. My current code has not implement this
part, it should provide some improvement. 2ns time error for 1s gate, that
is something.
2) For a 90ps TDC, I think the result should be something like +-0.001
cycle. But I get something like +-0.003 cycle. I do not know the reason
for
now.
2014-12-27 22:58 GMT+08:00 Bob Camp kb...@n1k.org:
Hi
(In reply to several posts. It’s easier for me this way)
Ok, that’s good news !!! (and useful data)
Your counter performance degraded a bit when you put in 5 db and not much
when you put in 8 db.
It’s also maybe *too* good news. I suspect that cross talk between the
channels may be impacting your results.
Next step is to try it with two independent sources and a bit more
attenuation. When you try it with two sources, you need to attenuate
first
one source and then switch the attenuators to the other source. That will
help you see if crosstalk from one channel is more of a problem than from
the other channel.
One parts hint:
Cable TV attenuators are much cheaper than their fancy 50 ohm
MIniCircuits
cousins. They are also something you can pick up down at the corner
electronics store. For this sort of testing they are perfectly fine to
use.
At this point in the testing the mismatch between 75 ohms and 50 ohms is
not a big deal. You will need to adapt connectors, but you probably still
will save money.
===
Op-amps that have enough bandwidth and performance for a high input
impedance counter input are rare items. They also are not cheap. Often
they
come as some sort of current feedback part with low(er) input impedance.
If
you want your counter to work to 300 MHz, it should accept a 300 MHz
square
wave. That might mean passing the third or even the fifth harmonic of the
square wave. An input channel with 900 or 1500 MHz bandwidth is quite a
challenge.
One very simple solution is to just grab a high speed comparator like the
one used by Fluke / Pendulum (ADCMP565). Drive it directly with your
input
or clock. Make it your front end device. That’s not an ideal solution,
but
it will give you the bandwidth and a reasonable input impedance. It
requires messy things like a negative supply or a “fake” ground (so
would
the op amp). It also has an ECL output that needs to be converted to
match
your FPGA (
Re: [time-nuts] schematics of frequency counter
Hi
On Dec 29, 2014, at 7:55 AM, Li Ang lll...@gmail.com wrote:
Hi Magnus,
The unit of these data is not ns but reference clock cycles (100ns).
TDC_GP22 measures the time between the edge of tdc_start and
tdc_stop1, then it measures the reference clock automaticly. The result you
get from it is the ratio of them.
2014-12-29 19:58 GMT+08:00 Magnus Danielson mag...@rubidium.dyndns.org:
Hi,
Some quick statistic-processing.
Histogram of your data:
1.979 0
1.980 2
1.98146
1.982 173
1.983 523
1.984 1031
1.985 1301
1.986 1131
1.987 648
1.988 236
1.989 8
1.990 1
1.991 0
One way you can get a “chopped tail” like that is when a TDC runs out of range.
That can happen either because there is a problem in the TDC or in other cases
because there is a handoff problem between the FPGA and the TDC. I saw a lot of
plots like this doing the Wave Union TDC stuff on an FPGA setup.
Bob
The total sample count is 5100 (wc -l only gives 5099 since there is a
missing end of line, but word count is 5100).
The average is about 1,985075 ns and it is reasonably gaussian, but with
some systematics, notice how the slope is more abrupt on the higher end
than the lower end. A quick and dirty spreadsheet gives me about 2,243 ps
RMS jitter, which isn't all that bad. Yes, it will spread out to that 11 ps
peak-to-peak jitter, but it is to be expected.
It's pretty respectable for a home-built.
Cheers,
Magnus
On 12/28/2014 03:19 PM, Li Ang wrote:
Hi Bob,
I did some test according to your suggestions. DUT is a symmetricom
x72
rb oscillator. Also, I've tried signal generator as the DUT. RS SMY01 is
not as good as HP8662A but that the best I've got. The signal geneator is
also using FE5650 as ref clock.
According to my test with the TDC today, this unit is not producing
very
stable data.
I don't have accurate pulse generator, so this is how I test the TDC:
0) power the board with battery.
1) use FPGA to generate time pulse:
reg [15:0] shift;
always @(posedge refclk10M) begin
shift = {shift[14:0], sw_gate};
end
assign tdc_start = shift[3];
assign tdc_stop1 = shift[5];
2) use MCU to pull down sw_gate, the FPGA sync it to refclk10M domain and
generate input signal for TDC.
3) use TDC to test the time betwen tdc_start and tdc_stop1
The result is in tdc_test.zip. number * 100ns = time between tdc_start and
tdc_stop1. (TDC highspeed clock is refclk10M/2).
There 2 issues from the test:
1) As we can see from the data, the number is around 1.98x not 2.00x. So
there is about 2ns delay between tdc_start and tdc_stop1 for this simple
test code. If it is from the PCB trace and something inside FPGA, this
part
should be a constant value at certain temperature. I can calculate it by
measuring 2 cycles and 3 cylces. My current code has not implement this
part, it should provide some improvement. 2ns time error for 1s gate, that
is something.
2) For a 90ps TDC, I think the result should be something like +-0.001
cycle. But I get something like +-0.003 cycle. I do not know the reason
for
now.
2014-12-27 22:58 GMT+08:00 Bob Camp kb...@n1k.org:
Hi
(In reply to several posts. It’s easier for me this way)
Ok, that’s good news !!! (and useful data)
Your counter performance degraded a bit when you put in 5 db and not much
when you put in 8 db.
It’s also maybe *too* good news. I suspect that cross talk between the
channels may be impacting your results.
Next step is to try it with two independent sources and a bit more
attenuation. When you try it with two sources, you need to attenuate
first
one source and then switch the attenuators to the other source. That will
help you see if crosstalk from one channel is more of a problem than from
the other channel.
One parts hint:
Cable TV attenuators are much cheaper than their fancy 50 ohm
MIniCircuits
cousins. They are also something you can pick up down at the corner
electronics store. For this sort of testing they are perfectly fine to
use.
At this point in the testing the mismatch between 75 ohms and 50 ohms is
not a big deal. You will need to adapt connectors, but you probably still
will save money.
===
Op-amps that have enough bandwidth and performance for a high input
impedance counter input are rare items. They also are not cheap. Often
they
come as some sort of current feedback part with low(er) input impedance.
If
you want your counter to work to 300 MHz, it should accept a 300 MHz
square
wave. That might mean passing the third or even the fifth harmonic of the
square wave. An input channel with 900 or 1500 MHz bandwidth is quite a
challenge.
One very simple solution is to just grab a high speed comparator like the
one used by Fluke / Pendulum (ADCMP565). Drive it directly with your
input
or clock. Make it your front end device. That’s not an ideal solution,
but
it will give you the
Re: [time-nuts] Soekris without a GPS receiver.
On Mon, Dec 29, 2014 at 7:02 AM, David J Taylor david-tay...@blueyonder.co.uk wrote: Using a mixture of PPS and local servers is exactly what I was aiming for, but: - NTPns doesn't support my PPS source I don't understand this. But getting a compatible GPS seems reasonable to move forward. - for testing, using local servers alone, even the seconds don't get named correctly, even though NTPns shows they are being detected and one is even marked as SELECTED. This would be the part where I said reach out to PHK regarding NTPns. Getting back to the try -- I assume you've read http://www.febo.com/pages/soekris/. Notice that while the gpio results are a win over the serial port they're nothing to write home about although that may be because he used ntp rather than NTPns. [columns are host, refid, delay, offset, jitter] His Soekris numbers (presumably 10Mb ethernet): -tock.febo.com .GPS. 1.012 -0.117 0.499 +tick.febo.com .PPSC. 0.990 -0.052 0.729 My numbers (typical desktop with serial PPS talking to a dedicated ntp server also using serial PPS): *ntpa .GPPS. 0.179 0.003 0.003 Or the Raspberry Pi and its jittery network interface: +rPi1 .GPPS. 0.436 -0.006 0.036 So for a try you could build a low-latency, high-res time-stamper (per PHK) based on a 4501 but you can't get that precision out of the box so it's of limited practical use. It sounds like you want something practical but I'm not sure. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Soekris without a GPS receiver.
On Mon, Dec 29, 2014 at 4:02 AM, David J Taylor david-tay...@blueyonder.co.uk wrote: - NTPns doesn't support my PPS source - for testing, using local servers alone, even the seconds don't get named correctly, even though NTPns shows they are being detected and one is even marked as SELECTED. Why not run the normal ntpd? Seems it would do what you want. I don't see how a PPS source can NOT be supported. I'm talking about just the 1Hz square wave signal, no serial data. Just like ntpd's type 22 clock. See this http://www.eecis.udel.edu/~mills/ntp/html/drivers/driver22.html It is just a signal of the correct voltage, no data. -- Chris Albertson Redondo Beach, California ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
[time-nuts] Lucent KS-24361 power connector
I am making up cables with slide latches for the Lucent KS-24361. Questions: * Are pins (Pin3 - Pin 9) in the P1 / DE-9 power connector assigned, or spare? * Has anyone determined the pin out for J3 / DE-9 alarm connector? Martin Flynn ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Lucent KS-24361 power connector
Hi As far as anybody knows, the only pins on the power plug are the two assigned to power in. The rest are unused. The alarm outputs are a couple of opto isolator outputs. As yet, nobody seems to know what they do. The pins are 5,6 and 7,8. Bob On Dec 29, 2014, at 7:14 PM, Martin A Flynn mafl...@theflynn.org wrote: I am making up cables with slide latches for the Lucent KS-24361. Questions: * Are pins (Pin3 - Pin 9) in the P1 / DE-9 power connector assigned, or spare? * Has anyone determined the pin out for J3 / DE-9 alarm connector? Martin Flynn ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
[time-nuts] Are these PRS10's worth it ?
Hi all, Been on the lookout for a PRS10 to build a GPSDO+RB arrangement and I see these... http://www.ebay.com/itm/Stanford-Research-Systems-SRS-PRS10-Rubidium-Freq-Standard-12344101-08-no-lock-/231435472155 Is this just a reheat-the-bulb fix or do you suspect something more ? Not knowing much about the PRS10, I'm just wondering if its worth the ri$k :) thanks Tim -- VK2XAX :: QF56if23 :: BMARC :: WIA :: AMSATVK ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
