Re: [time-nuts] Harmonics suppression in ring oscillators
On Fri, 20 Mar 2015 21:26:44 -0700 Hal Murray hmur...@megapathdsl.net wrote: dmend...@gmail.com said: You mean in a coaxial cable in a loop? It would be very fun... more points if you use a directional coupler to put the pulse in the loop. Anyhow I doubt it would settle to 1 :) I was thinking of an amplifier in there someplace so the pulse wouldn't decay simply due to the cable loss. This is the description of how a delay line oscillator works. While it is similar to a ring oscillator, there are certain things that do not work exactly the same way. Rubiolas book[1, chapter 5] contains a nice description of delay line oscillators and their performance. Attila Kinali [1] Phase Noise and Frequency Stability in Oscillators, by Enrico Rubiola, 2008 -- _av500_ phd is easy _av500_ getting dsl is hard ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Harmonics suppression in ring oscillators
On Tue, 17 Mar 2015 11:28:59 +0100 Attila Kinali att...@kinali.ch wrote: So, how do people keep ring oscillators from oscillating at higher modes? So far, my google skills have failed me to turn up any answer. Ok, sofar i've dug up two papers (and a comment on one) that explicitly deal with harmonics generation in ring oscillators. One is by Sasaki [1] and quite old the other is current enough that it seems applicable today. Sasaki[1] argues, that process variations between transistors will prevent harmonics in small rings (see also comments in [2]), but cannot be prevented reliably in large rings. Bushan and Ketchen[3] on the other hand say nothing about harmonics in long or short rings, but say that the proper startup sequence will inject only a single edge into the ring. Attila Kinali [1] Higher Harmonic Generation in CMOS/SOS Ring Oscillators, by Nobuo Sasaki, 1982 http://dx.doi.org/10.1109/T-ED.1982.20696 [2] Comments on 'Higher harmonic generation in CMOS/SOS ring oscillators', by T.W. Huston, 1983 http://dx.doi.org/10.1109/T-ED.1983.21244 [3] Generation, Elimination and Utilization of Harmonics in Ring Oscillators, by Manjul Bushan, Mark B. Ketchen, 2010 http://dx.doi.org/10.1109/ICMTS.2010.5466847 -- _av500_ phd is easy _av500_ getting dsl is hard ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Harmonics suppression in ring oscillators
Am Thu, 19 Mar 2015 22:26:15 +0100 schrieb Attila Kinali att...@kinali.ch: Moin, On Thu, 19 Mar 2015 21:50:03 +0100 Florian Teply use...@teply.info wrote: My guess would be slightly different: the fundamental mode of oscillation could be considered the lowest energy state of all oscillation modes. Assuming that the system wants to minimize energy, this would be the mode to choose if it can't get into a steady state. But here we are back in wild guess land, and I'm not even sure that the concept of minimum energy states has any meaning in this context. That argumentation would work if all oscillation modes would have a single, global energy source with a rate(power) limit. An example for this are, e.g. lasers. There, the one mode with the highest gain will suck up all energy from the other modes. And the pump source replenishes the energy at a fixed, limted rate. But in a ring oscillator, the energy is provided for each element seperately and replenished as needed. Ie there is no competition for energy between the different modes (all switching edges walk around with the same speed and there are never two edges at the same gate). Umm, it might be not as clear a situation for CMOS technologies compared to lasers, but still there are some analogies to that as well: The Power supplies on chip are to some degree a limiting factor here. Higher Frequencies mean switching more often, and with standard loads in CMOS being capacitive, that translates to charging and discharging capacitors more often (=more average current consumption), which locally can often have a significant effect on voltage as CMOS gates become slower when the supply voltage is reduced. Usually not to the extent though that makes higher oscillation modes totally impossible... Hmm... maybe the assumption that all edges walk around at the same speed is wrong? Well, in general this assumption is wrong, as by definition the gate delay as used in the definition of the oscillation frequency of an RO is anything but constant. At least for common CMOS technologies, there are several pitfalls: The gate delay as measured by oscillation frequency is the average of the propagation delays for both rising and faling edges. I have yet to come across a single combination of CMOS process and Digital Core Library that actually has balanced propagation delays, that is, equal numbers for both rising and falling edge. Commonly, falling edges (on the output) are somewhat faster than rising edges as n-Channel MOS transistors tend to have higher saturation currents than p-Channel types, and Core Cell Libraries usually are riddled with design tradeoffs in that regard. And as mentioned above, higher switching frequencies translate to lower effective power supply voltage locally at the gate, also increasing propagation delays. Then there is power dissipation, which is roughly linear with frequency. Add in the dependency of transistor parameters on temperature and thermal time constants on chip and you're getting closer to the effects that play a role in the data-dependent jitter Hal Murray mentioned in his answer. And there's even more that plays a role. Think of global and local mismatch between devices, process variation (which does not need to be uniform for both n- and p-Channel devices, and only in very rare cases affects both types in the same way so as to keep the drive balance between both). Of course, all of this CAN be addressed analytically (that is, in circuit simulations before manufacturing) and fed back for optimization, but in the semiconductor industry this is not commonly done as it would need to take into account way too many variables which are unknown to the ASIC Design Engineer, and often can not be known a priori. Best regards, Florian ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Harmonics suppression in ring oscillators
Hmm... maybe the assumption that all edges walk around at the same speed is wrong? It's really really hard to make things like edges travel at exactly the same speed. If it isn't exact, then one will eventually catch up with another and self destruct. The signal integrity wizards discuss eye patterns for multi gigabit serial links. They now divide jitter into two parts: random and data-dependent. If you have a long string of 0s as compared to a single 0 between 1s, the data line will have a chance to get closer to a solid low. Starting from closer to 0 takes slightly longer to make a transition. You can see it in the eye diagram. Does anybody have a scope on a ring oscillator? Is the signal symmetric? If not, that says that the H-L transition travels at a different speed than the L-H transition. Actually, just looking at the prop times on a gate mignt be good enough. The ring is just a handy signal generator. It would be fun to make a ring with no inverters, inject a pulse, and watch to see how long it lasts. I'll bet there is matastability type math that depends on the width of the pulse. If you get the width exactly right it will last a long time. Too long and it settles to all 1s. Too short and it settles to all 0s. -- These are my opinions. I hate spam. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Harmonics suppression in ring oscillators
On 20/03/2015 04:01, Hal Murray wrote: It would be fun to make a ring with no inverters, inject a pulse, and watch to see how long it lasts. I'll bet there is matastability type math that depends on the width of the pulse. If you get the width exactly right it will last a long time. Too long and it settles to all 1s. Too short and it settles to all 0s. You mean in a coaxial cable in a loop? It would be very fun... more points if you use a directional coupler to put the pulse in the loop. Anyhow I doubt it would settle to 1 :) Daniel ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Harmonics suppression in ring oscillators
dmend...@gmail.com said: You mean in a coaxial cable in a loop? It would be very fun... more points if you use a directional coupler to put the pulse in the loop. Anyhow I doubt it would settle to 1 :) I was thinking of an amplifier in there someplace so the pulse wouldn't decay simply due to the cable loss. -- These are my opinions. I hate spam. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Harmonics suppression in ring oscillators
On Wed, 18 Mar 2015 21:19:55 +0100 Florian Teply use...@teply.info wrote: Good, I am not alone.. I felt stupid not being able to find something this basic. Maybe we are stupid not being able to find something this basic, but then we're stupid together, so at least we have company ;-) :-) Hm.. so only odd harmonics? What prevents the even harmonics? Now you got me thinking... Based on my train of thought of yesterday, the prevention of even harmonics is caused by the need of an odd number of stages. Now as I rethink about it I'm no longer sure that there couldn't possibly any even harmonic. From what it seems to me now, it doesn't even need to have an odd number of stages, it just happens to need to have an odd number of INVERTING stages for it to self-start oscillation reliably. Yes, I have seen reports of ring oscillators with even number of inverters. But all of them said that they needed to kick the oscillator to reliably start it. And yes, if you look at an inverter as an analog amplifier with a negative amplification that is non-linearly dependent on its input, then it is not clear at all, why there aren't any harmonics, both odd or even. My only guess is, that the R_DS_on of the transistors, together with the C_GS of the next stage form a first order low-pass filter that dampens the higher modes, such that the Barkhausen Criteria is violated. I would like to do a simulation of this to get some understanding, but i'm lacking the right simulation software and data of real transistors. (the disadvantage of being in an theoretical computer science group) Ok, so you are saying, that if you start the ring oscillator in the right way, you get only the fundamental mode. What prevents higher modes from apearing during runtime? What happens if a particle passes trough the oscillator and switches one of the transistors? Well, assuming that we are talking about sane environments (which your mentioning of particle strikes basically renders null and void, pointing to either high energy physics or space applications which can not be considered sane in this context due to their posssibility to switch logic states in circuits), all possible causes of introduction of higher order oscillation are excluded by definition ;-) Joking aside, the case that one cell is switched should be covered above. Well.. SEUs are common enough on earth that, if you are talking about high reliability, you need to take them into account. Of course if you are going into space, then it's a rather common event. The goal of what I am doing here is to have a clocking system that can withstand arbitrary faults and self-stabilize again after a number of nodes (not necessarily all) regain their composure and start working correctly again. Part of that is asking all those what if... questions that usually get discarded because they have low probability or because people think that the system will stabilize again in that case... maybe. Hmm, I'm already mentally sorting the list of past and potential project partners to see where this might lead. In any case, should you come close to Frankfurt (or Berlin for that matter), notify me so we can have a beer together. If it's on my boss, even better ;-) I definitly will :-) Attila Kinali -- It is upon moral qualities that a society is ultimately founded. All the prosperity and technological sophistication in the world is of no use without that foundation. -- Miss Matheson, The Diamond Age, Neil Stephenson ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Harmonics suppression in ring oscillators
Am Thu, 19 Mar 2015 14:17:58 +0100 schrieb Attila Kinali att...@kinali.ch: On Wed, 18 Mar 2015 21:19:55 +0100 Florian Teply use...@teply.info wrote: Good, I am not alone.. I felt stupid not being able to find something this basic. Maybe we are stupid not being able to find something this basic, but then we're stupid together, so at least we have company ;-) :-) Hm.. so only odd harmonics? What prevents the even harmonics? Now you got me thinking... Based on my train of thought of yesterday, the prevention of even harmonics is caused by the need of an odd number of stages. Now as I rethink about it I'm no longer sure that there couldn't possibly any even harmonic. From what it seems to me now, it doesn't even need to have an odd number of stages, it just happens to need to have an odd number of INVERTING stages for it to self-start oscillation reliably. Yes, I have seen reports of ring oscillators with even number of inverters. But all of them said that they needed to kick the oscillator to reliably start it. And yes, if you look at an inverter as an analog amplifier with a negative amplification that is non-linearly dependent on its input, then it is not clear at all, why there aren't any harmonics, both odd or even. Well, possibly a circuit design guy can shed some light onto that. I myself am more a technology guy. I simply use ring oscillators to assess device degradation as they are pretty simple to measure and provide easy numbers. After all, they are much easier to continuously monitor than, say, I-V-curves of a single transistor... My only guess is, that the R_DS_on of the transistors, together with the C_GS of the next stage form a first order low-pass filter that dampens the higher modes, such that the Barkhausen Criteria is violated. Well, indeed the R_DS_on and C_GS of the next stage do form a simple RC low pass filter. But the time constant of that is essentially the gate delay, and thus would allow for the higher harmonics. So, at these harmonics there is still sufficient gain for oscillation. After all, the output load for each stage does not change depending on the number of stages in the chain, so why should some cell that can oscillate at high frequencies in a 3 stage ring oscillator suddenly be unable to do so just because now there might be 303 stages. My guess would be slightly different: the fundamental mode of oscillation could be considered the lowest energy state of all oscillation modes. Assuming that the system wants to minimize energy, this would be the mode to choose if it can't get into a steady state. But here we are back in wild guess land, and I'm not even sure that the concept of minimum energy states has any meaning in this context. I would like to do a simulation of this to get some understanding, but i'm lacking the right simulation software and data of real transistors. (the disadvantage of being in an theoretical computer science group) Ok, so you are saying, that if you start the ring oscillator in the right way, you get only the fundamental mode. What prevents higher modes from apearing during runtime? What happens if a particle passes trough the oscillator and switches one of the transistors? Well, assuming that we are talking about sane environments (which your mentioning of particle strikes basically renders null and void, pointing to either high energy physics or space applications which can not be considered sane in this context due to their posssibility to switch logic states in circuits), all possible causes of introduction of higher order oscillation are excluded by definition ;-) Joking aside, the case that one cell is switched should be covered above. Well.. SEUs are common enough on earth that, if you are talking about high reliability, you need to take them into account. Of course if you are going into space, then it's a rather common event. The goal of what I am doing here is to have a clocking system that can withstand arbitrary faults and self-stabilize again after a number of nodes (not necessarily all) regain their composure and start working correctly again. On the other hand, SEU are rare enough that most people couldn't spot them. After all, a crashing computer usually is blamed on Windows or some obscure software, but not on a bit flip caused by a rotten ion wandering around in the wrong place. It's only a very few people that actually are aware of Single Event Effects, and of these as far as I can tell, 99% work either in space business or in high energy physics. In commercial electronics, it has been a topic around the year 2000 when a great part of the industry had problems with trace impurities in their packaging materials, but quickly after that it reduced again to insignificance outside of military and space applications. Part of that is asking all those what if... questions that usually get discarded because
Re: [time-nuts] Harmonics suppression in ring oscillators
While for (optical/electrical) delay line oscillators, the way to go is to add a frequency selective element, this is not done for ring oscillators. So, how do people keep ring oscillators from oscillating at higher modes? I think the answer is that you don't have to do anything. It takes care of it by itself. Suppose you have a long string of buffers and 1 inverter in a ring. Suppose you start out with 3 transitions. That's the normal 1 transition with an extra pulse. The key idea is that the edges don't propagate at exactly the same speed. So one edge will catch up with another and they will self destruct. It would be fun to set that up and watch it on a scope. You could do that with 3 NAND gates. Feed a reset signal into the other side of all 3 gates. (watch the wire lengths) Maybe in a FPGA. -- These are my opinions. I hate spam. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Harmonics suppression in ring oscillators
On Tue, 17 Mar 2015 22:04:49 +0100 Florian Teply use...@teply.info wrote: funnily I stumbled across that very question just a few weeks ago while doing my very first ring oscillator designs myself. Good, I am not alone.. I felt stupid not being able to find something this basic. The explanation I have come to is essentially the following: In principle, you're right, a ring oscillator CAN oscillate at a number of frequencies. Given the way the ring oscillator works, the list of possible fundamental frequencies (not considering the spectrum due to the rectangular waveform with some duty cycle) is essentially given by (1+2k)/(2*n*td), with n being the number of stages (odd integer), td being the time delay of one stage (assuming all stages are identical), and k being any integer between 0 and (n-1)/2. Hm.. so only odd harmonics? What prevents the even harmonics? The trick here is to have one element in the chain that can be used to create a steady internal state from which oscillation can be started predictably. In the 11 stage ring oscillator mentioned above, that might be a NAND or NOR gate together with 10 inverters. With one input of that NAND or NOR being tied to the output of the chain and the other one being tied to a reset input, which can be used to enable or disable oscillation. A steady state would be reached within 11 gate delays in the sample oscillator mentioned above after DISABLING oscillation. One oscillation is reenabled, it will ONLY oscillate at 1/(22*td). Ok, so you are saying, that if you start the ring oscillator in the right way, you get only the fundamental mode. What prevents higher modes from apearing during runtime? What happens if a particle passes trough the oscillator and switches one of the transistors? Does that answer your question? Most likely it answered one and turned up three more ;-) Oh.. I have many questions! Too many actually ^^; Is there any good literature on ring oscillators? I have not been able to find anything substantial yet. It's just papers and books that highlight one particluar feature, but nothing else. BTW: Depending on how this project goes, we might work toghether with IHP on it. So I might potentially come over to Frankfurt Attila Kinali -- It is upon moral qualities that a society is ultimately founded. All the prosperity and technological sophistication in the world is of no use without that foundation. -- Miss Matheson, The Diamond Age, Neil Stephenson ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Harmonics suppression in ring oscillators
Attila, Aren't you just talking about the simple fact, that the perfect no-rise-time-gate ring oscillator will put out square waves? (Fundamental and all odd harmonics). Phase shift oscillators in the analog domain, especially the prototypical inverting-active-device-followed-by-three-60-degree-phase-shift-RC-lowpass networks, will typically have high harmonic content at the output of the active device and low harmonic content at the input to the active device. Tim N3QE On Tue, Mar 17, 2015 at 6:28 AM, Attila Kinali att...@kinali.ch wrote: Hi, I stumbled over something that does not seem to be properly documented anywhere. A ring oscillator (like any delay line oscillator) has an infinte number of poles (on the complex plane), which are on a straight line (disregarding the effect that the transistor acts like a first order low pass filter, as f_t is usually a lot higher than the oscillation frequency). This means that a ring oscillator will always excite more than just one mode and oscillate on multiple frequencies. While for (optical/electrical) delay line oscillators, the way to go is to add a frequency selective element, this is not done for ring oscillators. So, how do people keep ring oscillators from oscillating at higher modes? So far, my google skills have failed me to turn up any answer. Attila Kinali -- It is upon moral qualities that a society is ultimately founded. All the prosperity and technological sophistication in the world is of no use without that foundation. -- Miss Matheson, The Diamond Age, Neil Stephenson ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Harmonics suppression in ring oscillators
The modern digital model of gates having inputs and outputs is in fact a simplified case. It's unlikely that a digital logic student today would ever have been exposed to gate elements that can work bidirectionally (I'm not talking about tri-state, I'm talking about logic elements that have no preferred input vs output). In general, even symmetrical ring oscillator circuits using elements that do not have a preferred direction, will settle down into rotating one way or the other depending on infinitesimal details of initial conditions. See in particular the neon-light ring oscillator here: http://donklipstein.com/sillyne2.html This is an example of symmetry breaking, a term I learned in quantum electrodynamics class!, and the reason particles have mass! I don't actually understand the Higgs Boson but I do understand that neon light ring oscillator because I built it long before I took QED :-). Tim N3QE On Wed, Mar 18, 2015 at 4:28 AM, Hal Murray hmur...@megapathdsl.net wrote: While for (optical/electrical) delay line oscillators, the way to go is to add a frequency selective element, this is not done for ring oscillators. So, how do people keep ring oscillators from oscillating at higher modes? I think the answer is that you don't have to do anything. It takes care of it by itself. Suppose you have a long string of buffers and 1 inverter in a ring. Suppose you start out with 3 transitions. That's the normal 1 transition with an extra pulse. The key idea is that the edges don't propagate at exactly the same speed. So one edge will catch up with another and they will self destruct. It would be fun to set that up and watch it on a scope. You could do that with 3 NAND gates. Feed a reset signal into the other side of all 3 gates. (watch the wire lengths) Maybe in a FPGA. -- These are my opinions. I hate spam. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Harmonics suppression in ring oscillators
Am Wed, 18 Mar 2015 09:23:27 +0100 schrieb Attila Kinali att...@kinali.ch: On Tue, 17 Mar 2015 22:04:49 +0100 Florian Teply use...@teply.info wrote: funnily I stumbled across that very question just a few weeks ago while doing my very first ring oscillator designs myself. Good, I am not alone.. I felt stupid not being able to find something this basic. Maybe we are stupid not being able to find something this basic, but then we're stupid together, so at least we have company ;-) The explanation I have come to is essentially the following: In principle, you're right, a ring oscillator CAN oscillate at a number of frequencies. Given the way the ring oscillator works, the list of possible fundamental frequencies (not considering the spectrum due to the rectangular waveform with some duty cycle) is essentially given by (1+2k)/(2*n*td), with n being the number of stages (odd integer), td being the time delay of one stage (assuming all stages are identical), and k being any integer between 0 and (n-1)/2. Hm.. so only odd harmonics? What prevents the even harmonics? Now you got me thinking... Based on my train of thought of yesterday, the prevention of even harmonics is caused by the need of an odd number of stages. Now as I rethink about it I'm no longer sure that there couldn't possibly any even harmonic. From what it seems to me now, it doesn't even need to have an odd number of stages, it just happens to need to have an odd number of INVERTING stages for it to self-start oscillation reliably. If I'm not mistaken - which apparently could be a reasonable assumption - , any chain of elements that can be formed into a closed loop can be made to oscillate if a signal is injected somehow. Let's try an experiment of thought, using the smallest possible chain of even number of elements: 2 inverters connected in a feedback loop. Assuming they are in a stable condition: logic 0 at one node, logic 1 at the other. Looks pretty much like an SRAM cell without the access transistors... Anyways, if one injects a transient change on any of these two nodes, it will propagate to the other node. Unfortunately, this is a bad example as an injected change needs to be approximately one gate delay in duration or longer in order to be able to propagate indefinitely, yet if it is longer than one gate delay, it will stabilize the state of the circuit such that there is no oscillation. Now, assume a 4 stage inverter loop. If it powers up in a stable configuration, it will stay in that state unless anything else happens, just like the 2-stage inverter chain above. If we manage to inject a state flip for any period between 1 and 3 gate delays - at this point we don't care how we manage to do that -, we will have two transitions that will happily propagate through the chain indefinitely. Shorter than one gate delay and it will be extinguished after a while settling back to the original state, longer than 3 gate delays and it also will be extinguished, settling to the inverted original state. For the sake of argument, it doesn't matter if the stages are inverting or not as the total saturated loop gain will be 1 in any case. It just happens that in CMOS logic an inverter is the simples thing one can have, short of passive devices. In order to visualize it, here's a logic chart: Inverting Non-Inverting Initial:0101 Injection: 0111 0010 Inj.+1td: 0100 0001 Inj.+2td: 1101 1000 Inj.+3td: 0001 0100 Inj.+4td: 0111 0010 Inj.+5td: 0100 0001 I guess you can extend that if necessary, but it should have become clear that the injected bit flip actually triggered oscillation, even though the saturated loop gain is +1 and not -1. Still, for any ringoscillator to reliably start oscillation without external trigger, a saturated loop gain of -1 is mandatory. The trick here is to have one element in the chain that can be used to create a steady internal state from which oscillation can be started predictably. In the 11 stage ring oscillator mentioned above, that might be a NAND or NOR gate together with 10 inverters. With one input of that NAND or NOR being tied to the output of the chain and the other one being tied to a reset input, which can be used to enable or disable oscillation. A steady state would be reached within 11 gate delays in the sample oscillator mentioned above after DISABLING oscillation. One oscillation is reenabled, it will ONLY oscillate at 1/(22*td). Ok, so you are saying, that if you start the ring oscillator in the right way, you get only the fundamental mode. What prevents higher modes from apearing during runtime? What happens if a particle passes trough the oscillator and switches one of the transistors? Well, assuming that we are talking about sane environments (which your mentioning of particle strikes basically renders null and void, pointing to either high energy physics or space
Re: [time-nuts] Harmonics suppression in ring oscillators
Hi, funnily I stumbled across that very question just a few weeks ago while doing my very first ring oscillator designs myself. The explanation I have come to is essentially the following: In principle, you're right, a ring oscillator CAN oscillate at a number of frequencies. Given the way the ring oscillator works, the list of possible fundamental frequencies (not considering the spectrum due to the rectangular waveform with some duty cycle) is essentially given by (1+2k)/(2*n*td), with n being the number of stages (odd integer), td being the time delay of one stage (assuming all stages are identical), and k being any integer between 0 and (n-1)/2. So, an 11 stage ring oscillator could in principle support fundamental frequencies of 1/(22*td), 3/(22*td), 5/(22*td), 7/(22*td), 9/(22*td) and finally 11/(22*td). Which mode actually is triggered depends mainly on circumstances that are pretty hard to tell a priori: How is power applied, what is the mismatch between stages. In the end it boils down to noise triggering one mode or another upon powerup, with some modes being more likely than others due to minute imperfections in manufacturing. The trick here is to have one element in the chain that can be used to create a steady internal state from which oscillation can be started predictably. In the 11 stage ring oscillator mentioned above, that might be a NAND or NOR gate together with 10 inverters. With one input of that NAND or NOR being tied to the output of the chain and the other one being tied to a reset input, which can be used to enable or disable oscillation. A steady state would be reached within 11 gate delays in the sample oscillator mentioned above after DISABLING oscillation. One oscillation is reenabled, it will ONLY oscillate at 1/(22*td). So, as said, the trick is to have the ring oscillator start oscillation from a predetermined state. Does that answer your question? Most likely it answered one and turned up three more ;-) Best regards, Florian Am Tue, 17 Mar 2015 11:28:59 +0100 schrieb Attila Kinali att...@kinali.ch: Hi, I stumbled over something that does not seem to be properly documented anywhere. A ring oscillator (like any delay line oscillator) has an infinte number of poles (on the complex plane), which are on a straight line (disregarding the effect that the transistor acts like a first order low pass filter, as f_t is usually a lot higher than the oscillation frequency). This means that a ring oscillator will always excite more than just one mode and oscillate on multiple frequencies. While for (optical/electrical) delay line oscillators, the way to go is to add a frequency selective element, this is not done for ring oscillators. So, how do people keep ring oscillators from oscillating at higher modes? So far, my google skills have failed me to turn up any answer. Attila Kinali ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
[time-nuts] Harmonics suppression in ring oscillators
Hi, I stumbled over something that does not seem to be properly documented anywhere. A ring oscillator (like any delay line oscillator) has an infinte number of poles (on the complex plane), which are on a straight line (disregarding the effect that the transistor acts like a first order low pass filter, as f_t is usually a lot higher than the oscillation frequency). This means that a ring oscillator will always excite more than just one mode and oscillate on multiple frequencies. While for (optical/electrical) delay line oscillators, the way to go is to add a frequency selective element, this is not done for ring oscillators. So, how do people keep ring oscillators from oscillating at higher modes? So far, my google skills have failed me to turn up any answer. Attila Kinali -- It is upon moral qualities that a society is ultimately founded. All the prosperity and technological sophistication in the world is of no use without that foundation. -- Miss Matheson, The Diamond Age, Neil Stephenson ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
