Re: [time-nuts] Help improving impedance measurement by having a better clock
Hi I believe we are talking about material impedances here rather than electrical impedance. One of the weird things about this is that frequency (as in frequency accuracy) *can* be a contributor to the resultant error. Thus my original question about just what the concern actually is….. Bob > On Apr 8, 2018, at 4:52 PM, Brooke Clarke wrote: > > Hi Daniel: > > If you're concerned with accuracy of impedance measurements you might want to > spent a lot of time studying "The Impedance Measurement Handbook", it's the > bible for this. The way the measurement is made has a huge impact on the > accuracy. For example using a vector network analyzer to measure an > impedance that's not near 50 Ohms causes poor results. > http://prc68.com/I/Z.shtml#KeyDocs > For frequencies low enough to use 4 Terminal Pair, that's the way to go. > http://www.prc68.com/I/HP4274_4275_LCR.shtml#MeasMtd > > -- > Have Fun, > > Brooke Clarke > http://www.PRC68.com > http://www.end2partygovernment.com/2012Issues.html > > Original Message >> I´m a long time time-nuts lurker (I posted here just a dozen times). I make >> a few impedance measurement systems for material analysis (i´m a single man >> shop doing custom hardware for clients). Usually they´re based around a >> STM32F4 / F7 microprocessor: DAC generates sine signal (1-400KHz), ADCs >> measure them back, a few calculations later we have modulus / phase. I >> always used internal ADCs and DACs (12 bits each). >> >> I now want to use external ADCs and DACs with more bits to push the limits, >> but i´m afraid that the poor performance of the STM32 PLL that drives the >> clock will get in the way, so I plan to drive the "load" of both DAC and >> ADCs from an external signal derived from a TCXO using a clock divider. >> >> To get some sense of how much things are improving (or not) I need to >> somehow measure these clocks and get a meaningfull measurement about how >> good (or bad) they are. >> >> The tools I have are a Hameg HM8123 with a 10MHz OCXO I shoehorned inside >> and a Picotest U6200A with original OCXO. I can log period information from >> both using serial/USB port. I can make a histogram of the data. I don´t >> have any better idea about what to do and would like to hear from you :) >> >> Daniel >> ___ >> time-nuts mailing list -- time-nuts@febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> > > ___ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Help improving impedance measurement by having a better clock
Hi Daniel: If you're concerned with accuracy of impedance measurements you might want to spent a lot of time studying "The Impedance Measurement Handbook", it's the bible for this. The way the measurement is made has a huge impact on the accuracy. For example using a vector network analyzer to measure an impedance that's not near 50 Ohms causes poor results. http://prc68.com/I/Z.shtml#KeyDocs For frequencies low enough to use 4 Terminal Pair, that's the way to go. http://www.prc68.com/I/HP4274_4275_LCR.shtml#MeasMtd -- Have Fun, Brooke Clarke http://www.PRC68.com http://www.end2partygovernment.com/2012Issues.html Original Message I´m a long time time-nuts lurker (I posted here just a dozen times). I make a few impedance measurement systems for material analysis (i´m a single man shop doing custom hardware for clients). Usually they´re based around a STM32F4 / F7 microprocessor: DAC generates sine signal (1-400KHz), ADCs measure them back, a few calculations later we have modulus / phase. I always used internal ADCs and DACs (12 bits each). I now want to use external ADCs and DACs with more bits to push the limits, but i´m afraid that the poor performance of the STM32 PLL that drives the clock will get in the way, so I plan to drive the "load" of both DAC and ADCs from an external signal derived from a TCXO using a clock divider. To get some sense of how much things are improving (or not) I need to somehow measure these clocks and get a meaningfull measurement about how good (or bad) they are. The tools I have are a Hameg HM8123 with a 10MHz OCXO I shoehorned inside and a Picotest U6200A with original OCXO. I can log period information from both using serial/USB port. I can make a histogram of the data. I don´t have any better idea about what to do and would like to hear from you :) Daniel ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Help improving impedance measurement by having a better clock
On Sat, 7 Apr 2018 22:54:42 -0300 Daniel Mendes wrote: > I´m a long time time-nuts lurker (I posted here just a dozen times). I make > a few impedance measurement systems for material analysis (i´m a single man > shop doing custom hardware for clients). Usually they´re based around a > STM32F4 / F7 microprocessor: DAC generates sine signal (1-400KHz), ADCs > measure them back, a few calculations later we have modulus / phase. I > always used internal ADCs and DACs (12 bits each). The STM32's are known for their poorly performing ADCs and DACs, even using an external one with the same bit width will increase your performance. That said, what is your actual sample rate? I would guess, if you use the timer unit to generate the pulses, your jitter would be less than 10ps rms, probably even less than 1ps rms. 10ps rms limits your resolution to something like 14-15bit @500kHz, 1ps rms should be around 18bits, if I'm not mistaken. To measure the performance, I would just build the device and feed it with an appropriate sine wave. Then analyze the SNR and spurs of the sampled signal. Attila Kinali -- It is upon moral qualities that a society is ultimately founded. All the prosperity and technological sophistication in the world is of no use without that foundation. -- Miss Matheson, The Diamond Age, Neil Stephenson ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Help improving impedance measurement by having a better clock
Hi I’m not at all sure that the clocks will really get into the measurements. The PLL does have jitter, but it has zero frequency error. One way to get around the whole issue is to use an outboard device with its own clock. 400 KHz is a bit high for the integrated audio ADC / DAC parts. Drop down a bit and they will do quite well. Interface with an I2S port and away you go. That said, are you concerned about frequency error or jitter? If it’s frequency error, you can get that pretty well a number of ways. The gotcha is an accurate reference. A GPSDO is by far the cheapest way to solve that problem. If you are concerned about jitter, the next question is: over what range? It is reasonable to guess that the PLL follows the input to a pretty good degree for long time periods. At some point the PLL loop filter allows it to move around a bit. The issue here is that the loop filter likely is in the audio range. You are after jitter at time periods << 1 second. That gets a bit gear specific. You also are after numbers in the nanosecond (or sub nanosecond) range. That increases the complexity. So - what are you after? Bob > On Apr 7, 2018, at 9:54 PM, Daniel Mendes wrote: > > I´m a long time time-nuts lurker (I posted here just a dozen times). I make > a few impedance measurement systems for material analysis (i´m a single man > shop doing custom hardware for clients). Usually they´re based around a > STM32F4 / F7 microprocessor: DAC generates sine signal (1-400KHz), ADCs > measure them back, a few calculations later we have modulus / phase. I > always used internal ADCs and DACs (12 bits each). > > I now want to use external ADCs and DACs with more bits to push the limits, > but i´m afraid that the poor performance of the STM32 PLL that drives the > clock will get in the way, so I plan to drive the "load" of both DAC and > ADCs from an external signal derived from a TCXO using a clock divider. > > To get some sense of how much things are improving (or not) I need to > somehow measure these clocks and get a meaningfull measurement about how > good (or bad) they are. > > The tools I have are a Hameg HM8123 with a 10MHz OCXO I shoehorned inside > and a Picotest U6200A with original OCXO. I can log period information from > both using serial/USB port. I can make a histogram of the data. I don´t > have any better idea about what to do and would like to hear from you :) > > Daniel > ___ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
[time-nuts] Help improving impedance measurement by having a better clock
I´m a long time time-nuts lurker (I posted here just a dozen times). I make a few impedance measurement systems for material analysis (i´m a single man shop doing custom hardware for clients). Usually they´re based around a STM32F4 / F7 microprocessor: DAC generates sine signal (1-400KHz), ADCs measure them back, a few calculations later we have modulus / phase. I always used internal ADCs and DACs (12 bits each). I now want to use external ADCs and DACs with more bits to push the limits, but i´m afraid that the poor performance of the STM32 PLL that drives the clock will get in the way, so I plan to drive the "load" of both DAC and ADCs from an external signal derived from a TCXO using a clock divider. To get some sense of how much things are improving (or not) I need to somehow measure these clocks and get a meaningfull measurement about how good (or bad) they are. The tools I have are a Hameg HM8123 with a 10MHz OCXO I shoehorned inside and a Picotest U6200A with original OCXO. I can log period information from both using serial/USB port. I can make a histogram of the data. I don´t have any better idea about what to do and would like to hear from you :) Daniel ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
