Re: [time-nuts] TDC-GP22 vs TDC7200

2016-05-28 Thread Bob Camp
HI

It certainly sounds like the TDC 7200 is the way to go. Thanks for sharing !!

Bob

> On May 28, 2016, at 9:28 AM, Li Ang <379...@qq.com> wrote:
> 
> Hi
>I got 5 samples of TDC7200 from TI a few months ago. I have made a board 
> to test it with TDC-GP22 from ACAM. Actually it's a new board of my frequency 
> counter. The CPU system is changed from MCU to a OrangePi board. The digital 
> part is still a Cyclone 4 FPGA. 
> 
> 
> Verilog: http://www.qsl.net/bi7lnq/Projects/freqcnt4.2/100ns_noise_test.v
> Picuture: http://www.qsl.net/bi7lnq/Projects/freqcnt4.2/5.2.jpg
> Result: http://www.qsl.net/bi7lnq/Projects/freqcnt4.2/100ns_stdev.xls
> 
> 
>   The DC-DC part works at 4MHz (MP2560), it generates a lot of noise. (stdev 
> of 1000 measures is around 300ps).  It's a mistake to put that on board.  
> However, if the 5v is supplied by a HP E3630A, the performance is much more 
> stable.
>   The 100ns start-and-stop signal is generated by FPGA. I do not know if it's 
> a stable way to do that. The 10MHz ref clock is from one FE180 OCXO and 
> shaped by NC7SZU04.
>   The STDEV of 1000 measurements by TDC_GP22 is 70ps. (45ps double resolution 
> mode, STDEV is not given by the datasheet)
>   The STDEV of 1000 measurements by TDC7200 is 20ps. (datasheet: 55ps 
> resolution, 35ps STDEV RMS  )
> 
> 
>So I think the TDC7200 is a better choice for my homebrew frequency 
> counter. It's much more friendly to solder(TSSOP vs QFN). It's much more esay 
> to config(2 Hours of coding vs 2 weeks of debugging). It's a little more 
> expensive than TDC-GP22(9$ vs 4$).
> 
> 
> 
> 
> 
> 
> de BI7LNQ
> 73
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[time-nuts] TDC-GP22 vs TDC7200

2016-05-28 Thread Li Ang
Hi
I got 5 samples of TDC7200 from TI a few months ago. I have made a board to 
test it with TDC-GP22 from ACAM. Actually it's a new board of my frequency 
counter. The CPU system is changed from MCU to a OrangePi board. The digital 
part is still a Cyclone 4 FPGA. 


Verilog: http://www.qsl.net/bi7lnq/Projects/freqcnt4.2/100ns_noise_test.v
Picuture: http://www.qsl.net/bi7lnq/Projects/freqcnt4.2/5.2.jpg
Result: http://www.qsl.net/bi7lnq/Projects/freqcnt4.2/100ns_stdev.xls


   The DC-DC part works at 4MHz (MP2560), it generates a lot of noise. (stdev 
of 1000 measures is around 300ps).  It's a mistake to put that on board.  
However, if the 5v is supplied by a HP E3630A, the performance is much more 
stable.
   The 100ns start-and-stop signal is generated by FPGA. I do not know if it's 
a stable way to do that. The 10MHz ref clock is from one FE180 OCXO and shaped 
by NC7SZU04.
   The STDEV of 1000 measurements by TDC_GP22 is 70ps. (45ps double resolution 
mode, STDEV is not given by the datasheet)
   The STDEV of 1000 measurements by TDC7200 is 20ps. (datasheet: 55ps 
resolution, 35ps STDEV RMS  )


So I think the TDC7200 is a better choice for my homebrew frequency 
counter. It's much more friendly to solder(TSSOP vs QFN). It's much more esay 
to config(2 Hours of coding vs 2 weeks of debugging). It's a little more 
expensive than TDC-GP22(9$ vs 4$).






de BI7LNQ
73
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