Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[Forrest Christian (List Account)]

So, I happen to have a full low-volume SMD assembly line here... for our
own products (although I did have similar thoughts to John about spinning a
couple of carrier boards for these type of parts but designed so they are
suitable for assembly on our line).

Our take on QFN's is that they're not as bad as one would imagine,
especially if one extends the pads outside of the QFN footprint so you can
have a chance of reworking them, since most re-work issues are an issue of
a bit of flux and heating the solder up to melting point.   I still try to
avoid them if at all possible, because I hate something you can't easily
inspect, and QFN's are pretty much in that category.  The problem with
inspection being that you have to generally have expensive inspection
equipment, the most common being an x-ray machine, in order to really tell
if the part is soldered correctly.  If you don't have this, you pretty much
have to rely on a functional test which can be problematic since there are
a lot of solder defects which result in boards which test fine, yet are not
truly soldered correctly - which fail in the field.

But, everytime that I've relented and used them, they've been remarkably
trouble-free, often easier to deal with than an equivalent pitch TQFP since
bridges/soldering seem to happen less often than on a leaded part, and
usually these issues clear just by applying some flux and reheating the
joints. Assuming you find the bridge/defect in the first place.

The especially troublesome QFN's are the ones with 'interior pads' since
there is no easy way to see how well they soldered, and reworking those
joints are a challenge.   The single ground mostly-thermal pad ones aren't
too bad (such as the part we're talking about), with the caveat that you
have to put some thought into how to handle the ground vias so they don't
suck the all the solder from the pad into the via holes.  This usually
means plugged vias (aka small enough that the plating fills 100% of the
hole).  In addition there is a lot of discussion about how much voiding
(unsoldered area) is acceptable on that center pad, and the answer
generally is that "it depends". But, when soldering, with a reasonable
stencil design, you're going to typically get more than enough fill to not
have any problems.

The QFN's with multiple interior pads, I've tried successfully to stay away
from, since it seems that defects are much more likely on these.  Although
there's a voltage regulator wih this pad style that I've got my eye on that
I'm seriously considering.  But that one is unique in that the center pads
share vias with perimeter pads, so you can just run a single pad all the
way from the edge under the unit, so it would still be possible to reheat
the joint.

I understand that some people have had luck hand-soldering QFN's with the
center pads by adding good sized vias where heat and possibly solder can be
applied *through* the board.  I'm not sure I would trust this for
production, though.

As far as doing this at home in a toaster oven, I wouldn't be surprised if
it was not only possible but worked well, assuming everything else was
fine.   With modern pastes and components, the soldering process is
remarkably insensitive to variations.

One hint:  If you do want to experiment, there are 'dummy components'
available which could help with the verification process and cost less than
the real chips.   If you search for "QFN44 dummy component" you'll find
topline and maybe another vendor or two.  These are definitely less
expensive than expensive parts, but in most cases, I've also discovered
that I have been able to find some other very low cost 'real' component in
the same package.

NXP has a app note at
https://www.nxp.com/docs/en/application-note/AN1902.pdf which covers the
basics of what I described above.

One final note to mention:  Many/most QFN's are moisture sensitive.   This
pretty much means that once you open the package you have a limited amount
of time to either mount them, or put them in a dry box.  (or re-package
them in a moisture proof container with an appropriate dessicant pack).
 If this doesn't happen correctly, then the part absorbs enough moisture
from the air that when you bake it, the part cracks as it turns to steam.
 This is sometimes visible, sometimes not.  Either way, is causes
reliabilty issues.

The data I have access to indicates that the SI5340A is currently rated at
MSL2, which means that the 'open time' is 1 Year (assuming normal humidity
levels).  BUT... you never know until you get the package, and even then
you should double check with the manufacturer based on the exact
manufacturing date and factory.

On Thu, Jan 25, 2018 at 2:41 PM, Hal Murray  wrote:

>
> j...@febo.com said:
> > The challenge is that the chip is a 7x7 mm 44-QFN package and really
> wants
> > to be put on a six-layer circuit board.  That's doable, but  challenging,
> > for home assembly.
>
> Can anybody comment on the 

Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[David fav]

I used to do SMTIf the solder paste does not absorb moisture when
stored it should be OK

People have had success with an iron frying pan on the stove .
I have used a hot air paint stripper gun with a metal funnel to re flow the
paste.
There cheap  SMT re work  stations on Alibaba now <$100


On Thu, Jan 25, 2018 at 5:10 PM, Mark Sims  wrote:

> OSHSTENCILS.COM sells stencils by the square inch. They have 4 mil
> stainless, 3 mil Kapton, and 5 mil Kapton... I usually use the stainless
> ones.They also sell syringes of solder paste.   I keep mine in the
> fridge.I have year old paste that works fine.   There are now pastes
> that do not require refrigeration... I don't know how good they are.
>
> QFN44 pads are spaced 0.5mm.  You don't have to get the chip set down
> perfectly.  Surface tension will align it when the solder melts.   I've
> hand placed chip scale packages with like .25mm pads.
>
> I use a modified toaster oven.   My temperature control PID is derived
> from Lady Heather's temperature control algorithm.   There are a LOT of
> Arduino, etc reflow oven controllers out there.
>
> -
>
> > Can anybody comment on the toaster oven approach?
>
> Is it practical for things like this?  How much does a solder mask cost?
> How
> much other stuff do I need?  Does the solder paste need to be refrigerated
> and other quirks like that?
>
> What are the chances of a newbie getting a 44-QFN right on the first try?
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Re: [time-nuts] Slightly OT: interest in a four-output, > ultra-low jitter, synthesizer block?

[Joseph Gwinn]

On Thu, 25 Jan 2018 21:13:44 -0500, time-nuts-requ...@febo.com wrote:
> 
> Message: 2
> Date: Thu, 25 Jan 2018 16:16:59 -0500
> From: John Ackermann N8UR <j...@febo.com>
> To: time-nuts@febo.com
> Subject: Re: [time-nuts] Slightly OT: interest in a four-output,
>   ultra-low jitter, synthesizer block?
> Message-ID: <df6ea5f9-50b4-ecef-7eae-a7bc391fb...@febo.com>
> Content-Type: text/plain; charset=utf-8; format=flowed
> 
> Yes, I was planning to include bypasses, and I've been convinced to put 
> at least the 1.8V regulator on the board as well.  And to think about 
> the interconnects.

What I've seen widely done in circuits requiring low phase noise is to 
have a cascade of regulators, all but the last one (that feeds the RF 
component in question) beings switchers of different switching 
frequency, with simple low-pass filters between the regulators, and 
between the last regulator and the RF component being powered.
  Between the filtration due to the regulators and that due to the 
LPFs, one can achieve very large ripple and noise attenuations.


Joe Gwinn


 
> Adding the crystal does make the layout more complex -- they put a 
> ground pour on its own layer underneath it, and I think (but am not 
> sure) that the connections complicate selecting an external oscillator. 
> I'll look into the pain tradeoff.
> 
> On 01/25/2018 04:08 PM, Robert LaJeunesse wrote:
>> John, I appreciate your minimalist goal, but I'll second Bill's 
>> section about including the power supply voltage regulator and 
>> bypassing. Finding a good regulator with wideband line 
>> regulation/rejection could prove a real search, and such a fast chip 
>> as the Si5340 will need excellent broadband supply bypassing. So 
>> keep these key components tight to the chip, on the same PCB 
>> obviously. The need for a 4- to 6-layer board screams "keep critical 
>> loops tight"! FYI a regulator (of needed RF performance) producing 
>> 3.3V for VDDA will likely have an absolute max input voltage of 6V 
>> or so. Having a 5V supply requirement will not be a serious 
>> limitation of the overall system design. I'm sure you know the 1.8V 
>> supply regulators should not be fed from VDDA (3.3V), but I'll 
>> mention it anyway.
>> 
>> With that much on the PCB adding a small crystal can't add 
>> significantly to the cost, so why not? It allows R of the chip and 
>> outputs before having to hook up one's 10MHz reference. As such 
>> crystal quality / stability / etc. are of little concern - just size 
>> & cost.
>> 
>> I also like the previous suggestion of castellated connections on 
>> the board edge - easy to solder to a board and easy to solder wires 
>> to. If you make the castellations on 0.1" (or 2mm) centers then it 
>> becomes possible to use common header pins as well. Just keeping 
>> your options open there.
>> 
>> Bob L.
>> 
>>> Sent: Thursday, January 25, 2018 at 3:23 PM
>>> From: "John Ackermann N8UR" <j...@febo.com>
>>> To: time-nuts@febo.com
>>> Subject: Re: [time-nuts] Slightly OT: interest in a four-output, 
>>> ultra-low jitter, synthesizer block?
>>> 
>>> Hi Bill --
>>> 
>>> And that's exactly what I *don't* want to do. :-)  The reason is that I
>>> have several different projects in mind (and everyone else will have
>>> their own requirements) and only want to deal with the difficult package
>>> once.
>>> 
>>> The idea is to make a minimal carrier to deal with the tiny part and
>>> six-layer board.  Then all the ancillary stuff (including the MCU that's
>>> needed to program the chip) goes onto the board designed for that
>>> project.  This isn't intended to be a finished product, just a building
>>> block.
>>> 
>>> 73,
>>> John
>>> 
>>> On 01/25/2018 03:12 PM, wb6bnq wrote:
>>>> Hi John,
>>>> 
>>>> Thanks for the response.  Here is my 2 cents:
>>>> 
>>>> Well, due to the level of difficulty in chip mounting, I would prefer to
>>>> see a complete project. I.E., power supply for a single input of 12
>>>> volts and regulators the necessary chip values, proper input protection
>>>> for the 10 MHz input level and single ended outputs of the appropriate
>>>> levels (I am assuming more than 3 volts) or an amplifier stage for
>>>> arriving at such.  Equally have RF connectors (SMA would be good) on the
>>>> board perhaps.
>>>> 
>>>> Of course as cheap as possible, hi hi.  A carrier boa

Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[J. Grizzard]

Can anybody comment on the toaster oven approach?

Is it practical for things like this?  How much does a solder mask cost?  How
much other stuff do I need?  Does the solder paste need to be refrigerated
and other quirks like that?

What are the chances of a newbie getting a 44-QFN right on the first try?
If you have a toaster that you have modified to retain heat better and 
has an actual reflow controller, the toaster approach works /really/ 
well. The toaster I built follows the JEDEC-standard reflow profile 
pretty much to the letter, other than taking longer to cool down than it 
should (due to not having any sort of fan to move air). So as far as the 
solder and components are concerned, it's basically no different than a 
decent commercial reflow oven.


If you (or anyone) goes the toaster route, I really recommend getting a 
conversion kit -- I used the Controleo2 (from http://whizoo.com/) -- 
they have a v3 now with a graphical touchscreen. You want the kit 
(rather than just the controller) because a normal toaster oven just 
leaks too much heat, and won't heat up fast enough, so you need to do a 
bunch of other things to one to actually be able to hit your curves. 
(They have their whole build guide at http://whizoo.com/reflowoven, so 
you can see what you have to do. I built mine over a weekend. I believe 
their current kit comes with everything you need but the toaster (their 
previous kit required the addition of sealant, a tray, and the 
insulation blanket)).


It's basically fire-and-forget -- populate board, stick in oven, press 
'start', come back in a bit...


Stencils are pretty cheap (and fast!). I don't remember the exact price 
off the top of my head, but I did a not-small board recently (60x110mm), 
and the stencil (via OSHStencils) was less than $10, and got to me in 
two days, and they're pretty much the same stencils any assembly house 
would use.


The main problem with solder paste is that the flux degrades over time 
(and you /really/ want your flux). Refrigeration slows that down, but 
there's limits. You can, though, buy your solder paste in small 
quantities (I think a 15g syringe, which will do a pretty decent number 
of boards, is ~$15), so having it eventually go bad isn't that big a 
deal. People have reported getting ok results with years-old paste, 
though -- I suspect the results will be at least partially dependent on 
the details of your board design (how fine-pitch the footprints are, and 
such).


Odds of getting a 44-QFN right on the first try are pretty good. Neither 
the chip nor the solder paste need be perfectly aligned for things to 
work, at least if you're using a PCB with a proper soldermask. At that 
pitch, you could probably even just smear some solder paste over the 
pads, place the chip, and have success (though I still suggest a 
stencil). The biggest problem source (for me, at least) is getting /too 
much/ solder paste down (and ending up with bridge pins because there's 
just no other place for the solder to go), thus the use of a stencil...


-j
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Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[Mark Goldberg]

I have had very good luck with a converted toaster oven, GC-10 solder
paste, and OSH Stencils metal stencils. Basically, if the temperature
profile is good and you have good solder paste application, decent
placement, good solder mask and correct pad sizes, everything solders
itself. I have built 70 of my boards with zero solder defects. I use a 4
pin castellated part.

https://sites.google.com/site/markstcxo/
https://sites.google.com/site/markscontroleo2build/
https://drive.google.com/open?id=0B2gd5QRdoS7BVTRSNzZFTTB6RlU

In this case though, I would probably opt for the eval board at $150. I
have spent way too much time on my small board project and there are lots
of little details to getting a clean oscillator.

73,

Mark
W7MLG


On Thu, Jan 25, 2018 at 2:41 PM, Hal Murray  wrote:

>
> j...@febo.com said:
> > The challenge is that the chip is a 7x7 mm 44-QFN package and really
> wants
> > to be put on a six-layer circuit board.  That's doable, but  challenging,
> > for home assembly.
>
> Can anybody comment on the toaster oven approach?
>
> Is it practical for things like this?  How much does a solder mask cost?
> How
> much other stuff do I need?  Does the solder paste need to be refrigerated
> and other quirks like that?
>
> What are the chances of a newbie getting a 44-QFN right on the first try?
>
>
> --
> These are my opinions.  I hate spam.
>
>
>
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Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[jimlux]

On 1/25/18 1:18 PM, Hal Murray wrote:


lajeune...@mail.com said:

I'm sure you know the 1.8V supply regulators should not be fed from VDDA
(3.3V), but I'll mention it anyway.


usually, it's so that noise coupled back from the part doesn't back in 
through the 1.8V.


If you have a (say) 5V supply and you generate 3.3Vdd with one regulator 
and 1.8V with another regulator, you (should) have better isolation. 
Trees rather than cascades.





Why not?

That sounds like the sort of issue I should understand but I'm coming up
blank.




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Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[Bob kb8tq]

Hi

You can mod toaster ovens, they work ok, EEVB has *lots* of info on that. When 
you buy
your PCB you can get solder stencils at the same time. Bought as a package they 
are in the
$10 or so range. Without buying the boards with them, I’m sure the price goes 
up a bit. The
metal ones are a bit more than plastic ones.

Solder paste should be refrigerated if you want it to last. How long it will do 
sitting on the bench
is a “that depends” sort of thing. Amazon will send you a  (small) tube for $10 
or so. 

The whole “can you do it” depends a bit on how good your microscope is and how 
steady your
hands are. 

Again, EEVB is your friend if you really want to get into this.

Bob

> On Jan 25, 2018, at 4:41 PM, Hal Murray  wrote:
> 
> 
> j...@febo.com said:
>> The challenge is that the chip is a 7x7 mm 44-QFN package and really  wants
>> to be put on a six-layer circuit board.  That's doable, but  challenging,
>> for home assembly. 
> 
> Can anybody comment on the toaster oven approach?
> 
> Is it practical for things like this?  How much does a solder mask cost?  How 
> much other stuff do I need?  Does the solder paste need to be refrigerated 
> and other quirks like that?
> 
> What are the chances of a newbie getting a 44-QFN right on the first try?
> 
> 
> -- 
> These are my opinions.  I hate spam.
> 
> 
> 
> ___
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Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[Hal Murray]

lajeune...@mail.com said:
> Any non-zero output impedance and the digital load changes enter back in as
> noise on what should be the quiet VDDA. 

Thanks.   I missed the "A" on the VDDA.


-- 
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Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[Hal Murray]

j...@febo.com said:
> The challenge is that the chip is a 7x7 mm 44-QFN package and really  wants
> to be put on a six-layer circuit board.  That's doable, but  challenging,
> for home assembly. 

Can anybody comment on the toaster oven approach?

Is it practical for things like this?  How much does a solder mask cost?  How 
much other stuff do I need?  Does the solder paste need to be refrigerated 
and other quirks like that?

What are the chances of a newbie getting a 44-QFN right on the first try?


-- 
These are my opinions.  I hate spam.



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Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[Chris Caudle]

On Thu, January 25, 2018 3:08 pm, Robert LaJeunesse wrote:
> but I'll second Bill's section about including the power
> supply voltage regulator and bypassing.

Many of the SiLabs devices have on chip regulators, some of those may be
worth investigating.

-- 
Chris Caudle


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Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[Robert LaJeunesse]

The problem comes if the load current on the 1.8V regulator sees significant 
ups and downs. Think output regulator in particular. Might also happen with the 
digital core if major rollovers align and the core spikes. Those current 
changes get spread (admittedly reduced, too) by the bypass caps, resulting in 
noticeable load changes on the VDDA regulator. Any non-zero output impedance 
and the digital load changes enter back in as noise on what should be the quiet 
VDDA.

> Sent: Thursday, January 25, 2018 at 4:18 PM
> From: "Hal Murray" <hmur...@megapathdsl.net>
> To: "Discussion of precise time and frequency measurement" 
> <time-nuts@febo.com>
> Cc: hmur...@megapathdsl.net
> Subject: Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low  
> jitter, synthesizer block?
>
> 
> lajeune...@mail.com said:
> > I'm sure you know the 1.8V supply regulators should not be fed from VDDA
> > (3.3V), but I'll mention it anyway. 
> 
> Why not?
> 
> That sounds like the sort of issue I should understand but I'm coming up 
> blank.
> 
> 
> -- 
> These are my opinions.  I hate spam.
> 
> 
> 
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Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[Hal Murray]

lajeune...@mail.com said:
> I'm sure you know the 1.8V supply regulators should not be fed from VDDA
> (3.3V), but I'll mention it anyway. 

Why not?

That sounds like the sort of issue I should understand but I'm coming up 
blank.


-- 
These are my opinions.  I hate spam.



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Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[John Ackermann N8UR]

Yes, I was planning to include bypasses, and I've been convinced to put 
at least the 1.8V regulator on the board as well.  And to think about 
the interconnects.


Adding the crystal does make the layout more complex -- they put a 
ground pour on its own layer underneath it, and I think (but am not 
sure) that the connections complicate selecting an external oscillator. 
I'll look into the pain tradeoff.


On 01/25/2018 04:08 PM, Robert LaJeunesse wrote:

John, I appreciate your minimalist goal, but I'll second Bill's section about including 
the power supply voltage regulator and bypassing. Finding a good regulator with wideband 
line regulation/rejection could prove a real search, and such a fast chip as the Si5340 
will need excellent broadband supply bypassing. So keep these key components tight to the 
chip, on the same PCB obviously. The need for a 4- to 6-layer board screams "keep 
critical loops tight"! FYI a regulator (of needed RF performance) producing 3.3V for 
VDDA will likely have an absolute max input voltage of 6V or so. Having a 5V supply 
requirement will not be a serious limitation of the overall system design. I'm sure you 
know the 1.8V supply regulators should not be fed from VDDA (3.3V), but I'll mention it 
anyway.

With that much on the PCB adding a small crystal can't add significantly to the cost, 
so why not? It allows R of the chip and outputs before having to hook up one's 
10MHz reference. As such crystal quality / stability / etc. are of little concern - 
just size & cost.

I also like the previous suggestion of castellated connections on the board edge - 
easy to solder to a board and easy to solder wires to. If you make the castellations 
on 0.1" (or 2mm) centers then it becomes possible to use common header pins as 
well. Just keeping your options open there.

Bob L.


Sent: Thursday, January 25, 2018 at 3:23 PM
From: "John Ackermann N8UR" <j...@febo.com>
To: time-nuts@febo.com
Subject: Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low 
jitter, synthesizer block?

Hi Bill --

And that's exactly what I *don't* want to do. :-)  The reason is that I
have several different projects in mind (and everyone else will have
their own requirements) and only want to deal with the difficult package
once.

The idea is to make a minimal carrier to deal with the tiny part and
six-layer board.  Then all the ancillary stuff (including the MCU that's
needed to program the chip) goes onto the board designed for that
project.  This isn't intended to be a finished product, just a building
block.

73,
John

On 01/25/2018 03:12 PM, wb6bnq wrote:

Hi John,

Thanks for the response.  Here is my 2 cents:

Well, due to the level of difficulty in chip mounting, I would prefer to
see a complete project. I.E., power supply for a single input of 12
volts and regulators the necessary chip values, proper input protection
for the 10 MHz input level and single ended outputs of the appropriate
levels (I am assuming more than 3 volts) or an amplifier stage for
arriving at such.  Equally have RF connectors (SMA would be good) on the
board perhaps.

Of course as cheap as possible, hi hi.  A carrier board arrangement
would be useless to me.  My application would be to provide signals for
things like my Quicksilver SDR receiver, among other uses.

If you are interested, I can show you a nice little ABS (I think) box
that has EMI built-in that I used for a project that should be more than
large enough for your needs.

Thanks for reading,

73BillWB6BNQ


John Ackermann N8UR wrote:


Hi Bill --

I should have been more clear: this design will be for a simple case:
one reference clock input, four outputs.  The chip can do all sorts of
fancy tricks, but I'm looking for a source of four low jitter outputs
derived from a 10 MHz external reference (not using crystal or
on-board oscillator).  Many of the pins are unused in that configuration.

I'm not looking to make a universal carrier for the chip, but to meet
what I suspect is a common time-nut/ham radio desire for a clean
multi-channel synthesizer.

On 01/25/2018 02:02 PM, wb6bnq wrote:


Hi John,

After looking at the data sheet, it seems way more involved then just
making a carrier board for it.  Besides the power supply
requirements, various design selections would dictate different
circuit layouts for different purposes.  Even trying to do a general
purpose application would possibly require having several different
output configurations and possibly a couple of input configurations
as well.  That would imply a rather detailed PCB and that chip
package style is a serious pain in the ass for [what amounts to]
hobbyists.  So it would seem the logical course would be to do
serious design application and see if an in-house component mounting
job would be feasible.

I notice that the data sheet says the jitter specs are only best when
using The internal crystal oscillator frequency between 48 and 54
MHz.

Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[Robert LaJeunesse]

John, I appreciate your minimalist goal, but I'll second Bill's section about 
including the power supply voltage regulator and bypassing. Finding a good 
regulator with wideband line regulation/rejection could prove a real search, 
and such a fast chip as the Si5340 will need excellent broadband supply 
bypassing. So keep these key components tight to the chip, on the same PCB 
obviously. The need for a 4- to 6-layer board screams "keep critical loops 
tight"! FYI a regulator (of needed RF performance) producing 3.3V for VDDA will 
likely have an absolute max input voltage of 6V or so. Having a 5V supply 
requirement will not be a serious limitation of the overall system design. I'm 
sure you know the 1.8V supply regulators should not be fed from VDDA (3.3V), 
but I'll mention it anyway. 

With that much on the PCB adding a small crystal can't add significantly to the 
cost, so why not? It allows R of the chip and outputs before having to hook 
up one's 10MHz reference. As such crystal quality / stability / etc. are of 
little concern - just size & cost.

I also like the previous suggestion of castellated connections on the board 
edge - easy to solder to a board and easy to solder wires to. If you make the 
castellations on 0.1" (or 2mm) centers then it becomes possible to use common 
header pins as well. Just keeping your options open there.

Bob L.

> Sent: Thursday, January 25, 2018 at 3:23 PM
> From: "John Ackermann N8UR" <j...@febo.com>
> To: time-nuts@febo.com
> Subject: Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low 
> jitter, synthesizer block?
>
> Hi Bill --
> 
> And that's exactly what I *don't* want to do. :-)  The reason is that I 
> have several different projects in mind (and everyone else will have 
> their own requirements) and only want to deal with the difficult package 
> once.
> 
> The idea is to make a minimal carrier to deal with the tiny part and 
> six-layer board.  Then all the ancillary stuff (including the MCU that's 
> needed to program the chip) goes onto the board designed for that 
> project.  This isn't intended to be a finished product, just a building 
> block.
> 
> 73,
> John
> 
> On 01/25/2018 03:12 PM, wb6bnq wrote:
> > Hi John,
> > 
> > Thanks for the response.  Here is my 2 cents:
> > 
> > Well, due to the level of difficulty in chip mounting, I would prefer to 
> > see a complete project. I.E., power supply for a single input of 12 
> > volts and regulators the necessary chip values, proper input protection 
> > for the 10 MHz input level and single ended outputs of the appropriate 
> > levels (I am assuming more than 3 volts) or an amplifier stage for 
> > arriving at such.  Equally have RF connectors (SMA would be good) on the 
> > board perhaps.
> > 
> > Of course as cheap as possible, hi hi.  A carrier board arrangement 
> > would be useless to me.  My application would be to provide signals for 
> > things like my Quicksilver SDR receiver, among other uses.
> > 
> > If you are interested, I can show you a nice little ABS (I think) box 
> > that has EMI built-in that I used for a project that should be more than 
> > large enough for your needs.
> > 
> > Thanks for reading,
> > 
> > 73BillWB6BNQ
> > 
> > 
> > John Ackermann N8UR wrote:
> > 
> >> Hi Bill --
> >>
> >> I should have been more clear: this design will be for a simple case: 
> >> one reference clock input, four outputs.  The chip can do all sorts of 
> >> fancy tricks, but I'm looking for a source of four low jitter outputs 
> >> derived from a 10 MHz external reference (not using crystal or 
> >> on-board oscillator).  Many of the pins are unused in that configuration.
> >>
> >> I'm not looking to make a universal carrier for the chip, but to meet 
> >> what I suspect is a common time-nut/ham radio desire for a clean 
> >> multi-channel synthesizer.
> >>
> >> On 01/25/2018 02:02 PM, wb6bnq wrote:
> >>
> >>> Hi John,
> >>>
> >>> After looking at the data sheet, it seems way more involved then just 
> >>> making a carrier board for it.  Besides the power supply 
> >>> requirements, various design selections would dictate different 
> >>> circuit layouts for different purposes.  Even trying to do a general 
> >>> purpose application would possibly require having several different 
> >>> output configurations and possibly a couple of input configurations 
> >>> as well.  That would imply a rather detailed PCB and that chip 
> >>> package style is a serious pai

Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[jimlux]

On 1/25/18 12:12 PM, wb6bnq wrote:

Hi John,

Thanks for the response.  Here is my 2 cents:

Well, due to the level of difficulty in chip mounting, I would prefer to 
see a complete project. I.E., power supply for a single input of 12 
volts and regulators the necessary chip values, proper input protection 
for the 10 MHz input level and single ended outputs of the appropriate 
levels (I am assuming more than 3 volts) or an amplifier stage for 
arriving at such.  Equally have RF connectors (SMA would be good) on the 
board perhaps.


The eval board for $200 might be a solution for that need: SMA 
connectors all around, runs off 5V from USB.







Of course as cheap as possible, hi hi.


Oh, well, $200 might be cheaper than cobbling together 
packaged/connectorized parts though.




  A carrier board arrangement
would be useless to me.  My application would be to provide signals for 
things like my Quicksilver SDR receiver, among other uses.


If you are interested, I can show you a nice little ABS (I think) box 
that has EMI built-in that I used for a project that should be more than 
large enough for your needs.


Than

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Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[John Ackermann N8UR]

Hi Bill --

And that's exactly what I *don't* want to do. :-)  The reason is that I 
have several different projects in mind (and everyone else will have 
their own requirements) and only want to deal with the difficult package 
once.


The idea is to make a minimal carrier to deal with the tiny part and 
six-layer board.  Then all the ancillary stuff (including the MCU that's 
needed to program the chip) goes onto the board designed for that 
project.  This isn't intended to be a finished product, just a building 
block.


73,
John

On 01/25/2018 03:12 PM, wb6bnq wrote:

Hi John,

Thanks for the response.  Here is my 2 cents:

Well, due to the level of difficulty in chip mounting, I would prefer to 
see a complete project. I.E., power supply for a single input of 12 
volts and regulators the necessary chip values, proper input protection 
for the 10 MHz input level and single ended outputs of the appropriate 
levels (I am assuming more than 3 volts) or an amplifier stage for 
arriving at such.  Equally have RF connectors (SMA would be good) on the 
board perhaps.


Of course as cheap as possible, hi hi.  A carrier board arrangement 
would be useless to me.  My application would be to provide signals for 
things like my Quicksilver SDR receiver, among other uses.


If you are interested, I can show you a nice little ABS (I think) box 
that has EMI built-in that I used for a project that should be more than 
large enough for your needs.


Thanks for reading,

73BillWB6BNQ


John Ackermann N8UR wrote:


Hi Bill --

I should have been more clear: this design will be for a simple case: 
one reference clock input, four outputs.  The chip can do all sorts of 
fancy tricks, but I'm looking for a source of four low jitter outputs 
derived from a 10 MHz external reference (not using crystal or 
on-board oscillator).  Many of the pins are unused in that configuration.


I'm not looking to make a universal carrier for the chip, but to meet 
what I suspect is a common time-nut/ham radio desire for a clean 
multi-channel synthesizer.


On 01/25/2018 02:02 PM, wb6bnq wrote:


Hi John,

After looking at the data sheet, it seems way more involved then just 
making a carrier board for it.  Besides the power supply 
requirements, various design selections would dictate different 
circuit layouts for different purposes.  Even trying to do a general 
purpose application would possibly require having several different 
output configurations and possibly a couple of input configurations 
as well.  That would imply a rather detailed PCB and that chip 
package style is a serious pain in the ass for [what amounts to] 
hobbyists.  So it would seem the logical course would be to do 
serious design application and see if an in-house component mounting 
job would be feasible.


I notice that the data sheet says the jitter specs are only best when 
using The internal crystal oscillator frequency between 48 and 54 
MHz. It was unclear to me that the same would apply to using the 
non-crystal inputs.


Perhaps you could indicate what you are attempting to do with it and 
how you are going to accomplish your goals ?


73BillWB6BNQ


John Ackermann N8UR wrote:

After the recent discussion about Silicon Labs clock generators, I 
looked at their Si5340A part and think it will be useful for a ham 
radio project I'm working on.  While it can do other things, for my 
use it would use a 10 MHz input clock and generate 4 independent 
outputs in the range of 100 kHz to 1028 MHz.  Its jitter is <100fs, 
which translates to "not bad" phase noise.  Here's the data sheet if 
you're interested:


http://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf 



The challenge is that the chip is a 7x7 mm 44-QFN package and really 
wants to be put on a six-layer circuit board.  That's doable, but 
challenging, for home assembly.


Rather than designing the chip into a larger circuit board, I'm 
thinking of doing a small "carrier" board that would include just 
the chip and critical bypass caps and have headers to plug into the 
main board. Then, you could just drop the carrier into a 
project-specific board and not have to worry about the complex 
layout and mounting.  I have a contract manufacturer who can build 
these up, if there's enough quantity to justify the setup cost.


If you'd be interested acquiring in one or more of these, please 
drop me a line off-list (jra at febo dot com).  I don't think this 
will be a TAPR project, but if there's enough interest to build 25 
of these carriers, I can probably make that happen.  And remember -- 
this is just the chip; you'll need to provide the rest of the circuit.


John
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Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[wb6bnq]

Hi John,

Thanks for the response.  Here is my 2 cents:

Well, due to the level of difficulty in chip mounting, I would prefer to 
see a complete project. I.E., power supply for a single input of 12 
volts and regulators the necessary chip values, proper input protection 
for the 10 MHz input level and single ended outputs of the appropriate 
levels (I am assuming more than 3 volts) or an amplifier stage for 
arriving at such.  Equally have RF connectors (SMA would be good) on the 
board perhaps.


Of course as cheap as possible, hi hi.  A carrier board arrangement 
would be useless to me.  My application would be to provide signals for 
things like my Quicksilver SDR receiver, among other uses.


If you are interested, I can show you a nice little ABS (I think) box 
that has EMI built-in that I used for a project that should be more than 
large enough for your needs.


Thanks for reading,

73BillWB6BNQ


John Ackermann N8UR wrote:


Hi Bill --

I should have been more clear: this design will be for a simple case: 
one reference clock input, four outputs.  The chip can do all sorts of 
fancy tricks, but I'm looking for a source of four low jitter outputs 
derived from a 10 MHz external reference (not using crystal or 
on-board oscillator).  Many of the pins are unused in that configuration.


I'm not looking to make a universal carrier for the chip, but to meet 
what I suspect is a common time-nut/ham radio desire for a clean 
multi-channel synthesizer.


On 01/25/2018 02:02 PM, wb6bnq wrote:


Hi John,

After looking at the data sheet, it seems way more involved then just 
making a carrier board for it.  Besides the power supply 
requirements, various design selections would dictate different 
circuit layouts for different purposes.  Even trying to do a general 
purpose application would possibly require having several different 
output configurations and possibly a couple of input configurations 
as well.  That would imply a rather detailed PCB and that chip 
package style is a serious pain in the ass for [what amounts to] 
hobbyists.  So it would seem the logical course would be to do 
serious design application and see if an in-house component mounting 
job would be feasible.


I notice that the data sheet says the jitter specs are only best when 
using The internal crystal oscillator frequency between 48 and 54 
MHz. It was unclear to me that the same would apply to using the 
non-crystal inputs.


Perhaps you could indicate what you are attempting to do with it and 
how you are going to accomplish your goals ?


73BillWB6BNQ


John Ackermann N8UR wrote:

After the recent discussion about Silicon Labs clock generators, I 
looked at their Si5340A part and think it will be useful for a ham 
radio project I'm working on.  While it can do other things, for my 
use it would use a 10 MHz input clock and generate 4 independent 
outputs in the range of 100 kHz to 1028 MHz.  Its jitter is <100fs, 
which translates to "not bad" phase noise.  Here's the data sheet if 
you're interested:


http://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf 



The challenge is that the chip is a 7x7 mm 44-QFN package and really 
wants to be put on a six-layer circuit board.  That's doable, but 
challenging, for home assembly.


Rather than designing the chip into a larger circuit board, I'm 
thinking of doing a small "carrier" board that would include just 
the chip and critical bypass caps and have headers to plug into the 
main board. Then, you could just drop the carrier into a 
project-specific board and not have to worry about the complex 
layout and mounting.  I have a contract manufacturer who can build 
these up, if there's enough quantity to justify the setup cost.


If you'd be interested acquiring in one or more of these, please 
drop me a line off-list (jra at febo dot com).  I don't think this 
will be a TAPR project, but if there's enough interest to build 25 
of these carriers, I can probably make that happen.  And remember -- 
this is just the chip; you'll need to provide the rest of the circuit.


John
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Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[John Ackermann N8UR]

Hi Bill --

I should have been more clear: this design will be for a simple case: 
one reference clock input, four outputs.  The chip can do all sorts of 
fancy tricks, but I'm looking for a source of four low jitter outputs 
derived from a 10 MHz external reference (not using crystal or on-board 
oscillator).  Many of the pins are unused in that configuration.


I'm not looking to make a universal carrier for the chip, but to meet 
what I suspect is a common time-nut/ham radio desire for a clean 
multi-channel synthesizer.


On 01/25/2018 02:02 PM, wb6bnq wrote:

Hi John,

After looking at the data sheet, it seems way more involved then just 
making a carrier board for it.  Besides the power supply requirements, 
various design selections would dictate different circuit layouts for 
different purposes.  Even trying to do a general purpose application 
would possibly require having several different output configurations 
and possibly a couple of input configurations as well.  That would imply 
a rather detailed PCB and that chip package style is a serious pain in 
the ass for [what amounts to] hobbyists.  So it would seem the logical 
course would be to do serious design application and see if an in-house 
component mounting job would be feasible.


I notice that the data sheet says the jitter specs are only best when 
using The internal crystal oscillator frequency between 48 and 54 MHz. 
It was unclear to me that the same would apply to using the non-crystal 
inputs.


Perhaps you could indicate what you are attempting to do with it and how 
you are going to accomplish your goals ?


73BillWB6BNQ


John Ackermann N8UR wrote:

After the recent discussion about Silicon Labs clock generators, I 
looked at their Si5340A part and think it will be useful for a ham 
radio project I'm working on.  While it can do other things, for my 
use it would use a 10 MHz input clock and generate 4 independent 
outputs in the range of 100 kHz to 1028 MHz.  Its jitter is <100fs, 
which translates to "not bad" phase noise.  Here's the data sheet if 
you're interested:


http://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf 



The challenge is that the chip is a 7x7 mm 44-QFN package and really 
wants to be put on a six-layer circuit board.  That's doable, but 
challenging, for home assembly.


Rather than designing the chip into a larger circuit board, I'm 
thinking of doing a small "carrier" board that would include just the 
chip and critical bypass caps and have headers to plug into the main 
board. Then, you could just drop the carrier into a project-specific 
board and not have to worry about the complex layout and mounting.  I 
have a contract manufacturer who can build these up, if there's enough 
quantity to justify the setup cost.


If you'd be interested acquiring in one or more of these, please drop 
me a line off-list (jra at febo dot com).  I don't think this will be 
a TAPR project, but if there's enough interest to build 25 of these 
carriers, I can probably make that happen.  And remember -- this is 
just the chip; you'll need to provide the rest of the circuit.


John
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Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[Bob kb8tq]

Hi


> On Jan 25, 2018, at 2:02 PM, wb6bnq  wrote:
> 
> Hi John,
> 
> After looking at the data sheet, it seems way more involved then just making 
> a carrier board for it.  Besides the power supply requirements, various 
> design selections would dictate different circuit layouts for different 
> purposes.  Even trying to do a general purpose application would possibly 
> require having several different output configurations and possibly a couple 
> of input configurations as well.  That would imply a rather detailed PCB and 
> that chip package style is a serious pain in the ass for [what amounts to] 
> hobbyists.  So it would seem the logical course would be to do serious design 
> application and see if an in-house component mounting job would be feasible.
> 
> I notice that the data sheet says the jitter specs are only best when using 
> The internal crystal oscillator frequency between 48 and 54 MHz. It was 
> unclear to me that the same would apply to using the non-crystal inputs.

With any non-integer PLL, the noise spreading performance is going to depend a 
bit on the phase detector 
operating frequency. For integer division, things will be impacted, but not in 
the same way. The “ideal” 
answer would be to feed the beast with a 50 MHz reference derived somehow from 
a 10 MHz source. 

Bob

> 
> Perhaps you could indicate what you are attempting to do with it and how you 
> are going to accomplish your goals ?
> 
> 73BillWB6BNQ
> 
> 
> John Ackermann N8UR wrote:
> 
>> After the recent discussion about Silicon Labs clock generators, I looked at 
>> their Si5340A part and think it will be useful for a ham radio project I'm 
>> working on.  While it can do other things, for my use it would use a 10 MHz 
>> input clock and generate 4 independent outputs in the range of 100 kHz to 
>> 1028 MHz.  Its jitter is <100fs, which translates to "not bad" phase noise.  
>> Here's the data sheet if you're interested:
>> 
>> http://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf 
>> 
>> The challenge is that the chip is a 7x7 mm 44-QFN package and really wants 
>> to be put on a six-layer circuit board.  That's doable, but challenging, for 
>> home assembly.
>> 
>> Rather than designing the chip into a larger circuit board, I'm thinking of 
>> doing a small "carrier" board that would include just the chip and critical 
>> bypass caps and have headers to plug into the main board. Then, you could 
>> just drop the carrier into a project-specific board and not have to worry 
>> about the complex layout and mounting.  I have a contract manufacturer who 
>> can build these up, if there's enough quantity to justify the setup cost.
>> 
>> If you'd be interested acquiring in one or more of these, please drop me a 
>> line off-list (jra at febo dot com).  I don't think this will be a TAPR 
>> project, but if there's enough interest to build 25 of these carriers, I can 
>> probably make that happen.  And remember -- this is just the chip; you'll 
>> need to provide the rest of the circuit.
>> 
>> John
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Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[wb6bnq]

Hi John,

After looking at the data sheet, it seems way more involved then just 
making a carrier board for it.  Besides the power supply requirements, 
various design selections would dictate different circuit layouts for 
different purposes.  Even trying to do a general purpose application 
would possibly require having several different output configurations 
and possibly a couple of input configurations as well.  That would imply 
a rather detailed PCB and that chip package style is a serious pain in 
the ass for [what amounts to] hobbyists.  So it would seem the logical 
course would be to do serious design application and see if an in-house 
component mounting job would be feasible.


I notice that the data sheet says the jitter specs are only best when 
using The internal crystal oscillator frequency between 48 and 54 MHz. 
It was unclear to me that the same would apply to using the non-crystal 
inputs.


Perhaps you could indicate what you are attempting to do with it and how 
you are going to accomplish your goals ?


73BillWB6BNQ


John Ackermann N8UR wrote:

After the recent discussion about Silicon Labs clock generators, I 
looked at their Si5340A part and think it will be useful for a ham 
radio project I'm working on.  While it can do other things, for my 
use it would use a 10 MHz input clock and generate 4 independent 
outputs in the range of 100 kHz to 1028 MHz.  Its jitter is <100fs, 
which translates to "not bad" phase noise.  Here's the data sheet if 
you're interested:


http://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf 



The challenge is that the chip is a 7x7 mm 44-QFN package and really 
wants to be put on a six-layer circuit board.  That's doable, but 
challenging, for home assembly.


Rather than designing the chip into a larger circuit board, I'm 
thinking of doing a small "carrier" board that would include just the 
chip and critical bypass caps and have headers to plug into the main 
board. Then, you could just drop the carrier into a project-specific 
board and not have to worry about the complex layout and mounting.  I 
have a contract manufacturer who can build these up, if there's enough 
quantity to justify the setup cost.


If you'd be interested acquiring in one or more of these, please drop 
me a line off-list (jra at febo dot com).  I don't think this will be 
a TAPR project, but if there's enough interest to build 25 of these 
carriers, I can probably make that happen.  And remember -- this is 
just the chip; you'll need to provide the rest of the circuit.


John
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Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[Mark Goldberg]

On Thu, Jan 25, 2018 at 7:32 AM, John Ackermann N8UR  wrote:
>
> After the recent discussion about Silicon Labs clock generators, I looked
at their Si5340A part and think it will be useful for a ham radio project
I'm working on.

Have you considered the Si5340-EVB development board?

https://octopart.com/search?q=si5340-evb=0

It is about $150, relatively cheap for a development board, and there is
software to program it already.

73,

Mark
W7MLG
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Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?

[Attila Kinali]

On Thu, 25 Jan 2018 09:32:56 -0500
John Ackermann N8UR  wrote:

 
> http://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf
> 
> The challenge is that the chip is a 7x7 mm 44-QFN package and really 
> wants to be put on a six-layer circuit board.  That's doable, but 
> challenging, for home assembly.

Solderpaste stencil and a temp controlled frying pan helps :)
 
> Rather than designing the chip into a larger circuit board, I'm thinking 
> of doing a small "carrier" board that would include just the chip and 
> critical bypass caps and have headers to plug into the main board. 
> Then, you could just drop the carrier into a project-specific board and 
> not have to worry about the complex layout and mounting.  I have a 
> contract manufacturer who can build these up, if there's enough quantity 
> to justify the setup cost.

I'd be carefull with header pins at these frequencies. The slew-rate
of the chip is high enough that you get frequency components well into
the 10GHz range. I think a better idea would be just have castellation
at the PCB edge, with the right distances to meet impedance requriements,
and solder the PCB directly onto the main PCB without any connector inbetween. 

Also be aware that these kind of chips are quite peculiar about
the quality of their power supply. You need to design it for the
internal VCO, such that it has good regulation well into the MHz range
and high quality blocking capacitors rated for GHz use. Using 3-terminal
pass through capacitors like the Murata EMIFIL[1] goes a long way
for these kind of applications (at only a slightly higher price than
normal capacitors).


Attila Kinali



[1] https://www.murata.com/en-global/products/emc/emifil/chip




-- 
The bad part of Zurich is where the degenerates
throw DARK chocolate at you.
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