Re: [time-nuts] reference oscillator input circuit

2010-12-09 Thread jimlux

Javier Herrero wrote:
I was thinking about how good or how bad would result the use of an LVDS 
line receiver ... but it is only a though :)




That's what I was using before, and it doesn't work very well..

Small common mode voltage range and large hysteresis.

They're really designed to take square wave(ish) inputs.


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Re: [time-nuts] reference oscillator input circuit

2010-12-09 Thread jimlux

Chris Albertson wrote:

Of all the ways to square a sine wave I think the best might be to use a PLL.
the raising edge of your output square wave would trigger a sample of the
input sine wave.  The distance from zero volts of that sample is the
phase error.

The goal is to have the raising edge of the square wave happen just as the
sine crosses zero.  But if it's not dead-on you get an error signal that can be
either positive or negative and this error is low pass filtered and
then applied as
a correction.

But my guess is that if you are using this to feed a 'scope a
reference frequency
the scope will have it's own PLL.



No, actually to feed a bunch of synthesizer chains (for which the sine 
wave will work fine) and to drive sampling clocks on ADC/DAC (for which 
one wants a low jitter square wave).


A digital radio...









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Re: [time-nuts] reference oscillator input circuit

2010-12-09 Thread Javier Herrero
Good to know. Now I see what not to use :) I was supposing that the 
hysteresis would not be so high being low voltage signalling, and since 
they are used for low-jitter applications. But really I've only used 
them for their intended main applications :)


Best regards,

Javier

El 09/12/2010 14:50, jimlux escribió:

Javier Herrero wrote:
I was thinking about how good or how bad would result the use of an 
LVDS line receiver ... but it is only a though :)




That's what I was using before, and it doesn't work very well..

Small common mode voltage range and large hysteresis.

They're really designed to take square wave(ish) inputs.


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--

Javier HerreroEMAIL: jherr...@hvsistemas.com
Chief Technology Officer
HV Sistemas S.L.  PHONE: +34 949 336 806
Los Charcones, 17 FAX:   +34 949 336 792
19170 El Casar - Guadalajara - Spain  WEB: http://www.hvsistemas.com


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Re: [time-nuts] reference oscillator input circuit

2010-12-09 Thread jimlux

Javier Herrero wrote:
Good to know. Now I see what not to use :) I was supposing that the 
hysteresis would not be so high being low voltage signalling, and since 
they are used for low-jitter applications. But really I've only used 
them for their intended main applications :)



hysteresis is in the 100mV minimum range, and max peak amplitude is in 
the 0.9 to 1 Volt range (they'll have a bias point a bit over a volt, 
and a lot of them do not do well at all if you swing close to the supply 
rail)


Maybe with external clamps and over drive it.





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Re: [time-nuts] reference oscillator input circuit

2010-12-09 Thread Javier Herrero

El 09/12/2010 15:21, jimlux escribió:

Javier Herrero wrote:
Good to know. Now I see what not to use :) I was supposing that the 
hysteresis would not be so high being low voltage signalling, and 
since they are used for low-jitter applications. But really I've only 
used them for their intended main applications :)



hysteresis is in the 100mV minimum range, and max peak amplitude is in 
the 0.9 to 1 Volt range (they'll have a bias point a bit over a volt, 
and a lot of them do not do well at all if you swing close to the 
supply rail)


Maybe with external clamps and over drive it.


Yes, I was thinking in that way. But surely they are better solutions :)

Regards,

Javier

--

Javier HerreroEMAIL: jherr...@hvsistemas.com
Chief Technology Officer
HV Sistemas S.L.  PHONE: +34 949 336 806
Los Charcones, 17 FAX:   +34 949 336 792
19170 El Casar - Guadalajara - Spain  WEB: http://www.hvsistemas.com


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Re: [time-nuts] reference oscillator input circuit

2010-12-09 Thread jimlux

Javier Herrero wrote:

El 09/12/2010 15:21, jimlux escribió:

Javier Herrero wrote:
Good to know. Now I see what not to use :) I was supposing that the 
hysteresis would not be so high being low voltage signalling, and 
since they are used for low-jitter applications. But really I've only 
used them for their intended main applications :)



hysteresis is in the 100mV minimum range, and max peak amplitude is in 
the 0.9 to 1 Volt range (they'll have a bias point a bit over a volt, 
and a lot of them do not do well at all if you swing close to the 
supply rail)


Maybe with external clamps and over drive it.


Yes, I was thinking in that way. But surely they are better solutions :)



hence my question to the list..

I'm going to gather all the responses and summarize them for the list 
later today.


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Re: [time-nuts] reference oscillator input circuit

2010-12-09 Thread Bruce Griffiths

jimlux wrote:

Javier Herrero wrote:

El 09/12/2010 15:21, jimlux escribió:

Javier Herrero wrote:
Good to know. Now I see what not to use :) I was supposing that the 
hysteresis would not be so high being low voltage signalling, and 
since they are used for low-jitter applications. But really I've 
only used them for their intended main applications :)



hysteresis is in the 100mV minimum range, and max peak amplitude is 
in the 0.9 to 1 Volt range (they'll have a bias point a bit over a 
volt, and a lot of them do not do well at all if you swing close to 
the supply rail)


Maybe with external clamps and over drive it.


Yes, I was thinking in that way. But surely they are better solutions :)



hence my question to the list..

I'm going to gather all the responses and summarize them for the list 
later today.


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Since noise modulation (power supply and device noise) of device 
parameters (eg collector base capacitance) can be a significant source 
of phase noise adding some emitter degeneration in a long tailed pair 
and shunting the collector load resistors with inductors (eg a 
transformer winding) should be an effective way of reducing such phase 
noise. A capacitor shunting the collector load can also be effective in 
reducing the circuit bandwidth closer to the optimum and desensitising 
the circuit bandwidth to device parameter variations. However avoiding 
high Q parasitic resonances with the output inductors (or transformer) 
will be necessary.


Bruce


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Re: [time-nuts] reference oscillator input circuit

2010-12-09 Thread John Miles

 No, actually to feed a bunch of synthesizer chains (for which the sine
 wave will work fine) and to drive sampling clocks on ADC/DAC (for which
 one wants a low jitter square wave).

 A digital radio...

There are some nice residual plots for AC and CMOS chips at
http://www.xs4all.nl/~martein/pa3ake/hmode/dds_ad9910_pmnoise.html .  Seems
like the AD9515 family in PECL mode is about as good as anything is likely
to get at VHF.

However, why not use the sine wave directly, converted to differential with
a transformer and clipped by back-to-back Schottkys?  At VHF clock
frequencies any active sine-to-square conversion circuit I'm aware of will
contribute more jitter than the ADC's own tJ spec.  (Put another way, if I'm
a semiconductor house designing a high-end ADC or DAC, I am probably going
to put all the secret sauce I have into the on-chip clock conditioning,
leaving little or no room for improvement outside the chip.)

The eval boards from the various ADC manufacturers bear this out.  No one
puts anything but a 50-ohm SMA jack, transformer and Schottkys on their
clock inputs.

-- john, KE5FX


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Re: [time-nuts] reference oscillator input circuit

2010-12-09 Thread Bob Camp
Hi

...and sometimes they leave the Schottkys out.

The original request was not a really low jitter application. I think Jim
can get away with an active circuit. 

Bob 

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of John Miles
Sent: Thursday, December 09, 2010 4:00 PM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] reference oscillator input circuit


 No, actually to feed a bunch of synthesizer chains (for which the sine
 wave will work fine) and to drive sampling clocks on ADC/DAC (for which
 one wants a low jitter square wave).

 A digital radio...

There are some nice residual plots for AC and CMOS chips at
http://www.xs4all.nl/~martein/pa3ake/hmode/dds_ad9910_pmnoise.html .  Seems
like the AD9515 family in PECL mode is about as good as anything is likely
to get at VHF.

However, why not use the sine wave directly, converted to differential with
a transformer and clipped by back-to-back Schottkys?  At VHF clock
frequencies any active sine-to-square conversion circuit I'm aware of will
contribute more jitter than the ADC's own tJ spec.  (Put another way, if I'm
a semiconductor house designing a high-end ADC or DAC, I am probably going
to put all the secret sauce I have into the on-chip clock conditioning,
leaving little or no room for improvement outside the chip.)

The eval boards from the various ADC manufacturers bear this out.  No one
puts anything but a 50-ohm SMA jack, transformer and Schottkys on their
clock inputs.

-- john, KE5FX


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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread John Ackermann N8UR

Wenzel has some discussion and circuits at:
http://www.wenzel.com/documents/waveform.html.

The Shera GPSDO made clever use of the input circuit of a 74HCT4046 PLL 
chip for squaring.


John


On 12/8/2010 10:31 AM, jimlux wrote:

I'm looking for suggestions on a general circuit that can be used to
receive an external frequency reference (nominally a real clean sine
wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
into a real clean square wave. Galvanic isolation is a plus (a
transformer or capacitor would probably do that).

I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already solved the problem, eh?), but
any other ideas would be welcome.

I've scanned the archives of time-nuts, and while we have a fair amount
of discussion on how to square up the 1Hz (or 100Hz) in a phase
noise/ADEV setup, not so much on what to do with the 10 MHz. Rick has
commented that you don't want to use a comparator. I have the papers by
Dick, et al, and Collins, as well as all the others.. they tend to be
looking at the low frequency problem, although the analysis is certainly
applicable.

I don't know that I'm looking for the whole multiple limiting stages
scheme in any case.

Oh, as far as performance.. Say the need is to not horribly degrade a
good quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz -90dBc
10Hz -110dBc
100Hz -120dBc
1k-100k -125dBc

Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10
sec, and back up to 2 E-12 at 1000sec.

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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread jimlux

John Ackermann N8UR wrote:

Wenzel has some discussion and circuits at:
http://www.wenzel.com/documents/waveform.html.

The Shera GPSDO made clever use of the input circuit of a 74HCT4046 PLL 
chip for squaring.


John




Doh... I was thinking that there was some vendor with ap notes on stuff 
like this, and I couldn't recall who it was, and I'm actually looking at 
a Wenzel OCXO sitting here on the desk.


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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread Rick Karlquist
jimlux wrote:
 I'm looking for suggestions on a general circuit that can be used to
 receive an external frequency reference (nominally a real clean sine
 wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
 into a real clean square wave.  Galvanic isolation is a plus (a
 transformer or capacitor would probably do that).

In the 5071A at 80 MHz, we capacitively coupled a sine wave into
a 74AC series logic gate, that had DC bias resistors to hold
it at half the supply voltage.

Rick Karlquist


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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread Rick Karlquist
The document cited is full of plausible sounding but misleading
information, if you want really low jitter.  This type
of oversimplification of the problem was present when the
HP53131 series counters were designed, with the result that
the Allan deviation of an external 10 MHz reference is degraded
to only a part in 10^11 at 1 second.

Rick Karlquist


jimlux wrote:
 John Ackermann N8UR wrote:
 Wenzel has some discussion and circuits at:
 http://www.wenzel.com/documents/waveform.html.

 The Shera GPSDO made clever use of the input circuit of a 74HCT4046 PLL
 chip for squaring.

 John
 


 Doh... I was thinking that there was some vendor with ap notes on stuff
 like this, and I couldn't recall who it was, and I'm actually looking at
 a Wenzel OCXO sitting here on the desk.

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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread Robert Darlington
Just an FYI guys, I'm pretty sure the 3rd circuit down on the Wenzel page is
identical to the input circuit for the TAPR TADD-2 frequency divider.  The
TADD-2 adds a transformer and load resistor.  Schematic is in the manual
here:

http://www.tapr.org/~n8ur/TADD-2_Manual.pdf

-Bob

On Wed, Dec 8, 2010 at 8:46 AM, John Ackermann N8UR j...@febo.com wrote:

 Wenzel has some discussion and circuits at:
 http://www.wenzel.com/documents/waveform.html.

 The Shera GPSDO made clever use of the input circuit of a 74HCT4046 PLL
 chip for squaring.

 John
 


 On 12/8/2010 10:31 AM, jimlux wrote:

 I'm looking for suggestions on a general circuit that can be used to
 receive an external frequency reference (nominally a real clean sine
 wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
 into a real clean square wave. Galvanic isolation is a plus (a
 transformer or capacitor would probably do that).

 I was thinking about rummaging through the schematics for test equipment
 reference inputs (since they've already solved the problem, eh?), but
 any other ideas would be welcome.

 I've scanned the archives of time-nuts, and while we have a fair amount
 of discussion on how to square up the 1Hz (or 100Hz) in a phase
 noise/ADEV setup, not so much on what to do with the 10 MHz. Rick has
 commented that you don't want to use a comparator. I have the papers by
 Dick, et al, and Collins, as well as all the others.. they tend to be
 looking at the low frequency problem, although the analysis is certainly
 applicable.

 I don't know that I'm looking for the whole multiple limiting stages
 scheme in any case.

 Oh, as far as performance.. Say the need is to not horribly degrade a
 good quality crystal oscillator... here's a typical set of specs:
 76 MHz
 1Hz -90dBc
 10Hz -110dBc
 100Hz -120dBc
 1k-100k -125dBc

 Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10
 sec, and back up to 2 E-12 at 1000sec.

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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread John Ackermann N8UR
I can confirm that -- that's where I found it (and my schematic in the 
TADD-2 manual gives credit to Wenzel)!


I chose that design mainly because it worked over a wide range of input 
levels.


John


On 12/8/2010 12:48 PM, Robert Darlington wrote:

Just an FYI guys, I'm pretty sure the 3rd circuit down on the Wenzel page is
identical to the input circuit for the TAPR TADD-2 frequency divider.  The
TADD-2 adds a transformer and load resistor.  Schematic is in the manual
here:

http://www.tapr.org/~n8ur/TADD-2_Manual.pdf

-Bob

On Wed, Dec 8, 2010 at 8:46 AM, John Ackermann N8URj...@febo.com  wrote:


Wenzel has some discussion and circuits at:
http://www.wenzel.com/documents/waveform.html.

The Shera GPSDO made clever use of the input circuit of a 74HCT4046 PLL
chip for squaring.

John



On 12/8/2010 10:31 AM, jimlux wrote:


I'm looking for suggestions on a general circuit that can be used to
receive an external frequency reference (nominally a real clean sine
wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
into a real clean square wave. Galvanic isolation is a plus (a
transformer or capacitor would probably do that).

I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already solved the problem, eh?), but
any other ideas would be welcome.

I've scanned the archives of time-nuts, and while we have a fair amount
of discussion on how to square up the 1Hz (or 100Hz) in a phase
noise/ADEV setup, not so much on what to do with the 10 MHz. Rick has
commented that you don't want to use a comparator. I have the papers by
Dick, et al, and Collins, as well as all the others.. they tend to be
looking at the low frequency problem, although the analysis is certainly
applicable.

I don't know that I'm looking for the whole multiple limiting stages
scheme in any case.

Oh, as far as performance.. Say the need is to not horribly degrade a
good quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz-90dBc
10Hz-110dBc
100Hz-120dBc
1k-100k-125dBc

Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10
sec, and back up to 2 E-12 at 1000sec.

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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread jimlux

Rick Karlquist wrote:

jimlux wrote:

I'm looking for suggestions on a general circuit that can be used to
receive an external frequency reference (nominally a real clean sine
wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
into a real clean square wave.  Galvanic isolation is a plus (a
transformer or capacitor would probably do that).


In the 5071A at 80 MHz, we capacitively coupled a sine wave into
a 74AC series logic gate, that had DC bias resistors to hold
it at half the supply voltage.



that's similar to what Said recommended last year.. he uses a big 
resistor from output to input to set the bias, rather than a divider.


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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread Bruce Griffiths
One problem with this circuit is that tolerances in the resistors 
produce an offset between the 2 transistor bases in addition to any 
transistor mismatch,
It's better to share a single divider and short (eg a transformer 
winding. Or at least connect them with a low impedance at low 
frequencies) the transistor bases together.

Capacitively coupling the emitters can also be useful.

Bruce

Robert Darlington wrote:

Just an FYI guys, I'm pretty sure the 3rd circuit down on the Wenzel page is
identical to the input circuit for the TAPR TADD-2 frequency divider.  The
TADD-2 adds a transformer and load resistor.  Schematic is in the manual
here:

http://www.tapr.org/~n8ur/TADD-2_Manual.pdf

-Bob

On Wed, Dec 8, 2010 at 8:46 AM, John Ackermann N8URj...@febo.com  wrote:

   

Wenzel has some discussion and circuits at:
http://www.wenzel.com/documents/waveform.html.

The Shera GPSDO made clever use of the input circuit of a 74HCT4046 PLL
chip for squaring.

John



On 12/8/2010 10:31 AM, jimlux wrote:

 

I'm looking for suggestions on a general circuit that can be used to
receive an external frequency reference (nominally a real clean sine
wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
into a real clean square wave. Galvanic isolation is a plus (a
transformer or capacitor would probably do that).

I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already solved the problem, eh?), but
any other ideas would be welcome.

I've scanned the archives of time-nuts, and while we have a fair amount
of discussion on how to square up the 1Hz (or 100Hz) in a phase
noise/ADEV setup, not so much on what to do with the 10 MHz. Rick has
commented that you don't want to use a comparator. I have the papers by
Dick, et al, and Collins, as well as all the others.. they tend to be
looking at the low frequency problem, although the analysis is certainly
applicable.

I don't know that I'm looking for the whole multiple limiting stages
scheme in any case.

Oh, as far as performance.. Say the need is to not horribly degrade a
good quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz-90dBc
10Hz-110dBc
100Hz-120dBc
1k-100k-125dBc

Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10
sec, and back up to 2 E-12 at 1000sec.

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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread Robert LaJeunesse
Assuming a transformer coupled input (with biasing via a secondary center tap) 
why not use a fast differential PECL to CMOS level translator? For example, the 
IDT ICS508 will take 0.3 to 1.0 V p-p input and give 2.5, 3.3, or 5 V swing on 
the output. The chip works down to DC and keeps the duty cycle in the 40%-60% 
window up to 250MHz (at 3.3V out). Jitter and noise is not spec'd however. 


To increase the noise immunity with a relatively slow 10MHz sine source I'd 
look 
at boosting the amplitude with the transformer, then clipping with balanced 
series resistors and back-to-back diodes so the translator sees a higher dV/dT 
on its inputs.

Might want to look in some old Motorola ECL appnotes for other possible schemes.

Bob 





From: jimlux jim...@earthlink.net
To: Discussion of precise time and frequency measurement time-nuts@febo.com
Sent: Wed, December 8, 2010 10:31:08 AM
Subject: [time-nuts] reference oscillator input circuit

I'm looking for suggestions on a general circuit that can be used to receive an 
external frequency reference (nominally a real clean sine wave at, say, 10 MHz, 
although up to 100 MHz is possible) and turn it into a real clean square 
wave.  Galvanic isolation is a plus (a transformer or capacitor would probably 
do that).

I was thinking about rummaging through the schematics for test equipment 
reference inputs (since they've already solved the problem, eh?), but any 
other ideas would be welcome.

I've scanned the archives of time-nuts, and while we have a fair amount of 
discussion on how to square up the 1Hz (or 100Hz) in a phase noise/ADEV setup, 
not so much on what to do with the 10 MHz.  Rick has commented that you don't 
want to use a comparator. I have the papers by Dick, et al, and Collins, as 
well 
as all the others.. they tend to be looking at the low frequency problem, 
although the analysis is certainly applicable.

I don't know that I'm looking for the whole multiple limiting stages scheme in 
any case.

Oh, as far as performance.. Say the need is to not horribly degrade a good 
quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz -90dBc
10Hz -110dBc
100Hz -120dBc
1k-100k -125dBc

Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10 sec, and 
back up to 2 E-12 at 1000sec.

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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread Bruce Griffiths
One caveat with driving a CMOS gate input is that if it is overdriven so 
that the input protection circuit diodes conduct then the output jitter 
may increase substantially.

At least this appears to happen when overdriving 74HC04 inverters.
Once the input diodes conduct (5MHz sine wave input) the output jitter 
is easily measured with a 5370A/B.
Just below conduction the output jitter appears to be buried in the 
5370A/B noise.


Bruce

Rick Karlquist wrote:

The document cited is full of plausible sounding but misleading
information, if you want really low jitter.  This type
of oversimplification of the problem was present when the
HP53131 series counters were designed, with the result that
the Allan deviation of an external 10 MHz reference is degraded
to only a part in 10^11 at 1 second.

Rick Karlquist


jimlux wrote:
   

John Ackermann N8UR wrote:
 

Wenzel has some discussion and circuits at:
http://www.wenzel.com/documents/waveform.html.

The Shera GPSDO made clever use of the input circuit of a 74HCT4046 PLL
chip for squaring.

John


   

Doh... I was thinking that there was some vendor with ap notes on stuff
like this, and I couldn't recall who it was, and I'm actually looking at
a Wenzel OCXO sitting here on the desk.

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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread Bruce Griffiths
One can estimate the resultant jitter from the input slew rate and the 
circuit noise and bandwidth.
Too much bandwidth with a slow input slew rate increases the jitter 
substantially over that possible with an optimal circuit.


Bruce

Robert LaJeunesse wrote:

Assuming a transformer coupled input (with biasing via a secondary center tap)
why not use a fast differential PECL to CMOS level translator? For example, the
IDT ICS508 will take 0.3 to 1.0 V p-p input and give 2.5, 3.3, or 5 V swing on
the output. The chip works down to DC and keeps the duty cycle in the 40%-60%
window up to 250MHz (at 3.3V out). Jitter and noise is not spec'd however.


To increase the noise immunity with a relatively slow 10MHz sine source I'd look
at boosting the amplitude with the transformer, then clipping with balanced
series resistors and back-to-back diodes so the translator sees a higher dV/dT
on its inputs.

Might want to look in some old Motorola ECL appnotes for other possible schemes.

Bob 






From: jimluxjim...@earthlink.net
To: Discussion of precise time and frequency measurementtime-nuts@febo.com
Sent: Wed, December 8, 2010 10:31:08 AM
Subject: [time-nuts] reference oscillator input circuit

I'm looking for suggestions on a general circuit that can be used to receive an
external frequency reference (nominally a real clean sine wave at, say, 10 MHz,
although up to 100 MHz is possible) and turn it into a real clean square
wave.  Galvanic isolation is a plus (a transformer or capacitor would probably
do that).

I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already solved the problem, eh?), but any
other ideas would be welcome.

I've scanned the archives of time-nuts, and while we have a fair amount of
discussion on how to square up the 1Hz (or 100Hz) in a phase noise/ADEV setup,
not so much on what to do with the 10 MHz.  Rick has commented that you don't
want to use a comparator. I have the papers by Dick, et al, and Collins, as well
as all the others.. they tend to be looking at the low frequency problem,
although the analysis is certainly applicable.

I don't know that I'm looking for the whole multiple limiting stages scheme in
any case.

Oh, as far as performance.. Say the need is to not horribly degrade a good
quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz-90dBc
10Hz-110dBc
100Hz-120dBc
1k-100k-125dBc

Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10 sec, and
back up to 2 E-12 at 1000sec.

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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread Rick Karlquist
ECL has a high phase noise floor in the -140s.
Other than that, it works fine.

Rick Karlquist


Robert LaJeunesse wrote:
 Assuming a transformer coupled input (with biasing via a secondary center
 tap)
 why not use a fast differential PECL to CMOS level translator? For
 example, the
 IDT ICS508 will take 0.3 to 1.0 V p-p input and give 2.5, 3.3, or 5 V
 swing on
 the output. The chip works down to DC and keeps the duty cycle in the
 40%-60%
 window up to 250MHz (at 3.3V out). Jitter and noise is not spec'd however.


 To increase the noise immunity with a relatively slow 10MHz sine source
 I'd look
 at boosting the amplitude with the transformer, then clipping with
 balanced
 series resistors and back-to-back diodes so the translator sees a higher
 dV/dT
 on its inputs.

 Might want to look in some old Motorola ECL appnotes for other possible
 schemes.

 Bob 




 
 From: jimlux jim...@earthlink.net
 To: Discussion of precise time and frequency measurement
 time-nuts@febo.com
 Sent: Wed, December 8, 2010 10:31:08 AM
 Subject: [time-nuts] reference oscillator input circuit

 I'm looking for suggestions on a general circuit that can be used to
 receive an
 external frequency reference (nominally a real clean sine wave at, say, 10
 MHz,
 although up to 100 MHz is possible) and turn it into a real clean square
 wave.  Galvanic isolation is a plus (a transformer or capacitor would
 probably
 do that).

 I was thinking about rummaging through the schematics for test equipment
 reference inputs (since they've already solved the problem, eh?), but
 any
 other ideas would be welcome.

 I've scanned the archives of time-nuts, and while we have a fair amount of
 discussion on how to square up the 1Hz (or 100Hz) in a phase noise/ADEV
 setup,
 not so much on what to do with the 10 MHz.  Rick has commented that you
 don't
 want to use a comparator. I have the papers by Dick, et al, and Collins,
 as well
 as all the others.. they tend to be looking at the low frequency problem,
 although the analysis is certainly applicable.

 I don't know that I'm looking for the whole multiple limiting stages
 scheme in
 any case.

 Oh, as far as performance.. Say the need is to not horribly degrade a good
 quality crystal oscillator... here's a typical set of specs:
 76 MHz
 1Hz -90dBc
 10Hz -110dBc
 100Hz -120dBc
 1k-100k -125dBc

 Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10
 sec, and
 back up to 2 E-12 at 1000sec.

 ___
 time-nuts mailing list -- time-nuts@febo.com
 To unsubscribe, go to
 https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
 and follow the instructions there.
 ___
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 To unsubscribe, go to
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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread Rick Karlquist
Yes, and thus if you are going to use a comparator or line
receiver (not recommended), then you should use the SLOWEST
one that still works, if you want to optimize jitter.
This is because the noise bandwidth is less.

Bruce Griffiths wrote:
 One can estimate the resultant jitter from the input slew rate and the
 circuit noise and bandwidth.
 Too much bandwidth with a slow input slew rate increases the jitter
 substantially over that possible with an optimal circuit.

 Bruce

 Robert LaJeunesse wrote:
 Assuming a transformer coupled input (with biasing via a secondary
 center tap)
 why not use a fast differential PECL to CMOS level translator? For
 example, the
 IDT ICS508 will take 0.3 to 1.0 V p-p input and give 2.5, 3.3, or 5 V
 swing on
 the output. The chip works down to DC and keeps the duty cycle in the
 40%-60%
 window up to 250MHz (at 3.3V out). Jitter and noise is not spec'd
 however.


 To increase the noise immunity with a relatively slow 10MHz sine source
 I'd look
 at boosting the amplitude with the transformer, then clipping with
 balanced
 series resistors and back-to-back diodes so the translator sees a higher
 dV/dT
 on its inputs.

 Might want to look in some old Motorola ECL appnotes for other possible
 schemes.

 Bob




 
 From: jimluxjim...@earthlink.net
 To: Discussion of precise time and frequency
 measurementtime-nuts@febo.com
 Sent: Wed, December 8, 2010 10:31:08 AM
 Subject: [time-nuts] reference oscillator input circuit

 I'm looking for suggestions on a general circuit that can be used to
 receive an
 external frequency reference (nominally a real clean sine wave at, say,
 10 MHz,
 although up to 100 MHz is possible) and turn it into a real clean
 square
 wave.  Galvanic isolation is a plus (a transformer or capacitor would
 probably
 do that).

 I was thinking about rummaging through the schematics for test equipment
 reference inputs (since they've already solved the problem, eh?), but
 any
 other ideas would be welcome.

 I've scanned the archives of time-nuts, and while we have a fair amount
 of
 discussion on how to square up the 1Hz (or 100Hz) in a phase noise/ADEV
 setup,
 not so much on what to do with the 10 MHz.  Rick has commented that you
 don't
 want to use a comparator. I have the papers by Dick, et al, and Collins,
 as well
 as all the others.. they tend to be looking at the low frequency
 problem,
 although the analysis is certainly applicable.

 I don't know that I'm looking for the whole multiple limiting stages
 scheme in
 any case.

 Oh, as far as performance.. Say the need is to not horribly degrade a
 good
 quality crystal oscillator... here's a typical set of specs:
 76 MHz
 1Hz-90dBc
 10Hz-110dBc
 100Hz-120dBc
 1k-100k-125dBc

 Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10
 sec, and
 back up to 2 E-12 at 1000sec.

 ___
 time-nuts mailing list -- time-nuts@febo.com
 To unsubscribe, go to
 https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
 and follow the instructions there.
 ___
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 To unsubscribe, go to
 https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
 and follow the instructions there.





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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread Magnus Danielson

On 12/08/2010 06:28 PM, Rick Karlquist wrote:

jimlux wrote:

I'm looking for suggestions on a general circuit that can be used to
receive an external frequency reference (nominally a real clean sine
wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
into a real clean square wave.  Galvanic isolation is a plus (a
transformer or capacitor would probably do that).


In the 5071A at 80 MHz, we capacitively coupled a sine wave into
a 74AC series logic gate, that had DC bias resistors to hold
it at half the supply voltage.


A feed-back resistor over an inverter and capacitive feed will self-bias 
such that PWM is 50%. The details of the gate being used may however 
prove lethal as you may end up with self-biasing into ring-modulation 
mode for some inverters being effectively three inverters in series.


The use of a long-tailed pair on the input to gain out of the problem, 
prior to a gate for final squaring up would be my recommendation. It 
would be in the spirit of the Dick and Collins papers. The needed 
slew-rate gain will not be that great for 10 MHz to 100 MHz sine.


You should not need to use very exotic setups to get the performance you 
need.


Cheers,
Magnus

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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread Magnus Danielson

On 12/08/2010 09:13 PM, Rick Karlquist wrote:

Yes, and thus if you are going to use a comparator or line
receiver (not recommended), then you should use the SLOWEST
one that still works, if you want to optimize jitter.
This is because the noise bandwidth is less.


For optimum result you need to balance the slew-rate gain (essentially 
gain of the transition slew-rate) and the amount of added noise. You 
need a certain amount of bandwidth for a certain amount of output 
slew-rate, but higher bandwidth also gives more noise. A multi-stage 
setup use moderate gain and bandwidth in the initial stages, but it 
increases down the line.


A few links:
http://www.ko4bb.com/~bruce/CLKSHPR.html
http://www.ko4bb.com/~bruce/ZeroCrossingDetectors.html

As for transformer isolation, for most uses I find it fairly useless, 
but an RF-choke to isolate the front-end and the electronics RF-wise in 
common mode sense is more useful IMHO.


Cheers,
Magnus

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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread Javier Herrero
I was thinking about how good or how bad would result the use of an LVDS 
line receiver ... but it is only a though :)


Regards,

Javier

El 08/12/2010 19:50, Robert LaJeunesse escribió:

Assuming a transformer coupled input (with biasing via a secondary center tap)
why not use a fast differential PECL to CMOS level translator? For example, the
IDT ICS508 will take 0.3 to 1.0 V p-p input and give 2.5, 3.3, or 5 V swing on
the output. The chip works down to DC and keeps the duty cycle in the 40%-60%
window up to 250MHz (at 3.3V out). Jitter and noise is not spec'd however.


To increase the noise immunity with a relatively slow 10MHz sine source I'd look
at boosting the amplitude with the transformer, then clipping with balanced
series resistors and back-to-back diodes so the translator sees a higher dV/dT
on its inputs.

Might want to look in some old Motorola ECL appnotes for other possible schemes.

Bob 






From: jimluxjim...@earthlink.net
To: Discussion of precise time and frequency measurementtime-nuts@febo.com
Sent: Wed, December 8, 2010 10:31:08 AM
Subject: [time-nuts] reference oscillator input circuit

I'm looking for suggestions on a general circuit that can be used to receive an
external frequency reference (nominally a real clean sine wave at, say, 10 MHz,
although up to 100 MHz is possible) and turn it into a real clean square
wave.  Galvanic isolation is a plus (a transformer or capacitor would probably
do that).

I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already solved the problem, eh?), but any
other ideas would be welcome.

I've scanned the archives of time-nuts, and while we have a fair amount of
discussion on how to square up the 1Hz (or 100Hz) in a phase noise/ADEV setup,
not so much on what to do with the 10 MHz.  Rick has commented that you don't
want to use a comparator. I have the papers by Dick, et al, and Collins, as well
as all the others.. they tend to be looking at the low frequency problem,
although the analysis is certainly applicable.

I don't know that I'm looking for the whole multiple limiting stages scheme in
any case.

Oh, as far as performance.. Say the need is to not horribly degrade a good
quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz-90dBc
10Hz-110dBc
100Hz-120dBc
1k-100k-125dBc

Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10 sec, and
back up to 2 E-12 at 1000sec.

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--

Javier HerreroEMAIL: jherr...@hvsistemas.com
Chief Technology Officer
HV Sistemas S.L.  PHONE: +34 949 336 806
Los Charcones, 17 FAX:   +34 949 336 792
19170 El Casar - Guadalajara - Spain  WEB: http://www.hvsistemas.com


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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread Chris Albertson
Of all the ways to square a sine wave I think the best might be to use a PLL.
the raising edge of your output square wave would trigger a sample of the
input sine wave.  The distance from zero volts of that sample is the
phase error.

The goal is to have the raising edge of the square wave happen just as the
sine crosses zero.  But if it's not dead-on you get an error signal that can be
either positive or negative and this error is low pass filtered and
then applied as
a correction.

But my guess is that if you are using this to feed a 'scope a
reference frequency
the scope will have it's own PLL.




-- 
=
Chris Albertson
Redondo Beach, California

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Re: [time-nuts] reference oscillator input circuit

2010-12-08 Thread John Miles
The Wenzel diff-amp circuit is OK but it will run out of steam before 100
MHz unless you use different transistors.  On the other hand you really have
to go out of your way to corrupt the signal at the -125 dBc/Hz level.  At
that level of play any decent comparator with the necessary slew rate will
be fine.

A 74AC gate looks good in this scenario:
http://www.ke5fx.com/ac.htm

... subject to what other people have said about it being sensitive to input
level.

-- john, KE5FX



 -Original Message-
 From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com]on
 Behalf Of jimlux
 Sent: Wednesday, December 08, 2010 7:31 AM
 To: Discussion of precise time and frequency measurement
 Subject: [time-nuts] reference oscillator input circuit


 I'm looking for suggestions on a general circuit that can be used to
 receive an external frequency reference (nominally a real clean sine
 wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
 into a real clean square wave.  Galvanic isolation is a plus (a
 transformer or capacitor would probably do that).

 I was thinking about rummaging through the schematics for test equipment
 reference inputs (since they've already solved the problem, eh?), but
 any other ideas would be welcome.

 I've scanned the archives of time-nuts, and while we have a fair amount
 of discussion on how to square up the 1Hz (or 100Hz) in a phase
 noise/ADEV setup, not so much on what to do with the 10 MHz.  Rick has
 commented that you don't want to use a comparator. I have the papers by
 Dick, et al, and Collins, as well as all the others.. they tend to be
 looking at the low frequency problem, although the analysis is certainly
 applicable.

 I don't know that I'm looking for the whole multiple limiting stages
 scheme in any case.

 Oh, as far as performance.. Say the need is to not horribly degrade a
 good quality crystal oscillator... here's a typical set of specs:
 76 MHz
 1Hz -90dBc
 10Hz -110dBc
 100Hz -120dBc
 1k-100k -125dBc

 Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10
 sec, and back up to 2 E-12 at 1000sec.

 ___
 time-nuts mailing list -- time-nuts@febo.com
 To unsubscribe, go to
 https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
 and follow the instructions there.



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