[time-nuts] Odd-order multiplication of CMOS-output OCXO
Hi time nuts, I'm looking for a 5x frequency multiplication scheme to let me use a 16-MHz square-wave OCXO for an ADC encode clock at 80 MHz. Constraints in order of importance: 1. Don't degrade the nice phase noise of the OCXO (-90 @ 1, -120 @10, -140 @ 100, -160 @ 1k) any more than necessary; at the very least, it should not impact the ADC noise floor in the primary 0-40 MHz image. (This should give quite a bit of leeway, but better is better :) 2. OCXO power consumption (~150 mW) should still dominate total clock-system power. Would like to keep the multiplier/buffer under 50 mW. 3. No supply rail above 3.3V. This "ought to be" (?) easy, because the OCXO output is already rich in odd harmonics. All that's needed is to isolate and perhaps buffer the right one without screwing up my noise spec. This is where I could use some help... The ADC (AD9266) wants a differential clock, sinusoidal or square doesn't matter. The datasheet recommends transformer coupling with antiparallel diodes to keep the swing ~ 1.5Vp-p. (The min/max spec says anything between 0.2 and 3.6V.) The 3.3V OCXO should give me 0.8Vp-p at the 5th harmonic without any amplification, so in theory I guess I could just filter and transformer couple and be on my way. But perhaps some amplification is in order to increase the slew rate? I looked at the Wenzel tech notes for ideas, e.g. this one using logic gates and tuned circuits: http://www.techlib.com/files/hcmos.pdf but I lack the background to evaluate the pros and cons of introducing extra CMOS logic. I also found this common-base amp circuit in the archives: https://www.febo.com/pipermail/time-nuts/2016-January/095683.html and https://www.febo.com/pipermail/time-nuts/attachments/20160126/ae3b4be8/attachment-0001.pdf I've read that I should avoid high-Q tuned circuits, because they will introduce more noise with temperature variation. Are there any rules of thumb for how much Q is too much? Any pointers would be most appreciated! Thanks, Mark ___ time-nuts mailing list -- time-nuts@lists.febo.com To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com and follow the instructions there.
Re: [time-nuts] DAC for OCXO disciplining
Hi Hal, On 2020-01-18 22:50, Hal Murray wrote: > mag...@rubidium.se said: >> I was amazed that it was this simple to move energy to where it makes less >> damage. Turns out that FPGA logic wise, it's at the same cost as PWM. > You can do the same thing in software. Many small CPUs have IO gear that > lets > you send raw bits. Just setup a buffer in memory and send it out. > > Simple UARTs aren't ideal due to start/stop bits but you can probably work > around that. Your output range is 10% to 90% rather than 0-100. Many serial > ports have modes without start/stop bits. I haven't looked carefully but > some > of the gear for simple 2 or 3 wire protocols may work. > Sure, you can do this in CPU, but you want to make the updates fairly well spread over time, with relatively robust timing, which you for sure can do, the PICDIV shows this, but you need to know this is part of the design problem and focus on that. I implemented it in FPGA because I was already doing it in the FPGA domain, and getting stable enough timing was trivial and would still be my preferred method. Cheers, Magnus ___ time-nuts mailing list -- time-nuts@lists.febo.com To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com and follow the instructions there.
Re: [time-nuts] DAC for OCXO disciplining
mag...@rubidium.se said: > I was amazed that it was this simple to move energy to where it makes less > damage. Turns out that FPGA logic wise, it's at the same cost as PWM. You can do the same thing in software. Many small CPUs have IO gear that lets you send raw bits. Just setup a buffer in memory and send it out. Simple UARTs aren't ideal due to start/stop bits but you can probably work around that. Your output range is 10% to 90% rather than 0-100. Many serial ports have modes without start/stop bits. I haven't looked carefully but some of the gear for simple 2 or 3 wire protocols may work. -- These are my opinions. I hate spam. ___ time-nuts mailing list -- time-nuts@lists.febo.com To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com and follow the instructions there.
Re: [time-nuts] low phase noise, noise floor and noise figure amplifier at 400MHz
Patrick, I try to share what I have learned as generously as others before me have done. Somewhere along the line I transitioned from noob to actually know something and now, well, I can't claim complete lack of knowledge anymore. But, I enjoy the many questions, as it forces me to think, think and think. There is always things to learn in obscure corners and plain questions. It turns out that if you are stringent enough there is many white spots that you may not expect. So there is still things to learn and angles to cover. So thank you for asking questions, it is the constant challenge that makes us think, share and learn stuff. Most importantly, we need to enjoy the fun of challenge and learning! Cheers, Magnus On 2020-01-18 17:29, Patrick Murphy wrote: > Magnus, > > Well you kindly explain what you mean by your comment "I've seen > both instrument makers and oscillator makes handwaving to protect the values > which so far is understood to be non-physical." , especially the > non-physical part. > > While I can keep up with a lot of the discussions here, I will likely die > an old man before I consider myself anything more than a noob. Thanks for > your patience. > > -Pat (KG5YPQ) > > > On Sat, Jan 18, 2020, 8:57 AM Magnus Danielson wrote: > >> I think one should recall that for very deep phase-noise numbers for >> far-out noise, we cannot remove the suspicion of cross-correlation >> cancellation problems have overstated the phase-noise levels. I've seen >> both instrument makers and oscillator makes handwaving to protect the >> values which so far is understood to be non-physical. >> >> Cheers, >> Magnus >> >> On 2020-01-10 03:25, Bruce Griffiths wrote: >>> That's not possible at room temperature since thermal noise will limit >> the residual PN to -180DbC/Hz with a noiseless amplifier and a +3dBm input. >>> Bruce >>> On 10 January 2020 at 14:38 Lifespeed >> wrote: Hi Time Nuts, I have a need for a low phase noise, noise floor and noise figure >> amplifier at 400MHz. I have tried some off-the-shelf 50 ohm amplifiers, the best >> of which degrades phase noise by a couple dB. I'm working with a signal >> with -172dBc/Hz PN, so not much tolerance for degradation here. The input >> signal level is only 3dBm, so noise figure still matters as well. I'm looking >> for 15dB gain, 16dBm P1. The residual phase noise would have to be better >> than -180dBc/Hz, and I would probably operate the amplifier slightly >> compressed. Any suggestions on topologies, transistors, white papers, etc? I'm considering the NXP BFU590Q silicon bipolar transistor, which I have >> used in a transformer feedback configuration at 100MHz with less than >> -180dBc/Hz PN. But this topology doesn't appear practical for 400MHz due to the >> difficulty maintaining a high collector impedance at that frequency with a >> transformer. Nor do I need to control the gain, which is one of the features of the transformer-feedback topology. I was thinking about common emitter with inductive emitter degeneration. Not sure cascode is right for this UHF application. Lifespeed ___ time-nuts mailing list -- time-nuts@lists.febo.com To unsubscribe, go to >> http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com and follow the instructions there. >>> ___ >>> time-nuts mailing list -- time-nuts@lists.febo.com >>> To unsubscribe, go to >> http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com >>> and follow the instructions there. >> >> ___ >> time-nuts mailing list -- time-nuts@lists.febo.com >> To unsubscribe, go to >> http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com >> and follow the instructions there. >> > ___ > time-nuts mailing list -- time-nuts@lists.febo.com > To unsubscribe, go to > http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com > and follow the instructions there. ___ time-nuts mailing list -- time-nuts@lists.febo.com To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com and follow the instructions there.
Re: [time-nuts] low phase noise, noise floor and noise figure amplifier at 400MHz
Magnus, Well you kindly explain what you mean by your comment "I've seen both instrument makers and oscillator makes handwaving to protect the values which so far is understood to be non-physical." , especially the non-physical part. While I can keep up with a lot of the discussions here, I will likely die an old man before I consider myself anything more than a noob. Thanks for your patience. -Pat (KG5YPQ) On Sat, Jan 18, 2020, 8:57 AM Magnus Danielson wrote: > I think one should recall that for very deep phase-noise numbers for > far-out noise, we cannot remove the suspicion of cross-correlation > cancellation problems have overstated the phase-noise levels. I've seen > both instrument makers and oscillator makes handwaving to protect the > values which so far is understood to be non-physical. > > Cheers, > Magnus > > On 2020-01-10 03:25, Bruce Griffiths wrote: > > That's not possible at room temperature since thermal noise will limit > the residual PN to -180DbC/Hz with a noiseless amplifier and a +3dBm input. > > > > Bruce > > > >> On 10 January 2020 at 14:38 Lifespeed > wrote: > >> > >> > >> Hi Time Nuts, > >> > >> > >> > >> I have a need for a low phase noise, noise floor and noise figure > amplifier > >> at 400MHz. I have tried some off-the-shelf 50 ohm amplifiers, the best > of > >> which degrades phase noise by a couple dB. I'm working with a signal > with > >> -172dBc/Hz PN, so not much tolerance for degradation here. The input > signal > >> level is only 3dBm, so noise figure still matters as well. I'm looking > for > >> 15dB gain, 16dBm P1. The residual phase noise would have to be better > than > >> -180dBc/Hz, and I would probably operate the amplifier slightly > compressed. > >> > >> > >> > >> Any suggestions on topologies, transistors, white papers, etc? I'm > >> considering the NXP BFU590Q silicon bipolar transistor, which I have > used in > >> a transformer feedback configuration at 100MHz with less than > -180dBc/Hz PN. > >> But this topology doesn't appear practical for 400MHz due to the > difficulty > >> maintaining a high collector impedance at that frequency with a > transformer. > >> Nor do I need to control the gain, which is one of the features of the > >> transformer-feedback topology. I was thinking about common emitter with > >> inductive emitter degeneration. Not sure cascode is right for this UHF > >> application. > >> > >> > >> > >> Lifespeed > >> > >> > >> > >> ___ > >> time-nuts mailing list -- time-nuts@lists.febo.com > >> To unsubscribe, go to > http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com > >> and follow the instructions there. > > ___ > > time-nuts mailing list -- time-nuts@lists.febo.com > > To unsubscribe, go to > http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com > > and follow the instructions there. > > > ___ > time-nuts mailing list -- time-nuts@lists.febo.com > To unsubscribe, go to > http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com > and follow the instructions there. > ___ time-nuts mailing list -- time-nuts@lists.febo.com To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com and follow the instructions there.
Re: [time-nuts] low phase noise, noise floor and noise figure amplifier at 400MHz
I think one should recall that for very deep phase-noise numbers for far-out noise, we cannot remove the suspicion of cross-correlation cancellation problems have overstated the phase-noise levels. I've seen both instrument makers and oscillator makes handwaving to protect the values which so far is understood to be non-physical. Cheers, Magnus On 2020-01-10 03:25, Bruce Griffiths wrote: > That's not possible at room temperature since thermal noise will limit the > residual PN to -180DbC/Hz with a noiseless amplifier and a +3dBm input. > > Bruce > >> On 10 January 2020 at 14:38 Lifespeed wrote: >> >> >> Hi Time Nuts, >> >> >> >> I have a need for a low phase noise, noise floor and noise figure amplifier >> at 400MHz. I have tried some off-the-shelf 50 ohm amplifiers, the best of >> which degrades phase noise by a couple dB. I'm working with a signal with >> -172dBc/Hz PN, so not much tolerance for degradation here. The input signal >> level is only 3dBm, so noise figure still matters as well. I'm looking for >> 15dB gain, 16dBm P1. The residual phase noise would have to be better than >> -180dBc/Hz, and I would probably operate the amplifier slightly compressed. >> >> >> >> Any suggestions on topologies, transistors, white papers, etc? I'm >> considering the NXP BFU590Q silicon bipolar transistor, which I have used in >> a transformer feedback configuration at 100MHz with less than -180dBc/Hz PN. >> But this topology doesn't appear practical for 400MHz due to the difficulty >> maintaining a high collector impedance at that frequency with a transformer. >> Nor do I need to control the gain, which is one of the features of the >> transformer-feedback topology. I was thinking about common emitter with >> inductive emitter degeneration. Not sure cascode is right for this UHF >> application. >> >> >> >> Lifespeed >> >> >> >> ___ >> time-nuts mailing list -- time-nuts@lists.febo.com >> To unsubscribe, go to >> http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com >> and follow the instructions there. > ___ > time-nuts mailing list -- time-nuts@lists.febo.com > To unsubscribe, go to > http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com > and follow the instructions there. ___ time-nuts mailing list -- time-nuts@lists.febo.com To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com and follow the instructions there.
Re: [time-nuts] DAC for OCXO disciplining
Hi, God points! I know I have both the integrator as well as bandwidth limitation of the EFC to help me further. For the application the main focus was to increase the resolution, and I was taking care of secondary consideration of phase noise contribution. This reminds me that I've not taken the time to measure phase noise properly on those boxes. It's difficult when you have this box A, B and C from vendor X, Y and Z which for sure have requirements as they produce carrier in up to the 1 GHz, but you do not have requirements on the 10 MHz reference and unknown properties of the PLL and synthesis. There is no standard for it, since the problem is not understood. Under such situations you just need to make it as good as you think is needed, and just try to avoid overly expensive solutions or overly noisy solutions. Reality gives us no opportunity to good systems engineering at times. You end up guestimating. Cheers, Magnus On 2020-01-18 15:02, Bob kb8tq wrote: > Hi > > One thing to remember in this: > > Since the EFC is FM and you care about PM (phase noise) the > FM to PM math gives you a “free” LPF. Get the spurs high enough > and they get pretty far down. You also want to get out in the “flat” > phase noise region. Otherwise you are chasing an ever decreasing > noise floor. > > An odd thing to consider: > > We measure noise (and by default spurs as well) in a 1 Hz BW. Does > your end application care at 1 Hz? If you increase the noise BW the > spurs drop closer to the floor... In a lot of cases anything more than > X dB down simply does not matter > > So is this or that approach OK? The answer is very much “that depends”. > > Bob > >> On Jan 18, 2020, at 8:39 AM, Magnus Danielson wrote: >> >> Hi, >> >> Sure. I want people to mentally retire PWM, it's only benefit is that it >> is easy to understand, but it to some degree have the worst property you >> can think of. >> >> I did a very simple trick. First of all we have a "low" or "high" value >> to output to the DAC. The "low" value is the higher bits of the value >> you want, but with the lower (interpolated) bits scrapped, and the >> "high" value is the "low" value plus 1 LSB of DAC values. We now have >> the interpolating bits and then choose "high" or "low" in some pattern >> to interpolate between them. ThiseFC i is exactly the same as PWM. We then >> have a counter that counts which interpolation cycle we are in, again >> the same as PWM. Now comes the difference. I then used the MSB of the >> interpolation bits to steer the "high"/"low" value for every other bits, >> thus muxed out when the LSB of the counter is 0. This moves the energy >> of the MSB interpolation to the highest frequency, while achieving the >> same average contribution. Now every other bit is free, and we used them >> the same for the MSB-1 bit of the interpolator, using the LSB+1 bit of >> the counter etc. Thus, the counter steers the selection of a mux-chain >> (much as the carry chain in the PWM). The design pattern is trivial to >> extend to interpolation of any bits. >> >> The benefit of this is that as the interpolating values goes through a >> first degree low-pass filter, you end up with the peak energy will be >> flat, as the highest energy will now have a counter-acting -6 dB/Oct. >> >> I was amazed that it was this simple to move energy to where it makes >> less damage. Turns out that FPGA logic wise, it's at the same cost as PWM. >> >> Now, there is other relatively simple ways of doing the same that I >> would consider. >> >> The error accumulator method is one, which is similar to phase-accumulation. >> >> Cheers, >> Magnus >> >>> On 2020-01-14 14:40, Bob kb8tq wrote: >>> Hi >>> >>> Put another way - this is sort of why sigma delta was invented. The whole >>> “move >>> the energy” thing was very much core to the invention. These days, even >>> some >>> pretty cheap micro’s have sigma delta hardware on them. So far I have yet >>> to find >>> one with quite the “right stuff” on it to do a DAC. The ones I’ve seen are >>> more >>> targeted at ADC’s. >>> >>> Bob >>> > On Jan 14, 2020, at 7:50 AM, Magnus Danielson wrote: Hi, On 2020-01-14 02:00, Hal Murray wrote: > lifesp...@claybuccellato.com said: >> Some thoughts that have occurred to me are coarse and fine DACs, possibly >> sigma-delta or pulse width modulation (PWM). > Pulse width modulation has noise at the frequency of the whole sequence. > A 10 > bit DAC running at 1 megahertz will have noise at 1 kilohertz. As you > add > more bits to get better resolution, the noise frequency gets lower. For > practical values, that noise may be hard to filter. What doesn't get > filtered > turns into spurs. > That is why PWM is not a very smart idea at all for these purposes. I've done a variant where I inverted the spectrum of PWM. I sketched on an article but I never finished it. You want
Re: [time-nuts] DAC for OCXO disciplining
Hi One thing to remember in this: Since the EFC is FM and you care about PM (phase noise) the FM to PM math gives you a “free” LPF. Get the spurs high enough and they get pretty far down. You also want to get out in the “flat” phase noise region. Otherwise you are chasing an ever decreasing noise floor. An odd thing to consider: We measure noise (and by default spurs as well) in a 1 Hz BW. Does your end application care at 1 Hz? If you increase the noise BW the spurs drop closer to the floor... In a lot of cases anything more than X dB down simply does not matter So is this or that approach OK? The answer is very much “that depends”. Bob > On Jan 18, 2020, at 8:39 AM, Magnus Danielson wrote: > > Hi, > > Sure. I want people to mentally retire PWM, it's only benefit is that it > is easy to understand, but it to some degree have the worst property you > can think of. > > I did a very simple trick. First of all we have a "low" or "high" value > to output to the DAC. The "low" value is the higher bits of the value > you want, but with the lower (interpolated) bits scrapped, and the > "high" value is the "low" value plus 1 LSB of DAC values. We now have > the interpolating bits and then choose "high" or "low" in some pattern > to interpolate between them. ThiseFC i is exactly the same as PWM. We then > have a counter that counts which interpolation cycle we are in, again > the same as PWM. Now comes the difference. I then used the MSB of the > interpolation bits to steer the "high"/"low" value for every other bits, > thus muxed out when the LSB of the counter is 0. This moves the energy > of the MSB interpolation to the highest frequency, while achieving the > same average contribution. Now every other bit is free, and we used them > the same for the MSB-1 bit of the interpolator, using the LSB+1 bit of > the counter etc. Thus, the counter steers the selection of a mux-chain > (much as the carry chain in the PWM). The design pattern is trivial to > extend to interpolation of any bits. > > The benefit of this is that as the interpolating values goes through a > first degree low-pass filter, you end up with the peak energy will be > flat, as the highest energy will now have a counter-acting -6 dB/Oct. > > I was amazed that it was this simple to move energy to where it makes > less damage. Turns out that FPGA logic wise, it's at the same cost as PWM. > > Now, there is other relatively simple ways of doing the same that I > would consider. > > The error accumulator method is one, which is similar to phase-accumulation. > > Cheers, > Magnus > >> On 2020-01-14 14:40, Bob kb8tq wrote: >> Hi >> >> Put another way - this is sort of why sigma delta was invented. The whole >> “move >> the energy” thing was very much core to the invention. These days, even some >> pretty cheap micro’s have sigma delta hardware on them. So far I have yet to >> find >> one with quite the “right stuff” on it to do a DAC. The ones I’ve seen are >> more >> targeted at ADC’s. >> >> Bob >> On Jan 14, 2020, at 7:50 AM, Magnus Danielson wrote: >>> >>> Hi, >>> >>> On 2020-01-14 02:00, Hal Murray wrote: lifesp...@claybuccellato.com said: > Some thoughts that have occurred to me are coarse and fine DACs, possibly > sigma-delta or pulse width modulation (PWM). Pulse width modulation has noise at the frequency of the whole sequence. A 10 bit DAC running at 1 megahertz will have noise at 1 kilohertz. As you add more bits to get better resolution, the noise frequency gets lower. For practical values, that noise may be hard to filter. What doesn't get filtered turns into spurs. >>> That is why PWM is not a very smart idea at all for these purposes. >>> >>> I've done a variant where I inverted the spectrum of PWM. I sketched on >>> an article but I never finished it. >>> >>> You want to place your most significant bit energy as high as possible, >>> and the same for the second most significant bit. Turns out that this >>> becomes fairly simple counter and mux solution which on average achieves >>> exactly the same level as the PWM, but with noise which is much easier >>> to filter and with about the same level of complexity as the PWM. >>> >>> But then, you can do first degree sigma-delta and achieve about the same >>> thing. >>> >>> But PWM for this, is not a good idea, it's in fact a terrible idea since >>> it has the most significant bit with the lowest frequency which becomes >>> hard to filter. >>> >>> Cheers, >>> Magnus >>> >>> >>> ___ >>> time-nuts mailing list -- time-nuts@lists.febo.com >>> To unsubscribe, go to >>> http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com >>> and follow the instructions there. >> >> ___ >> time-nuts mailing list -- time-nuts@lists.febo.com >> To unsubscribe, go to >> http://lists.febo.com/mailman/listin
Re: [time-nuts] DAC for OCXO disciplining
Hi, Sure. I want people to mentally retire PWM, it's only benefit is that it is easy to understand, but it to some degree have the worst property you can think of. I did a very simple trick. First of all we have a "low" or "high" value to output to the DAC. The "low" value is the higher bits of the value you want, but with the lower (interpolated) bits scrapped, and the "high" value is the "low" value plus 1 LSB of DAC values. We now have the interpolating bits and then choose "high" or "low" in some pattern to interpolate between them. This is exactly the same as PWM. We then have a counter that counts which interpolation cycle we are in, again the same as PWM. Now comes the difference. I then used the MSB of the interpolation bits to steer the "high"/"low" value for every other bits, thus muxed out when the LSB of the counter is 0. This moves the energy of the MSB interpolation to the highest frequency, while achieving the same average contribution. Now every other bit is free, and we used them the same for the MSB-1 bit of the interpolator, using the LSB+1 bit of the counter etc. Thus, the counter steers the selection of a mux-chain (much as the carry chain in the PWM). The design pattern is trivial to extend to interpolation of any bits. The benefit of this is that as the interpolating values goes through a first degree low-pass filter, you end up with the peak energy will be flat, as the highest energy will now have a counter-acting -6 dB/Oct. I was amazed that it was this simple to move energy to where it makes less damage. Turns out that FPGA logic wise, it's at the same cost as PWM. Now, there is other relatively simple ways of doing the same that I would consider. The error accumulator method is one, which is similar to phase-accumulation. Cheers, Magnus On 2020-01-14 14:40, Bob kb8tq wrote: > Hi > > Put another way - this is sort of why sigma delta was invented. The whole > “move > the energy” thing was very much core to the invention. These days, even some > pretty cheap micro’s have sigma delta hardware on them. So far I have yet to > find > one with quite the “right stuff” on it to do a DAC. The ones I’ve seen are > more > targeted at ADC’s. > > Bob > >> On Jan 14, 2020, at 7:50 AM, Magnus Danielson wrote: >> >> Hi, >> >> On 2020-01-14 02:00, Hal Murray wrote: >>> lifesp...@claybuccellato.com said: Some thoughts that have occurred to me are coarse and fine DACs, possibly sigma-delta or pulse width modulation (PWM). >>> Pulse width modulation has noise at the frequency of the whole sequence. A >>> 10 >>> bit DAC running at 1 megahertz will have noise at 1 kilohertz. As you add >>> more bits to get better resolution, the noise frequency gets lower. For >>> practical values, that noise may be hard to filter. What doesn't get >>> filtered >>> turns into spurs. >>> >> That is why PWM is not a very smart idea at all for these purposes. >> >> I've done a variant where I inverted the spectrum of PWM. I sketched on >> an article but I never finished it. >> >> You want to place your most significant bit energy as high as possible, >> and the same for the second most significant bit. Turns out that this >> becomes fairly simple counter and mux solution which on average achieves >> exactly the same level as the PWM, but with noise which is much easier >> to filter and with about the same level of complexity as the PWM. >> >> But then, you can do first degree sigma-delta and achieve about the same >> thing. >> >> But PWM for this, is not a good idea, it's in fact a terrible idea since >> it has the most significant bit with the lowest frequency which becomes >> hard to filter. >> >> Cheers, >> Magnus >> >> >> ___ >> time-nuts mailing list -- time-nuts@lists.febo.com >> To unsubscribe, go to >> http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com >> and follow the instructions there. > > ___ > time-nuts mailing list -- time-nuts@lists.febo.com > To unsubscribe, go to > http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com > and follow the instructions there. ___ time-nuts mailing list -- time-nuts@lists.febo.com To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com and follow the instructions there.
