[time-nuts] Where do people get the time?

2022-01-09 Thread Thomas D. Erb
in the 1930's you could call the local telephone operator - who would look at 
the wall clock at say the "electric time is" .

meaning the time the generator synchronous wall clock read.


Thomas D. Erb
p:508-359-4396
f:508-359-4482
a:97 West Street, Medfield, MA 02052 USA
e: t...@electrictime.com
w:www.electrictime.com
Tower & Street Clocks Since 1928

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[time-nuts] Re: PICDIV stability

2022-01-09 Thread ghf

Am 2022-01-09 1:21, schrieb Bruce Griffiths:

Yes, that post is full of misleading information.
The TI document is irrelevant as the PIC based divider doesn't have
non harmonically related signals using the same chip.
All internal signals within the PIC are harmonics of the divided output 
signal.

The post did not distinguish between random jitter and data dependent
jitter etc. Either the poster doesn't understand the finer details of
frequency division or the post is intended to mislead.



But the both the fundamental and the harmonics have gate delays
that may vary. That cannot be neglected, for the delays of the
fundamental even limit the operating frequency of the chip.

Nothing that cannot be healed by a contemporary 7474 look alike
clocked from the original source.


Bruce, your posts have something that my provider doesn't like.
He diverts them into the spam folder, I just found 3 or 4 of them.
No other timenuts posts are affected.

Cheers, Gerhard.

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[time-nuts] Re: PICDIV stability (was: Crystal oscillator for a begginer)

2022-01-09 Thread Magnus Danielson via time-nuts

Hi,

The traditional way is to lock an oscillator and look at the phase 
detector output.


You get a high-pass filter from the locking, but for many purposes 
that's just fine.


In some cases it is called "the golden PLL method".

Cheers,
Magnus

On 2022-01-09 18:04, Marek Doršic wrote:

Is there any method to measure random jitter without TimePod or scopes costing 
a small fortune?

 .md


On 9 Jan 2022, at 01:21, Bruce Griffiths  wrote:

Yes, that post is full of misleading information.
The TI document is irrelevant as the PIC based divider doesn't have non 
harmonically related signals using the same chip.
All internal signals within the PIC are harmonics of the divided output signal.
The post did not distinguish between random jitter and data dependent jitter 
etc. Either the poster doesn't understand the finer details of frequency 
division or the post is intended to mislead.

Bruce

On 09/01/2022 12:55 Angus via time-nuts  wrote:


Maybe it got mashed up, but I only linked to one post, and that
addressed the specific question that had been asked. There is also, as
far as I know, no 'misinformation' in it. However if anything does
need corrected, I can easily do that.

  One of the main reasons that I did the test was all the actual
(IMHO...) misinformation that was in the thread about the PIC
dividers. I find them very useful and have not had any problems with
them, but since they are mostly used on 53131As which do not have a
very high resolution, I also wanted to see if I was missing anything.

As far as I can see, it showed just what is going on as well as I
could have expected with that scope, os I don't quite agree that
*everything* should be ignored :)

Angus.


On Sat, 8 Jan 2022 14:00:28 +1300 (NZDT), you wrote:


That entire thread is full of misinformation and should be ignored unless one 
understands the difference between random and data dependent jitter.

For a well designed divider with a single output frequency only the random 
jitter spec is significant.

One doesn't need a bunch of expensive LeCroy gear to measure RJ of such 
dividers as its PN manifestations are readily apparent and measurable.

Using one of the supposedly super low jitter flipflops isn't a panacea. In 
practice unless an appropriately designed ZCD is used the wideband input noise 
of the very fast FF will dominate and produce much more jitter than expected 
due to the relatively slow slew rate of the outputs of most 10MHz sources.

Bruce


On 08/01/2022 12:40 Angus via time-nuts  wrote:


On Fri, 07 Jan 2022 12:40:49 -0800, you wrote:


The two biggest outside influences on the PICDIV are supply voltage and 
temperature.

Another interesting influence is the number of outputs that are switching and
the load on them.  In particular, if you have several outputs running at
different frequencies, the clock-out delay should be slightly longer when 2
outputs switch when compared to when only one is switching.

Has anybody measured that on a PIC? (or similar chip)

I think one of tvb's picDEVs has several outputs.

To some extent:
https://www.eevblog.com/forum/projects/easiest-way-to-divide-10mhz-to-1mhz/msg3257018/#msg3257018
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[time-nuts] Re: PICDIV stability (was: Crystal oscillator for a begginer)

2022-01-09 Thread Marek Doršic
Is there any method to measure random jitter without TimePod or scopes costing 
a small fortune?

.md

> On 9 Jan 2022, at 01:21, Bruce Griffiths  wrote:
> 
> Yes, that post is full of misleading information.
> The TI document is irrelevant as the PIC based divider doesn't have non 
> harmonically related signals using the same chip.
> All internal signals within the PIC are harmonics of the divided output 
> signal.
> The post did not distinguish between random jitter and data dependent jitter 
> etc. Either the poster doesn't understand the finer details of frequency 
> division or the post is intended to mislead. 
> 
> Bruce
>> On 09/01/2022 12:55 Angus via time-nuts  wrote:
>> 
>> 
>> Maybe it got mashed up, but I only linked to one post, and that
>> addressed the specific question that had been asked. There is also, as
>> far as I know, no 'misinformation' in it. However if anything does
>> need corrected, I can easily do that.
>> 
>>  One of the main reasons that I did the test was all the actual
>> (IMHO...) misinformation that was in the thread about the PIC
>> dividers. I find them very useful and have not had any problems with
>> them, but since they are mostly used on 53131As which do not have a
>> very high resolution, I also wanted to see if I was missing anything. 
>> 
>> As far as I can see, it showed just what is going on as well as I
>> could have expected with that scope, os I don't quite agree that
>> *everything* should be ignored :)
>> 
>> Angus.
>> 
>> 
>> On Sat, 8 Jan 2022 14:00:28 +1300 (NZDT), you wrote:
>> 
>>> That entire thread is full of misinformation and should be ignored unless 
>>> one understands the difference between random and data dependent jitter. 
>>> 
>>> For a well designed divider with a single output frequency only the random 
>>> jitter spec is significant.
>>> 
>>> One doesn't need a bunch of expensive LeCroy gear to measure RJ of such 
>>> dividers as its PN manifestations are readily apparent and measurable.
>>> 
>>> Using one of the supposedly super low jitter flipflops isn't a panacea. In 
>>> practice unless an appropriately designed ZCD is used the wideband input 
>>> noise of the very fast FF will dominate and produce much more jitter than 
>>> expected due to the relatively slow slew rate of the outputs of most 10MHz 
>>> sources.  
>>> 
>>> Bruce
>>> 
 On 08/01/2022 12:40 Angus via time-nuts  wrote:
 
 
 On Fri, 07 Jan 2022 12:40:49 -0800, you wrote:
 
>> The two biggest outside influences on the PICDIV are supply voltage and 
>> temperature.
> 
> Another interesting influence is the number of outputs that are switching 
> and 
> the load on them.  In particular, if you have several outputs running at 
> different frequencies, the clock-out delay should be slightly longer when 
> 2 
> outputs switch when compared to when only one is switching.
> 
> Has anybody measured that on a PIC? (or similar chip)
> 
> I think one of tvb's picDEVs has several outputs.
 
 To some extent:
 https://www.eevblog.com/forum/projects/easiest-way-to-divide-10mhz-to-1mhz/msg3257018/#msg3257018
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