[time-nuts] Re: Internal power supply for Z3801A

2022-05-05 Thread ed breya
Do you happen to know what's wrong with the PS? If you can figure this 
out, you can probably fix it. AFAIK the DC-DC converters are still 
commodity parts, under a number of brands, so the easiest is if one of 
those crapped out. If the problem is in the "other" stuff, you'd need 
some reverse engineering and lots of patience. Also remember, there are 
some tiny pigtail fuses on the board, so check those first.


Ed
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[time-nuts] Re: Internal power supply for Z3801A

2022-05-05 Thread Lon Cottingham
Paul,  Thanks for the thought.  This Z3801A chassis already has an
analog supply built in to drive 50 volt internal supply.
That is why I am looking for the original .  Again, thanks for the
thought and  73 de Lon, k5jv.

On Thu, May 5, 2022 at 1:13 PM paul swed  wrote:
>
> Lon just in case they don't you can map modern switchers into the position.
> I used Vicors when mine went. They were laying around.
> Paul
> WB8TSL
>
> On Thu, May 5, 2022 at 12:15 PM Lon Cottingham 
> wrote:
>
> > Does anyone happen to have an extra original, internal,  50 volt power,
> > supply for a Z3801A?  Is so, and you will part with it, please contact me
> > by direct email or phone.
> >
> > 73 de Lon, K5JV
> > 281-795-1335
> >
> >
> > [3f873278-e972-41bd-8708-c76706ab202a]
> > ___
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[time-nuts] Re: Internal power supply for Z3801A

2022-05-05 Thread paul swed
Lon just in case they don't you can map modern switchers into the position.
I used Vicors when mine went. They were laying around.
Paul
WB8TSL

On Thu, May 5, 2022 at 12:15 PM Lon Cottingham 
wrote:

> Does anyone happen to have an extra original, internal,  50 volt power,
> supply for a Z3801A?  Is so, and you will part with it, please contact me
> by direct email or phone.
>
> 73 de Lon, K5JV
> 281-795-1335
>
>
> [3f873278-e972-41bd-8708-c76706ab202a]
> ___
> time-nuts mailing list -- time-nuts@lists.febo.com -- To unsubscribe send
> an email to time-nuts-le...@lists.febo.com
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[time-nuts] Re: Simple simulation model for an OCXO?

2022-05-05 Thread Magnus Danielson via time-nuts

Hi,

Could not agree more on this point.

It's even to the point we have two standards for it, the IEEE Std 1139 
for the basic measures and noises, and then IEEE Std 1193 for the 
"environmentals", or rather, the rest.


Both is being revisioned and 1139 just went out for re-balloting process 
after receiving ballotting comments and 1193 is just to get approved to 
be sent to balloting. The work have been lead by NIST T&F department 
chief Elizabeth Donley, who also got an award at EFTF-IFCS 2022 for her 
contribution to the field, and these standards in particular. Very well 
desirved I might add.


While simple models help to test and analyze specific things in 
separation, as you bring things together, going towards real life 
application the reality is always somewhat different to the models. It 
takes some time to learn just how much of the things you can pick up 
from models and what to use them for to adapt for the expected real life 
situation.


The two IEEE standards have tons of references, and it is well worth 
following those. The IEEE UFFC also have quite a bit of educational 
reference material at hand which can also be worthwhile reading.


Cheers,
Magnus

On 2022-05-03 23:23, Bob kb8tq wrote:

Hi

The gotcha is that there are a number of very normal OCXO “behaviors” that are 
not
covered by any of the standard statistical models. Coping with these issue is 
at least
as important at working with the stuff that is coved by any of the standard 
statistical
models ….

Bob


On May 3, 2022, at 3:57 AM, Matthias Welwarsky  wrote:

Dear all,

thanks for your kind comments, corrections and suggestions. Please forgive if
I don't reply to all of your comments individually. Summary response follows:

Attila - yes, I realize temperature dependence is one key parameter. I model
this meanwhile as a frequency shift over time.

Bob - I agree in principle, real world data is a good reality check for any
model, but there are only so few datasets available and most of the time they
don't contain associated environmental data. You get a mix of effects without
any chance to isolate them.

Magnus, Jim - thanks a lot. Your post encouraged me to look especially into
flicker noise an how to generate it in the time domain. I now use randn() and
a low-pass filter. Also, I think I understood now how to create phase vs
frequency noise.

I've some Timelab screenshots attached, ADEV and frequency plot of a data set
I generated with the following matlab function, plus some temperature response
modeled outside of this function.

function [phase] = synth_osc(samples,da,wpn,wfn,fpn,ffn)
# low-pass butterworth filter for 1/f noise generator
[b,a] = butter(1, 0.1);

# aging
phase = (((1:samples)/86400).^2)*da;
# white phase noise
phase += (randn(1, samples))*wpn;
# white frequency noise
phase += cumsum(randn(1, samples))*wfn;
# 1/f phase noise
phase += filter(b,a,randn(1,samples))*fpn;
# 1/f frequency noise
phase += cumsum(filter(b,a,randn(1,samples))*ffn);
end

osc = synth_osc(40, -50e-6, 5e-11, 1e-11, 5e-11, 5e-11);

Thanks.

On Montag, 2. Mai 2022 17:12:47 CEST Matthias Welwarsky wrote:

Dear all,

I'm trying to come up with a reasonably simple model for an OCXO that I can
parametrize to experiment with a GPSDO simulator. For now I have the
following matlab function that "somewhat" does what I think is reasonable,
but I would like a reality check.

This is the matlab code:

function [phase] = synth_osc(samples,da,wn,fn)
# aging
phase = (((1:samples)/86400).^2)*da;
# white noise
phase += (rand(1,samples)-0.5)*wn;
# flicker noise
phase += cumsum(rand(1,samples)-0.5)*fn;
end

There are three components in the model, aging, white noise and flicker
noise, with everything expressed in fractions of seconds.

The first term basically creates a base vector that has a quadratic aging
function. It can be parametrized e.g. from an OCXO datasheet, daily aging
given in s/s per day.

The second term models white noise. It's just a random number scaled to the
desired 1-second uncertainty.

The third term is supposed to model flicker noise. It's basically a random
walk scaled to the desired magnitude.

As an example, the following function call would create a phase vector for a
10MHz oscillator with one day worth of samples, with an aging of about 5
Millihertz per day, 10ps/s white noise and 10ns/s of flicker noise:

phase = osc_synth(86400, -44e-6, 10e-12, 10e-9);

What I'd like to know - is that a "reasonable" model or is it just too far
off of reality to be useful? What could be changed or improved?

Best regards,
Matthias


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[time-nuts] Re: Simple simulation model for an OCXO?

2022-05-05 Thread Attila Kinali
On Wed, 04 May 2022 17:07:03 -0700
Hal Murray  wrote:

> What sort of times and memory are interesting?

A lot of times! :-P

I think last time I generated them I had to run them on a machine with 256GB 
RAM.
So... probably 200G of data?

> You can rent a cloud server with a few hundred gigabytes of memory for a few 
> $/hour.

It's not just availability of main memory. I have access to machines with
multible TB of memory. That's not really the issue for _me_.
But depending on how the simulation system is built, an FFT based noise
generation system that requires the calculation of noise values before the
run of the actual simulation might or might not feasible. 
Generating noise samples with arbitrary time correlation online in a
streaming fashion has plenty of advantages, not just memory usage.

Attila Kinali
-- 
In science if you know what you are doing you should not be doing it.
In engineering if you do not know what you are doing you should not be doing it.
-- Richard W. Hamming, The Art of Doing Science and Engineering
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[time-nuts] 58503A firmware upgrade

2022-05-05 Thread Lon Cottingham
I am trying return to service a 58503A with option 001 display.  The 
motherboard is physically damaged beyond repair.  I have two identical 
motherboards, with id and update info, exactly the same as the original board.  
However, neither will support the 001 optional display.  Apparently, I need to 
update the firmware in the motherboard.  Evidently, this requires an upgrade 
disk that is no longer available.  It is listed as "58503A  firmware upgrade 
disk  -- 58503-13402" in the option 001 manual.   If anyone can help me find a 
copy of this disk, or the upgrade file, please contact me by direct email or 
telephone.

73 de Lon, K5JV
k...@kingwoodcable.com
281-795-1335

[c0a68fe8-c7fc-45a2-992b-a68133c08521]
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[time-nuts] Internal power supply for Z3801A

2022-05-05 Thread Lon Cottingham
Does anyone happen to have an extra original, internal,  50 volt power, supply 
for a Z3801A?  Is so, and you will part with it, please contact me by direct 
email or phone.

73 de Lon, K5JV
281-795-1335


[3f873278-e972-41bd-8708-c76706ab202a]
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[time-nuts] eLoran test next week 10-13

2022-05-05 Thread paul swed
Good news a test of eLoran in the US. 10-13. Tuesday mid morning to Friday
mid day. GRI 5990 M Y data 9th bit.
Bad news. Washington state transmitter. East coast will be quite a
challenge if at all. But I will at least see if I can hear anything at
night.
Good luck and at least for the West coast should have good signals.
Regards
Paul
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[time-nuts] Re: Microcontroller based frequency divider

2022-05-05 Thread Simon Merrett
Dear all who responded – thank you for everything I’m learning from you.

Gerhard,  thanks for flagging your alternative implementation, especially the 
gateware. I’m not yet acquainted with FPGAs but it is still useful to read and 
generous of you to share.

Tom, thanks. I do hope that you are correct about the possibility of many 
microcontrollers being able to do this. There are some 24 bit TCC/TC 
peripherals which appear to link to the event systems on some of the cheaper 
Arm Cortex M0+ microcontrollers. And possibly a 16 bit and 8 bit pair of 
counters could be chained in an 8 bit microcontroller. I wonder about 
offset/lag but get a good impression that the event system can act 
asynchronously to the CPU and peripheral clocks on the new ATtinies. They also 
have very basic configurable logic cells that may come in handy. The external 
reset/synch feature of picDIV is extremely attractive for my imagined use, so I 
hope to implement something similar. Your jitter measurements are very 
impressive – I would be keen to get whatever I come up with broadly verified to 
a couple of orders of magnitude greater than that!

Bruce, that is a good point about internal crosstalk. So it may be better to 
configure the input reference clock as the microcontroller clock, rather than 
rely on the microcontroller running  a separate internal CPU clock as well as 
receiving the reference signal to be divided into a timer/counter peripheral. 
At least something to watch out for as I go along.

Marek, that is pretty amazing. I am not au fait with the pico yet but I do have 
one in my parts drawer for just such an occasion as this! If my initial 
attempts with a more familiar chip are not promising, I think your 
implementation will be the very next thing I look at in detail

Gilles – any information that you are using AVR is helpful, even if you didn’t 
formally verify. The single instruction cycle is useful for me, as I anticipate 
wanting to add a delay line to offset and then pulse after e.g. 10e6 – 1 + 
delay so I can correct for delays.

Florian, you make perfect sense and I was completely scrabbling around for 
anything that might hint at all the latent specs we wish were in datasheets but 
aren’t! I think the proof will be in the pudding, not the datasheet. So now I 
need to go and try some things out in the real world.

Yours,

Simon


From: use...@teply.info 
Sent: Sunday, May 1, 2022 1:34:56 PM
To: time-nuts@lists.febo.com 
Subject: [time-nuts] Re: Microcontroller based frequency divider

On 30.04.22 23:22, Simon Merrett wrote:
> I know they were unavailable from one of my usual distributors when I checked 
> last week. I also prefer surface mount parts and that narrows the 
> availability somewhat but isn't a red line for me.
>
> I'm very open to the idea that the PIC12F was a one-off in terms of the 
> timing performance. But I have also heard that modern silicon processes could 
> yield better results, based on informed conjecture. I am more familiar with 
> eg the newer ATtiny series of chips and the Microchip Cortex M series parts. 
> I realise that datasheet figures are often just an envelope of performance 
> and they don't mention jitter but the PIC12F states something like a 10 ns 
> gpio rise time and a recent ATtiny specs something like 1.5 ns. For the 
> simpler (AVR, not Arm) parts, maybe there is a whole bunch which would be 
> suitable. I'm happy to build some but I can't (yet) do the testing to see if 
> they are viable. If there are other contenders I'd be happy to look at them 
> too.
>
Please do not mistake the rise time quoted on the datasheet for anything
related to timing accuracy. While it is true that rise time poses an
upper limit on the maximum frequency a given parts I/O circuitry can
support, it does not by itself impose an equivalent granularity and
therefore does not limit the timing relationship between two signals.

A pretty drastic example for illustration: Imagine a lowpass filter as
circuit (it doesn't matter here how that is constructed, could be RC,
LC, active or passive, you name it). For the sake of argument, let's
assume the cutoff frequency of that lowpass is 10 Hz (again, fully
arbitrary number). When we apply a rectangular pulse to the input, we
will see a low-pass filtered version of that on the output some time
later. The exact shape of the output and delay between input and output
will depend on actual implementation, but nevertheless due to the 10 Hz
cutoff of the filter the output edge will be pretty slowly rising when
compared to our rectangular pulse at the input. One problem we see here
is that the limited slew rate of the output edge creates some
uncertainty on the timing depending on where we actually measure the
delay. Where exactly do we place the border where the output signal
changes from logic low to logic high? For digital logic circuitry, this
is actually not well defined as they usually only specify that inputs
below