Re: [time-nuts] sub harmonic VCO locking

2020-08-01 Thread glen english LIST

Hi Attila

thanks for your input. and thanks for the links !

I'll meet my low-spec option using ADF4356 integer mode, and a 394 MHz 
off the self $2 SAW filter on the output.


That is what I'll do for the moment. I have the ADF4356 here on a eval 
board ADI lent me. It is not bad for an internal VCO chip. makes 126/ 
10k @ 400 megs.  Actually the Hittite HMC1033  is slightly better but 26 
weeks. Discrete VCO using a TriTech TEM resonator (Q=400 400 MHz) 
was good also, with integer PLL chip. Maybe use a ceramic resonator up 
at 1.6 GHz where there is more Q and the chips are designed for the 1-4 
GHz VCO input (LTC6945 etc)


When I need to get the 5kHz  to 100kHz noise down, I'l probably go for 
direct multiplication.


73


On 8/1/2020 2:06 PM, Attila Kinali wrote:

On Thu, 30 Jul 2020 21:56:42 +1000
glen english LIST  wrote:


- a double-double-double could work, but my experience is for x2 x2 x2 I
really need to filter well at each stage to avoid sum and difference
products.. which might be OK for this application , especially if I
filter really well after the first x2 . but avoid if I can. filters at
908 MHz need space, and shield cans where it is going.


Frequency multiplying would be probably the easiest to get low noise,
followed by a well designed PLL system. Though -115dBc spurs is tough,

  

- and I dont know too much about phase noise and SRD or varactor
multipliers. but maybe that's an option.


SDR are prety low noise. From NLTLs we know that varactor systems can
exhibit increased flicker noise levels (probably due to bias point
instability).

  

- onboard VCO chip/PLLs have all sorts of unrelated spurs in the output.

- sure I can use a good PLL and a external VCO, but if my N value is
fixed, and I can use injection locking, why bother with the PLL chip
that is likely to introduce PD related spurs anyway.


The generic way in this case is to build a PLL using frequency multiplier
for the reference and a narrow loop filter after the phase detector.
Placing zeros at the multiples of the (unmultiplied) reference frequency
in the loop filter will reduce the spurs quite considerably.


Injection locking is finicky. To injection lock, the resonator has to be
pretty much on frequency to begin with, and kept that way. But unlike with
other systems, you have no feedback system where get information how far
off you are to control the frequency. Unless you build a hybrid system
of an oscialltor with a Pound lock[5,6] (e.g. like cryogenic sapphire 
oscillators use[7])
You want to read Adler's paper[1] at the very least before you start.
A look at the work byHuntoon/Weiss[2] and Kurokawa[3,4] is probably also 
beneficial.


Attila Kinali

[1] "A Study of Locking Phenomena in oscillators", by Robert Adler, 1946 
(reprinted 1973)

[2] "Synchornization of Ocillators", By Huntoon and Weiss, 1947

[3] "Injection Locking of Microwave Solid-State Oscillators", by Kurokawa, 1973

[4] "Noise in Synchronized Oscillators", by Kurokawa, 1968

[5] "Electronic Frequency Stabilization of Microwave Oscillators", by Pound, 
1946
http://dx.doi.org/10.1063/1.1770414

[6] "Frequency-Stabilized Oscillator  Unit Notes and Instructions", by 
Lawrance, 1946
https://dspace.mit.edu/bitstream/handle/1721.1/5024/1/RLE-TR-022-14254857.pdf

[7] "An Ultra-Low Noise Microwave Oscillator Based on a High-Q Liquid Nitrogen 
Cooled
Sapphire Resonator", by Woode, Tobar, Ivanov, 1995




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Re: [time-nuts] sub harmonic VCO locking

2020-07-31 Thread Attila Kinali
On Thu, 30 Jul 2020 21:56:42 +1000
glen english LIST  wrote:

> - a double-double-double could work, but my experience is for x2 x2 x2 I 
> really need to filter well at each stage to avoid sum and difference 
> products.. which might be OK for this application , especially if I 
> filter really well after the first x2 . but avoid if I can. filters at 
> 908 MHz need space, and shield cans where it is going.

Frequency multiplying would be probably the easiest to get low noise,
followed by a well designed PLL system. Though -115dBc spurs is tough,

 
> - and I dont know too much about phase noise and SRD or varactor 
> multipliers. but maybe that's an option.

SDR are prety low noise. From NLTLs we know that varactor systems can
exhibit increased flicker noise levels (probably due to bias point
instability).

 
> - onboard VCO chip/PLLs have all sorts of unrelated spurs in the output.
> 
> - sure I can use a good PLL and a external VCO, but if my N value is 
> fixed, and I can use injection locking, why bother with the PLL chip 
> that is likely to introduce PD related spurs anyway.

The generic way in this case is to build a PLL using frequency multiplier
for the reference and a narrow loop filter after the phase detector.
Placing zeros at the multiples of the (unmultiplied) reference frequency
in the loop filter will reduce the spurs quite considerably.


Injection locking is finicky. To injection lock, the resonator has to be
pretty much on frequency to begin with, and kept that way. But unlike with
other systems, you have no feedback system where get information how far
off you are to control the frequency. Unless you build a hybrid system
of an oscialltor with a Pound lock[5,6] (e.g. like cryogenic sapphire 
oscillators use[7]) 
You want to read Adler's paper[1] at the very least before you start. 
A look at the work byHuntoon/Weiss[2] and Kurokawa[3,4] is probably also 
beneficial.


Attila Kinali

[1] "A Study of Locking Phenomena in oscillators", by Robert Adler, 1946 
(reprinted 1973)

[2] "Synchornization of Ocillators", By Huntoon and Weiss, 1947

[3] "Injection Locking of Microwave Solid-State Oscillators", by Kurokawa, 1973

[4] "Noise in Synchronized Oscillators", by Kurokawa, 1968

[5] "Electronic Frequency Stabilization of Microwave Oscillators", by Pound, 
1946
http://dx.doi.org/10.1063/1.1770414

[6] "Frequency-Stabilized Oscillator  Unit Notes and Instructions", by 
Lawrance, 1946
https://dspace.mit.edu/bitstream/handle/1721.1/5024/1/RLE-TR-022-14254857.pdf

[7] "An Ultra-Low Noise Microwave Oscillator Based on a High-Q Liquid Nitrogen 
Cooled
Sapphire Resonator", by Woode, Tobar, Ivanov, 1995


-- 
Science is made up of so many things that appear obvious 
after they are explained. -- Pardot Kynes

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Re: [time-nuts] sub harmonic VCO locking

2020-07-30 Thread glenlist

Hi Bob

Yeah.  because we essentially have a sampled system, so I expect 
multiples of the injection source.


This is a sample rate clock, and so spurs that fall at 50% of the sample 
rate are OK. spurs that fall at 25% of the sample clock will appear in 
the PB. Which really tells me I need to have the injection oscillator at 
1/2 the VCO freq .  to avoid all problems.  which means x2 x2 and 
assocated filtering before the injection. I'll go back to thinking about 
doubling/ multiplication and filtering.


Given that spurs are on known frequencys, a set of symmetrically placed  
zeros either side of the output will generate a broad bandpass in the 
middle. No need for a sharp filter at least for the 1st pair of unwanted 
products


maybe continue with you off list

cheers



On 31/07/2020 01:32, Bob kb8tq wrote:

Hi




On Jul 30, 2020, at 7:56 AM, glen english LIST  wrote:

Before I commit the soldering iron, can anyone share their sub-harmonic 
injection locking experiences ?

I have to make 393.216 from 49.152 .
Yes, lots of ways I know.

injection locked at 1/8 of the frequency from the decent source.

There wont be any issue of locking to the wrong harmonic, the VCO will be on 
the money.I was thinking of using a dielectric loaded TEM resonator  or TEM 
coax line VCO .

and why do this : ?
- I need all the non related spurs to be > 115dB down.

A sub-harmonic injection locked oscillator can / does have spurs at the 
injection frequency and
it’s multiples ……

Bob


- a double-double-double could work, but my experience is for x2 x2 x2 I really 
need to filter well at each stage to avoid sum and difference products.. which 
might be OK for this application , especially if I filter really well after the 
first x2 . but avoid if I can. filters at 908 MHz need space, and shield cans 
where it is going.

- and I dont know too much about phase noise and SRD or varactor multipliers. 
but maybe that's an option.

- my attempts at generating low phase noise x6 with class C multipliers has 
been dismal.

- onboard VCO chip/PLLs have all sorts of unrelated spurs in the output.

- sure I can use a good PLL and a external VCO, but if my N value is fixed, and 
I can use injection locking, why bother with the PLL chip that is likely to 
introduce PD related spurs anyway.

regards

glen



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Re: [time-nuts] sub harmonic VCO locking

2020-07-30 Thread Bob kb8tq
Hi



> On Jul 30, 2020, at 7:56 AM, glen english LIST  
> wrote:
> 
> Before I commit the soldering iron, can anyone share their sub-harmonic 
> injection locking experiences ?
> 
> I have to make 393.216 from 49.152 .
> Yes, lots of ways I know.
> 
> injection locked at 1/8 of the frequency from the decent source.
> 
> There wont be any issue of locking to the wrong harmonic, the VCO will be on 
> the money.I was thinking of using a dielectric loaded TEM resonator  or TEM 
> coax line VCO .
> 
> and why do this : ?
> - I need all the non related spurs to be > 115dB down.

A sub-harmonic injection locked oscillator can / does have spurs at the 
injection frequency and
it’s multiples ……

Bob

> 
> - a double-double-double could work, but my experience is for x2 x2 x2 I 
> really need to filter well at each stage to avoid sum and difference 
> products.. which might be OK for this application , especially if I filter 
> really well after the first x2 . but avoid if I can. filters at 908 MHz need 
> space, and shield cans where it is going.
> 
> - and I dont know too much about phase noise and SRD or varactor multipliers. 
> but maybe that's an option.
> 
> - my attempts at generating low phase noise x6 with class C multipliers has 
> been dismal.
> 
> - onboard VCO chip/PLLs have all sorts of unrelated spurs in the output.
> 
> - sure I can use a good PLL and a external VCO, but if my N value is fixed, 
> and I can use injection locking, why bother with the PLL chip that is likely 
> to introduce PD related spurs anyway.
> 
> regards
> 
> glen
> 
> 
> 
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> time-nuts mailing list -- time-nuts@lists.febo.com
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[time-nuts] sub harmonic VCO locking

2020-07-30 Thread glen english LIST
Before I commit the soldering iron, can anyone share their sub-harmonic 
injection locking experiences ?


I have to make 393.216 from 49.152 .
Yes, lots of ways I know.

injection locked at 1/8 of the frequency from the decent source.

There wont be any issue of locking to the wrong harmonic, the VCO will 
be on the money.I was thinking of using a dielectric loaded TEM 
resonator  or TEM coax line VCO .


and why do this : ?
- I need all the non related spurs to be > 115dB down.

- a double-double-double could work, but my experience is for x2 x2 x2 I 
really need to filter well at each stage to avoid sum and difference 
products.. which might be OK for this application , especially if I 
filter really well after the first x2 . but avoid if I can. filters at 
908 MHz need space, and shield cans where it is going.


- and I dont know too much about phase noise and SRD or varactor 
multipliers. but maybe that's an option.


- my attempts at generating low phase noise x6 with class C multipliers 
has been dismal.


- onboard VCO chip/PLLs have all sorts of unrelated spurs in the output.

- sure I can use a good PLL and a external VCO, but if my N value is 
fixed, and I can use injection locking, why bother with the PLL chip 
that is likely to introduce PD related spurs anyway.


regards

glen



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