Re: [U-Boot] [PATCH] mgcoge make ether_scc.c work with CONFIG_NET_MULTI

[Ben Warren]

Hi Gary,

Gary Jennejohn wrote:
> This change is needed for mgcoge because it uses two ethernet drivers.
>
>   
I like the idea of moving drivers to use CONFIG_NET_MULTI, particularly 
so that we can get rid of it as an option...  There are a few more 
things you need to think about, though.
> Add a check for the presence of the PIGGY board on mgcoge.  Without this
> board networking cannot work and the initialization must be aborted.
>
> Only allocate rtx once to prevent DPRAM exhaustion.
>
> Initialize ether_scc.c and the keymile-specific HDLC driver (to be added
> soon) in eth.c.
>
> Signed-off-by: Gary Jennejohn <[EMAIL PROTECTED]>
> ---
>
> I ran "MAKEALL ppc" and no errors were caused by this patch.
>
>  cpu/mpc8260/ether_scc.c |   56 
> +--
>  net/eth.c   |8 ++
>  2 files changed, 57 insertions(+), 7 deletions(-)
>
> diff --git a/cpu/mpc8260/ether_scc.c b/cpu/mpc8260/ether_scc.c
> index c65f0e0..537cd39 100644
> --- a/cpu/mpc8260/ether_scc.c
> +++ b/cpu/mpc8260/ether_scc.c
> @@ -10,6 +10,12 @@
>   * Advent Networks, Inc. 
>   * Jay Monkman <[EMAIL PROTECTED]>
>   *
> + * Modified so that it plays nicely when more than one ETHERNET interface
> + * is in use a la ether_fcc.c.
> + * (C) Copyright 2008
> + * DENX Software Engineerin GmbH
> + * Gary Jennejohn <[EMAIL PROTECTED]>
> + *
>   * See file CREDITS for list of people who contributed to this
>   * project.
>   *
> @@ -32,12 +38,17 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
>  
>  #if defined(CONFIG_ETHER_ON_SCC) && defined(CONFIG_CMD_NET)
>   
While you're mucking around with this file, please settle on a single 
CONFIG that can allow conditional compilation from the Makefile, then 
get rid of this stuff.
>  
> +#ifndef CONFIG_NET_MULTI
> +#error "CONFIG_NET_MULTI must be defined."
> +#endif
> +
>  #if (CONFIG_ETHER_INDEX == 1)
>  #  define PROFF_ENETPROFF_SCC1
>  #  define CPM_CR_ENET_PAGE  CPM_CR_SCC1_PAGE
> @@ -100,7 +111,7 @@ typedef volatile struct CommonBufferDescriptor {
>  static RTXBD *rtx;
>  
>  
> -int eth_send(volatile void *packet, int length)
> +int sec_send(struct eth_device *dev, volatile void *packet, int length)
>   
Please give all these functions, except initialize(), file scope (i.e. 
make them static).  I'm not crazy about the name 'sec', but if it's 
static the objection doesn't carry much weight.  I also can't think of a 
better name.
>  {
>  int i;
>  int result = 0;
> @@ -137,7 +148,7 @@ int eth_send(volatile void *packet, int length)
>  }
>  
>  
> -int eth_rx(void)
> +int sec_rx(struct eth_device *dev)
>  {
>  int length;
>  
> @@ -184,19 +195,32 @@ int eth_rx(void)
>   *
>   */
>  
> -int eth_init(bd_t *bis)
> +int sec_init(struct eth_device *dev, bd_t *bis)
>  {
>  int i;
>  volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
>  scc_enet_t *pram_ptr;
>  uint dpaddr;
>  
> +#if defined(CONFIG_CHECK_ETHERNET_PRESENT)
> + if (ethernet_present (CONFIG_ETHER_INDEX) == 0) {
> + printf("Ethernet index: %d not present.\n",
> +CONFIG_ETHER_INDEX);
> + return -1;
> + }
> +#endif
> +
>  rxIdx = 0;
>  txIdx = 0;
>  
> -/* assign static pointer to BD area */
> -dpaddr = m8260_cpm_dpalloc(sizeof(RTXBD) + 2, 16);
> -rtx = (RTXBD *)&immr->im_dprambase[dpaddr];
> +/*
> + * Assign static pointer to BD area.
> + * Avoid exhausting DPRAM, which would cause a panic.
> + */
> +if (rtx == NULL) {
> + dpaddr = m8260_cpm_dpalloc(sizeof(RTXBD) + 2, 16);
> + rtx = (RTXBD *)&immr->im_dprambase[dpaddr];
> +}
>  
>  /* 24.21 - (1-3): ioports have been set up already */
>  
> @@ -338,7 +362,7 @@ int eth_init(bd_t *bis)
>  }
>  
>  
> -void eth_halt(void)
> +void sec_halt(struct eth_device *dev)
>  {
>  volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
>  immr->im_scc[CONFIG_ETHER_INDEX-1].scc_gsmrl &= ~(SCC_GSMRL_ENR |
> @@ -354,4 +378,22 @@ void restart(void)
>  }
>  #endif
>  
> +int sec_initialize(bd_t *bis)
>   
For this function with global namespace, please pick a more descriptive 
name.  Maybe 82xx_scc_initialize() or something?
> +{
> + struct eth_device *dev;
> +
> + dev = (struct eth_device *) malloc(sizeof *dev);
> + memset(dev, 0, sizeof *dev);
> +
> + sprintf(dev->name, "SCC ETHERNET");
> + dev->init   = sec_init;
> + dev->halt   = sec_halt;
> + dev->send   = sec_send;
> + dev->recv   = sec_rx;
> +
> + eth_register(dev);
> +
> + return 1;
> +}
> +
>  #endif
> diff --git a/net/eth.c b/net/eth.c
> index ccd871a..5fe8b83 100644
> --- a/net/eth.c
> +++ b/net/eth.c
> @@ -48,6 +48,8 @@ extern int ppc_4xx_eth_initialize(bd_t *);
>  extern int scc_initialize(bd_t*);
>  extern int npe_initialize(bd_t *);
>  extern int uec_initialize

[U-Boot] Pull request - net

[Ben Warren]

Wolfgang,

The following changes since commit 1378174a1351c0285736863a665ab758fe8d5f71:
  Wolfgang Denk (1):
Merge branch 'master' of /home/wd/git/u-boot/custodians

are available in the git repository at:

  git://git.denx.de/u-boot-net.git master

Ben Warren (9):
  Moved initialization of IXP4XX_NPE Ethernet controller to cpu_eth_init()
  Fix typo in cpu/mpc85xx/cpu.c
  Moved initialization of FCC Ethernet controller to cpu_eth_init
  Moved initialization of QE Ethernet controller to cpu_eth_init()
  Moved initialization of MPC8220 FEC to cpu_eth_init()
  Moved initialization of MPC8XX SCC to cpu_eth_init()
  Changed PPC4xx EMAC driver to require CONFIG_PPC4xx_EMAC
  Moved PPC4xx EMAC driver to drivers/net
  Moved initialization of PPC4xx EMAC to cpu_eth_init()

Clive Stubbings (1):
  xilinx_emaclite buffer overrun

Richard Retanubun (1):
  drivers/qe/uec_phy.c: Added PHY-less (fixed PHY) driver.

Shinya Kuribayashi (1):
  net: Move initialization of Au1x00 SoC ethernet MAC to cpu_eth_init

TsiChung Liew (1):
  ColdFire: Add mii driver in drivers/net

richardretanubun (2):
  Adds two more ethernet interface to 83xx
  NET: QE: UEC: Make uec_miiphy_read() and uec_miiphy_write() use the 
devname arg.

 board/cray/L1/u-boot.lds  |2 +-
 board/csb272/u-boot.lds   |2 +-
 board/csb472/u-boot.lds   |2 +-
 board/dave/PPChameleonEVB/u-boot.lds  |2 +-
 board/eric/u-boot.lds |2 +-
 board/esd/ar405/u-boot.lds|2 +-
 board/esd/dp405/u-boot.lds|2 +-
 board/esd/hub405/u-boot.lds   |2 +-
 board/esd/voh405/u-boot.lds   |2 +-
 board/g2000/u-boot.lds|2 +-
 board/ml2/u-boot.lds  |2 +-
 board/mpl/mip405/u-boot.lds   |2 +-
 board/sandburst/karef/u-boot.lds  |2 +-
 board/sandburst/karef/u-boot.lds.debug|2 +-
 board/sandburst/metrobox/u-boot.lds   |2 +-
 board/sandburst/metrobox/u-boot.lds.debug |2 +-
 board/sbc405/u-boot.lds   |2 +-
 board/sorcery/sorcery.c   |2 +
 board/xilinx/ml300/u-boot.lds |2 +-
 cpu/ixp/cpu.c |9 +
 cpu/mips/au1x00_eth.c |2 +-
 cpu/mips/cpu.c|9 +
 cpu/mpc8220/cpu.c |   13 ++
 cpu/mpc8260/cpu.c |   13 ++
 cpu/mpc83xx/cpu.c |   20 ++-
 cpu/mpc85xx/cpu.c |   25 ++-
 cpu/mpc8xx/cpu.c  |   17 ++
 cpu/ppc4xx/Makefile   |1 -
 cpu/ppc4xx/cpu.c  |   14 ++
 {cpu/ppc4xx => drivers/net}/4xx_enet.c|9 -
 drivers/net/Makefile  |5 +-
 drivers/net/mcffec.c  |   18 +--
 drivers/net/mcfmii.c  |  321 +
 drivers/net/xilinx_emaclite.c |2 +-
 drivers/qe/uec.c  |   54 +-
 drivers/qe/uec_phy.c  |   79 +++
 include/configs/AR405.h   |1 +
 include/configs/ASH405.h  |1 +
 include/configs/CMS700.h  |1 +
 include/configs/CPCI405.h |1 +
 include/configs/CPCI4052.h|1 +
 include/configs/CPCI405AB.h   |1 +
 include/configs/CPCI405DT.h   |1 +
 include/configs/CPCIISER4.h   |1 +
 include/configs/CRAYL1.h  |2 +
 include/configs/DP405.h   |1 +
 include/configs/DU405.h   |1 +
 include/configs/DU440.h   |1 +
 include/configs/ERIC.h|1 +
 include/configs/EXBITGEN.h|1 +
 include/configs/G2000.h   |1 +
 include/configs/HH405.h   |1 +
 include/configs/HUB405.h  |1 +
 include/configs/JSE.h |1 +
 include/configs/KAREF.h   |1 +
 include/configs/METROBOX.h|1 +
 include/configs/MIP405.h  |1 +
 include/configs/OCRTC.h   |1 +
 include/configs/ORSG.h|1 +
 include/configs/PCI405.h  |1 +
 include/configs/PIP405.h  |1 +
 include/configs/PLU405.h  |1 +
 include/configs/PMC405.h  |1 +
 include/configs/PMC440.h  |1 +
 include/configs/PPChameleonEVB.h  |1 +
 include/configs/VOH405.h  |1 +
 include/configs/VOM405.h  |1 +
 include/configs/W7OLMC.h  |1 +
 include/configs/W7OLMG.h  |1 +
 include/configs/WUH405.h  |1 +
 

Re: [U-Boot] mini-pci wireless driver

[Lance Zhang]

Hi Jean,

Do you know any common methods to port a Linux driver to a u boot driver?
Will you rewrite all the driver codes? Or just make a function mapping?

I think it is terrible to write a wireless network card driver for uboot.

In uboot I need to implement MLME which contains "Authenticate 
,Deauthenticate,Associate,Disassociate,Reassociate,Beacon,Probe ". and in Linux 
driver, the source code packet contains more than 10K lines.

Appreciated if anyone can give me further direction.

Thanks
Lance

-Original Message-
From: Jean-Christophe PLAGNIOL-VILLARD [mailto:[EMAIL PROTECTED] 
Sent: 2008年11月5日 14:45
To: Lance Zhang
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] mini-pci wireless driver

On 14:41 Tue 04 Nov , Lance Zhang wrote:
> Hi,
> 
>  
> 
> I am going to write a mini-pci driver (GIGABYTE MiniPCI Wireless
> Adapter: GN-WI01GS) for u-boot(sc520),
> 
> Currently, I have Linux driver source code (downloaded from
> http://web.ralinktech.com/ralink/Home/Support/Linux.html  RT61
>  .1.0.1.tar.bz2> ), 
> 
> Anyone knows how I can port the Linux driver to u-boot driver
> 
>  
> 
> Appreciate it if someone can give me some links/hints...
> 
>  
I've work on a similar port for on other Ralink Chip

I will the common wireless port

I've separate the driver in 2 part:
1) the net interface as any other network driver

2) a wireless tools implementation (generic) currently OPEN/WEP and hardware
WPA only

3) a wireless implementation for the chip

Best Regards,
J.
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[U-Boot] [PATCH v2 3/3] Moved initialization of PPC4xx EMAC to cpu_eth_init()

[Ben Warren]

Removed initialization of the driver from net/eth.c

Signed-off-by: Ben Warren <[EMAIL PROTECTED]>
Acked-by: Stefan Roese <[EMAIL PROTECTED]>
---
 cpu/ppc4xx/cpu.c |   14 ++
 include/netdev.h |1 +
 net/eth.c|4 
 3 files changed, 15 insertions(+), 4 deletions(-)

diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c
index a676b30..1f0b56c 100644
--- a/cpu/ppc4xx/cpu.c
+++ b/cpu/ppc4xx/cpu.c
@@ -36,6 +36,7 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -693,3 +694,16 @@ void reset_4xx_watchdog(void)
mtspr(tsr, 0x4000);
 }
 #endif /* CONFIG_WATCHDOG */
+
+/*
+ * Initializes on-chip ethernet controllers.
+ * to override, implement board_eth_init()
+ */
+int cpu_eth_init(bd_t *bis)
+{
+#if defined(CONFIG_PPC4xx_EMAC)
+   ppc_4xx_eth_initialize(bis);
+#endif
+   return 0;
+}
+
diff --git a/include/netdev.h b/include/netdev.h
index 45e59b6..751f0da 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -62,6 +62,7 @@ int npe_initialize(bd_t *bis);
 int ns8382x_initialize(bd_t *bis);
 int pcnet_initialize(bd_t *bis);
 int plb2800_eth_initialize(bd_t *bis);
+int ppc_4xx_eth_initialize (bd_t *bis);
 int rtl8139_initialize(bd_t *bis);
 int rtl8169_initialize(bd_t *bis);
 int scc_initialize(bd_t *bis);
diff --git a/net/eth.c b/net/eth.c
index eab5104..b7ef09f 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -41,7 +41,6 @@ int board_eth_init(bd_t *bis) __attribute((weak, 
alias("__def_eth_init")));
 
 extern int mv6436x_eth_initialize(bd_t *);
 extern int mv6446x_eth_initialize(bd_t *);
-extern int ppc_4xx_eth_initialize(bd_t *);
 
 #ifdef CONFIG_API
 extern void (*push_packet)(volatile void *, int);
@@ -153,9 +152,6 @@ int eth_initialize(bd_t *bis)
 #if defined(CONFIG_DB64460) || defined(CONFIG_P3Mx)
mv6446x_eth_initialize(bis);
 #endif
-#if defined(CONFIG_PPC4xx_EMAC)
-   ppc_4xx_eth_initialize(bis);
-#endif
if (!eth_devices) {
puts ("No ethernet found.\n");
show_boot_progress (-64);
-- 
1.5.4.3

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[U-Boot] [PATCH v2 2/3] Moved PPC4xx EMAC driver to drivers/net

[Ben Warren]

Also changed path in all linker scripts that reference this driver

Signed-off-by: Ben Warren <[EMAIL PROTECTED]>
Acked-by: Stefan Roese <[EMAIL PROTECTED]>
---
 board/cray/L1/u-boot.lds  |2 +-
 board/csb272/u-boot.lds   |2 +-
 board/csb472/u-boot.lds   |2 +-
 board/dave/PPChameleonEVB/u-boot.lds  |2 +-
 board/eric/u-boot.lds |2 +-
 board/esd/ar405/u-boot.lds|2 +-
 board/esd/dp405/u-boot.lds|2 +-
 board/esd/hub405/u-boot.lds   |2 +-
 board/esd/voh405/u-boot.lds   |2 +-
 board/g2000/u-boot.lds|2 +-
 board/ml2/u-boot.lds  |2 +-
 board/mpl/mip405/u-boot.lds   |2 +-
 board/sandburst/karef/u-boot.lds  |2 +-
 board/sandburst/karef/u-boot.lds.debug|2 +-
 board/sandburst/metrobox/u-boot.lds   |2 +-
 board/sandburst/metrobox/u-boot.lds.debug |2 +-
 board/sbc405/u-boot.lds   |2 +-
 board/xilinx/ml300/u-boot.lds |2 +-
 cpu/ppc4xx/Makefile   |2 --
 {cpu/ppc4xx => drivers/net}/4xx_enet.c|0 
 drivers/net/Makefile  |1 +
 21 files changed, 19 insertions(+), 20 deletions(-)
 rename {cpu/ppc4xx => drivers/net}/4xx_enet.c (100%)

diff --git a/board/cray/L1/u-boot.lds b/board/cray/L1/u-boot.lds
index 9d37257..f5b10f8 100644
--- a/board/cray/L1/u-boot.lds
+++ b/board/cray/L1/u-boot.lds
@@ -68,7 +68,7 @@ SECTIONS
 cpu/ppc4xx/4xx_uart.o  (.text)
 cpu/ppc4xx/cpu_init.o  (.text)
 cpu/ppc4xx/speed.o (.text)
-cpu/ppc4xx/4xx_enet.o  (.text)
+drivers/net/4xx_enet.o (.text)
 common/dlmalloc.o  (.text)
 lib_generic/crc32.o(.text)
 lib_ppc/extable.o  (.text)
diff --git a/board/csb272/u-boot.lds b/board/csb272/u-boot.lds
index be381e1..6c47555 100644
--- a/board/csb272/u-boot.lds
+++ b/board/csb272/u-boot.lds
@@ -68,7 +68,7 @@ SECTIONS
 cpu/ppc4xx/4xx_uart.o  (.text)
 cpu/ppc4xx/cpu_init.o  (.text)
 cpu/ppc4xx/speed.o (.text)
-cpu/ppc4xx/4xx_enet.o  (.text)
+drivers/net/4xx_enet.o (.text)
 common/dlmalloc.o  (.text)
 lib_generic/crc32.o(.text)
 
diff --git a/board/csb472/u-boot.lds b/board/csb472/u-boot.lds
index 375150d..fec2789 100644
--- a/board/csb472/u-boot.lds
+++ b/board/csb472/u-boot.lds
@@ -68,7 +68,7 @@ SECTIONS
 cpu/ppc4xx/4xx_uart.o  (.text)
 cpu/ppc4xx/cpu_init.o  (.text)
 cpu/ppc4xx/speed.o (.text)
-cpu/ppc4xx/4xx_enet.o  (.text)
+drivers/net/4xx_enet.o (.text)
 common/dlmalloc.o  (.text)
 lib_generic/crc32.o(.text)
 
diff --git a/board/dave/PPChameleonEVB/u-boot.lds 
b/board/dave/PPChameleonEVB/u-boot.lds
index ed02cef..39bc654 100644
--- a/board/dave/PPChameleonEVB/u-boot.lds
+++ b/board/dave/PPChameleonEVB/u-boot.lds
@@ -66,7 +66,7 @@ SECTIONS
 cpu/ppc4xx/4xx_uart.o  (.text)
 cpu/ppc4xx/cpu_init.o  (.text)
 cpu/ppc4xx/speed.o (.text)
-cpu/ppc4xx/4xx_enet.o  (.text)
+drivers/net/4xx_enet.o (.text)
 common/dlmalloc.o  (.text)
 lib_generic/crc32.o(.text)
 lib_ppc/extable.o  (.text)
diff --git a/board/eric/u-boot.lds b/board/eric/u-boot.lds
index 153e71f..42872b2 100644
--- a/board/eric/u-boot.lds
+++ b/board/eric/u-boot.lds
@@ -68,7 +68,7 @@ SECTIONS
 cpu/ppc4xx/4xx_uart.o  (.text)
 cpu/ppc4xx/cpu_init.o  (.text)
 cpu/ppc4xx/speed.o (.text)
-cpu/ppc4xx/4xx_enet.o  (.text)
+drivers/net/4xx_enet.o (.text)
 common/dlmalloc.o  (.text)
 lib_generic/crc32.o(.text)
 lib_ppc/extable.o  (.text)
diff --git a/board/esd/ar405/u-boot.lds b/board/esd/ar405/u-boot.lds
index 4a881b6..cb58360 100644
--- a/board/esd/ar405/u-boot.lds
+++ b/board/esd/ar405/u-boot.lds
@@ -66,7 +66,7 @@ SECTIONS
 cpu/ppc4xx/4xx_uart.o  (.text)
 cpu/ppc4xx/cpu_init.o  (.text)
 cpu/ppc4xx/speed.o (.text)
-cpu/ppc4xx/4xx_enet.o  (.text)
+drivers/net/4xx_enet.o (.text)
 common/dlmalloc.o  (.text)
 lib_generic/crc32.o(.text)
 lib_ppc/extable.o  (.text)
diff --git a/board/esd/dp405/u-boot.lds b/board/esd/dp405/u-boot.lds
index 7ff074c..131166b 100644
--- a/board/esd/dp405/u-boot.lds
+++ b/board/esd/dp405/u-boot.lds
@@ -66,7 +66,7 @@ SECTIONS
 cpu/ppc4xx/4xx_uart.o  (.text)
 cpu/ppc4xx/cpu_init.o  (.text)
 cpu/ppc4xx/speed.o (.text)
-cpu/ppc4xx/4xx_enet.o  (.text)
+drivers/net/4xx_enet.o (.text)
 common/dlmalloc.o  (.text)
 lib_generic/crc32.o(.text)
 lib_ppc/extable.o  (.text)
diff --git a/board/esd/hub405/u-boot.lds b/board/esd/hub405/u-boot.lds
index c4a1a4b..3692412 100644
--- a/board/esd/hub405/u-boot.lds
+++ b/board/esd/hub405/u-boot.lds
@@ -66,7 +66,7 @@ 

[U-Boot] [PATCH v2 1/3] Changed PPC4xx EMAC driver to require CONFIG_PPC4xx_EMAC

[Ben Warren]

All in-tree IBM/AMCC PPC4xx boards using the EMAC get this new CONFIG

Signed-off-by: Ben Warren <[EMAIL PROTECTED]>
Acked-by: Stefan Roese <[EMAIL PROTECTED]>
---
 cpu/ppc4xx/4xx_enet.c|9 -
 cpu/ppc4xx/Makefile  |1 +
 include/configs/AR405.h  |1 +
 include/configs/ASH405.h |1 +
 include/configs/CMS700.h |1 +
 include/configs/CPCI405.h|1 +
 include/configs/CPCI4052.h   |1 +
 include/configs/CPCI405AB.h  |1 +
 include/configs/CPCI405DT.h  |1 +
 include/configs/CPCIISER4.h  |1 +
 include/configs/CRAYL1.h |2 ++
 include/configs/DP405.h  |1 +
 include/configs/DU405.h  |1 +
 include/configs/DU440.h  |1 +
 include/configs/ERIC.h   |1 +
 include/configs/EXBITGEN.h   |1 +
 include/configs/G2000.h  |1 +
 include/configs/HH405.h  |1 +
 include/configs/HUB405.h |1 +
 include/configs/JSE.h|1 +
 include/configs/KAREF.h  |1 +
 include/configs/METROBOX.h   |1 +
 include/configs/MIP405.h |1 +
 include/configs/OCRTC.h  |1 +
 include/configs/ORSG.h   |1 +
 include/configs/PCI405.h |1 +
 include/configs/PIP405.h |1 +
 include/configs/PLU405.h |1 +
 include/configs/PMC405.h |1 +
 include/configs/PMC440.h |1 +
 include/configs/PPChameleonEVB.h |1 +
 include/configs/VOH405.h |1 +
 include/configs/VOM405.h |1 +
 include/configs/W7OLMC.h |1 +
 include/configs/W7OLMG.h |1 +
 include/configs/WUH405.h |1 +
 include/configs/XPEDITE1K.h  |1 +
 include/configs/alpr.h   |1 +
 include/configs/amcc-common.h|1 +
 include/configs/csb272.h |1 +
 include/configs/csb472.h |1 +
 include/configs/korat.h  |1 +
 include/configs/lwmon5.h |1 +
 include/configs/netstal-common.h |1 +
 include/configs/p3p440.h |1 +
 include/configs/pcs440ep.h   |1 +
 include/configs/quad100hd.h  |1 +
 include/configs/sbc405.h |1 +
 include/configs/sc3.h|2 ++
 include/configs/zeus.h   |1 +
 net/eth.c|5 ++---
 51 files changed, 53 insertions(+), 12 deletions(-)

diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c
index d7b16da..1978269 100644
--- a/cpu/ppc4xx/4xx_enet.c
+++ b/cpu/ppc4xx/4xx_enet.c
@@ -91,13 +91,6 @@
 #include 
 #include 
 
-/*
- * Only compile for platform with AMCC EMAC ethernet controller and
- * network support enabled.
- * Remark: CONFIG_405 describes Xilinx PPC405 FPGA without EMAC controller!
- */
-#if defined(CONFIG_CMD_NET) && !defined(CONFIG_405) && !defined(CONFIG_IOP480)
-
 #if !(defined(CONFIG_MII) || defined(CONFIG_CMD_MII))
 #error "CONFIG_MII has to be defined!"
 #endif
@@ -2131,5 +2124,3 @@ int emac4xx_miiphy_initialize (bd_t * bis)
return 0;
 }
 #endif /* !defined(CONFIG_NET_MULTI) */
-
-#endif
diff --git a/cpu/ppc4xx/Makefile b/cpu/ppc4xx/Makefile
index 463b575..adfe13c 100644
--- a/cpu/ppc4xx/Makefile
+++ b/cpu/ppc4xx/Makefile
@@ -38,6 +38,7 @@ COBJS += 44x_spd_ddr2.o
 ifdef CONFIG_PPC4xx_DDR_AUTOCALIBRATION
 COBJS  += 4xx_ibm_ddr2_autocalib.o
 endif
+COBJS-$(CONFIG_PPC4xx_EMAC) += 4xx_enet.o
 COBJS  += 4xx_pci.o
 COBJS  += 4xx_pcie.o
 COBJS  += bedbug_405.o
diff --git a/include/configs/AR405.h b/include/configs/AR405.h
index 864774c..9f19269 100644
--- a/include/configs/AR405.h
+++ b/include/configs/AR405.h
@@ -67,6 +67,7 @@
 #define CONFIG_LOADS_ECHO  1   /* echo on for serial download  */
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   1   /* allow baudrate change
*/
 
+#define CONFIG_PPC4xx_EMAC
 #define CONFIG_MII 1   /* MII PHY management   */
 #define CONFIG_PHY_ADDR0   /* PHY address  
*/
 #define CONFIG_LXT971_NO_SLEEP  1   /* disable sleep mode in LXT971 */
diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h
index bcc85ee..a694083 100644
--- a/include/configs/ASH405.h
+++ b/include/configs/ASH405.h
@@ -56,6 +56,7 @@
 #define CONFIG_NET_MULTI   1
 #undef  CONFIG_HAS_ETH1
 
+#define CONFIG_PPC4xx_EMAC
 #define CONFIG_MII 1   /* MII PHY management   */
 #define CONFIG_PHY_ADDR0   /* PHY address  
*/
 #define CONFIG_LXT971_NO_SLEEP  1   /* disable sleep mode in LXT971 */
diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h
index d58f508..d0e2464 100644
--- a/include/configs/CMS700.h
+++ b/include/configs/CMS700.h
@@ -52,6 +52,7 @@
 
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   1   /* allow baudrate change
*/
 
+#define CONFIG_PPC4xx_EMAC
 #define CONFIG_NET_MULTI   1
 #undef  CONFIG_HAS_ETH1
 
diff --git a/include/configs/CPCI405.h b/include/configs/CPCI

[U-Boot] [PATCH] [ONENAND] Reduce OneNAND IPL code size v2

[Kyungmin Park]

OneNAND IPL has common codes for RAM init, load data, and jump to 2nd
bootloader, but it's common code used about 300~400 bytes. So board
specific codes, such as lowlevel_init, can't has enough code. It make
a difficult to implement OneNAND IPL.

This patch make this common code as small as possible. and give
lowlevel_init can have more codes.

Signed-off-by: Kyungmin Park <[EMAIL PROTECTED]>
---
diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S
index e622338..132cc4a 100644
--- a/cpu/arm1136/start.S
+++ b/cpu/arm1136/start.S
@@ -33,23 +33,7 @@
 .globl _start
 _start: b  reset
 #ifdef CONFIG_ONENAND_IPL
-   ldr pc, _hang
-   ldr pc, _hang
-   ldr pc, _hang
-   ldr pc, _hang
-   ldr pc, _hang
-   ldr pc, _hang
-   ldr pc, _hang
-
-_hang:
-   .word   do_hang
-   .word   0x12345678
-   .word   0x12345678
-   .word   0x12345678
-   .word   0x12345678
-   .word   0x12345678
-   .word   0x12345678
-   .word   0x12345678  /* now 16*4=64 */
+   . = _start + 64 /* now 16*4=64 */
 #else
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
@@ -362,12 +346,7 @@ cpu_init_crit:
 /*
  * exception handlers
  */
-#ifdef CONFIG_ONENAND_IPL
-   .align  5
-do_hang:
-   ldr sp, _TEXT_BASE  /* use 32 words about stack */
-   bl  hang/* hang and never return */
-#else  /* !CONFIG_ONENAND IPL */
+#ifndef CONFIG_ONENAND_IPL
.align  5
 undefined_instruction:
get_bad_stack
diff --git a/onenand_ipl/onenand_boot.c b/onenand_ipl/onenand_boot.c
index aff62d2..2440d8b 100644
--- a/onenand_ipl/onenand_boot.c
+++ b/onenand_ipl/onenand_boot.c
@@ -39,6 +39,7 @@ int print_info(void)
 
 typedef int (init_fnc_t)(void);
 
+#ifdef CONFIG_USE_ONENAND_INIT
 init_fnc_t *init_sequence[] = {
board_init, /* basic board dependent setup */
 #ifdef CONFIG_SYS_PRINTF
@@ -47,24 +48,23 @@ init_fnc_t *init_sequence[] = {
 #endif
NULL,
 };
+#endif
 
 void start_oneboot(void)
 {
-   init_fnc_t **init_fnc_ptr;
uchar *buf;
+#ifdef CONFIG_USE_ONENAND_INIT
+   init_fnc_t **init_fnc_ptr;
 
for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
if ((*init_fnc_ptr)() != 0)
hang();
}
+#endif
 
buf = (uchar *) CONFIG_SYS_LOAD_ADDR;
 
-   if (!onenand_read_block0(buf))
-   buf += ONENAND_BLOCK_SIZE;
-
-   if (buf == (uchar *)CONFIG_SYS_LOAD_ADDR)
-   hang();
+   onenand_read_block0(buf);
 
/* go run U-Boot and never return */
printf("Starting OS Bootloader...\n");
@@ -73,9 +73,11 @@ void start_oneboot(void)
/* should never come here */
 }
 
+#ifdef CONFIG_USE_ONENAND_INIT
 void hang(void)
 {
/* if board_hang() returns, hange here */
printf("X-Loader hangs\n");
for (;;);
 }
+#endif
diff --git a/onenand_ipl/onenand_ipl.h b/onenand_ipl/onenand_ipl.h
index 3387998..438e58c 100644
--- a/onenand_ipl/onenand_ipl.h
+++ b/onenand_ipl/onenand_ipl.h
@@ -23,7 +23,7 @@
 
 #include 
 
-#define ONENAND_BLOCK_SIZE  2048
+#define ONENAND_BLOCK_SIZE  0x2
 
 #ifndef CONFIG_SYS_PRINTF
 #define printf(format, args...)
@@ -39,5 +39,5 @@
 
 #define ONENAND_PAGE_SIZE   2048
 
-extern int onenand_read_block0(unsigned char *buf);
+extern void onenand_read_block0(unsigned char *buf);
 #endif
diff --git a/onenand_ipl/onenand_read.c b/onenand_ipl/onenand_read.c
index 6d04943..38703fb 100644
--- a/onenand_ipl/onenand_read.c
+++ b/onenand_ipl/onenand_read.c
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2005-2008 Samsung Electronis
+ * (C) Copyright 2005-2008 Samsung Electronics
  * Kyungmin Park <[EMAIL PROTECTED]>
  *
  * See file CREDITS for list of people who contributed to this
@@ -87,14 +87,16 @@ static inline int onenand_read_page(ulong block, ulong page,
 
 #define ONENAND_START_PAGE 1
 #define ONENAND_PAGES_PER_BLOCK64
+#ifndef CONFIG_ONENAND_END_BLOCK
+#define CONFIG_ONENAND_END_BLOCK   1
+#endif
 
 /**
  * onenand_read_block - Read a block data to buf
- * @return 0 on success
  */
-int onenand_read_block0(unsigned char *buf)
+void onenand_read_block0(unsigned char *buf)
 {
-   int page, offset = 0;
+   int block, page, offset = 0;
int pagesize = ONENAND_PAGE_SIZE;
 
/* MLC OneNAND has 4KiB page size */
@@ -103,12 +105,12 @@ int onenand_read_block0(unsigned char *buf)
 
/* NOTE: you must read page from page 1 of block 0 */
/* read the block page by page*/
-   for (page = ONENAND_START_PAGE;
-   page < ONENAND_PAGES_PER_BLOCK; page++) {
-
-   onenand_read_page(0, page, buf + offset, pagesize);
-   offset += pagesize;
+   page = ONENAND_START_PAGE;
+   for (block = 0; block < CONFIG_ONENAND_END_BLOCK; block++) {
+

Re: [U-Boot] [PATCH] at91: add support for PM9263 board

[Jean-Christophe PLAGNIOL-VILLARD]

On 18:30 Thu 06 Nov , Ilko Iliev wrote:
> This patch adds support for the PM9263 board of Ronetix GmbH (www.ronetix.at)
> 

It will be nice it you could generate patch to see duplicate code to simplify
the review.
This is >70% the same as the at91sam9263

As I announe I've send the common for RFC please take a look
> Signed-off-by: Ilko Iliev <[EMAIL PROTECTED]>
> ---
>  MAKEALL |1 +
>  Makefile|3 +
>  board/ronetix/pm9263/Makefile   |   60 
>  board/ronetix/pm9263/config.mk  |1 +
>  board/ronetix/pm9263/pm9263.c   |  504 
> +++
>  board/ronetix/pm9263/pm9263_led.c   |   66 
>  board/ronetix/pm9263/pm9263_lowlevel_init.S |  376 
>  board/ronetix/pm9263/pm9263_nand.c  |   79 +
>  board/ronetix/pm9263/pm9263_partition.c |   47 +++
>  include/configs/pm9263.h|  279 +++
>  tools/Makefile  |3 +
>  tools/logos/ronetix.bmp |  Bin 0 -> 5638 bytes
>  12 files changed, 1419 insertions(+), 0 deletions(-)
>  create mode 100644 board/ronetix/pm9263/Makefile
>  create mode 100644 board/ronetix/pm9263/config.mk
>  create mode 100644 board/ronetix/pm9263/pm9263.c
>  create mode 100644 board/ronetix/pm9263/pm9263_led.c
>  create mode 100644 board/ronetix/pm9263/pm9263_lowlevel_init.S
>  create mode 100644 board/ronetix/pm9263/pm9263_nand.c
>  create mode 100644 board/ronetix/pm9263/pm9263_partition.c
>  create mode 100644 include/configs/pm9263.h
>  create mode 100644 tools/logos/ronetix.bmp
> 
> diff --git a/MAKEALL b/MAKEALL
> index 1f56ac5..a1df37b 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -545,6 +545,7 @@ LIST_at91="   \
>   kb9202  \
>   mp2usb  \
>   m501sk  \
> + pm9263  \
>  "
>  
>  #
> diff --git a/Makefile b/Makefile
> index 983a3cd..7d43159 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -2561,6 +2561,9 @@ at91cap9adk_config  :   unconfig
>  at91sam9260ek_config :   unconfig
>   @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9260ek atmel at91
>  
> +pm9263_config:   unconfig
> + @$(MKCONFIG) $(@:_config=) arm arm926ejs pm9263 ronetix at91
> +
>  
>  ## ARM Integrator boards - see doc/README-integrator for more info.
>  integratorap_config  \
> diff --git a/board/ronetix/pm9263/Makefile b/board/ronetix/pm9263/Makefile
> new file mode 100644
> index 000..342bfca
> --- /dev/null
> +++ b/board/ronetix/pm9263/Makefile
> @@ -0,0 +1,60 @@
> +#
> +# (C) Copyright 2003-2008
> +# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
> +#
> +# (C) Copyright 2008
> +# Stelian Pop <[EMAIL PROTECTED]>
> +# Lead Tech Design 
> +# Ilko Iliev 
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB  = $(obj)lib$(BOARD).a
> +
> +COBJS-y += pm9263.o
> +COBJS-y += pm9263_led.o
> +COBJS-y  += pm9263_partition.o
> +COBJS-$(CONFIG_CMD_NAND) += pm9263_nand.o
> +
> +SOBJS:= pm9263_lowlevel_init.o
> +
> +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
> +OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
> +SOBJS:= $(addprefix $(obj),$(SOBJS))
> +
> +$(LIB):  $(obj).depend $(OBJS) $(SOBJS)
> + $(call cmd_link_o_target, $@, $(OBJS))
> + 
   ^
please remove
> +clean:
> + rm -f $(SOBJS) $(OBJS)
> +
> +distclean:   clean
> + rm -f $(LIB) core *.bak $(obj).depend
> +
> +#
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#
> diff --git a/board/ronetix/pm9263/config.mk b/board/ronetix/pm9263/config.mk
> new file mode 100644
> index 000..ff2cfd1
> --- /dev/null
> +++ b/board/ronetix/pm9263/config.mk
> @@ -0,0 +1 @@
> +TEXT_BASE = 0x23f0
> diff --git a/board/ronetix/pm9263/pm926

Re: [U-Boot] [PATCH V2] Initial support for Nomadik 8815 development board

[Jean-Christophe PLAGNIOL-VILLARD]

On 12:29 Tue 04 Nov , Alessandro Rubini wrote:
> Subject: Initial support for Nomadik 8815 development board
> From: Alessandro Rubini <[EMAIL PROTECTED]>
> 
> The NMDK8815 board is distributed by ST Microelectornics.
> This is the initial port, with basic infrastructure and
> a working serial port.

As you and I known the patch is a port from ST version 1.1.4 or their last
1.3.1 IIRC. So your patch have steel some old code inside.

First could you ST in the loop please?
Secondly please create a vendor dir
> 
> Signed-off-by: Alessandro Rubini <[EMAIL PROTECTED]>
> ---
> 
> After the first post of Oct 30th I found checkpatch complains. This
> fixes those complains but two, (one acceptable extern and a false
> positive from checkpatch).
> 
>  MAINTAINERS|5 +
>  MAKEALL|1 +
>  Makefile   |   11 ++
>  board/nmdk8815/Makefile|   53 ++
>  board/nmdk8815/config.mk   |   26 +++
>  board/nmdk8815/nmdk8815.c  |   76 +
>  board/nmdk8815/platform.S  |  351 
> 
>  board/nmdk8815/u-boot.lds  |   51 ++
>  cpu/arm926ejs/nomadik/Makefile |   46 ++
>  cpu/arm926ejs/nomadik/reset.S  |   27 +++
>  cpu/arm926ejs/nomadik/timer.c  |  180 
>  include/configs/nmdk8815.h |  187 +
>  12 files changed, 1014 insertions(+), 0 deletions(-)
>  create mode 100644 board/nmdk8815/Makefile
>  create mode 100644 board/nmdk8815/config.mk
>  create mode 100644 board/nmdk8815/nmdk8815.c
>  create mode 100644 board/nmdk8815/platform.S
>  create mode 100644 board/nmdk8815/u-boot.lds
>  create mode 100644 cpu/arm926ejs/nomadik/Makefile
>  create mode 100644 cpu/arm926ejs/nomadik/reset.S
>  create mode 100644 cpu/arm926ejs/nomadik/timer.c
>  create mode 100644 include/configs/nmdk8815.h
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index a7f9b87..8cf5910 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -581,6 +581,11 @@ Stefan Roese <[EMAIL PROTECTED]>
>   pdnb3   xscale
>   scpuxscale
>  
> +Alessandro Rubini <[EMAIL PROTECTED]>
> +Nomadik Linux Team <[EMAIL PROTECTED]>
> +
> + nmdk8815ARM926EJS (Nomadik 8815 Soc)
> +
>  Robert Schwebel <[EMAIL PROTECTED]>
>  
>   csb226  xscale
> diff --git a/MAKEALL b/MAKEALL
> index 1f56ac5..347fe73 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -487,6 +487,7 @@ LIST_ARM9="   \
>   mx1ads  \
>   mx1fs2  \
>   netstar \
> + nmdk8815\
>   omap1510inn \
>   omap1610h2  \
>   omap1610inn \
> diff --git a/Makefile b/Makefile
> index 983a3cd..fe3b67a 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -2612,6 +2612,17 @@ mx1fs2_config  :   unconfig
>  netstar_config:  unconfig
>   @$(MKCONFIG) $(@:_config=) arm arm925t netstar
>  
> +nmdk8815_config \
> +nmdk8815_onenand_config: unconfig
   ^
please replace by tab
> + @ > $(obj)include/config.h 
  ^
please remove
> + @if [ "$(findstring _onenand, $@)" ] ; then \
> + echo "#define CONFIG_BOOT_ONENAND" >> $(obj)include/config.h; \
> + $(XECHO) "... configured for OneNand Flash"; \
> + else \
> + $(XECHO) "... configured for Nand Flash"; \
> + fi
> + @./mkconfig -a nmdk8815 arm arm926ejs nmdk8815 NULL nomadik
please use $(MKCONFIG)
> +
>  omap1510inn_config : unconfig
>   @$(MKCONFIG) $(@:_config=) arm arm925t omap1510inn
>  
> diff --git a/board/nmdk8815/Makefile b/board/nmdk8815/Makefile
> new file mode 100644
> index 000..50ff6dd
> --- /dev/null
> +++ b/board/nmdk8815/Makefile
> @@ -0,0 +1,53 @@
> +#
> +# (C) Copyright 2000-2004
> +# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
> +#
> +# (C) Copyright 2004
> +# ARM Ltd.
> +# Philippe Robin, <[EMAIL PROTECTED]>
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +CFLAGS += -D__I2C_ENHANCED -D__RELEASE -D__NOMADIK_I2C -D__STN_8815=10
> +CFLAGS 

Re: [U-Boot] ARM Pull request

[Alessandro Rubini]

Any feedback about the nomadik 8815 patch? It's not in the pull request

thanks
/alessandro
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[U-Boot] OMAP3 broken NAND hardware ECC generation

[Dirk Behme]

Dear Scott and Nishanth,

we have broken OMAP3 NAND hardware ECC generation while our clean up 
of OMAP3 NAND code.

I did some debugging. Do you like to have a look to

http://git.denx.de/?p=u-boot/u-boot-arm.git;a=blob;f=drivers/mtd/nand/omap_gpmc.c;h=01b79593949fe828e4b1d3da2cf4b399c1b580ab;hb=refs/heads/omap3

?

Using some well defined data in SDRAM, I used older U-Boot with 
working nand ecc hw/sw implementation and our recent version to write 
this data to NAND. I then compared ecc written and found that our 
latest version writes the correct location, but all zero:

Working version from older U-Boot:

OOB:
 ff ff ec 13 0f 00 00 00
 00 00 00 00 00 00 ff ff
 ff ff ff ff ff ff ff ff
 ff ff ff ff ff ff ff ff
 ff ff ff ff ff ff ff ff
 ff ff ff ff ff ff ff ff
 ff ff ff ff ff ff ff ff
 ff ff ff ff ff ff ff ff

Recent version:

OOB:
 ff ff 00 00 00 00 00 00
 00 00 00 00 00 00 ff ff
 ff ff ff ff ff ff ff ff
 ff ff ff ff ff ff ff ff
 ff ff ff ff ff ff ff ff
 ff ff ff ff ff ff ff ff
 ff ff ff ff ff ff ff ff
 ff ff ff ff ff ff ff ff

In both versions the data the ecc is calculated for is the same. In 
recent version only zero is written.

Some additional debugging by adding some printf() in hw ecc functions:

OMAP3 beagleboard.org # nandecc hw
omap_hwecc_init
HW ECC selected
OMAP3 beagleboard.org # nand write 8000 68 1000

NAND write: device 0 offset 0x68, size 0x1000
omap_calculate_ecc 0x00 0x00 0x00
omap_calculate_ecc 0x00 0x00 0x00
omap_calculate_ecc 0x00 0x00 0x00
omap_calculate_ecc 0x00 0x00 0x00
omap_calculate_ecc 0x00 0x00 0x00
omap_calculate_ecc 0x00 0x00 0x00
omap_calculate_ecc 0x00 0x00 0x00
omap_calculate_ecc 0x00 0x00 0x00
  4096 bytes written: OK
OMAP3 beagleboard.org #

This is the result of

printf("omap_calculate_ecc 0x%02x 0x%02x 0x%02x\n", ecc_code[2], 
ecc_code[1], ecc_code[0]);

I'm not sure, but it seems to me, that omap_enable_hwecc() is never 
called. An printf() in this function is not shown.

Maybe call of nand_scan_tail(mtd); in omap_nand_switch_ecc() resets 
anything? Or any other idea?

Thanks for your help

Dirk
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[U-Boot] [PATCH-OMAP3] OMAP3: Remove BITx magic

[dirk . behme]

Subject: [PATCH-OMAP3] OMAP3: Remove BITx magic

From: Dirk Behme <[EMAIL PROTECTED]>

Remove bits.h and it's macros usage. Requested by Wolfgang Denk.

Signed-off-by: Dirk Behme <[EMAIL PROTECTED]>

---
 cpu/arm_cortexa8/omap3/board.c  |3 --
 cpu/arm_cortexa8/omap3/clock.c  |   25 +-
 cpu/arm_cortexa8/omap3/interrupts.c |   18 -
 cpu/arm_cortexa8/omap3/mem.c|3 --
 cpu/arm_cortexa8/omap3/sys_info.c   |   14 --
 cpu/arm_cortexa8/omap3/syslib.c |1 
 include/asm-arm/arch-omap3/bits.h   |   48 
 include/asm-arm/arch-omap3/cpu.h|   40 --
 8 files changed, 53 insertions(+), 99 deletions(-)

Index: u-boot-arm/include/asm-arm/arch-omap3/bits.h
===
--- u-boot-arm.orig/include/asm-arm/arch-omap3/bits.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/* bits.h
- * Copyright (c) 2004 Texas Instruments
- *
- * This package is free software;  you can redistribute it and/or
- * modify it under the terms of the license found in the file
- * named COPYING that should have accompanied this file.
- *
- * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
- * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
- */
-#ifndef __bits_h
-#define __bits_h 1
-
-#define BIT0   (1 << 0)
-#define BIT1   (1 << 1)
-#define BIT2   (1 << 2)
-#define BIT3   (1 << 3)
-#define BIT4   (1 << 4)
-#define BIT5   (1 << 5)
-#define BIT6   (1 << 6)
-#define BIT7   (1 << 7)
-#define BIT8   (1 << 8)
-#define BIT9   (1 << 9)
-#define BIT10  (1 << 10)
-#define BIT11  (1 << 11)
-#define BIT12  (1 << 12)
-#define BIT13  (1 << 13)
-#define BIT14  (1 << 14)
-#define BIT15  (1 << 15)
-#define BIT16  (1 << 16)
-#define BIT17  (1 << 17)
-#define BIT18  (1 << 18)
-#define BIT19  (1 << 19)
-#define BIT20  (1 << 20)
-#define BIT21  (1 << 21)
-#define BIT22  (1 << 22)
-#define BIT23  (1 << 23)
-#define BIT24  (1 << 24)
-#define BIT25  (1 << 25)
-#define BIT26  (1 << 26)
-#define BIT27  (1 << 27)
-#define BIT28  (1 << 28)
-#define BIT29  (1 << 29)
-#define BIT30  (1 << 30)
-#define BIT31  (1 << 31)
-
-#endif
Index: u-boot-arm/include/asm-arm/arch-omap3/cpu.h
===
--- u-boot-arm.orig/include/asm-arm/arch-omap3/cpu.h
+++ u-boot-arm/include/asm-arm/arch-omap3/cpu.h
@@ -39,7 +39,8 @@
 #define PRODUCTION_ID  (OMAP34XX_TAP_BASE + 0x208)
 
 /* device type */
-#define DEVICE_MASK(BIT8 | BIT9 | BIT10)
+#define DEVICE_MASK(0x7 << 8)
+#define SYSBOOT_MASK   0x1F
 #define TST_DEVICE 0x0
 #define EMU_DEVICE 0x1
 #define HS_DEVICE  0x2
@@ -104,7 +105,7 @@
 #define SMS_SYSCONFIG  (OMAP34XX_SMS_BASE + 0x10)
 #define SMS_RG_ATT0(OMAP34XX_SMS_BASE + 0x48)
 #define SMS_CLASS_ARB0 (OMAP34XX_SMS_BASE + 0xD0)
-#define BURSTCOMPLETE_GROUP7   BIT31
+#define BURSTCOMPLETE_GROUP7   (0x1 << 31)
 
 /* SDRC */
 #define SDRC_SYSCONFIG (OMAP34XX_SDRC_BASE + 0x10)
@@ -115,13 +116,13 @@
 #define SDRC_DLLA_STATUS   (OMAP34XX_SDRC_BASE + 0x64)
 #define SDRC_DLLB_CTRL (OMAP34XX_SDRC_BASE + 0x68)
 #define SDRC_DLLB_STATUS   (OMAP34XX_SDRC_BASE + 0x6C)
-#define DLLPHASE   BIT1
-#define LOADDLLBIT2
+#define DLLPHASE   (0x1 << 1)
+#define LOADDLL(0x1 << 2)
 #define DLL_DELAY_MASK 0xFF00
-#define DLL_NO_FILTER_MASK (BIT8 | BIT9)
+#define DLL_NO_FILTER_MASK ((0x1 << 9) | (0x1 << 8))
 
 #define SDRC_POWER (OMAP34XX_SDRC_BASE + 0x70)
-#define WAKEUPPROC BIT26
+#define WAKEUPPROC (0x1 << 26)
 
 #define SDRC_MCFG_0(OMAP34XX_SDRC_BASE + 0x80)
 #define SDRC_MR_0  (OMAP34XX_SDRC_BASE + 0x84)
@@ -141,7 +142,7 @@
 #define CMD_ENTR_SRFRSH0x5
 #define CMD_CKE_HIGH   0x6
 #define CMD_CKE_LOW0x7
-#define SOFTRESET  BIT1
+#define SOFTRESET  (0x1 << 1)
 #define SMART_IDLE (0x2 << 3)
 #define REF_ON_IDLE(0x1 << 6)
 
@@ -162,7 +163,7 @@
 #define TSICR  0x40/* rw */
 #define TCAR2  0x44/* r */
 /* enable sys_clk NO-prescale /1 */
-#define GPT_EN ((0 << 2) | BIT1 | BIT0)
+#define GPT_EN ((0x0 << 2) | (0x1 << 1) | (0x1 << 0))
 
 /* Watchdog */
 #define WWPS   0x34/* r */
@@ -210,6 +211,29 @@
 #define PRM_CLKSEL 0x48306d40
 #define PRM_RSTCTRL0x48307250
 #define PRM_CLKSRC_CTRL0x48307270
+#define SYSCLKDIV_1(0x1 << 6)
+#define SYSCLKDIV_2(0x1 << 7)
+
+#define CLKSEL_GPT1(0x1 << 0)
+
+#define EN_GPT1(0x1 << 0)
+#define EN_32KSYNC (0x1 << 2

[U-Boot] [PATCH-OMAP3] OMAP3: Fix typo and cp_delay

[dirk . behme]

Subject: [PATCH-OMAP3] OMAP3: Fix typo and cp_delay

From: Dirk Behme <[EMAIL PROTECTED]>

Fix typo and cp_delay. Requested by Wolfgang Denk.

Signed-off-by: Dirk Behme <[EMAIL PROTECTED]>

---

Regarding cp_delay there was the comment:

-- cut --
>+static void cp_delay(void)
>+{
>+  volatile int i;
>+
>+  /* Many OMAP regs need at least 2 nops */
>+  for (i = 0; i < 100; i++) ;

There is not much reason for the compiler not to optimize this code away.
-- cut --

Please note that most of ARM code uses *this* cp_delay() implementation. If I 
understood correctly at IRC, Scott Wood made some tests and volatile prevents 
gcc from optimizing loop away.

 cpu/arm_cortexa8/cpu.c   |5 ++---
 cpu/arm_cortexa8/start.S |2 +-
 2 files changed, 3 insertions(+), 4 deletions(-)

Index: u-boot-arm/cpu/arm_cortexa8/start.S
===
--- u-boot-arm.orig/cpu/arm_cortexa8/start.S
+++ u-boot-arm/cpu/arm_cortexa8/start.S
@@ -394,7 +394,7 @@ irq:
.align  5
 fiq:
get_fiq_stack
-   /* someone ought to write a more effiction fiq_save_user_regs */
+   /* someone ought to write a more effective fiq_save_user_regs */
irq_save_user_regs
bl  do_fiq
irq_restore_user_regs
Index: u-boot-arm/cpu/arm_cortexa8/cpu.c
===
--- u-boot-arm.orig/cpu/arm_cortexa8/cpu.c
+++ u-boot-arm/cpu/arm_cortexa8/cpu.c
@@ -68,10 +68,9 @@ static void write_p15_c1(unsigned long v
 
 static void cp_delay(void)
 {
-   volatile int i;
-
/* Many OMAP regs need at least 2 nops */
-   for (i = 0; i < 100; i++) ;
+   asm("nop");
+   asm("nop");
 }
 
 /* See also ARM Ref. Man. */
___
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[U-Boot] [PATCH-OMAP3] OMAP3: Add missing GPL headers

[dirk . behme]

Subject: [PATCH-OMAP3] OMAP3: Add missing GPL headers

From: Dirk Behme <[EMAIL PROTECTED]>

Add missing GPL headers. Requested by Wolfgang Denk.

Signed-off-by: Dirk Behme <[EMAIL PROTECTED]>

---
 board/omap3/beagle/config.mk |   20 +++-
 board/omap3/evm/config.mk|   20 +++-
 board/omap3/overo/config.mk  |   19 +++
 3 files changed, 57 insertions(+), 2 deletions(-)

Index: u-boot-arm/board/omap3/beagle/config.mk
===
--- u-boot-arm.orig/board/omap3/beagle/config.mk
+++ u-boot-arm/board/omap3/beagle/config.mk
@@ -2,9 +2,27 @@
 # (C) Copyright 2006
 # Texas Instruments, 
 #
-# Begale Board uses OMAP3 (ARM-CortexA8) cpu
+# Beagle Board uses OMAP3 (ARM-CortexA8) cpu
 # see http://www.ti.com/ for more information on Texas Instruments
 #
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
 # Physical Address:
 # 8000' (bank0)
 # A000/ (bank1)
Index: u-boot-arm/board/omap3/evm/config.mk
===
--- u-boot-arm.orig/board/omap3/evm/config.mk
+++ u-boot-arm/board/omap3/evm/config.mk
@@ -2,9 +2,27 @@
 # (C) Copyright 2006
 # Texas Instruments, 
 #
-# Begale Board uses OMAP3 (ARM-CortexA8) cpu
+# EVM uses OMAP3 (ARM-CortexA8) cpu
 # see http://www.ti.com/ for more information on Texas Instruments
 #
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
 # Physical Address:
 # 8000' (bank0)
 # A000/ (bank1)
Index: u-boot-arm/board/omap3/overo/config.mk
===
--- u-boot-arm.orig/board/omap3/overo/config.mk
+++ u-boot-arm/board/omap3/overo/config.mk
@@ -1,5 +1,24 @@
+#
 # Overo uses OMAP3 (ARM-CortexA8) cpu
 #
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
 # Physical Address:
 # 8000' (bank0)
 # A000/ (bank1)
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[U-Boot] [PATCH-OMAP3] OMAP3: Fix multiline comment style

[dirk . behme]

Subject: [PATCH-OMAP3] OMAP3: Fix multiline comment style

From: Dirk Behme <[EMAIL PROTECTED]>

Fix multiline comment style. Requested by Wolfgang Denk.

Signed-off-by: Dirk Behme <[EMAIL PROTECTED]>

---
 board/omap3/evm/evm.c   |   32 ++--
 cpu/arm_cortexa8/cpu.c  |   12 +++---
 cpu/arm_cortexa8/omap3/board.c  |   41 +++-
 cpu/arm_cortexa8/omap3/clock.c  |   24 ++---
 cpu/arm_cortexa8/omap3/interrupts.c |6 +++--
 cpu/arm_cortexa8/omap3/mem.c|6 +++--
 cpu/arm_cortexa8/omap3/sys_info.c   |4 ++-
 drivers/mtd/nand/omap_gpmc.c|   23 +---
 include/asm-arm/arch-omap3/omap3.h  |8 +++
 include/configs/omap3_beagle.h  |3 +-
 include/configs/omap3_evm.h |3 +-
 include/configs/omap3_overo.h   |3 +-
 12 files changed, 108 insertions(+), 57 deletions(-)

Index: u-boot-arm/include/asm-arm/arch-omap3/omap3.h
===
--- u-boot-arm.orig/include/asm-arm/arch-omap3/omap3.h
+++ u-boot-arm/include/asm-arm/arch-omap3/omap3.h
@@ -110,11 +110,11 @@
 
 #define CPU_3430   0x3430
 
-/* 343x real hardware:
+/*
+ * 343x real hardware:
  *  ES1 = rev 0
- */
-
-/* 343x code defines:
+ *
+ * 343x code defines:
  * ES1 = 0+1 = 1
  * ES1 = 1+1 = 1
  */
Index: u-boot-arm/cpu/arm_cortexa8/cpu.c
===
--- u-boot-arm.orig/cpu/arm_cortexa8/cpu.c
+++ u-boot-arm/cpu/arm_cortexa8/cpu.c
@@ -186,8 +186,10 @@ void l2cache_enable()
__asm__ __volatile__("mov %0, r12":"=r"(j));
__asm__ __volatile__("mov %0, r0":"=r"(i));
 
-   /* GP Device ROM code API usage here */
-   /* r12 = AUXCR Write function and r0 value */
+   /*
+* GP Device ROM code API usage here
+* r12 = AUXCR Write function and r0 value
+*/
__asm__ __volatile__("mov r12, #0x3");
__asm__ __volatile__("mrc p15, 0, r0, c1, c0, 1");
__asm__ __volatile__("orr r0, r0, #0x2");
@@ -214,8 +216,10 @@ void l2cache_disable()
__asm__ __volatile__("mov %0, r12":"=r"(j));
__asm__ __volatile__("mov %0, r0":"=r"(i));
 
-   /* GP Device ROM code API usage here */
-   /* r12 = AUXCR Write function and r0 value */
+   /*
+* GP Device ROM code API usage here
+* r12 = AUXCR Write function and r0 value
+*/
__asm__ __volatile__("mov r12, #0x3");
__asm__ __volatile__("mrc p15, 0, r0, c1, c0, 1");
__asm__ __volatile__("bic r0, r0, #0x2");
Index: u-boot-arm/cpu/arm_cortexa8/omap3/sys_info.c
===
--- u-boot-arm.orig/cpu/arm_cortexa8/omap3/sys_info.c
+++ u-boot-arm/cpu/arm_cortexa8/omap3/sys_info.c
@@ -63,7 +63,9 @@ u32 get_cpu_type(void)
 u32 get_cpu_rev(void)
 {
u32 cpuid = 0;
-   /* On ES1.0 the IDCODE register is not exposed on L4
+
+   /*
+* On ES1.0 the IDCODE register is not exposed on L4
 * so using CPU ID to differentiate
 * between ES2.0 and ES1.0.
 */
Index: u-boot-arm/cpu/arm_cortexa8/omap3/board.c
===
--- u-boot-arm.orig/cpu/arm_cortexa8/omap3/board.c
+++ u-boot-arm/cpu/arm_cortexa8/omap3/board.c
@@ -99,8 +99,10 @@ void secureworld_exit()
__asm__ __volatile__("mrc p15, 0, %0, c1, c1, 2":"=r"(i));
/* enabling co-processor CP10 and CP11 accesses in NS world */
__asm__ __volatile__("orr %0, %0, #0xC00":"=r"(i));
-   /* allow allocation of locked TLBs and L2 lines in NS world */
-   /* allow use of PLE registers in NS world also */
+   /*
+* allow allocation of locked TLBs and L2 lines in NS world
+* allow use of PLE registers in NS world also
+*/
__asm__ __volatile__("orr %0, %0, #0x7":"=r"(i));
__asm__ __volatile__("mcr p15, 0, %0, c1, c1, 2":"=r"(i));
 
@@ -128,8 +130,10 @@ void setup_auxcr()
__asm__ __volatile__("mov %0, r12":"=r"(j));
__asm__ __volatile__("mov %0, r0":"=r"(i));
 
-   /* GP Device ROM code API usage here */
-   /* r12 = AUXCR Write function and r0 value */
+   /*
+* GP Device ROM code API usage here
+* r12 = AUXCR Write function and r0 value
+*/
__asm__ __volatile__("mov r12, #0x3");
__asm__ __volatile__("mrc p15, 0, r0, c1, c0, 1");
/* Enabling ASA */
@@ -150,17 +154,21 @@ void try_unlock_memory()
int mode;
int in_sdram = is_running_in_sdram();
 
-   /* if GP device unlock device SRAM for general use */
-   /* secure code breaks for Secure/Emulation device - HS/E/T */
+   /*
+* if GP

[U-Boot] [PATCH-OMAP3] OMAP3: Fix gpmc_cs_base pointer math in NAND

[dirk . behme]

Subject: [PATCH-OMAP3] OMAP3: Fix gpmc_cs_base pointer math in NAND

From: Dirk Behme <[EMAIL PROTECTED]>

gpmc_cs_base is an uint32_t pointer, correct pointer math. Missed after 
readl/writel conversion.

Signed-off-by: Dirk Behme <[EMAIL PROTECTED]>

---

Jean-Christophe: Would be nice if you could handle this patch with priority as 
it prevents BeagleBoard from starting. Thanks!

 drivers/mtd/nand/omap_gpmc.c |   10 +-
 1 files changed, 5 insertions(+), 5 deletions(-)

Index: u-boot-arm/drivers/mtd/nand/omap_gpmc.c
===
--- u-boot-arm.orig/drivers/mtd/nand/omap_gpmc.c
+++ u-boot-arm/drivers/mtd/nand/omap_gpmc.c
@@ -48,13 +48,13 @@ static void omap_nand_hwcontrol(struct m
 */
switch (ctrl) {
case NAND_CTRL_CHANGE | NAND_CTRL_CLE:
-   this->IO_ADDR_W = gpmc_cs_base + GPMC_NAND_CMD;
+   this->IO_ADDR_W = gpmc_cs_base + OFFS(GPMC_NAND_CMD);
break;
case NAND_CTRL_CHANGE | NAND_CTRL_ALE:
-   this->IO_ADDR_W = gpmc_cs_base + GPMC_NAND_ADR;
+   this->IO_ADDR_W = gpmc_cs_base + OFFS(GPMC_NAND_ADR);
break;
case NAND_CTRL_CHANGE | NAND_NCE:
-   this->IO_ADDR_W = gpmc_cs_base + GPMC_NAND_DAT;
+   this->IO_ADDR_W = gpmc_cs_base + OFFS(GPMC_NAND_DAT);
break;
}
 
@@ -321,8 +321,8 @@ int board_nand_init(struct nand_chip *na
gpmc_config |= 0x10;
writel(gpmc_config, gpmc_base + OFFS(GPMC_CONFIG));
 
-   nand->IO_ADDR_R = gpmc_cs_base + GPMC_NAND_DAT;
-   nand->IO_ADDR_W = gpmc_cs_base + GPMC_NAND_CMD;
+   nand->IO_ADDR_R = gpmc_cs_base + OFFS(GPMC_NAND_DAT);
+   nand->IO_ADDR_W = gpmc_cs_base + OFFS(GPMC_NAND_CMD);
 
nand->cmd_ctrl = omap_nand_hwcontrol;
nand->options = NAND_NO_PADDING | NAND_CACHEPRG | NAND_NO_AUTOINCR |
___
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[U-Boot] [PATCH-OMAP3] OMAP3: Fix error in gpmc_init

[dirk . behme]

Subject: [PATCH-OMAP3] OMAP3: Fix error in gpmc_init

From: Dirk Behme <[EMAIL PROTECTED]>

Fix error in gpmc_init() introduced with readl/writel conversion. Use base 
addresses + offset, not offset only. Minor clean up by removing unused code.

Signed-off-by: Dirk Behme <[EMAIL PROTECTED]>

---

Jean-Christophe: Would be nice if you could handle this patch with priority as 
it prevents BeagleBoard from starting. Thanks!

 cpu/arm_cortexa8/omap3/mem.c |9 +++--
 1 files changed, 3 insertions(+), 6 deletions(-)

Index: u-boot-arm/cpu/arm_cortexa8/omap3/mem.c
===
--- u-boot-arm.orig/cpu/arm_cortexa8/omap3/mem.c
+++ u-boot-arm/cpu/arm_cortexa8/omap3/mem.c
@@ -233,18 +233,15 @@ void enable_gpmc_config(u32 *gpmc_config
 void gpmc_init(void)
 {
/* putting a blanket check on GPMC based on ZeBu for now */
-   u32 mux = 0, mwidth;
u32 *gpmc_config = NULL;
u32 *gpmc_base = (u32 *)GPMC_BASE;
+   u32 *gpmc_cs_base = (u32 *)GPMC_CONFIG_CS0_BASE;
u32 base = 0;
u32 size = 0;
u32 f_off = CONFIG_SYS_MONITOR_LEN;
u32 f_sec = 0;
u32 config = 0;
 
-   mux = BIT9;
-   mwidth = get_gpmc0_width();
-
/* global settings */
writel(0, gpmc_base + OFFS(GPMC_IRQENABLE)); /* isr's sources masked */
writel(0, gpmc_base + OFFS(GPMC_TIMEOUT_CONTROL));/* timeout disable */
@@ -256,7 +253,7 @@ void gpmc_init(void)
/* Disable the GPMC0 config set by ROM code
 * It conflicts with our MPDB (both at 0x0800)
 */
-   writel(0, GPMC_CONFIG_CS0 + GPMC_CONFIG7);
+   writel(0, gpmc_cs_base + OFFS(GPMC_CONFIG7));
sdelay(1000);
 
 #if defined(CONFIG_CMD_NAND)   /* CS 0 */
@@ -280,7 +277,7 @@ void gpmc_init(void)
 
 #if defined(CONFIG_CMD_ONENAND)
gpmc_config = gpmc_onenand;
-   onenand_cs_base = (u32 *)(GPMC_CONFIG_CS0 +
+   onenand_cs_base = (u32 *)(GPMC_CONFIG_CS0_BASE +
  (GPMC_CS * GPMC_CONFIG_WIDTH));
base = PISMO1_ONEN_BASE;
size = PISMO1_ONEN_SIZE;
___
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[U-Boot] [PATCH] usbtty/omap: update to current API

[Jean-Christophe PLAGNIOL-VILLARD]

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[EMAIL PROTECTED]>

diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c
index e738c56..448defa 100644
--- a/drivers/serial/usbtty.c
+++ b/drivers/serial/usbtty.c
@@ -22,14 +22,13 @@
  */
 
 #include 
-
+#include /* If defined, override Linux identifiers with
+* vendor specific ones */
 #include 
 #include 
 #include "usbtty.h"
 #include "usb_cdc_acm.h"
 #include "usbdescriptors.h"
-#include /* If defined, override Linux identifiers with
-* vendor specific ones */
 
 #if 0
 #define TTYDBG(fmt,args...)\
diff --git a/drivers/serial/usbtty.h b/drivers/serial/usbtty.h
index 71c47bc..2175d68 100644
--- a/drivers/serial/usbtty.h
+++ b/drivers/serial/usbtty.h
@@ -24,11 +24,11 @@
 #ifndef __USB_TTY_H__
 #define __USB_TTY_H__
 
-#include "usbdcore.h"
+#include 
 #if defined(CONFIG_PPC)
-#include "usbdcore_mpc8xx.h"
+#include 
 #elif defined(CONFIG_ARM)
-#include "usbdcore_omap1510.h"
+#include 
 #endif
 
 #include 
@@ -36,14 +36,25 @@
 /* If no VendorID/ProductID is defined in config.h, pretend to be Linux
  * DO NOT Reuse this Vendor/Product setup with protocol incompatible devices */
 
+#ifndef CONFIG_USBD_VENDORID
 #define CONFIG_USBD_VENDORID 0x0525/* Linux/NetChip */
+#endif
+#ifndef CONFIG_USBD_PRODUCTID_GSERIAL
 #define CONFIG_USBD_PRODUCTID_GSERIAL 0xa4a6   /* gserial */
+#endif
+#ifndef CONFIG_USBD_PRODUCTID_CDCACM
 #define CONFIG_USBD_PRODUCTID_CDCACM  0xa4a7   /* CDC ACM */
+#endif
+#ifndef CONFIG_USBD_MANUFACTURER
 #define CONFIG_USBD_MANUFACTURER "Das U-Boot"
+#endif
+#ifndef CONFIG_USBD_PRODUCT_NAME
 #define CONFIG_USBD_PRODUCT_NAME U_BOOT_VERSION
+#endif
 
-
+#ifndef CONFIG_USBD_CONFIGURATION_STR
 #define CONFIG_USBD_CONFIGURATION_STR "TTY via USB"
+#endif
 
 #define CONFIG_USBD_SERIAL_OUT_ENDPOINT UDC_OUT_ENDPOINT
 #define CONFIG_USBD_SERIAL_OUT_PKTSIZE UDC_OUT_PACKET_SIZE
diff --git a/drivers/usb/usbdcore_omap1510.c b/drivers/usb/usbdcore_omap1510.c
index 4e3239f..fb8cb5d 100644
--- a/drivers/usb/usbdcore_omap1510.c
+++ b/drivers/usb/usbdcore_omap1510.c
@@ -1064,7 +1064,7 @@ void omap1510_udc_noniso_irq (void)
  */
 
 /* Called to start packet transmission. */
-void udc_endpoint_write (struct usb_endpoint_instance *endpoint)
+int udc_endpoint_write (struct usb_endpoint_instance *endpoint)
 {
unsigned short epnum =
endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK;
@@ -1081,6 +1081,8 @@ void udc_endpoint_write (struct usb_endpoint_instance 
*endpoint)
/* deselect the endpoint FIFO */
outw (UDC_EP_Dir | epnum, UDC_EP_NUM);
}
+
+   return 0;
 }
 
 /* Start to initialize h/w stuff */
diff --git a/include/usbdcore_omap1510.h b/include/usbdcore_omap1510.h
index 526fcd9..ece0e95 100644
--- a/include/usbdcore_omap1510.h
+++ b/include/usbdcore_omap1510.h
@@ -168,8 +168,8 @@
 #define UDC_IN_ENDPOINT1
 #define UDC_IN_PACKET_SIZE 64
 #define UDC_INT_ENDPOINT 5
-#define UDC_INT_PKTSIZE16
-#define UDC_BULK_PKTSIZE 16
+#define UDC_INT_PACKET_SIZE16
+#define UDC_BULK_PACKET_SIZE 16
 
 void udc_irq (void);
 /* Flow control */
@@ -177,7 +177,7 @@ void udc_set_nak(int epid);
 void udc_unset_nak (int epid);
 
 /* Higher level functions for abstracting away from specific device */
-void udc_endpoint_write(struct usb_endpoint_instance *endpoint);
+int udc_endpoint_write(struct usb_endpoint_instance *endpoint);
 
 int  udc_init (void);
 
-- 
1.5.6.5

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Re: [U-Boot] [PATCH 13/13 v5] ARM: OMAP3: Add Beagle, EVM and Overo configuration and README

[Jean-Christophe PLAGNIOL-VILLARD]

On 19:40 Sun 02 Nov , [EMAIL PROTECTED] wrote:
> From: Dirk Behme <[EMAIL PROTECTED]>
> 
> Add Beagle, EVM and Overo configuration and README
> 
> Signed-off-by: Dirk Behme <[EMAIL PROTECTED]>
> 
> ---
>  doc/README.omap3   |   94 +++
>  include/configs/omap3_beagle.h |  289 
>  include/configs/omap3_evm.h|  322 
> +
>  include/configs/omap3_overo.h  |  280 +++
>  4 files changed, 985 insertions(+)
> 
> Index: u-boot-main/include/configs/omap3_beagle.h
> ===
> --- /dev/null
> +++ u-boot-main/include/configs/omap3_beagle.h
> @@ -0,0 +1,289 @@
> +/*
> + * (C) Copyright 2006-2008
> + * Texas Instruments.
> + * Richard Woodruff <[EMAIL PROTECTED]>
> + * Syed Mohammed Khasim <[EMAIL PROTECTED]>
> + *
> + * Configuration settings for the TI OMAP3530 Beagle board.
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.   See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +#include 
> +
> +/*
> + * High Level Configuration Options
> + */
> +#define CONFIG_ARMCORTEXA8   1   /* This is an ARM V7 CPU core */
> +#define CONFIG_OMAP  1   /* in a TI OMAP core */
> +#define CONFIG_OMAP34XX  1   /* which is a 34XX */
> +#define CONFIG_OMAP3430  1   /* which is in a 3430 */
> +#define CONFIG_OMAP3_BEAGLE  1   /* working with BEAGLE */
> +#define CONFIG_DOS_PARTITION 1
> +
> +#include /* get chip and board defs */
> +#include 
> +
> +/* Clock Defines */
> +#define V_OSCK   2600/* Clock output from T2 */
 ^^^
whitespace please fix
> +#define V_SCLK   (V_OSCK >> 1)
 ^^^
whitespace please fix
> +
> +#undef CONFIG_USE_IRQ/* no support for IRQs */
> +#define CONFIG_MISC_INIT_R
> +
> +#define CONFIG_CMDLINE_TAG   1   /* enable passing of ATAGs */
 ^^^
whitespace please fix
> +#define CONFIG_SETUP_MEMORY_TAGS 1
> +#define CONFIG_INITRD_TAG1

whitespace please fix
> +#define CONFIG_REVISION_TAG  1
  ^^
whitespace please fix
> +
> +/*
> + * Size of malloc() pool
> + */
> +#define CONFIG_ENV_SIZE  SZ_128K /* Total Size Environment Sector */
  ^^
whitespace please fix
> +#define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + SZ_128K)
^^^
whitespace please fix
> +#define CONFIG_SYS_GBL_DATA_SIZE128   /* bytes reserved for initial 
> data */
   ^^^
whitespace please fix
> +
> +/*
> + * Hardware drivers
> + */
> +
> +/*
> + * NS16550 Configuration
> + */
> +#define V_NS16550_CLK(4800)  /* 48MHz (APLL96/2) */

whitespace please fix
> +
> +#define CONFIG_SYS_NS16550
> +#define CONFIG_SYS_NS16550_SERIAL
> +#define CONFIG_SYS_NS16550_REG_SIZE (-4)
  ^
whitespace please fix
> +#define CONFIG_SYS_NS16550_CLK  V_NS16550_CLK
 ^^
whitespace please fix
> +
> +/*
> + * select serial console configuration
> + */
> +#define CONFIG_CONS_INDEX3

whitespace please fix
> +#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
  ^
whitespace please fix
> +#define CONFIG_SERIAL3   3   /* UART3 on Beagle Rev 2 */
 ^^^
whitespace please fix
> +
> +/* allow to overwrite serial and ethaddr */
> +#define CONFIG_ENV_OVERWRITE
> +#define CONFIG_BAUDRATE  115200
  ^^
whitespace please fix
> +#define CONFIG_SYS_BAUDRATE_TABLE   {4800, 9600, 19200, 38400, 57600, 
> 115200}
^^^
whitespace please fix
> +#define CONFIG_MMC   1
> +#define CONFIG_SYS_MMC_BASE  0xF000
> +#define CONFIG_DOS_PARTITION 1
> +
> +/* c

Re: [U-Boot] [PATCH 11/13 v5] ARM: OMAP3: Add EVM board

[Jean-Christophe PLAGNIOL-VILLARD]

> + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
> +#endif
> +
> +#if defined(CONFIG_CMD_NET)
> + setup_net_chip();
> +#endif
> +
> + return 0;
> +}
> +
> +/**
> + * Routine: set_muxconf_regs
> + * Description: Setting up the configuration Mux registers specific to the
> + *  hardware. Many pins need to be moved from protect to primary
> + *  mode.
> + 
> */
> +void set_muxconf_regs(void)
> +{
> + MUX_EVM();
> +}
> +
> +/**
> + * Routine: setup_net_chip
> + * Description: Setting up the configuration GPMC registers specific to the
> + *  Ethernet hardware. Pin Muxing for the SMC9118 is initialized
> + *  here.
> + 
> */
> +static int setup_net_chip(void)
> +{
in this function please add some blank line to make the code more readable
> + int i = 0;
> +
> + /* Configure GPMC registers */
> + (*(volatile int *)(OMAP34XX_GPMC_BASE + 0x0150)) = 0x1000;
> + (*(volatile int *)(OMAP34XX_GPMC_BASE + 0x0154)) = 0x001e1e01;
> + (*(volatile int *)(OMAP34XX_GPMC_BASE + 0x0158)) = 0x00080300;
> + (*(volatile int *)(OMAP34XX_GPMC_BASE + 0x015C)) = 0x1c091c09;
> + (*(volatile int *)(OMAP34XX_GPMC_BASE + 0x0160)) = 0x04181f1f;
> + (*(volatile int *)(OMAP34XX_GPMC_BASE + 0x0164)) = 0x0FCF;
> + (*(volatile int *)(OMAP34XX_GPMC_BASE + 0x0168)) = 0x0f6c;
> +
> + /* Configure PIN MUX registers */
> + /* Enable GPMC Pin Mux Registers */
> + /* Enable GPMC_CLK Pin in CONTROL_PADCONF_gpmc_ncs7 register */
> + (*(volatile int *)(OMAP34XX_CTRL_BASE + 0xBC)) |= 0x0018;
> + /* Enable CS5 Pin in CONTROL_PADCONF_gpmc_ncs5 register */
> + (*(volatile int *)(OMAP34XX_CTRL_BASE + 0xB8)) |= 0x0018;
> + (*(volatile int *)(OMAP34XX_CTRL_BASE + 0xB8)) &= 0xFFF8;
> + /* Enable offmode for nwe in CONTROL_PADCONF_GPMC_NWE register */
> + (*(volatile int *)(OMAP34XX_CTRL_BASE + 0xC4)) |= 0x0F00;
> + /* En off mode for noe and ale in CONTROL_PADCONF_GPMC_NADV_ALE reg */
> + (*(volatile int *)(OMAP34XX_CTRL_BASE + 0xC0)) |= 0x0E000E00;
> + /* Enable gpmc_nbe0_cle in CONTROL_PADCONF_GPMC_NWE register */
> + (*(volatile int *)(OMAP34XX_CTRL_BASE + 0xC4)) |= 0x0018;
> +
> + /* Enable gpmc_nbe1 in CONTROL_PADCONF_GPMC_NBE1 register and
> + configuring the mux mode to 0 */
> + (*(volatile int *)(OMAP34XX_CTRL_BASE + 0xC8)) |= 0x0018;
> + (*(volatile int *)(OMAP34XX_CTRL_BASE + 0xC8)) &= 0xFFF8;
> + /* Enable d15 in CONTROL_PADCONF_GPMC_D15 register */
> + (*(volatile int *)(OMAP34XX_CTRL_BASE + 0xAC)) |= 0x0018;
> + /* Enable d14 - d13 in CONTROL_PADCONF_GPMC_D13 register */
> + (*(volatile int *)(OMAP34XX_CTRL_BASE + 0xA8)) |= 0x00180018;
> + /* Enable d12 - d11 in CONTROL_PADCONF_GPMC_D11 register */
> + (*(volatile int *)(OMAP34XX_CTRL_BASE + 0xA4)) |= 0x00180018;
> + /* Enable d10 - d9 in CONTROL_PADCONF_GPMC_D9 register */
> + (*(volatile int *)(OMAP34XX_CTRL_BASE + 0xA0)) |= 0x00180018;
> + /* Enable d8 - d7 in CONTROL_PADCONF_GPMC_D7 register */
> + (*(volatile int *)(OMAP34XX_CTRL_BASE + 0x9C)) |= 0x00180018;
> + /* Enable d6 - d5 in CONTROL_PADCONF_GPMC_D5 register */
> + (*(volatile int *)(OMAP34XX_CTRL_BASE + 0x98)) |= 0x00180018;
Best Regards,
J.
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Re: [U-Boot] [PATCH 12/13 v5] ARM: OMAP3: Add Overo board

[Jean-Christophe PLAGNIOL-VILLARD]

 +
> +/**
> + * Routine: misc_init_r
> + * Description: Init ethernet (done here so udelay works)
> + 
> */
> +int misc_init_r(void)
> +{
> +
> + unsigned char byte;
> +
> +#ifdef CONFIG_DRIVER_OMAP34XX_I2C
> + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
> +#endif
> + /* set vaux2 to 2.8V */
> + byte = 0x20;
> + i2c_write(0x4B, 0x76, 1, &byte, 1);
> + byte = 0x09;
> + i2c_write(0x4B, 0x79, 1, &byte, 1);
> +
> + /* set vaux3 to 2.8V */
> + byte = 0x20;
> + i2c_write(0x4B, 0x7A, 1, &byte, 1);
> + byte = 0x03;
> + i2c_write(0x4B, 0x7D, 1, &byte, 1);
> +
> + /* set vpll2 to 1.8V */
> + byte = 0xE0;
> + i2c_write(0x4B, 0x8E, 1, &byte, 1);
> + byte = 0x05;
> + i2c_write(0x4B, 0x91, 1, &byte, 1);
> +
> + /* set VDAC to 1.8V */
> + byte = 0x20;
> + i2c_write(0x4B, 0x96, 1, &byte, 1);
> + byte = 0x03;
> + i2c_write(0x4B, 0x99, 1, &byte, 1);
> +
> + byte = 0x33;
> + i2c_write(0x4A, 0xEE, 1, &byte, 1);
as beagle board please add a comment a comment to explain what you do on I2C
> +
> + *((uint *) 0x49058034) = 0xFAF9;
> + *((uint *) 0x49056034) = 0x0F9F0FFF;
> + *((uint *) 0x49058094) = 0x0506;
> + *((uint *) 0x49056094) = 0xF060F000;
> +
> + return 0;
> +}
Best Regards,
J.
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Re: [U-Boot] [PATCH 10/13 v5] ARM: OMAP3: Add BeagleBoard

[Jean-Christophe PLAGNIOL-VILLARD]

> + * Description: Early hardware init.
> + 
> */
> +int board_init(void)
> +{
> + DECLARE_GLOBAL_DATA_PTR;
> +
> + gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
> + /* board id for Linux */
> + gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
> + /* boot param addr */
> + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
> +
> + return 0;
> +}
> +
> +/**
> + * Routine: misc_init_r
> + * Description: Init ethernet (done here so udelay works)
> + 
> */
> +int misc_init_r(void)
> +{
> +
> + unsigned char byte;
> +
> +#ifdef CONFIG_DRIVER_OMAP34XX_I2C
> + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
> +#endif
> + /* set vaux3 to 2.8V */
> + byte = 0x20;
> + i2c_write(0x4B, 0x7A, 1, &byte, 1);
> + byte = 0x03;
> + i2c_write(0x4B, 0x7D, 1, &byte, 1);
> +
> + /* set vpll2 to 1.8V */
> + byte = 0xE0;
> + i2c_write(0x4B, 0x8E, 1, &byte, 1);
> + byte = 0x05;
> + i2c_write(0x4B, 0x91, 1, &byte, 1);
> +
> + /* set VDAC to 1.8V */
> + byte = 0x20;
> + i2c_write(0x4B, 0x96, 1, &byte, 1);
> + byte = 0x03;
> + i2c_write(0x4B, 0x99, 1, &byte, 1);
> +
> + byte = 0x33;
> + i2c_write(0x4A, 0xEE, 1, &byte, 1);

please a comment to explain what you do by I2C

Best Reagers,
J.
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[U-Boot] [PATCH] lib_arm: do_bootm_linux() - correct a small mistake

[Ilko Iliev]

This patch corrects a small bug in the "if" condition: 
the parameter "flag" is 0 and the "if" condition is always true.
The result is - the boom command doesn't start the kernel.
Affected targets: all arm based.


Signed-off-by: Ilko Iliev <[EMAIL PROTECTED]>
---
 lib_arm/bootm.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/lib_arm/bootm.c b/lib_arm/bootm.c
index 8e264ce..7dbde7d 100644
--- a/lib_arm/bootm.c
+++ b/lib_arm/bootm.c
@@ -67,7 +67,7 @@ int do_bootm_linux(int flag, int argc, char *argv[], 
bootm_headers_t *images)
char *commandline = getenv ("bootargs");
 #endif
 
-   if ((flag != 0) || (flag != BOOTM_STATE_OS_GO))
+   if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
return 1;
 
theKernel = (void (*)(int, int, uint))images->ep;
-- 
1.5.2.2

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Re: [U-Boot] [PATCH 08/13 v5] ARM: OMAP3: Add MMC support

[Jean-Christophe PLAGNIOL-VILLARD]

On 19:38 Sun 02 Nov , [EMAIL PROTECTED] wrote:
> Subject: [PATCH 08/13 v5] ARM: OMAP3: Add MMC support
> 
> From: Dirk Behme <[EMAIL PROTECTED]>
> 
 +
> +/*
> + * OMAP HSMMC register definitions
> + */
> +#define OMAP_HSMMC_SYSCONFIG (*(unsigned int *) 0x4809C010)
> +#define OMAP_HSMMC_SYSSTATUS (*(unsigned int *) 0x4809C014)
> +#define OMAP_HSMMC_CON   (*(unsigned int *) 0x4809C02C)
> +#define OMAP_HSMMC_BLK   (*(unsigned int *) 0x4809C104)
> +#define OMAP_HSMMC_ARG   (*(unsigned int *) 0x4809C108)
> +#define OMAP_HSMMC_CMD   (*(unsigned int *) 0x4809C10C)
> +#define OMAP_HSMMC_RSP10 (*(unsigned int *) 0x4809C110)
> +#define OMAP_HSMMC_RSP32 (*(unsigned int *) 0x4809C114)
> +#define OMAP_HSMMC_RSP54 (*(unsigned int *) 0x4809C118)
> +#define OMAP_HSMMC_RSP76 (*(unsigned int *) 0x4809C11C)
> +#define OMAP_HSMMC_DATA  (*(unsigned int *) 0x4809C120)
> +#define OMAP_HSMMC_PSTATE(*(unsigned int *) 0x4809C124)
> +#define OMAP_HSMMC_HCTL  (*(unsigned int *) 0x4809C128)
> +#define OMAP_HSMMC_SYSCTL(*(unsigned int *) 0x4809C12C)
> +#define OMAP_HSMMC_STAT  (*(unsigned int *) 0x4809C130)
> +#define OMAP_HSMMC_IE(*(unsigned int *) 0x4809C134)
> +#define OMAP_HSMMC_CAPA  (*(unsigned int *) 0x4809C140)
> +
> +/* T2 Register definitions */
> +#define CONTROL_DEV_CONF0(*(unsigned int *) 0x48002274)
> +#define CONTROL_PBIAS_LITE   (*(unsigned int *) 0x48002520)

please just define the register and as we agree use readx/writex

please note that their is a new MMC Framework in progress please take a look

Andy, Haavard please comment.

Best Regards,
J.
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Re: [U-Boot] [PATCH 05/13 v5] ARM: OMAP3: Add board, clock and interrupts common files

[Dirk Behme]

Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 19:36 Sun 02 Nov , [EMAIL PROTECTED] wrote:
> 
>>Subject: [PATCH 05/13 v5] ARM: OMAP3: Add board, clock and interrupts common 
>>files
>>
>>From: Dirk Behme <[EMAIL PROTECTED]>
>>
>>Add board, clock, cpu and interrupts common files
>>
>>Signed-off-by: Dirk Behme <[EMAIL PROTECTED]>
>>
>>---
>>
>>Changes in version v5:
>>
>>- Add Readme, further clean up as proposed by Jean-Christophe PLAGNIOL-VILLARD
> 
> Where is it?

http://git.denx.de/?p=u-boot/u-boot-arm.git;a=blob;f=doc/README.omap3;h=830a0f727064161386eb9296341be03857e3ccaf;hb=refs/heads/omap3

>>Changes in version v3:
>>
>>- Add detection and support for 128MB/256MB RAM by Mans Rullgard
>>
>>Changes in version v2:
>>
>>- Move common ARM Cortex A8 code to cpu/arm_cortexa8/ and OMAP3 SoC specific 
>>common code to cpu/arm_cortexa8/omap3 as proposed by Wolfgang.
>>
>> cpu/arm_cortexa8/omap3/Makefile |2 
>> cpu/arm_cortexa8/omap3/board.c  |  326 
>> +++
>> cpu/arm_cortexa8/omap3/clock.c  |  328 
>> 
>> cpu/arm_cortexa8/omap3/interrupts.c |  303 +
>> 4 files changed, 958 insertions(+), 1 deletion(-)
> 
> Best Regards,
> J.
> 

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Re: [U-Boot] [PATCH 06/13 v5] ARM: OMAP3: Add memory and syslib common files

[Jean-Christophe PLAGNIOL-VILLARD]

> --- u-boot-main.orig/examples/Makefile
> +++ u-boot-main/examples/Makefile
> @@ -30,10 +30,12 @@ LOAD_ADDR = 0x4
>  endif
>  
>  ifeq ($(ARCH),arm)
> +LOAD_ADDR = 0xc10
>  ifeq ($(BOARD),omap2420h4)
>  LOAD_ADDR = 0x8030
> -else
> -LOAD_ADDR = 0xc10
> +endif
> +ifeq ($(CPU),omap3)
> +LOAD_ADDR = 0x8030
>  endif
>  endif

Maybe we need to change it to allow arch/cpu to define itself and avoid
ifeq/endif

Best Regards,
J.
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Re: [U-Boot] [PATCH 05/13 v5] ARM: OMAP3: Add board, clock and interrupts common files

[Jean-Christophe PLAGNIOL-VILLARD]

On 19:36 Sun 02 Nov , [EMAIL PROTECTED] wrote:
> Subject: [PATCH 05/13 v5] ARM: OMAP3: Add board, clock and interrupts common 
> files
> 
> From: Dirk Behme <[EMAIL PROTECTED]>
> 
> Add board, clock, cpu and interrupts common files
> 
> Signed-off-by: Dirk Behme <[EMAIL PROTECTED]>
> 
> ---
> 
> Changes in version v5:
> 
> - Add Readme, further clean up as proposed by Jean-Christophe PLAGNIOL-VILLARD
Where is it?
> 
> Changes in version v3:
> 
> - Add detection and support for 128MB/256MB RAM by Mans Rullgard
> 
> Changes in version v2:
> 
> - Move common ARM Cortex A8 code to cpu/arm_cortexa8/ and OMAP3 SoC specific 
> common code to cpu/arm_cortexa8/omap3 as proposed by Wolfgang.
> 
>  cpu/arm_cortexa8/omap3/Makefile |2 
>  cpu/arm_cortexa8/omap3/board.c  |  326 
> +++
>  cpu/arm_cortexa8/omap3/clock.c  |  328 
> 
>  cpu/arm_cortexa8/omap3/interrupts.c |  303 +
>  4 files changed, 958 insertions(+), 1 deletion(-)
Best Regards,
J.
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[U-Boot] [PATCH] ARM: OMAP: I2C coding style clean up

[dirk . behme]

Subject: [PATCH] ARM: OMAP: I2C coding style clean up

From: Dirk Behme <[EMAIL PROTECTED]>

Clean up coding style and read/write macro usage as requested by Wolfgang Denk 
and Jean-Christophe PLAGNIOL-VILLARD.

Signed-off-by: Dirk Behme <[EMAIL PROTECTED]>

---

Note: Patch is against U-Boot master commit 
1378174a1351c0285736863a665ab758fe8d5f71 "Merge branch 'master' of 
/home/wd/git/u-boot/custodians" 

 drivers/i2c/omap24xx_i2c.c |  250 ++---
 1 files changed, 126 insertions(+), 124 deletions(-)

Index: u-boot-main/drivers/i2c/omap24xx_i2c.c
===
--- u-boot-main.orig/drivers/i2c/omap24xx_i2c.c
+++ u-boot-main/drivers/i2c/omap24xx_i2c.c
@@ -25,67 +25,64 @@
 #include 
 #include 
 
-#define inw(a) __raw_readw(a)
-#define outw(a,v) __raw_writew(a,v)
-
-static void wait_for_bb (void);
-static u16 wait_for_pin (void);
+static void wait_for_bb(void);
+static u16 wait_for_pin(void);
 static void flush_fifo(void);
 
-void i2c_init (int speed, int slaveadd)
+void i2c_init(int speed, int slaveadd)
 {
u16 scl;
 
-   outw(0x2, I2C_SYSC); /* for ES2 after soft reset */
+   writew(0x2, I2C_SYSC);  /* for ES2 after soft reset */
udelay(1000);
-   outw(0x0, I2C_SYSC); /* will probably self clear but */
+   writew(0x0, I2C_SYSC);  /* will probably self clear but */
 
-   if (inw (I2C_CON) & I2C_CON_EN) {
-   outw (0, I2C_CON);
-   udelay (5);
+   if (readw(I2C_CON) & I2C_CON_EN) {
+   writew(0, I2C_CON);
+   udelay(5);
}
 
/* 12MHz I2C module clock */
-   outw (0, I2C_PSC);
-   speed = speed/1000; /* 100 or 400 */
-   scl = ((12000/(speed*2)) - 7);  /* use 7 when PSC = 0 */
-   outw (scl, I2C_SCLL);
-   outw (scl, I2C_SCLH);
+   writew(0, I2C_PSC);
+   speed = speed / 1000;   /* 100 or 400 */
+   scl = ((12000 / (speed * 2)) - 7);  /* use 7 when PSC = 0 */
+   writew(scl, I2C_SCLL);
+   writew(scl, I2C_SCLH);
/* own address */
-   outw (slaveadd, I2C_OA);
-   outw (I2C_CON_EN, I2C_CON);
+   writew(slaveadd, I2C_OA);
+   writew(I2C_CON_EN, I2C_CON);
 
/* have to enable intrrupts or OMAP i2c module doesn't work */
-   outw (I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE |
- I2C_IE_NACK_IE | I2C_IE_AL_IE, I2C_IE);
-   udelay (1000);
+   writew(I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE |
+   I2C_IE_NACK_IE | I2C_IE_AL_IE, I2C_IE);
+   udelay(1000);
flush_fifo();
-   outw (0x, I2C_STAT);
-   outw (0, I2C_CNT);
+   writew(0x, I2C_STAT);
+   writew(0, I2C_CNT);
 }
 
-static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
+static int i2c_read_byte(u8 devaddr, u8 regoffset, u8 *value)
 {
int i2c_error = 0;
u16 status;
 
/* wait until bus not busy */
-   wait_for_bb ();
+   wait_for_bb();
 
/* one byte only */
-   outw (1, I2C_CNT);
+   writew(1, I2C_CNT);
/* set slave address */
-   outw (devaddr, I2C_SA);
+   writew(devaddr, I2C_SA);
/* no stop bit needed here */
-   outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, I2C_CON);
+   writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, I2C_CON);
 
-   status = wait_for_pin ();
+   status = wait_for_pin();
 
if (status & I2C_STAT_XRDY) {
/* Important: have to use byte access */
-   *(volatile u8 *) (I2C_DATA) = regoffset;
-   udelay (2);
-   if (inw (I2C_STAT) & I2C_STAT_NACK) {
+   writeb(regoffset, I2C_DATA);
+   udelay(2);
+   if (readw(I2C_STAT) & I2C_STAT_NACK) {
i2c_error = 1;
}
} else {
@@ -94,70 +91,70 @@ static int i2c_read_byte (u8 devaddr, u8
 
if (!i2c_error) {
/* free bus, otherwise we can't use a combined transction */
-   outw (0, I2C_CON);
-   while (inw (I2C_STAT) || (inw (I2C_CON) & I2C_CON_MST)) {
-   udelay (1);
+   writew(0, I2C_CON);
+   while (readw(I2C_STAT) || (readw(I2C_CON) & I2C_CON_MST)) {
+   udelay(1);
/* Have to clear pending interrupt to clear I2C_STAT */
-   outw (0x, I2C_STAT);
+   writew(0x, I2C_STAT);
}
 
-   wait_for_bb ();
+   wait_for_bb();
/* set slave address */
-   outw (devaddr, I2C_SA);
+   writew(devaddr, I2C_SA);
/* read one byte from slave */
-   outw (1, I2C_CNT);
+   writew(1, I2C_CNT);
/* need stop bit here */
-   outw (I2C_CON_EN | I2C_CON

Re: [U-Boot] [PATCH 04/13 v5] ARM: OMAP3: Add lowlevel init and sys_info common files

[Jean-Christophe PLAGNIOL-VILLARD]

> +/
> + * get_cpu_type() - low level get cpu type
> + * - no C globals yet.
> + /
> +u32 get_cpu_type(void)
> +{
> + /* fixme, need to get register defines for OMAP3 */
> + return CPU_3430;
> +}
> +
> +/**
> + * get_cpu_rev(void) - extract version info
> + **/
> +u32 get_cpu_rev(void)
> +{
> + u32 cpuid = 0;
> + /* On ES1.0 the IDCODE register is not exposed on L4
> +  * so using CPU ID to differentiate
> +  * between ES2.0 and ES1.0.
> +  */
> + __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
> + if ((cpuid & 0xf) == 0x0)
> + return CPU_3430_ES1;
> + else
> + return CPU_3430_ES2;
> +
> +}
> +
> +/
> + * is_mem_sdr() - return 1 if mem type in use is SDR
> + /
> +u32 is_mem_sdr(void)
> +{
> + volatile u32 *burst = (volatile u32 *) (SDRC_MR_0 + SDRC_CS0_OSET);
> + if (*burst == SDP_SDRC_MR_0_SDR)
> + return 1;
> + return 0;
> +}
> +
> +/***
> + * get_mem_type() - identify type of mDDR part used.
> + ***/
is it not better to implement it as weak and overwrite it in board file
> +u32 get_mem_type(void)
> +{
> +#if defined(CONFIG_OMAP3_BEAGLE) || defined(CONFIG_OVERO)
> + return DDR_STACKED;
> +#else
> + return DDR_DISCRETE;
> +#endif
> +}
> +
> +/***
> + * get_cs0_size() - get size of chip select 0/1
> + /
> +u32 get_sdr_cs_size(u32 offset)
> +{
> + u32 size;
> +
> + /* get ram size field */
> + size = readl(SDRC_MCFG_0 + offset) >> 8;
> + size &= 0x3FF;  /* remove unwanted bits */
> + size *= SZ_2M;  /* find size in MB */
> + return size;
> +}
> +
> +/***
> + * get_sdr_cs_offset() - get offset of cs from cs0 start
> + /
> +u32 get_sdr_cs_offset(u32 cs)
> +{
> + u32 offset;
> +
> + if (!cs)
> + return 0;
> +
> + offset = readl(SDRC_CS_CFG);
> + offset = (offset & 15) << 27 | (offset & 0x30) >> 17;
> +
> + return offset;
> +}
> +
> +/***
> + * get_board_type() - get board type based on current production stats.
> + *  - NOTE-1-: 2 I2C EEPROMs will someday be populated with proper info.
> + *when they are available we can get info from there.  This should
> + *be correct of all known boards up until today.
> + *  - NOTE-2- EEPROMs are populated but they are updated very slowly.  To
> + *avoid waiting on them we will use ES version of the chip to get info.
> + *A later version of the FPGA migth solve their speed issue.
> + /
> +u32 get_board_type(void)
> +{
> + if (get_cpu_rev() == CPU_3430_ES2)
> + return sysinfo.board_type_v2;
> + else
> + return sysinfo.board_type_v1;
> +}
> +
> +/**
> + * get_sysboot_value() - get init word settings
> + **/
> +inline u32 get_sysboot_value(void)
> +{
> + return 0x003F & readl(CONTROL_STATUS);
> +}
> +
> +/***
> + *  get_gpmc0_base() - Return current address hardware will be
> + * fetching from. The below effectively gives what is correct, its a bit
> + *   mis-leading compared to the TRM.  For the most general case the mask
> + *   needs to be also taken into account this does work in practice.
> + *   - for u-boot we currently map:
> + *   -- 0 to nothing,
> + *   -- 4 to flash
> + *   -- 8 to enent
> + *   -- c to wifi
> + 
> /
> +u32 get_gpmc0_base(void)
> +{
> + u32 b;
> +
> + b = readl(gpmc_base + OFFS(GPMC_CONFIG7));
> + b &= 0x1F;  /* keep base [5:0] */
> + b = b << 24;/* ret 0x0b00 */
> + return b;
> +}
> +
> +/***
> + * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
> + ***/
> +u32 get_gpmc0_width(void)
> +{
> + return WIDTH_16BIT;
> +}
> +
> +/*
> + * get_board_rev() - set

Re: [U-Boot] [PATCH-OMAP3] OMAP3: Use I2C file coding style

[Jean-Christophe PLAGNIOL-VILLARD]

On 08:38 Sun 09 Nov , Dirk Behme wrote:
> Jean-Christophe PLAGNIOL-VILLARD wrote:
>> On 17:32 Tue 04 Nov , [EMAIL PROTECTED] wrote:
>>
>>> Subject: [PATCH-OMAP3] OMAP3: Use I2C file coding style
>>>
>>> From: Dirk Behme <[EMAIL PROTECTED]>
>>>
>>> Use file coding style for inx/outx instead of global coding style.
>>>
>>> Signed-off-by: Dirk Behme <[EMAIL PROTECTED]>
>>>
>>> ---
>>>
>>> Note: There was an additional review comment about this file:
>>>
>>> -- cut --
>>>
 +#define inb(a) __raw_readb(a)
 +#define outb(a, v) __raw_writeb(a, v)
 #define inw(a) __raw_readw(a)
 #define outw(a,v) __raw_writew(a,v)
>>>
>>> This 4 macro is supposed to be defined in io.h
>>> -- cut --
>>>
>>> In ARM's io.h there are already inx/outx macros, but with different syntax. 
>>> The correct fix for omap24xx_i2c.c will be to replace all inx/outx by 
>>> readx/writex macros and remove above defines. But this can't be done on 
>>> OMAP3 branch, as it would conflict with "no general coding style clean up 
>>> in OMAP3 patches, only OMAP3 related changes, please". Thus, we have to do 
>>> code style changes for this file at mainline once OMAP3 is merged. Until 
>>> then we have to stay with consistent local style.
>>
>>
>> I desagree,
>>
>> This fix is supposed to be done before appling of the OMAP3 patch set not
>> after.
>>
>> please do not add code which need to fix just after.
>
> Sorry if I misunderstand something here, but it seems to me that this  
> conflicts with
>
> http://lists.denx.de/pipermail/u-boot/2008-November/042975.html
>
> "It is more important to use a consistent style in a single source file, 
> indeed."
>
> ?

As I said this fix need be done on the master branch before merge of the omap3
branch.

>
> Additionally, do you (you == all maintainers and reviewers at this list) 
> accecpt/want to have general (non-OMAP3) coding style clean up in OMAP3 
> patch set? If yes, once we send the resulting OMAP3 patch series from 
> u-boot-arm/omap3 for final merge to U-Boot list again, we will get

you are right no general fix in the omap3 branch only omap fix.

Best Regards,
J.
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[U-Boot] [PATCH] mgsuvd add the board-specific part of the HDLC driver

[Gary Jennejohn]

Signed-off-by: Gary Jennejohn <[EMAIL PROTECTED]>
---
 board/keymile/mgsuvd/Makefile   |3 +-
 board/keymile/mgsuvd/mgsuvd_hdlc_enet.c |  278 +++
 2 files changed, 280 insertions(+), 1 deletions(-)
 create mode 100644 board/keymile/mgsuvd/mgsuvd_hdlc_enet.c

diff --git a/board/keymile/mgsuvd/Makefile b/board/keymile/mgsuvd/Makefile
index b2145f9..2c5732d 100644
--- a/board/keymile/mgsuvd/Makefile
+++ b/board/keymile/mgsuvd/Makefile
@@ -28,7 +28,8 @@ endif
 
 LIB= $(obj)lib$(BOARD).a
 
-COBJS  = $(BOARD).o ../common/common.o
+COBJS  = $(BOARD).o ../common/common.o ../common/keymile_hdlc_enet.o \
+   mgsuvd_hdlc_enet.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))
diff --git a/board/keymile/mgsuvd/mgsuvd_hdlc_enet.c 
b/board/keymile/mgsuvd/mgsuvd_hdlc_enet.c
new file mode 100644
index 000..9b93131
--- /dev/null
+++ b/board/keymile/mgsuvd/mgsuvd_hdlc_enet.c
@@ -0,0 +1,278 @@
+/*
+ * (C) Copyright 2008
+ * Gary Jennejohn, DENX Software Engineering GmbH, [EMAIL PROTECTED]
+ *
+ * Based in part on cpu/mpc8xx/scc.c.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include /* commproc.h is included here */
+#include 
+#include 
+
+#ifdef CONFIG_KEYMILE_HDLC_ENET
+
+#include "../common/keymile_hdlc_enet.h"
+
+char keymile_slot; /* our slot number in the backplane */
+
+/*
+ * Since, except during initialization, ethact is always HDLC ETHERNET
+ * while we're in the driver, just use serial_printf() everywhere for
+ * output.  This avoids possible conflicts when netconsole is being
+ * used.
+ */
+#define dprintf(fmt, args...)  serial_printf(fmt, ##args)
+
+static int already_inited;
+
+/*
+  * SCC Ethernet Tx and Rx buffer descriptors allocated at the
+  *  immr->udata_bd address on Dual-Port RAM
+  * Provide for Double Buffering
+  */
+typedef volatile struct CommonBufferDescriptor {
+cbd_t txbd;/* Tx BD */
+cbd_t rxbd[HDLC_PKTBUFSRX];/* Rx BD */
+} RTXBD;
+
+static RTXBD *rtx;
+
+int keymile_hdlc_enet_init(struct eth_device *, bd_t *);
+void keymile_hdlc_enet_halt(struct eth_device *);
+extern void keymile_hdlc_enet_init_bds(RTXBD *);
+extern void initCachedNumbers(int);
+
+/* Use SCC4 */
+#define MGS_CPM_CR_HDLCCPM_CR_CH_SCC4
+#define MGS_PROFF_HDLC PROFF_SCC4
+#define MGS_SCC_HDLC   3   /* Index, not number! */
+
+int keymile_hdlc_enet_init(struct eth_device *dev, bd_t *bis)
+{
+   /* int i; */
+   /* volatile cbd_t *bdp; */
+   volatile cpm8xx_t *cp;
+   volatile scc_t *sccp;
+   volatile hdlc_pram_t *hpr;
+   volatile iop8xx_t *iop;
+
+   if (already_inited)
+   return 0;
+
+   cp = (cpm8xx_t *)&(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm);
+   hpr = (hdlc_pram_t *)(&cp->cp_dparam[MGS_PROFF_HDLC]);
+   sccp = (volatile scc_t *)(&cp->cp_scc[MGS_SCC_HDLC]);
+   iop = (iop8xx_t *)&(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport);
+
+   /*
+* Disable receive and transmit just in case.
+*/
+   sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+
+#ifndef CONFIG_SYS_ALLOC_DPRAM
+#error "CONFIG_SYS_ALLOC_DPRAM must be defined"
+#else
+   /*
+* Avoid exhausting DPRAM, which would cause a panic.
+* Actually this isn't really necessary, but leave it here
+* for safety's sake.
+*/
+   if (rtx == NULL) {
+   rtx = (RTXBD *) (cp->cp_dpmem +
+dpram_alloc_align(sizeof(RTXBD), 8));
+   if (rtx == (RTXBD *)CPM_DP_NOSPACE)
+   return -1;
+   memset((void *)rtx, 0, sizeof(RTXBD));
+   }
+#endif /* !CONFIG_SYS_ALLOC_DPRAM */
+
+   /* We need the slot number for addressing. */
+   keymile_slot = *(char *)(CONFIG_SYS_SLOT_ID_BASE +
+   CONFIG_SYS_SLOT_ID_OFF) & CONFIG_SYS_SLOT_ID_MASK;
+   /*
+* Be consistent with the Linux driver and set
+* only enetaddr[0].
+*
+* Always add 1 to the slot number so that
+* there are no problems with an ethaddr which
+* is all 0s.  This should be acceptable because
+* a board should never have a slot 

[U-Boot] [PATCH] mgcoge add the board-specific part of the HDLC driver

[Gary Jennejohn]

Signed-off-by: Gary Jennejohn <[EMAIL PROTECTED]>
---
 board/keymile/mgcoge/Makefile   |3 +-
 board/keymile/mgcoge/mgcoge_hdlc_enet.c |  276 +++
 2 files changed, 278 insertions(+), 1 deletions(-)
 create mode 100644 board/keymile/mgcoge/mgcoge_hdlc_enet.c

diff --git a/board/keymile/mgcoge/Makefile b/board/keymile/mgcoge/Makefile
index 0cad821..2774a70 100644
--- a/board/keymile/mgcoge/Makefile
+++ b/board/keymile/mgcoge/Makefile
@@ -28,7 +28,8 @@ endif
 
 LIB= $(obj)lib$(BOARD).a
 
-COBJS  := $(BOARD).o ../common/common.o
+COBJS  := $(BOARD).o ../common/common.o ../common/keymile_hdlc_enet.o \
+   mgcoge_hdlc_enet.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))
diff --git a/board/keymile/mgcoge/mgcoge_hdlc_enet.c 
b/board/keymile/mgcoge/mgcoge_hdlc_enet.c
new file mode 100644
index 000..34f04f5
--- /dev/null
+++ b/board/keymile/mgcoge/mgcoge_hdlc_enet.c
@@ -0,0 +1,276 @@
+/*
+ * (C) Copyright 2008
+ * Gary Jennejohn, DENX Software Engineering GmbH, [EMAIL PROTECTED]
+ *
+ * Based in part on cpu/mpc8260/ether_scc.c.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_KEYMILE_HDLC_ENET
+
+#include "../common/keymile_hdlc_enet.h"
+
+char keymile_slot; /* our slot number in the backplane */
+
+/*
+ * Since, except during initialization, ethact is always HDLC ETHERNET
+ * while we're in the driver, just use serial_printf() everywhere for
+ * output.  This avoids possible conflicts when netconsole is being
+ * used.
+ */
+#define dprintf(fmt, args...)  serial_printf(fmt, ##args)
+
+static int already_inited;
+
+/*
+  * SCC Ethernet Tx and Rx buffer descriptors allocated at the
+  *  immr->udata_bd address on Dual-Port RAM
+  * Provide for Double Buffering
+  */
+typedef volatile struct CommonBufferDescriptor {
+cbd_t txbd;/* Tx BD */
+cbd_t rxbd[HDLC_PKTBUFSRX];/* Rx BD */
+} RTXBD;
+
+static RTXBD *rtx;
+
+int keymile_hdlc_enet_init(struct eth_device *, bd_t *);
+void keymile_hdlc_enet_halt(struct eth_device *);
+extern void keymile_hdlc_enet_init_bds(RTXBD *);
+extern void initCachedNumbers(int);
+
+/* Use SCC1 */
+#define CPM_CR_SCC_PAGECPM_CR_SCC1_PAGE
+#define CPM_CR_SCC_SBLOCK  CPM_CR_SCC1_SBLOCK
+#define CMXSCR_MASK(CMXSCR_GR1|CMXSCR_SC1|\
+   CMXSCR_RS1CS_MSK|CMXSCR_TS1CS_MSK)
+#define CMXSCR_VALUE   (CMXSCR_RS1CS_CLK11|CMXSCR_TS1CS_CLK11)
+#define MGC_PROFF_HDLC PROFF_SCC1
+#define MGC_SCC_HDLC   0   /* Index, not number! */
+
+int keymile_hdlc_enet_init(struct eth_device *dev, bd_t *bis)
+{
+   /* int i; */
+   uint dpr;
+   /* volatile cbd_t *bdp; */
+   volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+   volatile cpm8260_t *cp = &(im->im_cpm);
+   volatile scc_t *sccp;
+   volatile scc_hdlc_t *hpr;
+   volatile iop8260_t *iop;
+
+   if (already_inited)
+   return 0;
+
+   hpr = (scc_hdlc_t *)(&im->im_dprambase[MGC_PROFF_HDLC]);
+   sccp = (scc_t *)(&im->im_scc[MGC_SCC_HDLC]);
+   iop = &im->im_ioport;
+
+   /*
+* Disable receive and transmit just in case.
+*/
+   sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+
+   /*
+* Avoid exhausting DPRAM, which would cause a panic.
+*/
+   if (rtx == NULL) {
+   /* dpr is an offset into dpram */
+   dpr = m8260_cpm_dpalloc(sizeof(RTXBD), 8);
+   rtx = (RTXBD *)&im->im_dprambase[dpr];
+   }
+
+   /* We need the slot number for addressing. */
+   keymile_slot = *(char *)(CONFIG_SYS_SLOT_ID_BASE +
+   CONFIG_SYS_SLOT_ID_OFF) & CONFIG_SYS_SLOT_ID_MASK;
+   /*
+* Be consistent with the Linux driver and set
+* only enetaddr[0].
+*
+* Always add 1 to the slot number so that
+* there are no problems with an ethaddr which
+* is all 0s.  This should be acceptable because
+* a board should never have a slot number of 255,
+* which is the broadcast address.  The HDLC addressing
+* uses only the slot num

[U-Boot] [PATCH] keymile add the common parts of the HDLC driver

[Gary Jennejohn]

This implements the ICN protocol used across the backplane and is needed
by all the keymile boards.

Signed-off-by: Gary Jennejohn <[EMAIL PROTECTED]>
---

checkpatch.pl reports an ERROR which is false.

 board/keymile/common/keymile_hdlc_enet.c |  620 ++
 board/keymile/common/keymile_hdlc_enet.h |  129 ++
 2 files changed, 749 insertions(+), 0 deletions(-)
 create mode 100644 board/keymile/common/keymile_hdlc_enet.c
 create mode 100644 board/keymile/common/keymile_hdlc_enet.h

diff --git a/board/keymile/common/keymile_hdlc_enet.c 
b/board/keymile/common/keymile_hdlc_enet.c
new file mode 100644
index 000..141371b
--- /dev/null
+++ b/board/keymile/common/keymile_hdlc_enet.c
@@ -0,0 +1,620 @@
+/*
+ * (C) Copyright 2008
+ * Gary Jennejohn, DENX Software Engineering GmbH, [EMAIL PROTECTED]
+ *
+ * Based in part on cpu/mpc8260/ether_scc.c.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_KEYMILE_HDLC_ENET
+#ifdef TEST_IT
+#include 
+#endif
+
+#include "keymile_hdlc_enet.h"
+
+extern char keymile_slot;  /* our slot number in the backplane */
+
+/* Allow up to about 50 ms for sending */
+#define TOUT_LOOP  5
+
+/*
+ * Since, except during initialization, ethact is always HDLC ETHERNET
+ * while we're in the driver, just use serial_printf() everywhere for
+ * output.  This avoids possible conflicts when netconsole is being
+ * used.
+ */
+#define dprintf(fmt, args...)  serial_printf(fmt, ##args)
+
+/* Cannot use the storage from net.c because we allocate larger buffers */
+static volatile uchar MyPktBuf[HDLC_PKTBUFSRX * PKT_MAXBLR_SIZE + PKTALIGN];
+static volatile uchar *MyRxPackets[HDLC_PKTBUFSRX]; /* Receive packet */
+
+static unsigned int keymile_rxIdx; /* index of the current RX buffer */
+
+static IPaddr_t cachedNumbers[CACHEDNUMBERS]; /* 4 bytes per entry */
+void initCachedNumbers(int);
+
+/*
+  * SCC Ethernet Tx and Rx buffer descriptors allocated at the
+  *  immr->udata_bd address on Dual-Port RAM
+  * Provide for Double Buffering
+  */
+typedef volatile struct CommonBufferDescriptor {
+cbd_t txbd;/* Tx BD */
+cbd_t rxbd[HDLC_PKTBUFSRX];/* Rx BD */
+} RTXBD;
+
+/*
+ * This must be extern because it is allocated in DPRAM using CPM-sepcific
+ * code.
+ */
+static RTXBD *rtx;
+
+static int keymile_hdlc_enet_send(struct eth_device *, volatile void *, int);
+static int keymile_hdlc_enet_recv(struct eth_device *);
+void keymile_hdlc_enet_init_bds(RTXBD *);
+extern int keymile_hdlc_enet_init(struct eth_device *, bd_t *);
+extern void keymile_hdlc_enet_halt(struct eth_device *);
+
+/* flags in the buffer descriptor not defined anywhere else */
+#define BD_SC_CT   BD_SC_CD
+#define BD_SC_CR   0x04
+#define BD_SC_DE   0x80
+#ifndef BD_SC_TC
+#define BD_SC_TC   ((ushort)0x0400)/* Transmit CRC */
+#endif
+#define BD_SC_FIRSTBD_SC_TC
+#define BD_SC_STATS (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_CR | BD_SC_CD \
+   | BD_SC_OV | BD_SC_DE)
+
+#if defined(TEST_RX) || defined(TEST_TX) || defined(TEST_IT)
+static void hexdump(unsigned char *buf, int len)
+{
+   int i;
+   const int bytesPerLine = 32;
+
+   if (len > 4 * bytesPerLine)
+   len = 4 * bytesPerLine;
+   dprintf("\t address: %08x\n", (unsigned int)buf);
+   for (i = 0; i < len; i++) {
+   if (i % bytesPerLine == 0)
+   dprintf("%04x: ", (unsigned short)i);
+   dprintf("%02x ", buf[i]);
+   if ((i + 1) % bytesPerLine == 0) {
+   dprintf("\n");
+   continue;
+   }
+   if ((i + 1) % 8 == 0)
+   printf(" ");
+   }
+   if (len % bytesPerLine)
+   dprintf("\n");
+}
+#endif
+
+int keymile_hdlc_enet_initialize(bd_t *bis)
+{
+   struct eth_device *dev;
+
+   dev = (struct eth_device *) malloc(sizeof *dev);
+   memset(dev, 0, sizeof *dev);
+#ifdef TEST_IT
+   seth = dev;
+#endif
+
+   sprintf(dev->name, "HDLC ETHERNET");
+   dev->init   = keymile_hdlc_enet_init;
+   dev->halt   = keymile_hdlc_enet_halt;
+   dev->send

[U-Boot] [PATCH] mgcoge make ether_scc.c work with CONFIG_NET_MULTI

[Gary Jennejohn]

This change is needed for mgcoge because it uses two ethernet drivers.

Add a check for the presence of the PIGGY board on mgcoge.  Without this
board networking cannot work and the initialization must be aborted.

Only allocate rtx once to prevent DPRAM exhaustion.

Initialize ether_scc.c and the keymile-specific HDLC driver (to be added
soon) in eth.c.

Signed-off-by: Gary Jennejohn <[EMAIL PROTECTED]>
---

I ran "MAKEALL ppc" and no errors were caused by this patch.

 cpu/mpc8260/ether_scc.c |   56 +--
 net/eth.c   |8 ++
 2 files changed, 57 insertions(+), 7 deletions(-)

diff --git a/cpu/mpc8260/ether_scc.c b/cpu/mpc8260/ether_scc.c
index c65f0e0..537cd39 100644
--- a/cpu/mpc8260/ether_scc.c
+++ b/cpu/mpc8260/ether_scc.c
@@ -10,6 +10,12 @@
  * Advent Networks, Inc. 
  * Jay Monkman <[EMAIL PROTECTED]>
  *
+ * Modified so that it plays nicely when more than one ETHERNET interface
+ * is in use a la ether_fcc.c.
+ * (C) Copyright 2008
+ * DENX Software Engineerin GmbH
+ * Gary Jennejohn <[EMAIL PROTECTED]>
+ *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
@@ -32,12 +38,17 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 
 #if defined(CONFIG_ETHER_ON_SCC) && defined(CONFIG_CMD_NET)
 
+#ifndef CONFIG_NET_MULTI
+#error "CONFIG_NET_MULTI must be defined."
+#endif
+
 #if (CONFIG_ETHER_INDEX == 1)
 #  define PROFF_ENETPROFF_SCC1
 #  define CPM_CR_ENET_PAGE  CPM_CR_SCC1_PAGE
@@ -100,7 +111,7 @@ typedef volatile struct CommonBufferDescriptor {
 static RTXBD *rtx;
 
 
-int eth_send(volatile void *packet, int length)
+int sec_send(struct eth_device *dev, volatile void *packet, int length)
 {
 int i;
 int result = 0;
@@ -137,7 +148,7 @@ int eth_send(volatile void *packet, int length)
 }
 
 
-int eth_rx(void)
+int sec_rx(struct eth_device *dev)
 {
 int length;
 
@@ -184,19 +195,32 @@ int eth_rx(void)
  *
  */
 
-int eth_init(bd_t *bis)
+int sec_init(struct eth_device *dev, bd_t *bis)
 {
 int i;
 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
 scc_enet_t *pram_ptr;
 uint dpaddr;
 
+#if defined(CONFIG_CHECK_ETHERNET_PRESENT)
+   if (ethernet_present (CONFIG_ETHER_INDEX) == 0) {
+   printf("Ethernet index: %d not present.\n",
+  CONFIG_ETHER_INDEX);
+   return -1;
+   }
+#endif
+
 rxIdx = 0;
 txIdx = 0;
 
-/* assign static pointer to BD area */
-dpaddr = m8260_cpm_dpalloc(sizeof(RTXBD) + 2, 16);
-rtx = (RTXBD *)&immr->im_dprambase[dpaddr];
+/*
+ * Assign static pointer to BD area.
+ * Avoid exhausting DPRAM, which would cause a panic.
+ */
+if (rtx == NULL) {
+   dpaddr = m8260_cpm_dpalloc(sizeof(RTXBD) + 2, 16);
+   rtx = (RTXBD *)&immr->im_dprambase[dpaddr];
+}
 
 /* 24.21 - (1-3): ioports have been set up already */
 
@@ -338,7 +362,7 @@ int eth_init(bd_t *bis)
 }
 
 
-void eth_halt(void)
+void sec_halt(struct eth_device *dev)
 {
 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
 immr->im_scc[CONFIG_ETHER_INDEX-1].scc_gsmrl &= ~(SCC_GSMRL_ENR |
@@ -354,4 +378,22 @@ void restart(void)
 }
 #endif
 
+int sec_initialize(bd_t *bis)
+{
+   struct eth_device *dev;
+
+   dev = (struct eth_device *) malloc(sizeof *dev);
+   memset(dev, 0, sizeof *dev);
+
+   sprintf(dev->name, "SCC ETHERNET");
+   dev->init   = sec_init;
+   dev->halt   = sec_halt;
+   dev->send   = sec_send;
+   dev->recv   = sec_rx;
+
+   eth_register(dev);
+
+   return 1;
+}
+
 #endif
diff --git a/net/eth.c b/net/eth.c
index ccd871a..5fe8b83 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -48,6 +48,8 @@ extern int ppc_4xx_eth_initialize(bd_t *);
 extern int scc_initialize(bd_t*);
 extern int npe_initialize(bd_t *);
 extern int uec_initialize(int);
+extern int sec_initialize(bd_t *);
+extern int keymile_hdlc_enet_initialize(bd_t *);
 
 #ifdef CONFIG_API
 extern void (*push_packet)(volatile void *, int);
@@ -196,6 +198,12 @@ int eth_initialize(bd_t *bis)
 #if defined(CONFIG_IXP4XX_NPE)
npe_initialize(bis);
 #endif
+#if defined(CONFIG_ETHER_ON_SCC) && defined(CONFIG_MPC8260)
+   sec_initialize(bis);
+#endif
+#if defined(CONFIG_KEYMILE_HDLC_ENET)
+   keymile_hdlc_enet_initialize(bis);
+#endif
if (!eth_devices) {
puts ("No ethernet found.\n");
show_boot_progress (-64);
-- 
1.5.4.3

---
Gary Jennejohn
*
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
*
_

Re: [U-Boot] RFC - How to speed up multiplexed input between serial and network?

[Gary Jennejohn]

On Wed, 29 Oct 2008 13:14:52 +0100
Wolfgang Denk <[EMAIL PROTECTED]> wrote:

[big snip details of analysis]
> My suggestion is to make the multiplexing more intelligent instead of
> making the serial driver more complex. The nice thing  with  this  is
> that  you  probably  still get the same results (actually even better
> ones as the artificial 128 byte line lengt limit can be avoided), and
> the changes are only in the new code, i. e. users  who  do  not  need
> such I/O multiplexing will not be affected.
> 
> I think it should be fairly simple to implement something similar  to
> the VTIME feature for non-canonical reads in the Unix serial drivers
> (see "man tcsetattr"):
> 
> - In idle mode, all configured input devices are polled in a
>   round-robin manner (as it is done now).
> 
> - As soon as a character is received on the serial line, a  timestamp
>   is  taken. As you calculated, one character at 115 kbps takes about
>   100 us on the wire. Within a window of (for  exmaple)  500  us  (or
>   about 5 character times) now polling of all other I/O ports will be
>   skipped.
> 

I took a quick look at this idea, but I didn't try to implement all the
fancy timestamp stuff, etc.

Basically, I kept the pointer to the last device which had input and
checked it first in tstc().

My testing was done on a sequoia at a baudrate of 115200.  The sequoia is
a fast board.  Testing was done with combinations of stdin and stdout
devices (serial and nc).

I observed no performance improvements.

I then looked more closely at the results of a rather simple case -
stdin=serial and stdout=serial,nc.  In this case the change mentioned
above would have no effect since ther is only one stdin device.

Doing a paste of an 80 character line resulted in 90% loss of input.
With stdin=stdout=serial cut&paste worked with no character loss.
The obvious conclusion is that the _output_ to nc was so slow that it
caused the character loss.

Thus, efforts to try to optimize the input at high baudrates in the
multiplexing code itself it will not help due to the slow output.

The suggestion to lower the baudrate seems like the most intelligent
solution.

---
Gary Jennejohn
*
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
*
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