[U-Boot] [PATCH 00/15 v6] OMAP3: Add support for some of TIs ARM-Cortex A8 OMAP3 boards
This patch series adds U-Boot v1 support for some of TI's ARM-Cortex A8 based OMAP3 boards. These are BeagleBoard [1][2], EVM [3], Overo [4], Pandora [5] and Zoom1 [6]. The patch series is based on U-Boot tar ball [7] for BeagleBoard and EVM done by several TI employees. To be able to easily add new boards, most of the code is common for all boards. After the header files (patches 1 - 2) and the common code for ARM Cortex A8 (patch 3) and OMAP3 SoC (patches 4 5), support and drivers for NAND, MMC and I2C are added (patches 6 - 8). Patches 9 - 13 introduce the individual board support for Beagle, EVM, Overo, Pandora and Zoom1. The last two patches 14 15 add the config files for these boards and enable them by adding main Makefile, Maintainers, MAKEALL and README. As discussed earlier on this list, we compile for armv5 to be compatible with existing toolchains. This patch adds ~300k of new code. Thanks to Steve Sakoman sakoman at gmail.com Pillai, Manikandan mani.pillai at ti.com Syed Mohammed, Khasim khasim at ti.com Nishanth Menon nm at ti.com Grazvydas Ignotas notasas at gmail.com Jason Kridner jkridner at gmail.com and all others who helped with this. Dirk This patch series is against U-Boot mainline, commit 89d56f5503eed351efe5ab0b4dd0f1e888fd2336 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx This OMAP3 v6 patch series makes all older OMAP3 patches obsolete. Changes in version v6: - Clean up coding style and whitespace - Replace hardcoded values by macros - Convert readx/writex register access to register struct style - Add L1 NEON HW workaround - Fix issues in NAND HW/SW ECC switch - Add Pandora board - Add Zoom1 board - Clean up config files and add/enable 'hush' scripting - Add check for MMC card - Remove BITx magic - In MAKEALL, move OMAP3 from ARM9 to Cortex A8 section - Update EVM maintainer - Update ARM's if then else logic in examples Makefile - Introduce CONFIG_OMAP3_MMC - Move common power initialization code to common board directory - Fix GPL headers [1] http://beagleboard.org/ [2] http://elinux.org/BeagleBoard [3] http://focus.ti.com/docs/toolsw/folders/print/tmdxevm3503.html [4] http://www.gumstix.net/Overo/ [5] http://openpandora.org/ [6] http://www.logicpd.com/products/devkit/ti/zoom_mobile_development_kit [7] http://beagleboard.googlecode.com/files/u-boot_beagle_revb.tar.gz ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 02/15 v6] OMAP3: Add OMAP3, memory and function prototype headers
Add OMAP3, memory and function prototype header files for OMAP3.
Signed-off-by: Dirk Behme dirk.be...@googlemail.com
---
include/asm-arm/arch-omap3/clocks.h| 62 +
include/asm-arm/arch-omap3/mem.h | 227 +
include/asm-arm/arch-omap3/omap3.h | 218 +++
include/asm-arm/arch-omap3/omap_gpmc.h | 84
include/asm-arm/arch-omap3/sys_proto.h | 71 ++
5 files changed, 662 insertions(+)
Index: u-boot-main/include/asm-arm/arch-omap3/mem.h
===
--- /dev/null
+++ u-boot-main/include/asm-arm/arch-omap3/mem.h
@@ -0,0 +1,227 @@
+/*
+ * (C) Copyright 2006-2008
+ * Texas Instruments, www.ti.com
+ * Richard Woodruff r-woodru...@ti.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _MEM_H_
+#define _MEM_H_
+
+#define CS00x0
+#define CS10x1 /* mirror CS1 regs appear offset 0x30 from CS0 */
+
+#ifndef __ASSEMBLY__
+typedef enum {
+ STACKED = 0,
+ IP_DDR = 1,
+ COMBO_DDR = 2,
+ IP_SDR = 3,
+} mem_t;
+#endif /* __ASSEMBLY__ */
+
+#define EARLY_INIT 1
+
+/* Slower full frequency range default timings for x32 operation*/
+#define SDP_SDRC_SHARING 0x0100
+#define SDP_SDRC_MR_0_SDR 0x0031
+
+/* optimized timings good for current shipping parts */
+#define SDP_3430_SDRC_RFR_CTRL_165MHz 0x0004e201 /* 7.8us/6ns - 50=0x4e2 */
+
+#define DLL_OFFSET 0
+#define DLL_WRITEDDRCLKX2DIS 1
+#define DLL_ENADLL 1
+#define DLL_LOCKDLL0
+#define DLL_DLLPHASE_720
+#define DLL_DLLPHASE_901
+
+/* rkw - need to find of 90/72 degree recommendation for speed like before */
+#define SDP_SDRC_DLLAB_CTRL((DLL_ENADLL 3) | \
+ (DLL_LOCKDLL 2) | (DLL_DLLPHASE_90 1))
+
+/* Infineon part of 3430SDP (165MHz optimized) 6.06ns
+ * ACTIMA
+ * TDAL = Twr/Tck + Trp/tck = 15/6 + 18/6 = 2.5 + 3 = 5.5 - 6
+ * TDPL (Twr) = 15/6 = 2.5 - 3
+ * TRRD = 12/6 = 2
+ * TRCD = 18/6 = 3
+ * TRP = 18/6 = 3
+ * TRAS = 42/6 = 7
+ * TRC = 60/6 = 10
+ * TRFC = 72/6 = 12
+ * ACTIMB
+ * TCKE = 2
+ * XSR = 120/6 = 20
+ */
+#define TDAL_165 6
+#define TDPL_165 3
+#define TRRD_165 2
+#define TRCD_165 3
+#define TRP_1653
+#define TRAS_165 7
+#define TRC_16510
+#define TRFC_165 21
+#define V_ACTIMA_165 ((TRFC_165 27) | (TRC_165 22) | \
+ (TRAS_165 18) | (TRP_165 15) | \
+ (TRCD_165 12) | (TRRD_165 9) | \
+ (TDPL_165 6) | (TDAL_165))
+
+#define TWTR_165 1
+#define TCKE_165 1
+#define TXP_1655
+#define XSR_16523
+#define V_ACTIMB_165 (((TCKE_165 12) | (XSR_165 0)) | \
+ (TXP_165 8) | (TWTR_165 16))
+
+#define SDP_SDRC_ACTIM_CTRLA_0 V_ACTIMA_165
+#define SDP_SDRC_ACTIM_CTRLB_0 V_ACTIMB_165
+#define SDP_SDRC_RFR_CTRL SDP_3430_SDRC_RFR_CTRL_165MHz
+
+/*
+ * GPMC settings -
+ * Definitions is as per the following format
+ * #define PART_GPMC_CONFIGx value
+ * Where:
+ * PART is the part name e.g. STNOR - Intel Strata Flash
+ * x is GPMC config registers from 1 to 6 (there will be 6 macros)
+ * Value is corresponding value
+ *
+ * For every valid PRCM configuration there should be only one definition of
+ * the same. if values are independent of the board, this definition will be
+ * present in this file if values are dependent on the board, then this should
+ * go into corresponding mem-boardName.h file
+ *
+ * Currently valid part Names are (PART):
+ * STNOR - Intel Strata Flash
+ * SMNAND - Samsung NAND
+ * MPDB - H4 MPDB board
+ * SBNOR - Sibley NOR
+ * MNAND - Micron Large page x16 NAND
+ * ONNAND - Samsung One NAND
+ *
+ * include/configs/file.h contains the defn - for all CS we are interested
+ * #define OMAP34XX_GPMC_CSx PART
+ * #define OMAP34XX_GPMC_CSx_SIZE Size
+ * #define OMAP34XX_GPMC_CSx_MAP Map
+ * Where:
+ * x - CS number
+ * PART - Part Name as defined above
+ * SIZE - how
[U-Boot] [PATCH 01/15 v6] OMAP3: Add pin mux, clock and cpu headers
Add pin mux, clock and cpu header files for OMAP3.
Signed-off-by: Dirk Behme dirk.be...@googlemail.com
---
include/asm-arm/arch-omap3/clocks_omap3.h | 285
include/asm-arm/arch-omap3/cpu.h | 402 +
include/asm-arm/arch-omap3/mux.h | 412 ++
3 files changed, 1099 insertions(+)
Index: u-boot-main/include/asm-arm/arch-omap3/clocks_omap3.h
===
--- /dev/null
+++ u-boot-main/include/asm-arm/arch-omap3/clocks_omap3.h
@@ -0,0 +1,285 @@
+/*
+ * (C) Copyright 2006-2008
+ * Texas Instruments, www.ti.com
+ * Richard Woodruff r-woodru...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _CLOCKS_OMAP3_H_
+#define _CLOCKS_OMAP3_H_
+
+#define PLL_STOP 1 /* PER IVA */
+#define PLL_LOW_POWER_BYPASS 5 /* MPU, IVA CORE */
+#define PLL_FAST_RELOCK_BYPASS 6 /* CORE */
+#define PLL_LOCK 7 /* MPU, IVA, CORE PER */
+
+/*
+ * The following configurations are OPP and SysClk value independant
+ * and hence are defined here. All the other DPLL related values are
+ * tabulated in lowlevel_init.S.
+ */
+
+/* CORE DPLL */
+#define CORE_M3X2 2 /* 332MHz : CM_CLKSEL1_EMU */
+#define CORE_SSI_DIV 3 /* 221MHz : CM_CLKSEL_CORE */
+#define CORE_FUSB_DIV 2 /* 41.5MHz: */
+#define CORE_L4_DIV2 /* 83MHz : L4 */
+#define CORE_L3_DIV2 /* 166MHz : L3 {DDR} */
+#define GFX_DIV2 /* 83MHz : CM_CLKSEL_GFX */
+#define WKUP_RSM 2 /* 41.5MHz: CM_CLKSEL_WKUP */
+
+/* PER DPLL */
+#define PER_M6X2 3 /* 288MHz: CM_CLKSEL1_EMU */
+#define PER_M5X2 4 /* 216MHz: CM_CLKSEL_CAM */
+#define PER_M4X2 2 /* 432MHz: CM_CLKSEL_DSS-dss1 */
+#define PER_M3X2 16 /* 54MHz : CM_CLKSEL_DSS-tv */
+
+#define CLSEL1_EMU_VAL ((CORE_M3X2 16) | (PER_M6X2 24) | (0x0A50))
+
+/* MPU DPLL */
+
+#define MPU_M_12_ES1 0x0FE
+#define MPU_N_12_ES1 0x07
+#define MPU_FSEL_12_ES10x05
+#define MPU_M2_12_ES1 0x01
+
+#define MPU_M_12_ES2 0x0FA
+#define MPU_N_12_ES2 0x05
+#define MPU_FSEL_12_ES20x07
+#define MPU_M2_ES2 0x01
+
+#define MPU_M_12 0x085
+#define MPU_N_12 0x05
+#define MPU_FSEL_120x07
+#define MPU_M2_12 0x01
+
+#define MPU_M_13_ES1 0x17D
+#define MPU_N_13_ES1 0x0C
+#define MPU_FSEL_13_ES10x03
+#define MPU_M2_13_ES1 0x01
+
+#define MPU_M_13_ES2 0x1F4
+#define MPU_N_13_ES2 0x0C
+#define MPU_FSEL_13_ES20x03
+#define MPU_M2_13_ES2 0x01
+
+#define MPU_M_13 0x10A
+#define MPU_N_13 0x0C
+#define MPU_FSEL_130x03
+#define MPU_M2_13 0x01
+
+#define MPU_M_19P2_ES1 0x179
+#define MPU_N_19P2_ES1 0x12
+#define MPU_FSEL_19P2_ES1 0x04
+#define MPU_M2_19P2_ES10x01
+
+#define MPU_M_19P2_ES2 0x271
+#define MPU_N_19P2_ES2 0x17
+#define MPU_FSEL_19P2_ES2 0x03
+#define MPU_M2_19P2_ES20x01
+
+#define MPU_M_19P2 0x14C
+#define MPU_N_19P2 0x17
+#define MPU_FSEL_19P2 0x03
+#define MPU_M2_19P20x01
+
+#define MPU_M_26_ES1 0x17D
+#define MPU_N_26_ES1 0x19
+#define MPU_FSEL_26_ES10x03
+#define MPU_M2_26_ES1 0x01
+
+#define MPU_M_26_ES2 0x0FA
+#define MPU_N_26_ES2 0x0C
+#define MPU_FSEL_26_ES20x07
+#define MPU_M2_26_ES2 0x01
+
+#define MPU_M_26 0x085
+#define MPU_N_26 0x0C
+#define MPU_FSEL_260x07
+#define MPU_M2_26 0x01
+
+#define MPU_M_38P4_ES1 0x1FA
+#define MPU_N_38P4_ES1 0x32
+#define MPU_FSEL_38P4_ES1 0x03
+#define MPU_M2_38P4_ES10x01
+
+#define MPU_M_38P4_ES2 0x271
+#define MPU_N_38P4_ES2 0x2F
+#define MPU_FSEL_38P4_ES2 0x03
+#define MPU_M2_38P4_ES20x01
+
+#define MPU_M_38P4 0x14C
+#define MPU_N_38P4 0x2F
+#define MPU_FSEL_38P4
[U-Boot] [PATCH 03/15 v6] OMAP3: Add common cpu and start code
Add common cpu and start code.
Signed-off-by: Dirk Behme dirk.be...@googlemail.com
---
cpu/arm_cortexa8/Makefile| 47 +++
cpu/arm_cortexa8/config.mk | 36 ++
cpu/arm_cortexa8/cpu.c | 241 ++
cpu/arm_cortexa8/omap3/Makefile | 46 +++
cpu/arm_cortexa8/omap3/config.mk | 36 ++
cpu/arm_cortexa8/start.S | 516 +++
6 files changed, 922 insertions(+)
Index: u-boot-main/cpu/arm_cortexa8/config.mk
===
--- /dev/null
+++ u-boot-main/cpu/arm_cortexa8/config.mk
@@ -0,0 +1,36 @@
+#
+# (C) Copyright 2002
+# Gary Jennejohn, DENX Software Engineering, g...@denx.de
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \
+-msoft-float
+
+# Make ARMv5 to allow more compilers to work, even though its v7a.
+PLATFORM_CPPFLAGS += -march=armv5
+# =
+#
+# Supply options according to compiler version
+#
+# =
+PLATFORM_CPPFLAGS +=$(call cc-option)
+PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,)
+PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,\
+ $(call cc-option,-malignment-traps,))
\ No newline at end of file
Index: u-boot-main/cpu/arm_cortexa8/cpu.c
===
--- /dev/null
+++ u-boot-main/cpu/arm_cortexa8/cpu.c
@@ -0,0 +1,241 @@
+/*
+ * (C) Copyright 2008 Texas Insturments
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH www.elinos.com
+ * Marius Groeger mgroe...@sysgo.de
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, g...@denx.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * CPU specific code
+ */
+
+#include common.h
+#include command.h
+#include asm/arch/sys_proto.h
+
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
+#ifndef CONFIG_L2_OFF
+void l2cache_disable(void);
+#endif
+
+static void cache_flush(void);
+
+/* read co-processor 15, register #1 (control register) */
+static unsigned long read_p15_c1(void)
+{
+ unsigned long value;
+
+ __asm__ __volatile__(mrc p15, 0, %0, c1, c0, 0\
+@ read control reg\n:=r(value)
+::memory);
+ return value;
+}
+
+/* write to co-processor 15, register #1 (control register) */
+static void write_p15_c1(unsigned long value)
+{
+ __asm__ __volatile__(mcr p15, 0, %0, c1, c0, 0\
+@ write it back\n::r(value)
+: memory);
+
+ read_p15_c1();
+}
+
+static void cp_delay(void)
+{
+ /* Many OMAP regs need at least 2 nops */
+ asm(nop);
+ asm(nop);
+}
+
+/* See also ARM Ref. Man. */
+#define C1_MMU (10) /* mmu off/on */
+#define C1_ALIGN (11) /* alignment faults off/on */
+#define C1_DC (12) /* dcache off/on */
+#define C1_WB (13) /* merging write buffer on/off */
+#define C1_BIG_ENDIAN (17) /* big endian off/on */
+#define C1_SYS_PROT(18) /* system protection */
+#define C1_ROM_PROT(19) /* ROM protection */
+#define C1_IC (112) /* icache off/on */
+#define C1_HIGH_VECTORS(113) /* location of vectors: low/high
addresses */
+#define RESERVED_1 (0xf 3)
[U-Boot] [PATCH 04/15 v6] OMAP3: Add common clock, memory and low level code
Add common clock, memory and low level code
Signed-off-by: Dirk Behme dirk.be...@googlemail.com
---
cpu/arm_cortexa8/omap3/clock.c | 381 +
cpu/arm_cortexa8/omap3/lowlevel_init.S | 361 +++
cpu/arm_cortexa8/omap3/mem.c | 284
cpu/arm_cortexa8/omap3/syslib.c| 72 ++
4 files changed, 1098 insertions(+)
Index: u-boot-main/cpu/arm_cortexa8/omap3/clock.c
===
--- /dev/null
+++ u-boot-main/cpu/arm_cortexa8/omap3/clock.c
@@ -0,0 +1,381 @@
+/*
+ * (C) Copyright 2008
+ * Texas Instruments, www.ti.com
+ *
+ * Author :
+ * Manikandan Pillai mani.pil...@ti.com
+ *
+ * Derived from Beagle Board and OMAP3 SDP code by
+ * Richard Woodruff r-woodru...@ti.com
+ * Syed Mohammed Khasim kha...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/clocks.h
+#include asm/arch/clocks_omap3.h
+#include asm/arch/mem.h
+#include asm/arch/sys_proto.h
+#include environment.h
+#include command.h
+
+/**
+ * get_sys_clk_speed() - determine reference oscillator speed
+ * based on known 32kHz clock and gptimer.
+ */
+u32 get_osc_clk_speed(void)
+{
+ u32 start, cstart, cend, cdiff, val;
+ prcm_t *prcm_base = (prcm_t *)PRCM_BASE;
+ prm_t *prm_base = (prm_t *)PRM_BASE;
+ gptimer_t *gpt1_base = (gptimer_t *)OMAP34XX_GPT1;
+ s32ktimer_t *s32k_base = (s32ktimer_t *)SYNC_32KTIMER_BASE;
+
+ val = readl(prm_base-clksrc_ctrl);
+
+ /* If SYS_CLK is being divided by 2, remove for now */
+ val = (val (~SYSCLKDIV_2)) | SYSCLKDIV_1;
+ writel(val, prm_base-clksrc_ctrl);
+
+ /* enable timer2 */
+ val = readl(prcm_base-clksel_wkup) | CLKSEL_GPT1;
+
+ /* select sys_clk for GPT1 */
+ writel(val, prcm_base-clksel_wkup);
+
+ /* Enable I and F Clocks for GPT1 */
+ val = readl(prcm_base-iclken_wkup) | EN_GPT1 | EN_32KSYNC;
+ writel(val, prcm_base-iclken_wkup);
+ val = readl(prcm_base-fclken_wkup) | EN_GPT1;
+ writel(val, prcm_base-fclken_wkup);
+
+ writel(0, gpt1_base-tldr);/* start counting at 0 */
+ writel(GPT_EN, gpt1_base-tclr); /* enable clock */
+
+ /* enable 32kHz source, determine sys_clk via gauging */
+
+ /* start time in 20 cycles */
+ start = 20 + readl(s32k_base-s32k_cr);
+
+ /* dead loop till start time */
+ while (readl(s32k_base-s32k_cr) start);
+
+ /* get start sys_clk count */
+ cstart = readl(gpt1_base-tcrr);
+
+ /* wait for 40 cycles */
+ while (readl(s32k_base-s32k_cr) (start + 20)) ;
+ cend = readl(gpt1_base-tcrr); /* get end sys_clk count */
+ cdiff = cend - cstart; /* get elapsed ticks */
+
+ /* based on number of ticks assign speed */
+ if (cdiff 19000)
+ return S38_4M;
+ else if (cdiff 15200)
+ return S26M;
+ else if (cdiff 13000)
+ return S24M;
+ else if (cdiff 9000)
+ return S19_2M;
+ else if (cdiff 7600)
+ return S13M;
+ else
+ return S12M;
+}
+
+/**
+ * get_sys_clkin_sel() - returns the sys_clkin_sel field value based on
+ * input oscillator clock frequency.
+ */
+void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel)
+{
+ switch(osc_clk) {
+ case S38_4M:
+ *sys_clkin_sel = 4;
+ break;
+ case S26M:
+ *sys_clkin_sel = 3;
+ break;
+ case S19_2M:
+ *sys_clkin_sel = 2;
+ break;
+ case S13M:
+ *sys_clkin_sel = 1;
+ break;
+ case S12M:
+ default:
+ *sys_clkin_sel = 0;
+ }
+}
+
[U-Boot] [PATCH 05/15 v6] OMAP3: Add common board, interrupt and system info
Add common board, interrupt and system info code.
Signed-off-by: Dirk Behme dirk.be...@googlemail.com
---
cpu/arm_cortexa8/omap3/board.c | 344
cpu/arm_cortexa8/omap3/interrupts.c | 297 +++
cpu/arm_cortexa8/omap3/sys_info.c | 254 ++
examples/Makefile |4
4 files changed, 899 insertions(+)
Index: u-boot-main/cpu/arm_cortexa8/omap3/sys_info.c
===
--- /dev/null
+++ u-boot-main/cpu/arm_cortexa8/omap3/sys_info.c
@@ -0,0 +1,254 @@
+/*
+ * (C) Copyright 2008
+ * Texas Instruments, www.ti.com
+ *
+ * Author :
+ * Manikandan Pillai mani.pil...@ti.com
+ *
+ * Derived from Beagle Board and 3430 SDP code by
+ * Richard Woodruff r-woodru...@ti.com
+ * Syed Mohammed Khasim kha...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/mem.h /* get mem tables */
+#include asm/arch/sys_proto.h
+#include i2c.h
+
+extern omap3_sysinfo sysinfo;
+static gpmc_csx_t *gpmc_cs_base = (gpmc_csx_t *)GPMC_CONFIG_CS0_BASE;
+static sdrc_t *sdrc_base = (sdrc_t *)OMAP34XX_SDRC_BASE;
+static ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE;
+
+/**
+ * get_cpu_rev(void) - extract version info
+ **/
+u32 get_cpu_rev(void)
+{
+ u32 cpuid = 0;
+
+ /*
+* On ES1.0 the IDCODE register is not exposed on L4
+* so using CPU ID to differentiate
+* between ES2.0 and ES1.0.
+*/
+ __asm__ __volatile__(mrc p15, 0, %0, c0, c0, 0:=r(cpuid));
+ if ((cpuid 0xf) == 0x0)
+ return CPU_3430_ES1;
+ else
+ return CPU_3430_ES2;
+
+}
+
+/
+ * is_mem_sdr() - return 1 if mem type in use is SDR
+ /
+u32 is_mem_sdr(void)
+{
+ if (readl(sdrc_base-cs[CS0].mr) == SDP_SDRC_MR_0_SDR)
+ return 1;
+ return 0;
+}
+
+/***
+ * get_cs0_size() - get size of chip select 0/1
+ /
+u32 get_sdr_cs_size(u32 cs)
+{
+ u32 size;
+
+ /* get ram size field */
+ size = readl(sdrc_base-cs[cs].mcfg) 8;
+ size = 0x3FF; /* remove unwanted bits */
+ size *= SZ_2M; /* find size in MB */
+ return size;
+}
+
+/***
+ * get_sdr_cs_offset() - get offset of cs from cs0 start
+ /
+u32 get_sdr_cs_offset(u32 cs)
+{
+ u32 offset;
+
+ if (!cs)
+ return 0;
+
+ offset = readl(sdrc_base-cs_cfg);
+ offset = (offset 15) 27 | (offset 0x30) 17;
+
+ return offset;
+}
+
+/***
+ * get_board_type() - get board type based on current production stats.
+ * - NOTE-1-: 2 I2C EEPROMs will someday be populated with proper info.
+ *when they are available we can get info from there. This should
+ *be correct of all known boards up until today.
+ * - NOTE-2- EEPROMs are populated but they are updated very slowly. To
+ *avoid waiting on them we will use ES version of the chip to get info.
+ *A later version of the FPGA migth solve their speed issue.
+ /
+u32 get_board_type(void)
+{
+ if (get_cpu_rev() == CPU_3430_ES2)
+ return sysinfo.board_type_v2;
+ else
+ return sysinfo.board_type_v1;
+}
+
+/***
+ * get_gpmc0_base() - Return current address hardware will be
+ * fetching from. The below effectively gives what is correct, its a bit
+ * mis-leading compared to the TRM. For the most general case the mask
+ * needs to be also taken into account this does work in practice.
+ * - for u-boot we currently map:
+ * -- 0 to nothing,
+ *
[U-Boot] [PATCH 07/15 v6] OMAP3: Add MMC support
Add MMC support. Signed-off-by: Dirk Behme dirk.be...@googlemail.com --- drivers/mmc/Makefile |1 drivers/mmc/omap3_mmc.c | 558 ++ include/asm-arm/arch-omap3/mmc.h | 235 include/asm-arm/arch-omap3/mmc_host_def.h | 166 4 files changed, 960 insertions(+) Index: u-boot-main/include/asm-arm/arch-omap3/mmc.h === --- /dev/null +++ u-boot-main/include/asm-arm/arch-omap3/mmc.h @@ -0,0 +1,235 @@ +/* + * (C) Copyright 2008 + * Texas Instruments, www.ti.com + * Syed Mohammed Khasim kha...@ti.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation's version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef MMC_H +#define MMC_H + +#include mmc_host_def.h + +/* Responses */ +#define RSP_TYPE_NONE (RSP_TYPE_NORSP | CCCE_NOCHECK | CICE_NOCHECK) +#define RSP_TYPE_R1(RSP_TYPE_LGHT48 | CCCE_CHECK | CICE_CHECK) +#define RSP_TYPE_R1B (RSP_TYPE_LGHT48B | CCCE_CHECK | CICE_CHECK) +#define RSP_TYPE_R2(RSP_TYPE_LGHT136 | CCCE_CHECK | CICE_NOCHECK) +#define RSP_TYPE_R3(RSP_TYPE_LGHT48 | CCCE_NOCHECK | CICE_NOCHECK) +#define RSP_TYPE_R4(RSP_TYPE_LGHT48 | CCCE_NOCHECK | CICE_NOCHECK) +#define RSP_TYPE_R5(RSP_TYPE_LGHT48 | CCCE_CHECK | CICE_CHECK) +#define RSP_TYPE_R6(RSP_TYPE_LGHT48 | CCCE_CHECK | CICE_CHECK) +#define RSP_TYPE_R7(RSP_TYPE_LGHT48 | CCCE_CHECK | CICE_CHECK) + +/* All supported commands */ +#define MMC_CMD0 (INDEX(0) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE) +#define MMC_CMD1 (INDEX(1) | RSP_TYPE_R3 | DP_NO_DATA | DDIR_WRITE) +#define MMC_CMD2 (INDEX(2) | RSP_TYPE_R2 | DP_NO_DATA | DDIR_WRITE) +#define MMC_CMD3 (INDEX(3) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE) +#define MMC_SDCMD3 (INDEX(3) | RSP_TYPE_R6 | DP_NO_DATA | DDIR_WRITE) +#define MMC_CMD4 (INDEX(4) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE) +#define MMC_CMD6 (INDEX(6) | RSP_TYPE_R1B | DP_NO_DATA | DDIR_WRITE) +#define MMC_CMD7_SELECT(INDEX(7) | RSP_TYPE_R1B | DP_NO_DATA | DDIR_WRITE) +#define MMC_CMD7_DESELECT (INDEX(7)| RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE) +#define MMC_CMD8 (INDEX(8) | RSP_TYPE_R1 | DP_DATA| DDIR_READ) +#define MMC_SDCMD8 (INDEX(8) | RSP_TYPE_R7 | DP_NO_DATA | DDIR_WRITE) +#define MMC_CMD9 (INDEX(9) | RSP_TYPE_R2 | DP_NO_DATA | DDIR_WRITE) +#define MMC_CMD12 (INDEX(12) | RSP_TYPE_R1B | DP_NO_DATA | DDIR_WRITE) +#define MMC_CMD13 (INDEX(13) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE) +#define MMC_CMD15 (INDEX(15) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE) +#define MMC_CMD16 (INDEX(16) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE) +#define MMC_CMD17 (INDEX(17) | RSP_TYPE_R1 | DP_DATA| DDIR_READ) +#define MMC_CMD24 (INDEX(24) | RSP_TYPE_R1 | DP_DATA| DDIR_WRITE) +#define MMC_ACMD6 (INDEX(6) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE) +#define MMC_ACMD41 (INDEX(41) | RSP_TYPE_R3 | DP_NO_DATA | DDIR_WRITE) +#define MMC_ACMD51 (INDEX(51) | RSP_TYPE_R1 | DP_DATA| DDIR_READ) +#define MMC_CMD55 (INDEX(55) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE) + +#define MMC_AC_CMD_RCA_MASK(unsigned int)(0x 16) +#define MMC_BC_CMD_DSR_MASK(unsigned int)(0x 16) +#define MMC_DSR_DEFAULT0x0404 +#define SD_CMD8_CHECK_PATTERN 0xAA +#define SD_CMD8_2_7_3_6_V_RANGE(0x01 8) + +/* Clock Configurations and Macros */ + +#define MMC_CLOCK_REFERENCE96 +#define MMC_RELATIVE_CARD_ADDRESS 0x1234 +#define MMC_INIT_SEQ_CLK (MMC_CLOCK_REFERENCE * 1000 / 80) +#define MMC_400kHz_CLK (MMC_CLOCK_REFERENCE * 1000 / 400) +#define CLKDR(r, f, u) r)*100) / ((f)*(u))) + 1) +#define CLKD(f, u) (CLKDR(MMC_CLOCK_REFERENCE, f, u)) + +#define MMC_OCR_REG_ACCESS_MODE_MASK (0x3 29) +#define MMC_OCR_REG_ACCESS_MODE_BYTE (0x0 29) +#define MMC_OCR_REG_ACCESS_MODE_SECTOR (0x2 29) + +#define MMC_OCR_REG_HOST_CAPACITY_SUPPORT_MASK (0x1 30) +#define MMC_OCR_REG_HOST_CAPACITY_SUPPORT_BYTE (0x0 30) +#define MMC_OCR_REG_HOST_CAPACITY_SUPPORT_SECTOR (0x1 30) + +#define MMC_SD2_CSD_C_SIZE_LSB_MASK
[U-Boot] [PATCH 08/15 v6] OMAP3: Add I2C support
Add I2C support.
Signed-off-by: Dirk Behme dirk.be...@googlemail.com
---
drivers/i2c/Makefile |1
drivers/i2c/omap24xx_i2c.c | 23 +++
include/asm-arm/arch-omap3/i2c.h | 128 +++
3 files changed, 152 insertions(+)
Index: u-boot-main/drivers/i2c/Makefile
===
--- u-boot-main.orig/drivers/i2c/Makefile
+++ u-boot-main/drivers/i2c/Makefile
@@ -29,6 +29,7 @@ COBJS-$(CONFIG_FSL_I2C) += fsl_i2c.o
COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
+COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o
COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o
COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
Index: u-boot-main/drivers/i2c/omap24xx_i2c.c
===
--- u-boot-main.orig/drivers/i2c/omap24xx_i2c.c
+++ u-boot-main/drivers/i2c/omap24xx_i2c.c
@@ -109,7 +109,11 @@ static int i2c_read_byte (u8 devaddr, u8
status = wait_for_pin ();
if (status I2C_STAT_RRDY) {
+#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
+ *value = readb (I2C_DATA);
+#else
*value = readw (I2C_DATA);
+#endif
udelay (2);
} else {
i2c_error = 1;
@@ -150,8 +154,23 @@ static int i2c_write_byte (u8 devaddr, u
status = wait_for_pin ();
if (status I2C_STAT_XRDY) {
+#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
+ /* send out 1 byte */
+ writeb (regoffset, I2C_DATA);
+ writew (I2C_STAT_XRDY, I2C_STAT);
+
+ status = wait_for_pin ();
+ if ((status I2C_STAT_XRDY)) {
+ /* send out next 1 byte */
+ writeb (value, I2C_DATA);
+ writew (I2C_STAT_XRDY, I2C_STAT);
+ } else {
+ i2c_error = 1;
+ }
+#else
/* send out two bytes */
writew ((value 8) + regoffset, I2C_DATA);
+#endif
/* must have enough delay to allow BB bit to go low */
udelay (5);
if (readw (I2C_STAT) I2C_STAT_NACK) {
@@ -188,7 +207,11 @@ static void flush_fifo(void)
while(1){
stat = readw(I2C_STAT);
if(stat == I2C_STAT_RRDY){
+#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
+ readb(I2C_DATA);
+#else
readw(I2C_DATA);
+#endif
writew(I2C_STAT_RRDY,I2C_STAT);
udelay(1000);
}else
Index: u-boot-main/include/asm-arm/arch-omap3/i2c.h
===
--- /dev/null
+++ u-boot-main/include/asm-arm/arch-omap3/i2c.h
@@ -0,0 +1,128 @@
+/*
+ * (C) Copyright 2004-2008
+ * Texas Instruments, www.ti.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _I2C_H_
+#define _I2C_H_
+
+#define I2C_DEFAULT_BASE I2C_BASE1
+
+#define I2C_REV(I2C_DEFAULT_BASE + 0x00)
+#define I2C_IE (I2C_DEFAULT_BASE + 0x04)
+#define I2C_STAT (I2C_DEFAULT_BASE + 0x08)
+#define I2C_IV (I2C_DEFAULT_BASE + 0x0c)
+#define I2C_BUF(I2C_DEFAULT_BASE + 0x14)
+#define I2C_CNT(I2C_DEFAULT_BASE + 0x18)
+#define I2C_DATA (I2C_DEFAULT_BASE + 0x1c)
+#define I2C_SYSC (I2C_DEFAULT_BASE + 0x20)
+#define I2C_CON(I2C_DEFAULT_BASE + 0x24)
+#define I2C_OA (I2C_DEFAULT_BASE + 0x28)
+#define I2C_SA (I2C_DEFAULT_BASE + 0x2c)
+#define I2C_PSC(I2C_DEFAULT_BASE + 0x30)
+#define I2C_SCLL (I2C_DEFAULT_BASE + 0x34)
+#define I2C_SCLH (I2C_DEFAULT_BASE + 0x38)
+#define I2C_SYSTEST(I2C_DEFAULT_BASE + 0x3c)
+
+/* I2C masks */
+
+/* I2C Interrupt Enable Register (I2C_IE): */
+#define I2C_IE_GC_IE (1 5)
+#define I2C_IE_XRDY_IE (1 4) /* Transmit data ready interrupt enable */
+#define I2C_IE_RRDY_IE (1 3) /*
[U-Boot] [PATCH 09/15 v6] OMAP3: Add Beagle board and common power code
Add Beagle board support and common power code.
Signed-off-by: Dirk Behme dirk.be...@googlemail.com
---
board/omap3/beagle/Makefile | 49 +
board/omap3/beagle/beagle.c | 89 +
board/omap3/beagle/beagle.h | 381 ++
board/omap3/beagle/config.mk | 35 +++
board/omap3/beagle/u-boot.lds | 63 ++
board/omap3/common/Makefile | 52 +
board/omap3/common/power.c| 74
7 files changed, 743 insertions(+)
Index: u-boot-main/board/omap3/beagle/beagle.c
===
--- /dev/null
+++ u-boot-main/board/omap3/beagle/beagle.c
@@ -0,0 +1,89 @@
+/*
+ * (C) Copyright 2004-2008
+ * Texas Instruments, www.ti.com
+ *
+ * Author :
+ * Sunil Kumar sunilsain...@gmail.com
+ * Shashi Ranjan shashiranjanmc...@gmail.com
+ *
+ * Derived from Beagle Board and 3430 SDP code by
+ * Richard Woodruff r-woodru...@ti.com
+ * Syed Mohammed Khasim kha...@ti.com
+ *
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include common.h
+#include asm/io.h
+#include asm/arch/mux.h
+#include asm/arch/sys_proto.h
+#include asm/mach-types.h
+#include beagle.h
+
+/**
+ * Routine: board_init
+ * Description: Early hardware init.
+ */
+int board_init(void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
+ /* board id for Linux */
+ gd-bd-bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
+ /* boot param addr */
+ gd-bd-bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
+
+ return 0;
+}
+
+/**
+ * Routine: misc_init_r
+ * Description: Configure board specific parts
+ */
+int misc_init_r(void)
+{
+ gpio_t *gpio5_base = (gpio_t *)OMAP34XX_GPIO5_BASE;
+ gpio_t *gpio6_base = (gpio_t *)OMAP34XX_GPIO6_BASE;
+
+ power_init_r();
+
+ /* Configure GPIOs to output */
+ writel(~((GPIO10) | GPIO9 | GPIO3 | GPIO2), gpio6_base-oe);
+ writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
+ GPIO15 | GPIO14 | GPIO13 | GPIO12), gpio5_base-oe);
+
+ /* Set GPIOs */
+ writel(GPIO10 | GPIO9 | GPIO3 | GPIO2, gpio6_base-setdataout);
+ writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
+ GPIO15 | GPIO14 | GPIO13 | GPIO12, gpio5_base-setdataout);
+
+ return 0;
+}
+
+/**
+ * Routine: set_muxconf_regs
+ * Description: Setting up the configuration Mux registers specific to the
+ * hardware. Many pins need to be moved from protect to primary
+ * mode.
+ */
+void set_muxconf_regs(void)
+{
+ MUX_BEAGLE();
+}
Index: u-boot-main/board/omap3/beagle/beagle.h
===
--- /dev/null
+++ u-boot-main/board/omap3/beagle/beagle.h
@@ -0,0 +1,381 @@
+/*
+ * (C) Copyright 2008
+ * Dirk Behme dirk.be...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _BEAGLE_H_
+#define _BEAGLE_H_
+
+const omap3_sysinfo sysinfo
[U-Boot] [PATCH 10/15 v6] OMAP3: Add Overo board
Add Overo board support. Signed-off-by: Steve Sakoman sako...@gmail.com Signed-off-by: Dirk Behme dirk.be...@googlemail.com --- board/omap3/overo/Makefile | 49 + board/omap3/overo/config.mk | 31 +++ board/omap3/overo/overo.c| 89 ++ board/omap3/overo/overo.h| 381 +++ board/omap3/overo/u-boot.lds | 63 +++ 5 files changed, 613 insertions(+) Index: u-boot-main/board/omap3/overo/config.mk === --- /dev/null +++ u-boot-main/board/omap3/overo/config.mk @@ -0,0 +1,31 @@ +# +# Overo uses OMAP3 (ARM-CortexA8) cpu +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# Physical Address: +# 8000' (bank0) +# A000/ (bank1) +# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 +# (mem base + reserved) + +# For use with external or internal boots. +TEXT_BASE = 0x80e8 + + Index: u-boot-main/board/omap3/overo/Makefile === --- /dev/null +++ u-boot-main/board/omap3/overo/Makefile @@ -0,0 +1,49 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).a + +COBJS := overo.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB):$(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# \ No newline at end of file Index: u-boot-main/board/omap3/overo/overo.c === --- /dev/null +++ u-boot-main/board/omap3/overo/overo.c @@ -0,0 +1,89 @@ +/* + * Maintainer : Steve Sakoman st...@sakoman.com + * + * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by + * Richard Woodruff r-woodru...@ti.com + * Syed Mohammed Khasim kha...@ti.com + * Sunil Kumar sunilsain...@gmail.com + * Shashi Ranjan shashiranjanmc...@gmail.com + * + * (C) Copyright 2004-2008 + * Texas Instruments, www.ti.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include common.h +#include asm/io.h +#include asm/arch/mux.h +#include asm/arch/sys_proto.h +#include asm/mach-types.h +#include overo.h + +/** + * Routine: board_init + * Description:
[U-Boot] [PATCH 11/15 v6] OMAP3: Add Pandora support
Add Pandora support. Signed-off-by: Grazvydas Ignotas nota...@gmail.com Signed-off-by: Dirk Behme dirk.be...@googlemail.com --- board/omap3/pandora/Makefile | 49 board/omap3/pandora/config.mk | 33 +++ board/omap3/pandora/pandora.c | 92 board/omap3/pandora/pandora.h | 420 + board/omap3/pandora/u-boot.lds | 63 ++ 5 files changed, 657 insertions(+) Index: u-boot-main/board/omap3/pandora/config.mk === --- /dev/null +++ u-boot-main/board/omap3/pandora/config.mk @@ -0,0 +1,33 @@ +# +# (C) Copyright 2006 +# Texas Instruments, www.ti.com +# +# Pandora uses OMAP3 (ARM-CortexA8) cpu +# see http://www.ti.com/ for more information on Texas Instruments +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# Physical Address: +# 8000' (bank0) +# A000/ (bank1) +# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 +# (mem base + reserved) + +# For use with external or internal boots. +TEXT_BASE = 0x80e8 Index: u-boot-main/board/omap3/pandora/Makefile === --- /dev/null +++ u-boot-main/board/omap3/pandora/Makefile @@ -0,0 +1,49 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).a + +COBJS := pandora.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB):$(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# Index: u-boot-main/board/omap3/pandora/pandora.c === --- /dev/null +++ u-boot-main/board/omap3/pandora/pandora.c @@ -0,0 +1,92 @@ +/* + * (C) Copyright 2008 + * Grazvydas Ignotas nota...@gmail.com + * + * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by + * Richard Woodruff r-woodru...@ti.com + * Syed Mohammed Khasim kha...@ti.com + * Sunil Kumar sunilsain...@gmail.com + * Shashi Ranjan shashiranjanmc...@gmail.com + * + * (C) Copyright 2004-2008 + * Texas Instruments, www.ti.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include common.h +#include asm/io.h +#include asm/arch/mux.h +#include asm/arch/sys_proto.h +#include asm/mach-types.h +#include
[U-Boot] [PATCH 12/15 v6] OMAP3: Add EVM board
Add EVM board support.
Signed-off-by: Manikandan Pillai mani.pil...@ti.com
Signed-off-by: Dirk Behme dirk.be...@googlemail.com
---
board/omap3/evm/Makefile | 49 +
board/omap3/evm/config.mk | 35 +++
board/omap3/evm/evm.c | 123 +
board/omap3/evm/evm.h | 396 +
board/omap3/evm/u-boot.lds | 63 +++
5 files changed, 666 insertions(+)
Index: u-boot-main/board/omap3/evm/config.mk
===
--- /dev/null
+++ u-boot-main/board/omap3/evm/config.mk
@@ -0,0 +1,35 @@
+#
+# (C) Copyright 2006 - 2008
+# Texas Instruments, www.ti.com
+#
+# EVM uses OMAP3 (ARM-CortexA8) cpu
+# see http://www.ti.com/ for more information on Texas Instruments
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+# Physical Address:
+# 8000' (bank0)
+# A000/ (bank1)
+# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
+# (mem base + reserved)
+
+# For use with external or internal boots.
+TEXT_BASE = 0x80e8
+
+
Index: u-boot-main/board/omap3/evm/evm.c
===
--- /dev/null
+++ u-boot-main/board/omap3/evm/evm.c
@@ -0,0 +1,123 @@
+/*
+ * (C) Copyright 2004-2008
+ * Texas Instruments, www.ti.com
+ *
+ * Author :
+ * Manikandan Pillai mani.pil...@ti.com
+ *
+ * Derived from Beagle Board and 3430 SDP code by
+ * Richard Woodruff r-woodru...@ti.com
+ * Syed Mohammed Khasim kha...@ti.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include common.h
+#include asm/io.h
+#include asm/arch/mem.h
+#include asm/arch/mux.h
+#include asm/arch/sys_proto.h
+#include i2c.h
+#include asm/mach-types.h
+#include evm.h
+
+/**
+ * Routine: board_init
+ * Description: Early hardware init.
+ */
+int board_init(void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
+ /* board id for Linux */
+ gd-bd-bi_arch_number = MACH_TYPE_OMAP3EVM;
+ /* boot param addr */
+ gd-bd-bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
+
+ return 0;
+}
+
+/**
+ * Routine: misc_init_r
+ * Description: Init ethernet (done here so udelay works)
+ */
+int misc_init_r(void)
+{
+
+#ifdef CONFIG_DRIVER_OMAP34XX_I2C
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+#endif
+
+#if defined(CONFIG_CMD_NET)
+ setup_net_chip();
+#endif
+
+ return 0;
+}
+
+/**
+ * Routine: set_muxconf_regs
+ * Description: Setting up the configuration Mux registers specific to the
+ * hardware. Many pins need to be moved from protect to primary
+ * mode.
+ */
+void set_muxconf_regs(void)
+{
+ MUX_EVM();
+}
+
+/**
+ * Routine: setup_net_chip
+ * Description: Setting up the configuration GPMC registers specific to the
+ * Ethernet hardware.
+ */
+static
[U-Boot] [PATCH 15/15 v6] OMAP3: Add Pandora config, main Makefile, README, MAKEALL and MAINTAINERS
Add Pandora config, main Makefile, README, MAKEALL and MAINTAINERS Signed-off-by: Dirk Behme dirk.be...@googlemail.com --- MAINTAINERS | 20 ++ MAKEALL | 30 ++- Makefile| 19 ++ doc/README.omap3| 116 ++ include/configs/omap3_pandora.h | 320 5 files changed, 496 insertions(+), 9 deletions(-) Index: u-boot-main/doc/README.omap3 === --- /dev/null +++ u-boot-main/doc/README.omap3 @@ -0,0 +1,116 @@ + +Summary +=== + +This README is about U-Boot support for TI's ARM Cortex-A8 based OMAP3 [1] +family of SoCs. TI's OMAP3 SoC family contains an ARM Cortex-A8 core running +at ~600MHz. Additionally some family members contain a TMS320C64x+ DSP ~430MHz +and/or an Imagination SGX 2D/3D graphics processor and various other standard +peripherals. + +Currently the following boards are supported: + +* TI EVM [2] + +* Gumstix Overo [3] + +* TI/DigiKey BeagleBoard [4] + +* OpenPandora Ltd. Pandora [5] + +* TI/Logic PD Zoom MDK [6] + +Toolchain += + +While ARM Cortex-A8 support ARM v7 instruction set (-march=armv7a) we compile +with -march=armv5 to allow more compilers to work. For U-Boot code this has +no performance impact. + +Build += + +* TI EVM: + +make omap3_evm_config +make + +* Gumstix Overo: + +make omap3_overo_config +make + +* BeagleBoard: + +make omap3_beagle_config +make + +* Pandora: + +make omap3_pandora_config +make + +* Zoom MDK: + +make omap3_zoom1_config +make + +Custom commands +=== + +To make U-Boot for OMAP3 support NAND device SW or HW ECC calculation, U-Boot +for OMAP3 supports custom user command + +nandecc hw/sw + +To be compatible with NAND drivers using SW ECC (e.g. kernel code) + +nandecc sw + +enables SW ECC calculation. HW ECC enabled with + +nandecc hw + +is typically used to write 2nd stage bootloader (known as 'x-loader') which is +executed by OMAP3's boot rom and therefore has to be written with HW ECC. + +For all other commands see + +help + +Acknowledgements + + +OMAP3 U-Boot is based on U-Boot tar ball [7] for BeagleBoard and EVM done by +several TI employees. + +Links += + +[1] OMAP3: + +http://focus.ti.com/general/docs/gencontent.tsp?contentId=36915 + +[2] TI EVM: + +http://focus.ti.com/docs/toolsw/folders/print/tmdxevm3503.html + +[3] Gumstix Overo: + +http://www.gumstix.net/Overo/ + +[4] TI/DigiKey BeagleBoard: + +http://beagleboard.org/ + +[5] OpenPandora Ltd. Pandora: + +http://openpandora.org/ + +[6] TI/Logic PD Zoom MDK: + +http://www.logicpd.com/products/devkit/ti/zoom_mobile_development_kit + +[7] TI OMAP3 U-Boot: + +http://beagleboard.googlecode.com/files/u-boot_beagle_revb.tar.gz Index: u-boot-main/include/configs/omap3_pandora.h === --- /dev/null +++ u-boot-main/include/configs/omap3_pandora.h @@ -0,0 +1,320 @@ +/* + * (C) Copyright 2008 + * Grazvydas Ignotas nota...@gmail.com + * + * Configuration settings for the OMAP3 Pandora. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H +#include asm/sizes.h + +/* + * High Level Configuration Options + */ +#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */ +#define CONFIG_OMAP1 /* in a TI OMAP core */ +#define CONFIG_OMAP34XX1 /* which is a 34XX */ +#define CONFIG_OMAP34301 /* which is in a 3430 */ +#define CONFIG_OMAP3_PANDORA 1 /* working with pandora */ + +#include asm/arch/cpu.h /* get chip and board defs */ +#include asm/arch/omap3.h + +/* Clock Defines */ +#define V_OSCK 2600/* Clock output from T2 */ +#define V_SCLK (V_OSCK 1) + +#undef CONFIG_USE_IRQ /* no support for IRQs */ +#define CONFIG_MISC_INIT_R + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 +#define CONFIG_REVISION_TAG1 + +/* + * Size of malloc() pool + */ +#define CONFIG_ENV_SIZESZ_128K /* Total Size Environment */ +
Re: [U-Boot] [RFC][PATCH] Code Clean-up (weak functions)
Remy Bohmer wrote:
Hello Graeme,
2008/12/13 Graeme Russ graeme.r...@gmail.com:
This patch makes all definitions, declarations and usages of weak functions
consistent.
Signed-off-by: Graeme Russ graeme.r...@gmail.com
Just curious:
What is the relation of this patch to the problem discussed earlier:
http://www.mail-archive.com/u-boot@lists.denx.de/msg05367.html
Does this patch repair anything, or could it maybe break things?
The problem discussed in the above thread is related to overriding weak
functions not working if the override is the only function in a module (.o)
within a library (.a) - This patch does not alter this behavior
I ask this because the weak linking seemed not work as many expected,
and I guess you cannot test all architectures/boards...
This patch is intended to make the usage of weak functions consistent so
that when anyone goes looking in the code for an example to implement their
own code, they will not be presented with 4 or 5 options. This patch
modifies the small handful that were inconsistent on the assumption that
the (majority) worked. For example, this patch should resolve the
show_boot_progress() issue as per:
http://www.mail-archive.com/u-boot@lists.denx.de/msg05998.html
- If the weak alias decleration exceeds 80 columns, the __attribute__ is
placed
on the following line, indented by one tab
The benefit on 1 line would be that it is easy recognisable with grep
true - I thought about that but decided against breaking the 80 column rule
- Wolfgang, what are your thoughts on this?
which instance of a function is actually being used (or in fact should
be used due to the fuzzy behaviour of weak in U-boot...) without
having to go through all the code. That benefit is gone when it is
moved across different lines.
I didn't think about that - good point
Maybe it is an idea to move the attribute(weak,...) construction to a
macro, like in Linux:
#define __weak __attribute__((weak))
Yes, but it would need the alias as well - most that already exceed 80
columns would still with the macro
In that case it can be changed easier when a non-GCC compiler is being
used, and would keep the lines shorter, such that it still fits on 1
line?
Potentially, but we would have to go through and touch all the weak
functions, not just the small subset hit by this patch
All instances have been replaced by empty functions with an alias. e.g.
void __do_something (args) {}
do_something(args) __atttribute__((weak, alias(__do_something)));
Notice that in Linux, the 'alias' construction is not being used
massively. Can it be removed here also, or is it somehow mandatory
here?
I don't think it is mandatory but it is in the majority in u-boot.
Removing it would keep the lines short as well...
Kind Regards,
Remy
Thanks for the comments,
Regards,
Graeme
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Re: [U-Boot] [PATCH] usb_kbd: fix usb_kbd_deregister when DEVICE_DEREGISTER not enable
On 21:58 Tue 02 Dec , Jean-Christophe PLAGNIOL-VILLARD wrote: Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com --- common/usb_kbd.c |4 include/devices.h |2 ++ 2 files changed, 6 insertions(+), 0 deletions(-) ping Best Regards, J. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ne2000: take MAC address from config if available
Dear Daniel Mack, In message 20081203010154.ge2...@buzzloop.caiaq.de you wrote: This adds CONFIG_NE2000_NOPROM. If set, the ethernet MAC address is taken from the environment variable 'ethaddr' and the NIC is configured accordingly. Needed for boards that don't have an EEPROM to store this setting permanently. Signed-off-by: Daniel Mack dan...@caiaq.de --- ne2000_base.c | 38 -- 1 file changed, 28 insertions(+), 10 deletions(-) Why do we need a special CONFIG_ option? is it not possible to detect (by software) that there is no EEPROM available, and auto-adjust? Note that there is existing policy how to handle the situation that we have both a MAC address stored in some other storeage (like EEPROM on the NIC) and in the ethaddr environment variable (see for example drivers/net/cs8900.c). In the end, the code shall always only rely on the U-Boot environment settings. The system will test if MAC addresses are set in EEPROM and in the envrionment; then it should behave as follows: * If there is no MAC address in the EEPROM, then do nothing, i. e. rely on any previously existing envrionment settings. * If there is a MAC address in the EEPROM, and ther eis no corresponding ethaddr environment variable defined, then initialize (setenv()) this variable with the value read from the EEPROM. * If there is a MAC address in the EEPROM, and there is a value in the ethaddr environment variable, and both are identical, we use that value and everything is fine. * If there is a MAC address in the EEPROM, and there is a value in the ethaddr environment variable, and both are different, we issue a warning Warning: MAC addresses don't match: ... HW MAC address: ... ethaddr value: ... and then use the value from the ENVIRONMENT. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de There was no difference between the behavior of a god and the operations of pure chance... - Thomas Pynchon, _Gravity's Rainbow_ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] lib_ppc: rework the flush_cache
Dear Liu Dave,
In message
79c363b768933f4fb918025ff7eb56a...@zch01exm21.fsl.freescale.net you wrote:
That comment was on the version you posted in the NAND patch; the
lib_ppc version actually looks worse -- it tried to round
down to avoid
the issue, but it was missing a ~. Thus, it flushed everything from
address 0 to the end.
the lib_ppc version basically is as below.
void flush_cache (ulong start_addr, ulong size)
{
ulong addr, end_addr = start_addr + size;
addr = start_addr (CONFIG_SYS_CACHELINE_SIZE - 1);
for (addr = start_addr; addr end_addr; addr +=
CONFIG_SYS_CACHELINE_SIZE) {
asm (dcbst 0,%0: :r (addr));
}
}
so, you are not completely right, the flush is from start_addr.
I believe my commit log also is proper for lib_ppc version.
+ start = start_addr ~(CONFIG_SYS_CACHELINE_SIZE - 1);
+ end = (start_addr + size) ~(CONFIG_SYS_CACHELINE_SIZE - 1);
end = start_addr + size - 1;
The rounding is unnecessary for end, and without the - 1, if
start_addr
+ size is on a cacheline boundary, you'll flush one cache
line too many
(which might not be mapped, or might cause end to wrap around
to zero if
flushing at the end of the address space).
I don't see what is the problem in my patch at here.
Scott explained that instead of
end = (start_addr + size) ...
you should use
end = (start_addr + size - 1) ...
(wether or not the rounding makes sense is not really clear to me.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
The nice thing about standards is that there are so many to choose
from. - Andrew S. Tanenbaum
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Re: [U-Boot] [PATCH v4 2/3] Add support for Maxim's DS4510 I2C device
Dear Peter Tyser,
In message
300544b7901dacbe6b9e3edd052629f612b92735.1228160312.git.pty...@xes-inc.com
you wrote:
Initial support for the DS4510, a CPU supervisor with
integrated EEPROM, SRAM, and 4 programmable non-volatile
GPIO pins. The CONFIG_DS4510 define enables support
for the device while the CONFIG_CMD_DS4510 define
enables the ds4510 command. The additional
CONFIG_DS4510_INFO, CONFIG_DS4510_MEM, and
CONFIG_DS4510_RST defines add additional sub-commands
to the ds4510 command when defined.
General note: the code shows a serious lack of error detection and
error handling.
Signed-off-by: Peter Tyser pty...@xes-inc.com
---
README|4 +
drivers/misc/Makefile |1 +
drivers/misc/ds4510.c | 400
+
include/gpio/ds4510.h | 75 +
4 files changed, 480 insertions(+), 0 deletions(-)
create mode 100644 drivers/misc/ds4510.c
create mode 100644 include/gpio/ds4510.h
The driver would probably be better placed in the drivers/hwmon/
directory.
Also, I don't see a reason to create a new include/gpio/ directory
here, especially since this is not primarily a GPIO device.
diff --git a/README b/README
index bca8061..cea057d 100644
--- a/README
+++ b/README
@@ -574,6 +574,10 @@ The following options need to be configured:
CONFIG_CMD_DHCP * DHCP support
CONFIG_CMD_DIAG * Diagnostics
CONFIG_CMD_DOC * Disk-On-Chip Support
+ CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
+ CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
+ CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
+ CONFIG_CMD_DS4510_RST * ds4510 I2C rst command
Do we really need such granularity? If you have the device on your
board and suppoort it in U-Boot, you probably always want to have
CONFIG_CMD_DS4510_INFO and CONFIG_CMD_DS4510_RST. And
CONFIG_CMD_DS4510_MEM seems reduindand - that should already be
covered by the CONFIG_CMD_EEPROM setting.
diff --git a/drivers/misc/ds4510.c b/drivers/misc/ds4510.c
new file mode 100644
index 000..572dcb7
--- /dev/null
+++ b/drivers/misc/ds4510.c
...
+/*
+ * Write to DS4510, taking page boundaries into account
+ */
+int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count)
+{
+ int wrlen;
+ int i = 0;
+
+ do {
+ wrlen = DS4510_EEPROM_PAGE_SIZE -
+ DS4510_EEPROM_PAGE_OFFSET(offset);
+ if (count wrlen)
+ wrlen = count;
+ i2c_write(chip, offset, 1, buf[i], wrlen);
i2c_write() can fail - it returns error codes. I'm missing error
handling here and elsewhere. I'll flag a few locations, but please
check all the code.
+int ds4510_gpio_write(uint8_t chip, uint8_t val)
+{
+ uint8_t data;
+ int i;
+
+ for (i = 0; i DS4510_NUM_IO; i++) {
+ i2c_read(chip, DS4510_IO0 - i, 1, data, 1);
Error handling?
+ if (val (0x1 i))
+ data |= 0x1;
+ else
+ data = ~0x1;
+
+ ds4510_mem_write(chip, DS4510_IO0 - i, data, 1);
Error handling?
+int ds4510_gpio_read(uint8_t chip)
+{
+ uint8_t data;
+ int val = 0;
+ int i;
+
+ for (i = 0; i DS4510_NUM_IO; i++) {
+ i2c_read(chip, DS4510_IO0 - i, 1, data, 1);
Error handling?
+static int ds4510_info(uint8_t chip)
+{
+ int i;
+ int tmp;
+ uint8_t data;
+
+ printf(DS4510 @ 0x%x:\n\n, chip);
+
+ i2c_read(chip, DS4510_RSTDELAY, 1, data, 1);
error handling?
+ printf(rstdelay = 0x%x\n\n, data DS4510_RSTDELAY_MASK);
+
+ i2c_read(chip, DS4510_CFG, 1, data, 1);
error handling?
+/* Use 'maxargs' field as minimum number of args to ease error checking */
+cmd_tbl_t cmd_ds4510[] = {
Please do not mis-use variables with a clearly defined meaning in such
a way. This is not acceptable.
+#ifdef CONFIG_CMD_DS4510_MEM
+ ds4510 eeprom read addr off cnt\n
+ ds4510 eeprom write addr off cnt\n
+- read/write 'cnt' bytes at EEPROM offset 'off'\n
+ ds4510 seeprom read addr off cnt\n
+ ds4510 seeprom write addr off cnt\n
+- read/write 'cnt' bytes at SRAM-shadowed EEPROM offset 'off'\n
+ ds4510 sram read addr off cnt\n
+ ds4510 sram write addr off cnt\n
+- read/write 'cnt' bytes at SRAM offset 'off'\n
+#endif
We should not need a separate EEPROM command here, I think.
And cannot this SRAM be written using plain cp commands?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
For every problem there is one solution which is simple, neat, and
wrong.-
[U-Boot] question about TEXT_BASE in U-boot
Hi everyone: I am a freshman in U-boot development. My question to all expert is: I set TEXT_BASE=0xA0f0 in board/LPC2468OEM_Board/config.mk. After compile, the first instruction is: a0f0: ea14 b a0f00058 reset However there is nothing at a0f00058 after power up board, so that system hang up. (I download u-boot to ROM flash) Can anyone explain that how u-boot boot after power up and what shall I do to make u-boot work right? Thanks very much. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] question about TEXT_BASE in U-boot
Hi zhenhua: After power up board, CPU will execute the instruction store at 0x0 (ROM flash), and I download u-boot to ROM flash (start from 0x0) so that the instruction store at 0x0 is a0f0: ea14 b a0f00058 reset Then program will jump to 0xa0f00058 (SDRAM). However there shall be nothing inSDRAM, because board just powered up. I wang to know how u-boot work after power up and TEXT_BASE is in SDRAM. (My board is fresh and no bootloader in board) On Sun, 2008-12-14 at 18:26 +0800, zhenhua lin wrote: However there is nothing at a0f00058 after power up board, so that system hang up. (I download u-boot to ROM flash) Why? Do you change the map to relocate the callee? Please Check the callee whether is it at the right position. 2008/12/14 王睿 wangr.b...@gmail.com: Hi everyone: I am a freshman in U-boot development. My question to all expert is: I set TEXT_BASE=0xA0f0 in board/LPC2468OEM_Board/config.mk. After compile, the first instruction is: a0f0: ea14 b a0f00058 reset However there is nothing at a0f00058 after power up board, so that system hang up. (I download u-boot to ROM flash) Can anyone explain that how u-boot boot after power up and what shall I do to make u-boot work right? Thanks very much. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ne2000: take MAC address from config if available
Hi Wolfgang, On Sun, Dec 14, 2008 at 12:12:24PM +0100, Wolfgang Denk wrote: This adds CONFIG_NE2000_NOPROM. If set, the ethernet MAC address is taken from the environment variable 'ethaddr' and the NIC is configured accordingly. Needed for boards that don't have an EEPROM to store this setting permanently. Signed-off-by: Daniel Mack dan...@caiaq.de --- ne2000_base.c | 38 -- 1 file changed, 28 insertions(+), 10 deletions(-) Why do we need a special CONFIG_ option? is it not possible to detect (by software) that there is no EEPROM available, and auto-adjust? Hmm, what's bad about a special config variable? I agree that in general, auto-probing is a good thing, but in U-Boot with its per-board configuration file concept, I don't see much advantage. It is very unlikely that a certain board is produced with and without an EEPROM. Note that there is existing policy how to handle the situation that we have both a MAC address stored in some other storeage (like EEPROM on the NIC) and in the ethaddr environment variable (see for example drivers/net/cs8900.c). In the end, the code shall always only rely on the U-Boot environment settings. I can send a new version of this patch following this, but I wonder why such a logic has to be implemented in the ethernet drivers and did not find a well-defined place in some kind of layer all drivers make use of? Wouldn't it make more sense to put some effort in this direction? Best regards, Daniel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd_mem: Remove unused variable
Dear Peter Tyser, In message 1227549287-29241-1-git-send-email-pty...@xes-inc.com you wrote: Signed-off-by: Peter Tyser pty...@xes-inc.com --- common/cmd_mem.c |1 - 1 files changed, 0 insertions(+), 1 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Our OS who art in CPU, UNIX be thy name. Thy programs run, thy syscalls done, In kernel as it is in user! ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Fix new found CFG_
Dear Jean-Christophe PLAGNIOL-VILLARD, In message 1229246979-18348-1-git-send-email-plagn...@jcrosoft.com you wrote: Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com --- board/esd/pmc440/cmd_pmc440.c |2 +- board/xilinx/ppc405-generic/u-boot-ram.lds |2 +- board/xilinx/ppc405-generic/u-boot-rom.lds |2 +- cpu/arm926ejs/at91/usb.c |2 +- cpu/mpc86xx/release.S |2 +- include/configs/PMC440.h |8 include/configs/afeb9260.h |4 ++-- include/configs/at91cap9adk.h |2 +- include/configs/at91sam9260ek.h|2 +- include/configs/at91sam9263ek.h|2 +- 10 files changed, 14 insertions(+), 14 deletions(-) Applied - with fixes, thanks. index 0004d61..b7d7b92 100644 --- a/board/xilinx/ppc405-generic/u-boot-ram.lds +++ b/board/xilinx/ppc405-generic/u-boot-ram.lds @@ -127,7 +127,7 @@ SECTIONS *(COMMON) } - ppcenv_assert = ASSERT(. 0xB000, .bss section too big, overlaps .ppcenv section. Please update your confguration: CFG_MONITOR_BASE, CFG_MONITOR_LEN and TEXT_BASE may need to be modified.); + ppcenv_assert = ASSERT(. 0xB000, .bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified.); I also fixed the 'confguration' typo while we are at it. index d2bac9f..150a827 100644 --- a/board/xilinx/ppc405-generic/u-boot-rom.lds +++ b/board/xilinx/ppc405-generic/u-boot-rom.lds @@ -137,7 +137,7 @@ SECTIONS *(COMMON) } - ppcenv_assert = ASSERT(. 0xB000, .bss section too big, overlaps .ppcenv section. Please update your confguration: CFG_MONITOR_BASE, CFG_MONITOR_LEN and TEXT_BASE may need to be modified.); + ppcenv_assert = ASSERT(. 0xB000, .bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified.); Ditto. --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -219,8 +219,8 @@ #if !defined(CONFIG_NAND_U_BOOT) !defined(CONFIG_NAND_SPL) #define CONFIG_DDR_DATA_EYE /* use DDR2 optimization*/ #endif -#define CFG_MEM_TOP_HIDE (4 10) /* don't use last 4kbytes */ - /* 440EPx errata CHIP 11*/ +#define CONFIG_SYSY_MEM_TOP_HIDE (4 10) /* don't use last 4kbytes */ I fixed this SYSY typo as well. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de C++ was an interesting and valuable experiment, but we've learned its lessons and it's time to move on. - Peter Curran in dcqm4z@isgtec.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Fix new found CFG_
On 10:58 Sun 14 Dec , Wolfgang Denk wrote: Dear Jean-Christophe PLAGNIOL-VILLARD, In message 1229246979-18348-1-git-send-email-plagn...@jcrosoft.com you wrote: Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com --- board/esd/pmc440/cmd_pmc440.c |2 +- board/xilinx/ppc405-generic/u-boot-ram.lds |2 +- board/xilinx/ppc405-generic/u-boot-rom.lds |2 +- cpu/arm926ejs/at91/usb.c |2 +- cpu/mpc86xx/release.S |2 +- include/configs/PMC440.h |8 include/configs/afeb9260.h |4 ++-- include/configs/at91cap9adk.h |2 +- include/configs/at91sam9260ek.h|2 +- include/configs/at91sam9263ek.h|2 +- 10 files changed, 14 insertions(+), 14 deletions(-) Applied - with fixes, thanks. Tks Best Regards, J. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Added optional iteration limit for alternative memory test.
Dear Dirk Eibach,
In message 1227791865-8843-1-git-send-email-eib...@gdsys.de you wrote:
We want to use mtest for production memory test. I implemented
an iteration limit, so expect can parse the results.
mtest is definitely NOT a good enough memory test for any production
tests. You should rather use the much stronger POST memory tests (see
post/drivers/memory.c).
The iteration limit is passed to mtest as a fourth parameter:
[start [end [pattern [iterations
If no fourth parameter is supplied, there is no iteration limit and the
test will loop forever.
If you want to add this feature, then please do so for both
configuratione (with and without CONFIG_SYS_ALT_MEMTEST selected).
#if defined(CONFIG_SYS_ALT_MEMTEST)
+ if (argc 4) {
+ iteration_limit = (ulong)simple_strtoul(argv[4], NULL, 16);
+ } else {
+ iteration_limit = 0;
+ }
+
This can then be moved up intot he generic part.
U_BOOT_CMD(
+#ifdef CONFIG_SYS_ALT_MEMTEST
+ mtest,5,1, do_mem_mtest,
+ mtest - simple RAM test\n,
+ [start [end [pattern [iterations\n
+#else
mtest, 4, 1, do_mem_mtest,
mtest - simple RAM test\n,
[start [end [pattern]]]\n
+#endif /* CONFIG_SYS_ALT_MEMTEST */
And this #ifdef can be avoided alltogether.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Do you know the one -- All I ask is a tall ship, and a star to steer
her by ... You could feel the wind at your back, about you ... the
sounds of the sea beneath you. And even if you take away the wind and
the water, it's still the same. The ship is yours ... you can feel
her ... and the stars are still there.
-- Kirk, The Ultimate Computer, stardate 4729.4
___
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Re: [U-Boot] [PATCH v2] Remove unused CONFIG_ADDR_STREAMING defines
Dear Peter Tyser, In message 1228170165-22331-1-git-send-email-pty...@xes-inc.com you wrote: Signed-off-by: Peter Tyser pty...@xes-inc.com --- doah, forgot SOB include/configs/ATUM8548.h|1 - include/configs/MPC8536DS.h |1 - include/configs/MPC8540ADS.h |1 - include/configs/MPC8540EVAL.h |1 - include/configs/MPC8541CDS.h |1 - include/configs/MPC8544DS.h |1 - include/configs/MPC8548CDS.h |1 - include/configs/MPC8555CDS.h |1 - include/configs/MPC8560ADS.h |1 - include/configs/MPC8568MDS.h |1 - include/configs/MPC8572DS.h |1 - include/configs/PM854.h |1 - include/configs/PM856.h |1 - include/configs/SBC8540.h |1 - include/configs/TQM85xx.h |1 - include/configs/sbc8548.h |1 - include/configs/sbc8560.h |1 - include/configs/socrates.h|1 - include/configs/stxgp3.h |1 - include/configs/stxssa.h |1 - 20 files changed, 0 insertions(+), 20 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de egrep patterns are full regular expressions; it uses a fast determi- nistic algorithm that sometimes needs exponential space. - unix manuals ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 00/15 v6] OMAP3: Add support for some of TIs ARM-Cortex A8 OMAP3 boards
On Sun, Dec 14, 2008 at 9:47 AM, Dirk Behme dirk.be...@googlemail.com wrote: This patch series adds U-Boot v1 support for some of TI's ARM-Cortex A8 based OMAP3 boards. These are BeagleBoard [1][2], EVM [3], Overo [4], Pandora [5] and Zoom1 [6]. ... Just in case somebody likes to pull this OMAP3 patch series from git: http://www.sakoman.net/cgi-bin/gitweb.cgi?p=u-boot-omap3.git;a=shortlog;h=refs/heads/omap3-dev Thanks to Steve for this! Dirk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] timer interface
Hello I'm in the process of porting U-Boot on arm926ej-s based board and now approached to timer configuration. This is my understanding that U-Boot has its timer interface, API, which shoudl be consistently used across the boards: timer_init() / reset_timer() get_timer() / set_timer() udelay() This is what I observed in CPU-specific code. So my questions are: - I have not found out how these routines are used in ARM part of U-Boot. For instance, set_timer() defined in $(UBOOT)/cpu//arm926ejs/versatile/timer.c is not invoked anywhere. Does it mean set_timer() is not mandatory part of timer's interface? - Now, what are reset_timer_masked() and other *_masked() for? - Is it required to customize 'udelay()' routine fo revery ARM-based platform or there's a basic skeleton to use? Thanks. -- Roman Mashak ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pluto not work after log message : Errno 28: No space left on device
Hi , all :
Linux kernel 2.6.19 , klips nat-t patched
Openswan 2.4.9
pluto not work after message
2008/12/14 16:36:10 INTERNET pluto[1415]: ERROR: PROFILE_1[676]
60.166.215.36 #21071: pfkey write() of SADB_ADD message 63711 for Add SA
tun.4...@60.166.215.36 failed. Errno 28: No space left on device
I defined only on roadwarrior connection , It worked well for quit a long
time under 500 peers (Linksys box).
Now clients increased to 700 and Pluto refused to work with lots of ERROR
messages below . I “GREPED” only the first error connection for short .
It happens at rekeying period . SADB buffer overflow ? … memory leak ??
Any suggestions , Thx
/etc/ipsec.conf
version 2
config setup
interfaces=”ipsec0=eth0”
pluto=yes
plutowait=no
plutodebug=none
klipsdebug=none
uniqueids=yes
nat_traversal=no
nhelpers=0
conn%default
type=tunnel
keyingtries=0
keyexchange=ike
auto=start
authby=secret
auth=esp
ikelifetime=1h
rekeymargin=10m
rekeyfuzz=20%
keylife=8h
compress=no
conn PROFILE_1
pfs=yes
keylife=3600s
ikelifetime=86400s
ike=des-md5-modp768,des-sha1-modp768,3des-md5,3des-sha1,3des-md5
esp=3des-md5
compress=no
left=218.xx.xx.xx
leftnexthop=218.xx.xx.xx
leftsubnet=129.100.248.0/21
leftsourceip=129.100.253.50
auto=add
right=%any
rightsubnetwithin=0.0.0.0/0
#Disable Opportunistic Encryption
conn block
auto=ignore
conn private
auto=ignore
conn private-or-clear
auto=ignore
conn clear-or-private
auto=ignore
conn clear
auto=ignore
conn packetdefault
auto=ignore
Log ：
2008/12/14 15:45:26 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#18338: initiating Main Mode to replace #15846
2008/12/14 15:45:26 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#18338: You should NOT use insecure IKE algorithms (OAKLEY_DES_CBC)!
2008/12/14 15:45:26 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#18338: transition from state STATE_MAIN_I1 to state STATE_MAIN_I2
2008/12/14 15:45:26 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#18338: STATE_MAIN_I2: sent MI2, expecting MR2
2008/12/14 15:45:27 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#18338: I did not send a certificate because I do not have one.
2008/12/14 15:45:27 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#18338: transition from state STATE_MAIN_I2 to state STATE_MAIN_I3
2008/12/14 15:45:27 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#18338: STATE_MAIN_I3: sent MI3, expecting MR3
2008/12/14 15:45:27 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#18338: Main mode peer ID is ID_IPV4_ADDR: '60.166.215.36'
2008/12/14 15:45:27 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#18338: transition from state STATE_MAIN_I3 to state STATE_MAIN_I4
2008/12/14 15:45:27 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#18338: STATE_MAIN_I4: ISAKMP SA established {auth=OAKLEY_PRESHARED_KEY
cipher=oakley_des_cbc_64 prf=oakley_md5 group=modp768}
2008/12/14 15:45:27 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#18340: initiating Quick Mode PSK+ENCRYPT+TUNNEL+PFS to replace #15848
{using isakmp#18338}
2008/12/14 15:45:28 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#18340: transition from state STATE_QUICK_I1 to state STATE_QUICK_I2
2008/12/14 15:45:28 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#18340: STATE_QUICK_I2: sent QI2, IPsec SA established {ESP=0xbbe29168
0x9c158064 xfrm=3DES_0-HMAC_MD5 NATD=none DPD=none}
2008/12/14 15:50:18 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#15846: received Delete SA(0xf432d9a4) payload: deleting IPSEC State #15848
2008/12/14 15:50:18 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#15846: received and ignored informational message
2008/12/14 16:33:43 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#20930: initiating Main Mode to replace #18338
2008/12/14 16:33:44 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#20930: You should NOT use insecure IKE algorithms (OAKLEY_DES_CBC)!
2008/12/14 16:33:44 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#20930: transition from state STATE_MAIN_I1 to state STATE_MAIN_I2
2008/12/14 16:33:44 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#20930: STATE_MAIN_I2: sent MI2, expecting MR2
2008/12/14 16:33:44 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#20930: I did not send a certificate because I do not have one.
2008/12/14 16:33:44 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#20930: transition from state STATE_MAIN_I2 to state STATE_MAIN_I3
2008/12/14 16:33:44 INTERNET pluto[1415]: PROFILE_1[676] 60.166.215.36
#20930: STATE_MAIN_I3: sent MI3, expecting MR3
2008/12/14 16:33:45 INTERNET
Re: [U-Boot] [PATCH] mpc83xx: Size optimization of start.S
Hi Ron, Ron Madrid schrieb: Currently there are in excess of 100 bytes located at the beginning of the image built by start.S that are not being utilized. Hmmm, are you sure? What if someone designs a board, where the processor shall load its reset configuration from a local bus EEPROM, e.g. the same NOR-Flash containing the U-Boot image (CFG_RESET_SOURCE[0:2] = 000b? Or did I misunderstand something? Kind regards, Jens ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] question about TEXT_BASE in U-boot
wangrui wrote: After power up board, CPU will execute the instruction store at 0x0 (ROM flash), and I download u-boot to ROM flash (start from 0x0) so that the instruction store at 0x0 is a0f0: ea14 b a0f00058 reset Then program will jump to 0xa0f00058 (SDRAM)... No, it does not. b is a relative branch and causes a jump to 0xa0f00058 only if you execute it at 0xa0f0. You would make yourself a big favor by familiarizing yourself with ARM instruction set. -- Timo ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
