Re: [U-Boot] Watchdog and u-boot command prompt
Hi,
>> 'cpu/ppc4xx/serial.c'.
>There is no such file in U-Boot.
The version of the u-boot being used is 1.1.4.
The latest version of the u-boot (u-boot-2008.10) has '4xx_uart.c'
instead of 'serial.c'
> Which sort of watchdog device is used on your board?
I am using Software version of Watchdog (CONFIG_WATCHDOG).
The routines which are related to CONFIG_WATCHDOG are available in
'cpu/ppc4xx/cpu.c'.
In the file 'include/watchdog.h', it has been mentioned that:
8<--
#if defined(CONFIG_HW_WATCHDOG) && defined(CONFIG_WATCHDOG)
# error "Configuration error: CONFIG_HW_WATCHDOG and CONFIG_WATCHDOG
can't be used together."
#endif
-->8
It means I can't enable flags CONFIG_HW_WATCHDOG & CONFIG_WATCHDOG
together.
Am I missing out something?
Regards,
Sachin
-Original Message-
From: Wolfgang Denk [mailto:w...@denx.de]
Sent: Tuesday, January 13, 2009 12:44 AM
To: Sachin Rane
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] Watchdog and u-boot command prompt
Dear Sachin,
In message
<73fa539107892c4c8c7a5aca10c161c85be...@mx2.alphioncorp.local> you
wrote:
>
> I have enabled 'watchdog' in u-boot using flag 'CONFIG_WATCHDOG'.
> I wonder how the 'watchdog' gets reset when the cursor is waiting for
> user input.
>
> As per my understanding the 'WATCHDOG_RESET()' gets called in
> 'readline()' prior calling 'getc()'.
> In our case, the 'getc()' has been mapped to 'serial_getc_dev()' of
> 'cpu/ppc4xx/serial.c'.
There is no such file in U-Boot.
> The code of 'serial_getc_dev()' executes in continous loop till user
> presses a key.
> The good thing is that the boad doesn't get reboot even if user
> doesn't enter any key.
> In 'serial_getc_dev()', I don't see any call to reset the watchdog .
Hmmm... I don't know where you are looking. You say this is on ppc4xx,
so I check "cpu/ppc4xx/4xx_uart.c" - and what do I see?
480 int serial_getc_dev (unsigned long base)
481 {
482 unsigned char status = 0;
483
484 while (1) {
485 #if defined(CONFIG_HW_WATCHDOG)
486 WATCHDOG_RESET (); /* Reset HW Watchdog, if
needed */
487 #endif /* CONFIG_HW_WATCHDOG */
488
489 status = in_8((u8 *)base + UART_LSR);
...
Looks pretty much as if it was an explicit call to trigger the
watchdog...
> Can you help me to find out the how Watchdog is taken care (gets
> reset) whicle executing a infinite loop (if user doesn't press any
key) ?
> ( Note: I am not using 'CONFIG_HW_WATCHDOG' flag)
You are not? Hmmm... What makes you think you are using a watchdog then?
Which sort of watchdog device is used on your board?
Best regards,
Wolfgang Denk
--
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I
don't want to be young again, I just don't want to get any older.
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Re: [U-Boot] [PATCH] MPC8349EMDS: do not setup unused PCI clockoutputsin PCI agent mode
> Yes, there are two pci_init_board() functions in this file. > One for PCI > host mode, and one for PCI agent mode. This version only runs in agent > mode, it doesn't even get compiled in host mode. That is fine. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MPC8349EMDS: do not setup unused PCI clock outputsin PCI agent mode
On Tue, Jan 13, 2009 at 08:09:23AM +0800, Liu Dave wrote:
> > void pci_init_board(void)
> > {
> > volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
> > - volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
> > volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
> > volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[0];
> > struct pci_region *reg[] = { pci1_regions };
> >
> > - /* Enable all 8 PCI_CLK_OUTPUTS */
> > - clk->occr = 0xff00;
> > - udelay(2000);
>
> It will cause the PCI host broken. It needs case by case
>
Yes, there are two pci_init_board() functions in this file. One for PCI
host mode, and one for PCI agent mode. This version only runs in agent
mode, it doesn't even get compiled in host mode.
It should be fine in host mode.
Thanks,
Ira
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[U-Boot] 460GT PCIe configuration
Stefan et al, I am trying to troubleshoot a weird PCIe problem on a PPC460GT based target, and it is getting curiouser and curiouser. There is a tlb overlap I mentioned in an earlier email; on top of that there are some things happening in cpu/ppc4xx/4xx_pcie.c which I also find hard to understand: there is a static function pcie_get_base(), which returns a value as in address = pcie_get_base(hose, devfn) there are two instances of this, in both cases `address' is never used. The CONFIG_SYS_PCIE0_XCFGBASE constant (and its counterparts for other PCIe ports) is defined and used in the code, and gets a TLB entry assigned, but I can't find a place where it is programmed into the CPU - how does it know where this section is?! I have several different targets with different PCIe components, but all using the same base CPU subsystem design, and on some of them PCIe components misbehave, namely, PCIe memory read transactions fail with a machine check after a timeout, even though the PCIe side of things is fine (when looking with a protocol analyzer). Any insight/explanations/suggestions would be highly appreciated, TIA, vadim ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MPC8349EMDS: do not setup unused PCI clock outputsin PCI agent mode
> void pci_init_board(void)
> {
> volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
> - volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
> volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
> volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[0];
> struct pci_region *reg[] = { pci1_regions };
>
> - /* Enable all 8 PCI_CLK_OUTPUTS */
> - clk->occr = 0xff00;
> - udelay(2000);
It will cause the PCI host broken. It needs case by case
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[U-Boot] [PATCH] 83xx: PCI agent mode fixes for multi-board systems
When running a system with 2 or more MPC8349EMDS boards in PCI agent mode,
the boards will lock up the PCI bus by scanning against each other.
The boards lock against each other by trying to access the PCI bus before
clearing their configuration lock bit. Both boards end up in a loop,
sending and receiving "Target Not Ready" messages forever.
When running in PCI agent mode, the scanning now takes place after the
boards have cleared their configuration lock bit.
Also, add a missing declaration to the mpc83xx.h header file, fixing a
build warning.
Signed-off-by: Ira W. Snyder
---
cpu/mpc83xx/pci.c |5 +
include/mpc83xx.h |1 +
2 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/cpu/mpc83xx/pci.c b/cpu/mpc83xx/pci.c
index ab0760b..e9965d7 100644
--- a/cpu/mpc83xx/pci.c
+++ b/cpu/mpc83xx/pci.c
@@ -118,10 +118,12 @@ static void pci_init_bus(int bus, struct pci_region *reg)
#ifdef CONFIG_PCI_SCAN_SHOW
printf("PCI: Bus Dev VenId DevId Class Int\n");
#endif
+#ifndef CONFIG_PCISLAVE
/*
* Hose scan.
*/
hose->last_busno = pci_hose_scan(hose);
+#endif
}
/*
@@ -190,6 +192,9 @@ void mpc83xx_pcislave_unlock(int bus)
pci_hose_read_config_word (hose, dev, PCI_FUNCTION_CONFIG, ®16);
reg16 &= ~(PCI_FUNCTION_CFG_LOCK);
pci_hose_write_config_word (hose, dev, PCI_FUNCTION_CONFIG, reg16);
+
+ /* The configuration bit is now unlocked, so we can scan the bus */
+ hose->last_busno = pci_hose_scan(hose);
}
#endif
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 43553f5..e5dfe3f 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -1173,6 +1173,7 @@
#ifndef __ASSEMBLY__
struct pci_region;
void mpc83xx_pci_init(int num_buses, struct pci_region **reg, int warmboot);
+void mpc83xx_pcislave_unlock(int bus);
#endif
#endif /* __MPC83XX_H__ */
--
1.5.4.3
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[U-Boot] [PATCH] MPC8349EMDS: do not setup unused PCI clock outputs in PCI agent mode
When running in PCI agent mode, the PCI_CLK_OUT signals are not used, so do
not enable them. See the MPC8349EA Reference Manual, Section 4.4.2
"Clocking in PCI Agent Mode".
Signed-off-by: Ira W. Snyder
---
board/freescale/mpc8349emds/pci.c |7 ---
1 files changed, 0 insertions(+), 7 deletions(-)
diff --git a/board/freescale/mpc8349emds/pci.c
b/board/freescale/mpc8349emds/pci.c
index ad7bf5d..af0b1da 100644
--- a/board/freescale/mpc8349emds/pci.c
+++ b/board/freescale/mpc8349emds/pci.c
@@ -171,15 +171,10 @@ void pci_init_board(void)
void pci_init_board(void)
{
volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
- volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[0];
struct pci_region *reg[] = { pci1_regions };
- /* Enable all 8 PCI_CLK_OUTPUTS */
- clk->occr = 0xff00;
- udelay(2000);
-
/* Configure PCI Local Access Windows */
pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
@@ -187,8 +182,6 @@ void pci_init_board(void)
pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
- udelay(2000);
-
mpc83xx_pci_init(1, reg, 0);
/* Configure PCI Inbound Translation Windows (3 1MB windows) */
--
1.5.4.3
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Re: [U-Boot] Watchdog and u-boot command prompt
Dear Sachin,
In message <73fa539107892c4c8c7a5aca10c161c85be...@mx2.alphioncorp.local> you
wrote:
>
> I have enabled 'watchdog' in u-boot using flag 'CONFIG_WATCHDOG'.
> I wonder how the 'watchdog' gets reset when the cursor is waiting for
> user input.
>
> As per my understanding the 'WATCHDOG_RESET()' gets called in
> 'readline()' prior calling 'getc()'.
> In our case, the 'getc()' has been mapped to 'serial_getc_dev()' of
> 'cpu/ppc4xx/serial.c'.
There is no such file in U-Boot.
> The code of 'serial_getc_dev()' executes in continous loop till user
> presses a key.
> The good thing is that the boad doesn't get reboot even if user doesn't
> enter any key.
> In 'serial_getc_dev()', I don't see any call to reset the watchdog .
Hmmm... I don't know where you are looking. You say this is on ppc4xx,
so I check "cpu/ppc4xx/4xx_uart.c" - and what do I see?
480 int serial_getc_dev (unsigned long base)
481 {
482 unsigned char status = 0;
483
484 while (1) {
485 #if defined(CONFIG_HW_WATCHDOG)
486 WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
487 #endif /* CONFIG_HW_WATCHDOG */
488
489 status = in_8((u8 *)base + UART_LSR);
...
Looks pretty much as if it was an explicit call to trigger the
watchdog...
> Can you help me to find out the how Watchdog is taken care (gets reset)
> whicle executing a infinite loop (if user doesn't press any key) ?
> ( Note: I am not using 'CONFIG_HW_WATCHDOG' flag)
You are not? Hmmm... What makes you think you are using a watchdog then?
Which sort of watchdog device is used on your board?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
I don't want to be young again, I just don't want to get any older.
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Re: [U-Boot] [PATCH] mpc83xx: Size optimization of start.S
I haven't received any communication about this patch in a while. Is is still being looked at or did it slip through the cracks? Or did I miss an email? Let me know. Ron --- On Fri, 12/12/08, Ron Madrid wrote: > From: Ron Madrid > Subject: [PATCH] mpc83xx: Size optimization of start.S > To: u-boot@lists.denx.de > Cc: "Ron Madrid" > Date: Friday, December 12, 2008, 1:12 PM > Currently there are in excess of 100 bytes located at the > beginning of the image > built by start.S that are not being utilized. This patch > moves a few functions > into this part of the image. This will create a greater > number of *available* > bytes that can be used by board specific code in NAND > builds and will decrease > the size of the assembled code in other builds. > > Signed-off-by: Ron Madrid > --- > cpu/mpc83xx/start.S | 77 > ++- > 1 files changed, 39 insertions(+), 38 deletions(-) > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Watchdog and u-boot command prompt
Hi, I have enabled 'watchdog' in u-boot using flag 'CONFIG_WATCHDOG'. I wonder how the 'watchdog' gets reset when the cursor is waiting for user input. As per my understanding the 'WATCHDOG_RESET()' gets called in 'readline()' prior calling 'getc()'. In our case, the 'getc()' has been mapped to 'serial_getc_dev()' of 'cpu/ppc4xx/serial.c'. The code of 'serial_getc_dev()' executes in continous loop till user presses a key. The good thing is that the boad doesn't get reboot even if user doesn't enter any key. In 'serial_getc_dev()', I don't see any call to reset the watchdog . Can you help me to find out the how Watchdog is taken care (gets reset) whicle executing a infinite loop (if user doesn't press any key) ? ( Note: I am not using 'CONFIG_HW_WATCHDOG' flag) Regards, Sachin Rane ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] MPC86xx: fix build warnings
Signed-off-by: Wolfgang Denk
---
cpu/mpc86xx/cpu.c |2 +-
cpu/mpc86xx/fdt.c |2 --
2 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c
index 3568023..dc53bee 100644
--- a/cpu/mpc86xx/cpu.c
+++ b/cpu/mpc86xx/cpu.c
@@ -101,7 +101,7 @@ checkcpu(void)
if (sysinfo.freqLocalBus > LCRR_CLKDIV) {
printf("LBC:%4lu MHz\n", sysinfo.freqLocalBus / 100);
} else {
- printf("LBC: unknown (LCRR[CLKDIV] = 0x%02x)\n",
+ printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n",
sysinfo.freqLocalBus);
}
diff --git a/cpu/mpc86xx/fdt.c b/cpu/mpc86xx/fdt.c
index e277040..383b06b 100644
--- a/cpu/mpc86xx/fdt.c
+++ b/cpu/mpc86xx/fdt.c
@@ -13,8 +13,6 @@
DECLARE_GLOBAL_DATA_PTR;
-DECLARE_GLOBAL_DATA_PTR;
-
void ft_cpu_setup(void *blob, bd_t *bd)
{
#if (CONFIG_NUM_CPUS > 1)
--
1.6.0.6
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Re: [U-Boot] How can I use USB command?
Dear "A. Geisreiter", In message <200901120901.n0c91ib21...@sun1.de> you wrote: > > How can I use now the usb command? I have a usb stick with a FAT32 file Try "help usb" ? > format and an binary file on it. I will download the file to the SDRAM. How > can I do this? With the "fatload" command? > And if I enter usb start in the command line, then I get > > 1 USB device(s) found > > 0 storage device(s) found Without storage devices nothing will work, though. Seems you have a problem (but you already said you were using USB, so this is already known). > Does U-Boot support a FAT32 file format on the usb stick? Yes. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de You don't have to worry about me. I might have been born yesterday... but I stayed up all night. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Question: about uboot support SD/MMC?
On Monday 12 January 2009 01:04:43 Dennis.Yxun wrote: >I've googled, and some said upstrem was implementing the SD/MMC > framework. > So people just have to write SDIO driver. > Just wondering, is there any experimental code that i can try? it's in the last release already -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Trouble moving custom MPC8548 board to U-boot 1.3
Hi Pieter,
>I have managed to read the SPD data for the dram. I also confirmed that the
dram control and timing settings correspond to the settings that worked in
the >
>previous uboot.
So it mean that you r using a DIMM, where the configurations are available
on the EEPROM.
Make sure u've decoded those values and put in below registers
CS0_BNDS
CS1_BNDS
CS2_BNDS
CS3_BNDS
CS0_CONFIG
CS1_CONFIG
CS2_CONFIG
CS3_CONFIG
TIMING_CFG_3(EXT_REFREC)
TIMING_CFG_0
TIMING_CFG_1
TIMING_CFG_2
DDR_CFG
DDR_CFG_2
DDR_MODE
DDR_MODE_2
DDR_INTERVAL
DDR_CLK_CNTL
;DELAY 200
DDR_CFG
>I am now able to run uboot up to the "relocate_code". The new Stack pointer
is set to 0x0FF8DF58 witch is close enough to what i expected.
>This is however where the board hangs. (The board also hang when running
the "testram"). I tried reading the data at the new stack pointer but get
"SAP: read >
>access failed" i get the same error when trying to read any address within
the RAM or any address of other devices. This leads me to think that my LAW
or >
>TLB setup is incorrect.
After initializing the ram, the next thing u-boot does is relocating the
monitor code from the Flast to the ram. If this fails then it might be some
problem in accessing ram. This happens when the LAW is not properly
initialized and the memory is not mapped properly. Make sure you map ur DDR.
Thanks,
Ajeesh Kumar
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On
Behalf Of Pieter
Sent: Monday, January 12, 2009 1:45 PM
To: u-boot@lists.denx.de
Subject: [U-Boot] Trouble moving custom MPC8548 board to U-boot 1.3
Hi all,
>> I have spent quite some time trying to move from U-Boot 1.2 to a
>> newer version.. I am stuck at the initialization of the ram. The ram
>> checksum fails and gives me a "total memory of 0". (the board has
>> 512MB and work when booting uboot 1.2)
>>
>> can anyone pls. point me in the right direction?
>>
>>
> This is your root cause: Unable to get the SPD information for the
> DDR DIMM in slot 0 of controller 0.
>
> What part are you using? Does it support SPD?
> Is your I2C to it hooked up correctly?
> Can you dump the SPD information that is read?
> Does it match the part specs?
>
> HTH,
> jdl
I have managed to read the SPD data for the dram. I also confirmed that the
dram control and timing settings correspond to the settings that worked in
the previous uboot.
I am now able to run uboot up to the "relocate_code". The new Stack pointer
is set to 0x0FF8DF58 witch is close enough to what i expected.
This is however where the board hangs. (The board also hang when running the
"testram"). I tried reading the data at the new stack pointer but get "SAP:
read access failed" i get the same error when trying to read any address
within the RAM or any address of other devices. This leads me to think that
my LAW or TLB setup is incorrect.
Looking at LAW setup: (based on board sbc8548)
/* LAW(Local Access Window) configuration:
* 0x_ 0x1fff_ DDR 512M/Auto
* 0x8000_ 0xbfff_ PCI1 MEM1G
* 0xc000_ 0xcfff_ PCI1 IO 16M
* 0xe000_ 0x_ LBC 512M */
struct law_entry law_table[] = {
#ifndef CONFIG_SPD_EEPROM
SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAWAR_SIZE_512M,
LAWAR_TRGT_IF_DDR),
#endif
SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAWAR_SIZE_1G,
LAWAR_TRGT_IF_PCI1 ),
SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAWAR_SIZE_16M,
LAWAR_TRGT_IF_PCI1),
SET_LAW(CONFIG_SYS_LBC_BASE, LAWAR_SIZE_512M, LAWAR_TRGT_IF_LBC)
};
Since my board uses SPD_EEPROM, where does the LAW entry for DDR get
initilized or should the #ifndef statement be removed?
Am I on the right track to solving my problem?
thanks pieter
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Re: [U-Boot] MPC8313 with big sdram
all my other works have been done under this version, so I have no time to chage . thanks any way. Dave Liu-4 wrote: > >> u-boot-1.1.6. > > Suggest you use the latest u-boot as base, due to the u-boot/kernel > interface has much change since 1.1.6. > >> my sdram is 512MB, with CS0_BNDS,DDRLAWAR0,DDRLAWBAR0 >> modified, 256MB of >> 512MB sdram can work perfectly. >> >> Then, I defined CONFIG_VERY_BIG_RAM, 512MB can be recognized, >> but, I can >> only read and write 256MB, fault occurred when address move >> across 256MB. >> >> besides CONFIG_VERY_BIG_RAM, what else should I do to support >> big sdram? >> Thanks! > > Please check the DDR controller configuration according to your board. > Did the ROW/COL address setup correctly? > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot > > -- View this message in context: http://www.nabble.com/MPC8313-with-big-sdram-tp21410907p21411148.html Sent from the Uboot - Users mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] How can I use USB command?
Hello, I have made the following defines in the config header file: #define CONFIG_CMD_USB #define CONFIG_USB_OHCI_NEW 1 #define CFG_USB_OHCI_BOARD_INIT 1 #define CFG_USB_OHCI_MAX_ROOT_PORTS 3 #define CFG_USB_OHCI_REGS_BASE0x4C00 #define CFG_USB_OHCI_SLOT_NAME "pxa270" #define CONFIG_USB_STORAGE 1 #define CFG_USB_OHCI_CPU_INIT 1 How can I use now the usb command? I have a usb stick with a FAT32 file format and an binary file on it. I will download the file to the SDRAM. How can I do this? And if I enter usb start in the command line, then I get 1 USB device(s) found 0 storage device(s) found Does U-Boot support a FAT32 file format on the usb stick? Thank you, Andreas __ Andreas Geisreiter Entwicklung DH electronics GmbH - Am Anger 8 - 83346 Bergen - Germany HRB Traunstein 9602 - Ust ID Nr.: DE 174 205 805 Geschäftsführung Dipl.-Ing. Stefan Daxenberger, Dipl.-Ing. Helmut Henschke Email: mailto:ageisrei...@dh-electronics.de> ageisrei...@dh-electronics.de Web: www.dh-electronics.de Phone: +49 8662 4882 61 Fax: +49 8662 4882 99 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] MPC8313 with big sdram
> u-boot-1.1.6. Suggest you use the latest u-boot as base, due to the u-boot/kernel interface has much change since 1.1.6. > my sdram is 512MB, with CS0_BNDS,DDRLAWAR0,DDRLAWBAR0 > modified, 256MB of > 512MB sdram can work perfectly. > > Then, I defined CONFIG_VERY_BIG_RAM, 512MB can be recognized, > but, I can > only read and write 256MB, fault occurred when address move > across 256MB. > > besides CONFIG_VERY_BIG_RAM, what else should I do to support > big sdram? > Thanks! Please check the DDR controller configuration according to your board. Did the ROW/COL address setup correctly? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] MPC8313 with big sdram
u-boot-1.1.6. my sdram is 512MB, with CS0_BNDS,DDRLAWAR0,DDRLAWBAR0 modified, 256MB of 512MB sdram can work perfectly. Then, I defined CONFIG_VERY_BIG_RAM, 512MB can be recognized, but, I can only read and write 256MB, fault occurred when address move across 256MB. besides CONFIG_VERY_BIG_RAM, what else should I do to support big sdram? Thanks! -- View this message in context: http://www.nabble.com/MPC8313-with-big-sdram-tp21410907p21410907.html Sent from the Uboot - Users mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Trouble moving custom MPC8548 board to U-boot 1.3
Hi all,
>> I have spent quite some time trying to move from U-Boot 1.2 to a newer
>> version.. I am stuck at the initialization of the ram. The ram checksum
>> fails and gives me a "total memory of 0". (the board has 512MB and work
>> when booting uboot 1.2)
>>
>> can anyone pls. point me in the right direction?
>>
>>
> This is your root cause: Unable to get the SPD information
> for the DDR DIMM in slot 0 of controller 0.
>
> What part are you using? Does it support SPD?
> Is your I2C to it hooked up correctly?
> Can you dump the SPD information that is read?
> Does it match the part specs?
>
> HTH,
> jdl
I have managed to read the SPD data for the dram. I also confirmed that
the dram control and timing settings correspond to the settings that
worked in the previous uboot.
I am now able to run uboot up to the "relocate_code". The new Stack
pointer is set to 0x0FF8DF58 witch is close enough to what i expected.
This is however where the board hangs. (The board also hang when running
the "testram"). I tried reading the data at the new stack pointer but
get "SAP: read access failed" i get the same error when trying to read
any address within the RAM or any address of other devices. This leads
me to think that my LAW or TLB setup is incorrect.
Looking at LAW setup: (based on board sbc8548)
/* LAW(Local Access Window) configuration:
* 0x_ 0x1fff_ DDR 512M/Auto
* 0x8000_ 0xbfff_ PCI1 MEM1G
* 0xc000_ 0xcfff_ PCI1 IO 16M
* 0xe000_ 0x_ LBC 512M */
struct law_entry law_table[] = {
#ifndef CONFIG_SPD_EEPROM
SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAWAR_SIZE_512M,
LAWAR_TRGT_IF_DDR),
#endif
SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAWAR_SIZE_1G,
LAWAR_TRGT_IF_PCI1 ),
SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAWAR_SIZE_16M,
LAWAR_TRGT_IF_PCI1),
SET_LAW(CONFIG_SYS_LBC_BASE, LAWAR_SIZE_512M, LAWAR_TRGT_IF_LBC)
};
Since my board uses SPD_EEPROM, where does the LAW entry for DDR get
initilized or should the #ifndef statement be removed?
Am I on the right track to solving my problem?
thanks pieter
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