[U-Boot] arm: suen3, suen3_v1, mgcoge2_arm_p1a support

[Heiko Schocher]

This patch adds support for the Keymile SUEN3 board variants which
are based on the Marvell Kirkwood (88F6281) SoC. All variants
uses common code stored in board/keymile/km_arm/km_arm.c

mgcoge2_arm_p1a board:
This adds support for the ARM part of the mgcoge2. The suen3
target was moved to the correct suen3 p1b version. There is a
difference between the GPIO configuration between suen3 and mgcoge2.

Signed-off-by: Holger Brunck 
Signed-off-by: Stefan Roese 
Signed-off-by: Heiko Schocher 
---
 MAINTAINERS   |2 +
 MAKEALL   |4 +
 Makefile  |8 +
 board/keymile/common/common.c |   23 ++-
 board/keymile/km_arm/Makefile |   51 +
 board/keymile/km_arm/config.mk|   25 +++
 board/keymile/km_arm/km_arm.c |  345 +
 board/keymile/km_arm/sdramregs.txt|   31 +++
 board/keymile/km_arm/sdramregs_v1.txt |   28 +++
 include/configs/km-arm.h  |  192 ++
 include/configs/mgcoge2_arm_p1a.h |   93 +
 include/configs/suen3.h   |  100 ++
 include/configs/suen3_p1a.h   |   79 
 include/configs/suen3_p1b_p1c.h   |  107 ++
 14 files changed, 1084 insertions(+), 4 deletions(-)
 create mode 100644 board/keymile/km_arm/Makefile
 create mode 100644 board/keymile/km_arm/config.mk
 create mode 100644 board/keymile/km_arm/km_arm.c
 create mode 100644 board/keymile/km_arm/sdramregs.txt
 create mode 100644 board/keymile/km_arm/sdramregs_v1.txt
 create mode 100644 include/configs/km-arm.h
 create mode 100644 include/configs/mgcoge2_arm_p1a.h
 create mode 100644 include/configs/suen3.h
 create mode 100644 include/configs/suen3_p1a.h
 create mode 100644 include/configs/suen3_p1b_p1c.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 9734b1d..6ca5a21 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -385,6 +385,8 @@ Stefan Roese 

P3M750  PPC750FX/GX/GL

+   suen3   ARM926EJS (Kirkwood SoC)
+
 Yusdi Santoso 

HIDDEN_DRAGON   MPC8241/MPC8245
diff --git a/MAKEALL b/MAKEALL
index ab1bb6f..17f277b 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -554,6 +554,7 @@ LIST_ARM9=" \
da830evm\
imx27lite   \
lpd7a400\
+   mgcoge2_arm_p1a \
mv88f6281gtw_ge \
mx1ads  \
mx1fs2  \
@@ -572,6 +573,9 @@ LIST_ARM9=" \
sheevaplug  \
smdk2400\
smdk2410\
+   suen3_p1a   \
+   suen3_p1b_p1c   \
+   suen3   \
trab\
VCMA9   \
versatile   \
diff --git a/Makefile b/Makefile
index ed6156f..968d8a9 100644
--- a/Makefile
+++ b/Makefile
@@ -2934,6 +2934,9 @@ lpd7a400_config \
 lpd7a404_config:   unconfig
@$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x

+mgcoge2_arm_p1a_config: unconfig
+   @$(MKCONFIG) $(@:_config=) arm arm926ejs km_arm keymile kirkwood
+
 mv88f6281gtw_ge_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood

@@ -3023,6 +3026,11 @@ smdk2400_config  :   unconfig
 smdk2410_config:   unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 samsung s3c24x0

+suen3_config \
+suen3_p1a_config \
+suen3_p1b_p1c_config: unconfig
+   @$(MKCONFIG) $(@:_config=) arm arm926ejs km_arm keymile kirkwood
+
 SX1_stdout_serial_config \
 SX1_config:unconfig
@mkdir -p $(obj)include
diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c
index ec27bda..33857c7 100644
--- a/board/keymile/common/common.c
+++ b/board/keymile/common/common.c
@@ -35,6 +35,7 @@
 #include 
 #endif

+#include "../common/common.h"
 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
 #include 

@@ -395,7 +396,12 @@ static void setports (int gpio)
 #endif
 #endif

-#if defined(CONFIG_KM8XX)
+#if (defined(CONFIG_MACH_SUEN3) && defined(CONFIG_HARD_I2C))
+#error I2C bus resetsequence not implemented yet.
+#endif
+
+#if defined(CONFIG_KM8XX) || \
+   (defined(CONFIG_MACH_SUEN3) && defined(CONFIG_SOFT_I2C))
 static void set_sda (int state)
 {
I2C_SDA(state);
@@ -411,6 +417,12 @@ static int get_sda (void)
return I2C_READ;
 }

+#if defined(CONFIG_MACH_SUEN3)
+static int get_scl (void)
+{
+   return (kw_gpio_get_value(SUEN3_SCL_PIN) ? 1 : 0);
+}
+#else
 static int get_scl (void)
 {
int val;
@@ -421,10 +433,11 @@ static int get_scl (void)

return ((val & SCL_BIT) == SCL_BIT);
 }
+#endif

 #endif

-#if !defined(CONFIG_KMETER1)
+#if !defined(CONFIG_KMETER1) && !defined(CONFIG_SUVD3)
 static void writeStartSeq (void)
 {
set_sda (1);
@@ -483,7 +496,7 @@ static int i2c_make_abort (void)
  */
 void i2c_init_board(void)
 {
-

[U-Boot] 83xx: add support configure bus parking

[Heiko Schocher]

Add support to configure bus parking mode and master in bus arbitration
configuration (ACR). Add this for the kmeter1 port:

Configure bus arbiter with recommended values from Freescale
to improve bus latency/throughput for application with
intensive QuiccEngine activity.

Signed-off-by: Heiko Schocher 
---
 cpu/mpc83xx/cpu_init.c|   12 
 include/configs/kmeter1.h |8 
 2 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index 0d6a5fe..75b4522 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -70,6 +70,12 @@ void cpu_init_f (volatile immap_t * im)
 #ifdef CONFIG_SYS_ACR_RPTCNT /* Arbiter repeat count */
(ACR_RPTCNT << ACR_RPTCNT_SHIFT) |
 #endif
+#ifdef CONFIG_SYS_ACR_APARK/* Arbiter address parking mode */
+   (ACR_APARK << ACR_APARK_SHIFT) |
+#endif
+#ifdef CONFIG_SYS_ACR_PARKM/* Arbiter parking master */
+   (ACR_PARKM << ACR_PARKM_SHIFT) |
+#endif
0;
__be32 acr_val =
 #ifdef CONFIG_SYS_ACR_PIPE_DEP /* Arbiter pipeline depth */
@@ -78,6 +84,12 @@ void cpu_init_f (volatile immap_t * im)
 #ifdef CONFIG_SYS_ACR_RPTCNT /* Arbiter repeat count */
(CONFIG_SYS_ACR_RPTCNT << ACR_RPTCNT_SHIFT) |
 #endif
+#ifdef CONFIG_SYS_ACR_APARK/* Arbiter address parking mode */
+   (CONFIG_SYS_ACR_APARK << ACR_APARK_SHIFT) |
+#endif
+#ifdef CONFIG_SYS_ACR_PARKM/* Arbiter parking master */
+   (CONFIG_SYS_ACR_PARKM << ACR_PARKM_SHIFT) |
+#endif
0;
__be32 spcr_mask =
 #ifdef CONFIG_SYS_SPCR_OPT /* Optimize transactions between CSB and other dev 
*/
diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h
index 9a48955..71658d8 100644
--- a/include/configs/kmeter1.h
+++ b/include/configs/kmeter1.h
@@ -77,6 +77,14 @@
 #define CONFIG_SYS_IMMR0xE000

 /*
+ * Bus Arbitration Configuration Register (ACR)
+ */
+#define CONFIG_SYS_ACR_PIPE_DEP 3   /* pipeline depth 4 transactions */
+#define CONFIG_SYS_ACR_RPTCNT   3   /* 4 consecutive transactions */
+#define CONFIG_SYS_ACR_APARK0   /* park bus to master (below) */
+#define CONFIG_SYS_ACR_PARKM3   /* parking master = QuiccEngine */
+
+/*
  * DDR Setup
  */
 #define CONFIG_SYS_DDR_BASE0x /* DDR is system memory */
-- 
1.6.2.5

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
___
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[U-Boot] CRAMFS: support cramfs in RAM

[Heiko Schocher]

cramfsls and cramfsload are added to the command list.
A cramfs placed at 'cramfs_addr' can the be listed with 'cramfsls' and files
can be loaded with 'cramfsload'. 'cramfs_addr' is an environment variable
specifying the address the cramfs is located.
This works for powerpc and for ARM.

Use CONFIG_CMD_CRAMFS.

Signed-off-by: Andreas Huber 
Signed-off-by: Heiko Schocher 
---
 common/Makefile |1 +
 common/cmd_cramfs.c |  216 +++
 2 files changed, 217 insertions(+), 0 deletions(-)
 create mode 100644 common/cmd_cramfs.c

diff --git a/common/Makefile b/common/Makefile
index 7784180..038c15c 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -105,6 +105,7 @@ COBJS-$(CONFIG_CMD_IMMAP) += cmd_immap.o
 COBJS-$(CONFIG_CMD_IRQ) += cmd_irq.o
 COBJS-$(CONFIG_CMD_ITEST) += cmd_itest.o
 COBJS-$(CONFIG_CMD_JFFS2) += cmd_jffs2.o
+COBJS-$(CONFIG_CMD_CRAMFS) += cmd_cramfs.o
 COBJS-$(CONFIG_CMD_LICENSE) += cmd_license.o
 COBJS-y += cmd_load.o
 COBJS-$(CONFIG_LOGBUFFER) += cmd_log.o
diff --git a/common/cmd_cramfs.c b/common/cmd_cramfs.c
new file mode 100644
index 000..55e2d36
--- /dev/null
+++ b/common/cmd_cramfs.c
@@ -0,0 +1,216 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * based on: cmd_jffs2.c
+ *
+ * Add support for a CRAMFS located in RAM
+ */
+
+
+/*
+ * CRAMFS support
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* enable/disable debugging messages */
+#defineDEBUG_CRAMFS
+#undef DEBUG_CRAMFS
+
+#ifdef  DEBUG_CRAMFS
+# define DEBUGF(fmt, args...)  printf(fmt ,##args)
+#else
+# define DEBUGF(fmt, args...)
+#endif
+
+#ifdef CONFIG_CRAMFS_CMDLINE
+flash_info_t flash_info[1];
+
+#ifndef CONFIG_CMD_JFFS2
+#include 
+char *mkmodestr(unsigned long mode, char *str)
+{
+   static const char *l = "xwr";
+   int mask = 1, i;
+   char c;
+
+   switch (mode & S_IFMT) {
+   case S_IFDIR:str[0] = 'd'; break;
+   case S_IFBLK:str[0] = 'b'; break;
+   case S_IFCHR:str[0] = 'c'; break;
+   case S_IFIFO:str[0] = 'f'; break;
+   case S_IFLNK:str[0] = 'l'; break;
+   case S_IFSOCK:   str[0] = 's'; break;
+   case S_IFREG:str[0] = '-'; break;
+   default: str[0] = '?';
+   }
+
+   for(i = 0; i < 9; i++) {
+   c = l[i%3];
+   str[9-i] = (mode & mask)?c:'-';
+   mask = mask<<1;
+   }
+
+   if(mode & S_ISUID) str[3] = (mode & S_IXUSR)?'s':'S';
+   if(mode & S_ISGID) str[6] = (mode & S_IXGRP)?'s':'S';
+   if(mode & S_ISVTX) str[9] = (mode & S_IXOTH)?'t':'T';
+   str[10] = '\0';
+   return str;
+}
+#endif /* CONFIG_CMD_JFFS2 */
+
+extern int cramfs_check (struct part_info *info);
+extern int cramfs_load (char *loadoffset, struct part_info *info, char 
*filename);
+extern int cramfs_ls (struct part_info *info, char *filename);
+extern int cramfs_info (struct part_info *info);
+
+/***/
+/* U-boot commands*/
+/***/
+
+/**
+ * Routine implementing fsload u-boot command. This routine tries to load
+ * a requested file from cramfs filesystem at location 'cramfsaddr'.
+ * cramfsaddr is an evironment variable.
+ *
+ * @param cmdtp command internal data
+ * @param flag command flag
+ * @param argc number of arguments supplied to the command
+ * @param argv arguments list
+ * @return 0 on success, 1 otherwise
+ */
+int do_cramfs_load(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+   char *filename;
+   int size;
+   ulong offset = load_addr;
+
+   struct part_info part;
+   struct mtd_device dev;
+   struct mtdids id;
+
+   ulong addr;
+   addr = simple_strtoul(getenv("cramfsaddr"), NULL, 16);
+
+   /* hack! */
+   /* cramfs_* only supports NOR flash chips */
+   /* fake the device type */
+   id.type = MTD_DEV_TYPE_NOR;
+   id.num = 0;
+   dev.id = &id;
+   part.dev = &dev;
+   /* fake the address offset */
+   part.offset = addr - flash_info[id.num].start[0];
+
+   /* pre-set Boot file name */
+   if ((filename = getenv("bootfil

[U-Boot] powerpc: keymile boards updates

[Heiko Schocher]

- malloc size 4 MB for all keymile boards
- use generic FDT code for fixing up the DTS
- enable unit-led at startup for keymile boards
- remove some dts updates for keymile boards
- ppc_83xx, kmeter1: take FE/GbE PHYs out of reset
- ppc_83xx, kmeter1: change from Intel Strata to Spansion 64MB flash
  changed from Intel Strata to Spansion 64MB flash and changed flash layout.
+-+--+---+-+
| name| size | range | description |
+-+--+---+-+
| u-boot  |   768 KB | 0xf000-0xf00b | for u-boot  |
| env |   128 KB | 0xf00c-0xf00d | for environment |
| envred  |   128 KB | 0xf00e-0xf00f | for environment (redundant) |
| ubi0| 64512 KB | 0xf010-0xf3ff | ubi0 for ubi volumes|
+-+--+---+-+

Signed-off-by: Heiko Schocher 
---
 board/keymile/km8xx/km8xx.c  |   47 +++-
 board/keymile/kmeter1/kmeter1.c  |   50 ---
 board/keymile/mgcoge/mgcoge.c|   62 ++
 include/configs/keymile-common.h |2 +-
 include/configs/kmeter1.h|   10 --
 5 files changed, 22 insertions(+), 149 deletions(-)

diff --git a/board/keymile/km8xx/km8xx.c b/board/keymile/km8xx/km8xx.c
index ec883a4..6de2f22 100644
--- a/board/keymile/km8xx/km8xx.c
+++ b/board/keymile/km8xx/km8xx.c
@@ -147,7 +147,9 @@ phys_size_t initdram (int board_type)
 int board_early_init_r(void)
 {
/* setup the UPIOx */
-   out_8((u8 *)(CONFIG_SYS_PIGGY_BASE + 0x02), 0xc0);
+   /* General Unit Reset disabled, Flash Bank enabled, UnitLed on */
+   out_8((u8 *)(CONFIG_SYS_PIGGY_BASE + 0x02), 0xc2);
+   /* SCC4 enable, halfduplex, FCC1 powerdown, ANDI enable*/
out_8((u8 *)(CONFIG_SYS_PIGGY_BASE + 0x03), 0x35);
return 0;
 }
@@ -160,51 +162,12 @@ int hush_init_var (void)

 #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
 /*
- * update "memory" property in the blob
+ * update "brg" property in the blob
  */
 void ft_blob_update (void *blob, bd_t *bd)
 {
ulong brg_data[1] = {0};
-   ulong memory_data[2] = {0};
-   ulong *flash_data = NULL;
-   ulong flash_reg[3] = {0};
-   flash_info_t*info;
-   int len;
-   int i = 0;
-
-   memory_data[0] = cpu_to_be32 (bd->bi_memstart);
-   memory_data[1] = cpu_to_be32 (bd->bi_memsize);
-   fdt_set_node_and_value (blob, "/memory", "reg", memory_data,
-   sizeof (memory_data));
-
-   len = fdt_get_node_and_value (blob, "/localbus", "ranges",
-   (void *)&flash_data);
-
-   if (flash_data == NULL) {
-   printf ("%s: error /localbus/ranges entry\n", __FUNCTION__);
-   return;
-   }
-
-   /* update Flash addr, size */
-   while ( i < (len / 4)) {
-   switch (flash_data[i]) {
-   case 0:
-   info = flash_get_info(CONFIG_SYS_FLASH_BASE);
-   flash_data[i + 1] = 0;
-   flash_data[i + 2] = cpu_to_be32 (CONFIG_SYS_FLASH_BASE);
-   flash_data[i + 3] = cpu_to_be32 (info->size);
-   break;
-   default:
-   break;
-   }
-   i += 4;
-   }
-   fdt_set_node_and_value (blob, "/localbus", "ranges", flash_data,
-   len);
-
-   flash_reg[2] = cpu_to_be32 (bd->bi_flashsize);
-   fdt_set_node_and_value (blob, "/localbus/fl...@0,0", "reg", flash_reg,
-   sizeof (flash_reg));
+
/* BRG */
brg_data[0] = cpu_to_be32 (bd->bi_busfreq);
fdt_set_node_and_value (blob, "/soc/cpm", "brg-frequency", brg_data,
diff --git a/board/keymile/kmeter1/kmeter1.c b/board/keymile/kmeter1/kmeter1.c
index fa2f1cf..bbcaf5d 100644
--- a/board/keymile/kmeter1/kmeter1.c
+++ b/board/keymile/kmeter1/kmeter1.c
@@ -99,6 +99,10 @@ int board_early_init_r (void)
}
/* enable the PHY on the PIGGY */
setbits (8, (void *)(CONFIG_SYS_PIGGY_BASE + 0x10003), 0x01);
+   /* enable the Unit LED (green) */
+   setbits (8, (void *)(CONFIG_SYS_PIGGY_BASE + 0x2), 0x01);
+   /* take FE/GbE PHYs out of reset */
+   setbits (8, (void *)(CONFIG_SYS_PIGGY_BASE + 0xf), 0x1c);

return 0;
 }
@@ -188,53 +192,11 @@ int checkboard (void)

 #if defined(CONFIG_OF_BOARD_SETUP)
 /*
- * update "/localbus/ranges" property in the blob
+ * update property in the blob
  */
 void ft_blob_update (void *blob, bd_t *bd)
 {
-   ulong   *flash_data = NULL;
-   flash_info_t*info;
-   ulong   flash_reg[6] = {0};
-   int len;
-   int size = 0;
-   int i = 0;
-
-

[U-Boot] [PATCH 2/2] env, eeprom: add redundant environment support

[Heiko Schocher]

Add redundant environment support for environment lying on a EEPROM.

Tested on uppcoming suen3 support

Signed-off-by: Andreas Huber 
---
 common/env_eeprom.c |  131 +--
 1 files changed, 127 insertions(+), 4 deletions(-)

diff --git a/common/env_eeprom.c b/common/env_eeprom.c
index 30de4e9..a4f0a45 100644
--- a/common/env_eeprom.c
+++ b/common/env_eeprom.c
@@ -32,6 +32,11 @@
 #include 
 #endif

+#ifdef CONFIG_ENV_OFFSET_REDUND
+#define ACTIVE_FLAG   1
+#define OBSOLETE_FLAG 0
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;

 env_t *env_ptr = NULL;
@@ -93,9 +98,15 @@ static int eeprom_bus_write (unsigned dev_addr, unsigned 
offset, uchar *buffer,
 uchar env_get_char_spec (int index)
 {
uchar c;
+   unsigned int off;
+   off = CONFIG_ENV_OFFSET;
+#ifdef CONFIG_ENV_OFFSET_REDUND
+   if (gd->env_valid == 2)
+   off = CONFIG_ENV_OFFSET_REDUND;
+#endif

eeprom_bus_read (CONFIG_SYS_DEF_EEPROM_ADDR,
-CONFIG_ENV_OFFSET+index+offsetof(env_t,data),
+off + index + offsetof(env_t,data),
 &c, 1);

return (c);
@@ -103,18 +114,52 @@ uchar env_get_char_spec (int index)

 void env_relocate_spec (void)
 {
+   unsigned int off = CONFIG_ENV_OFFSET;
+#ifdef CONFIG_ENV_OFFSET_REDUND
+   if (gd->env_valid == 2)
+   off = CONFIG_ENV_OFFSET_REDUND;
+#endif
eeprom_bus_read (CONFIG_SYS_DEF_EEPROM_ADDR,
-CONFIG_ENV_OFFSET,
+off,
 (uchar*)env_ptr,
 CONFIG_ENV_SIZE);
 }

 int saveenv(void)
 {
-   return eeprom_bus_write (CONFIG_SYS_DEF_EEPROM_ADDR,
-CONFIG_ENV_OFFSET,
+   int rc;
+   unsigned int off = CONFIG_ENV_OFFSET;
+#ifdef CONFIG_ENV_OFFSET_REDUND
+   unsigned int off_red = CONFIG_ENV_OFFSET_REDUND;
+   char flag_obsolete = OBSOLETE_FLAG;
+   if (gd->env_valid == 1) {
+   off = CONFIG_ENV_OFFSET_REDUND;
+   off_red = CONFIG_ENV_OFFSET;
+   }
+
+   env_ptr->flags = ACTIVE_FLAG;
+#endif
+
+   rc = eeprom_bus_write (CONFIG_SYS_DEF_EEPROM_ADDR,
+off,
 (uchar *)env_ptr,
 CONFIG_ENV_SIZE);
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+   if (rc == 0) {
+   eeprom_bus_write (CONFIG_SYS_DEF_EEPROM_ADDR,
+ off_red + offsetof(env_t,flags),
+ (uchar *)&flag_obsolete,
+ 1);
+   if (gd->env_valid == 1)
+   gd->env_valid = 2;
+   else
+   gd->env_valid = 1;
+
+   }
+#endif
+
+   return rc;
 }

 /
@@ -123,6 +168,82 @@ int saveenv(void)
  * We are still running from ROM, so data use is limited
  * Use a (moderately small) buffer on the stack
  */
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+int env_init(void)
+{
+   ulong len;
+   ulong crc[2], crc_tmp;
+   unsigned int off, off_env[2];
+   uchar buf[64];
+   int crc_ok[2] = {0,0};
+   unsigned char flags[2];
+   int i;
+
+   eeprom_init (); /* prepare for EEPROM read/write */
+
+   off_env[0] = CONFIG_ENV_OFFSET;
+   off_env[1] = CONFIG_ENV_OFFSET_REDUND;
+
+   for (i = 0; i < 2; i++) {
+   /* read CRC */
+   eeprom_bus_read (CONFIG_SYS_DEF_EEPROM_ADDR,
+   off_env[i] + offsetof(env_t,crc),
+   (uchar *)&crc[i], sizeof(ulong));
+   /* read FLAGS */
+   eeprom_bus_read (CONFIG_SYS_DEF_EEPROM_ADDR,
+   off_env[i] + offsetof(env_t,flags),
+   (uchar *)&flags[i], sizeof(uchar));
+
+   crc_tmp= 0;
+   len = ENV_SIZE;
+   off = off_env[i] + offsetof(env_t,data);
+   while (len > 0) {
+   int n = (len > sizeof(buf)) ? sizeof(buf) : len;
+
+   eeprom_bus_read (CONFIG_SYS_DEF_EEPROM_ADDR, off,
+   buf, n);
+
+   crc_tmp = crc32 (crc_tmp, buf, n);
+   len -= n;
+   off += n;
+   }
+   if (crc_tmp == crc[i])
+   crc_ok[i] = 1;
+   }
+
+   if (!crc_ok[0] && !crc_ok[1]) {
+   gd->env_addr  = 0;
+   gd->env_valid = 0;
+
+   return 0;
+   } else if (crc_ok[0] && !crc_ok[1]) {
+   gd->env_valid = 1;
+   }
+   else if (!crc_ok[0] && crc_ok[1]) {
+   gd->env_valid = 2;
+   } else {
+   /* both ok - check serial */
+   if (flags[0] == ACTIVE_FLAG && flags[1] == OBSOLETE_FLAG)
+   gd->env_valid = 1;
+   else if (flags[0] == OBSOLETE_FLAG && fl

[U-Boot] [PATCH 1/2] cmd_eeprom: I2C updates

[Heiko Schocher]

- CONFIG_ENV_EEPROM_IS_ON_I2C
  define this, if you have I2C and SPI activated, and your
  EEPROM, which holds the environment, is on the I2C bus.

- CONFIG_I2C_ENV_EEPROM_BUS
  if you have an Environment on an EEPROM reached over
  I2C muxes, you can now define, how to reach this
  EEPROM.

Signed-off-by: Heiko Schocher 
---
 README  |   13 ++
 common/cmd_eeprom.c |   14 ++
 common/env_eeprom.c |   66 +++
 include/common.h|2 +
 4 files changed, 84 insertions(+), 11 deletions(-)

diff --git a/README b/README
index 22e35c3..7affe10 100644
--- a/README
+++ b/README
@@ -2447,6 +2447,19 @@ to save the current settings.
- CONFIG_SYS_EEPROM_SIZE:
  The size in bytes of the EEPROM device.

+   - CONFIG_ENV_EEPROM_IS_ON_I2C
+ define this, if you have I2C and SPI activated, and your
+ EEPROM, which holds the environment, is on the I2C bus.
+
+   - CONFIG_I2C_ENV_EEPROM_BUS
+ if you have an Environment on an EEPROM reached over
+ I2C muxes, you can define here, how to reach this
+ EEPROM. For example:
+
+ #define CONFIG_I2C_ENV_EEPROM_BUS   "pca9547:70:d\0"
+
+ EEPROM which holds the environment, is reached over
+ a pca9547 i2c mux with address 0x70, channel 3.

 - CONFIG_ENV_IS_IN_DATAFLASH:

diff --git a/common/cmd_eeprom.c b/common/cmd_eeprom.c
index 102efaf..519b510 100644
--- a/common/cmd_eeprom.c
+++ b/common/cmd_eeprom.c
@@ -79,7 +79,7 @@ int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char 
*argv[])
ulong cnt  = simple_strtoul (argv[4], NULL, 16);
 #endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */

-# ifndef CONFIG_SPI
+# if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
eeprom_init ();
 # endif /* !CONFIG_SPI */

@@ -118,7 +118,7 @@ int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char 
*argv[])
  *   0x0nxx for EEPROM address selectors and page number at n.
  */

-#ifndef CONFIG_SPI
+#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
 #if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || CONFIG_SYS_I2C_EEPROM_ADDR_LEN 
< 1 || CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2
 #error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
 #endif
@@ -176,7 +176,7 @@ int eeprom_read (unsigned dev_addr, unsigned offset, uchar 
*buffer, unsigned cnt
len = maxlen;
 #endif

-#ifdef CONFIG_SPI
+#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
spi_read (addr, alen, buffer, len);
 #else
if (i2c_read (addr[0], offset, alen-1, buffer, len) != 0)
@@ -272,7 +272,7 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar 
*buffer, unsigned cn
len = maxlen;
 #endif

-#ifdef CONFIG_SPI
+#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
spi_write (addr, alen, buffer, len);
 #else
 #if defined(CONFIG_SYS_EEPROM_X40430)
@@ -374,7 +374,7 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar 
*buffer, unsigned cn
return rcode;
 }

-#ifndef CONFIG_SPI
+#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
 int
 eeprom_probe (unsigned dev_addr, unsigned offset)
 {
@@ -403,7 +403,8 @@ eeprom_probe (unsigned dev_addr, unsigned offset)

 void eeprom_init  (void)
 {
-#if defined(CONFIG_SPI)
+
+#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
spi_init_f ();
 #endif
 #if defined(CONFIG_HARD_I2C) || \
@@ -411,6 +412,7 @@ void eeprom_init  (void)
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 #endif
 }
+
 /*---
  */

diff --git a/common/env_eeprom.c b/common/env_eeprom.c
index 1578d61..30de4e9 100644
--- a/common/env_eeprom.c
+++ b/common/env_eeprom.c
@@ -28,18 +28,73 @@
 #include 
 #include 
 #include 
+#if defined(CONFIG_I2C_ENV_EEPROM_BUS)
+#include 
+#endif

 DECLARE_GLOBAL_DATA_PTR;

 env_t *env_ptr = NULL;

 char * env_name_spec = "EEPROM";
+int env_eeprom_bus = -1;
+
+static int eeprom_bus_read (unsigned dev_addr, unsigned offset, uchar *buffer,
+   unsigned cnt)
+{
+   int rcode;
+#if defined(CONFIG_I2C_ENV_EEPROM_BUS)
+   int old_bus = i2c_get_bus_num();
+
+   if (gd->flags & GD_FLG_RELOC) {
+   if (env_eeprom_bus == -1) {
+   I2C_MUX_DEVICE *dev = NULL;
+   dev = i2c_mux_ident_muxstring(
+   (uchar *)CONFIG_I2C_ENV_EEPROM_BUS);
+   if (dev != NULL) {
+   env_eeprom_bus = dev->busid;
+   } else
+   printf ("error adding env eeprom bus.\n");
+   }
+   if (old_bus != env_eeprom_bus) {
+   i2c_set_bus_num(env_eeprom_bus);
+   old_bus = env_eeprom_bus;
+   }
+   } el

Re: [U-Boot] TI:OMAP: [PATCH 4/4] Enable I2C bus switching

[Heiko Schocher]

Hello Khasim Syed,

Khasim Syed Mohammed wrote:
>>From 3aa4b510a95b5313dc103c286eea44a6054b67d4 Mon Sep 17 00:00:00 2001
> From: Syed Mohammed Khasim 
> Date: Tue, 5 Jan 2010 20:52:36 +0530
> Subject: [PATCH] Enable I2C bus switching
> 
> OMAP3 supports Multiple I2C channels, this patch allows
> us to use i2c dev  command to switch between busses.
> 
> Signed-off-by: Syed Mohammed Khasim 

Acked-by: Heiko Schocher 

Sandeep, as this is a patchseries, which should go through your
repo, can you pick up this patch?

bye
Heiko
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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[U-Boot] [PATCH 1/2] fsl_esdhc: fix wrong clock mask

[Li Yang]

Fix typo in SYSCTL_CLOCK_MASK, which caused residual in high bits of SDCLKFS.

Signed-off-by: Jin Qing 
Signed-off-by: Li Yang 
---
 include/fsl_esdhc.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index 13ff652..caa784f 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -32,7 +32,7 @@
 #define SYSCTL 0x0002e02c
 #define SYSCTL_INITA   0x0800
 #define SYSCTL_TIMEOUT_MASK0x000f
-#define SYSCTL_CLOCK_MASK  0x0fff
+#define SYSCTL_CLOCK_MASK  0xfff0
 #define SYSCTL_PEREN   0x0004
 #define SYSCTL_HCKEN   0x0002
 #define SYSCTL_IPGEN   0x0001
-- 
1.6.6-rc1.GIT

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[U-Boot] [PATCH 2/2] p2020ds: use maximum timeout for esdhc

[Li Yang]

From: Jin Qing 

Use timeout value to maximum due to hardware problem.  The hardware may take 
longer
to timeout, but it's much better than having a too-short timeout value.

Signed-off-by: Jin Qing 
Signed-off-by: Li Yang 
---
 drivers/mmc/fsl_esdhc.c   |4 
 include/configs/P2020DS.h |1 +
 2 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 4a86365..d30e15a 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -202,6 +202,10 @@ static int esdhc_setup_data(struct mmc *mmc, struct 
mmc_data *data)
if (timeout < 0)
timeout = 0;
 
+#ifdef CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
+   timeout = 14;
+#endif
+
clrsetbits_be32(®s->sysctl, SYSCTL_TIMEOUT_MASK, timeout << 16);
 
return 0;
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index 577d2b5..9bdc9c5 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -714,6 +714,7 @@ extern unsigned long calculate_board_ddr_clk(unsigned long 
dummy);
 #ifdef CONFIG_MMC
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR  CONFIG_SYS_MPC85xx_ESDHC_ADDR
+#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
 #define CONFIG_CMD_MMC
 #define CONFIG_GENERIC_MMC
 #define CONFIG_CMD_EXT2
-- 
1.6.6-rc1.GIT

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[U-Boot] MPC8315 uboot hangs on relocation

[Sureshkumar Nagarathinam]

Hi All, 

I am porting the u-boot for a  customized board based on MPC8315 processor. It 
has DDR2 SDRAM of 128 MB & 8 MB of flash.  I found that the code hangs during 
the relocation of the code, exactly in the following line  (@ relocation 
function in cpu/mpc83xx/start.S) 
 lwz  r5, GOT(__bss_start) 

Since the board has only 8MB of flash, I have modified the the TEXT_BASE to 
0xFFF8(as against 0xFE00).  I am able to access the DDR2 SDRAM(whole 
128MB) , I tested it by writing & reading the patterns 0x & 
0x5, So  I assumed the DDR2 SDRAM timing are proper. 

I would like to know the following 
1. What does the 'GOT(__bss_start) do?
2. Do I have to change the linker script since I have changed the TEXT_BASE? 
3. Is there any other cause for hanging?

Thank you in advance for helping
Regards,
Suresh


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[U-Boot] [PATCH] PCIe, USB: Replace 'end point' references with 'endpoint'

[Peter Tyser]

When referring to PCIe and USB 'endpoint' is the standard naming
convention.

Signed-off-by: Peter Tyser 
---
I could only take so much of seeing "End Point" on every bootup before
I cracked:)

 board/amcc/yucca/yucca.c  |2 +-
 board/atum8548/atum8548.c |2 +-
 board/freescale/mpc8536ds/mpc8536ds.c |6 +++---
 board/freescale/mpc8544ds/mpc8544ds.c |6 +++---
 board/freescale/mpc8548cds/mpc8548cds.c   |2 +-
 board/freescale/mpc8568mds/mpc8568mds.c   |2 +-
 board/freescale/mpc8569mds/mpc8569mds.c   |2 +-
 board/freescale/mpc8572ds/mpc8572ds.c |6 +++---
 board/freescale/mpc8610hpcd/mpc8610hpcd.c |4 ++--
 board/freescale/p1_p2_rdb/pci.c   |4 ++--
 board/freescale/p2020ds/p2020ds.c |6 +++---
 board/tqc/tqm85xx/tqm85xx.c   |2 +-
 board/xes/common/fsl_8xxx_pci.c   |6 +++---
 cpu/ppc4xx/4xx_pcie.c |4 ++--
 drivers/usb/musb/musb_core.h  |2 +-
 include/usb/ehci-fsl.h|   24 
 16 files changed, 40 insertions(+), 40 deletions(-)

diff --git a/board/amcc/yucca/yucca.c b/board/amcc/yucca/yucca.c
index 67a0167..8c65cfb 100644
--- a/board/amcc/yucca/yucca.c
+++ b/board/amcc/yucca/yucca.c
@@ -609,7 +609,7 @@ int board_pcie_card_present(int port)
 /*
  * For the given slot, set endpoint mode, send power to the slot,
  * turn on the green LED and turn off the yellow LED, enable the
- * clock. In end point mode reset bit is read only.
+ * clock. In endpoint mode reset bit is read only.
  */
 void board_pcie_setup_port(int port, int rootpoint)
 {
diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c
index a220ad4..1c73e60 100644
--- a/board/atum8548/atum8548.c
+++ b/board/atum8548/atum8548.c
@@ -208,7 +208,7 @@ pci_init_board(void)
 
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
printf ("\nPCIE1 connected to slot as %s (base address %x)",
-   pcie_ep ? "End Point" : "Root Complex",
+   pcie_ep ? "Endpoint" : "Root Complex",
(uint)pci);
if (pci->pme_msg_det) {
pci->pme_msg_det = 0x;
diff --git a/board/freescale/mpc8536ds/mpc8536ds.c 
b/board/freescale/mpc8536ds/mpc8536ds.c
index da72916..5f4c3bb 100644
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -222,7 +222,7 @@ pci_init_board(void)
 
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
printf ("\nPCIE3 connected to Slot3 as %s (base address 
%x)",
-   pcie_ep ? "End Point" : "Root Complex",
+   pcie_ep ? "Endpoint" : "Root Complex",
(uint)pci);
if (pci->pme_msg_det) {
pci->pme_msg_det = 0x;
@@ -271,7 +271,7 @@ pci_init_board(void)
 
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
printf ("\nPCIE1 connected to Slot1 as %s (base address 
%x)",
-   pcie_ep ? "End Point" : "Root Complex",
+   pcie_ep ? "Endpoint" : "Root Complex",
(uint)pci);
if (pci->pme_msg_det) {
pci->pme_msg_det = 0x;
@@ -328,7 +328,7 @@ pci_init_board(void)
 
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
printf ("\nPCIE2 connected to Slot 2 as %s (base address 
%x)",
-   pcie_ep ? "End Point" : "Root Complex",
+   pcie_ep ? "Endpoint" : "Root Complex",
(uint)pci);
if (pci->pme_msg_det) {
pci->pme_msg_det = 0x;
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c 
b/board/freescale/mpc8544ds/mpc8544ds.c
index 244a197..53baf98 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -131,7 +131,7 @@ pci_init_board(void)
 
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
printf ("\nPCIE3 connected to ULI as %s (base address %x)",
-   pcie_ep ? "End Point" : "Root Complex",
+   pcie_ep ? "Endpoint" : "Root Complex",
(uint)pci);
if (pci->pme_msg_det) {
pci->pme_msg_det = 0x;
@@ -194,7 +194,7 @@ pci_init_board(void)
 
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
printf ("\nPCIE1 connected to Slot2 as %s (base address 
%x)",
-   pcie_ep ? "End Point" : "Root Complex",
+   pcie_ep ? "Endpoint" : "Root Complex",
(uint)pci);
if (pci->pme_msg_det) {
pci->pme_msg_det = 0x;
@@ -252,7 +252,7 @@ pci_init_board(void)
 
if 

Re: [U-Boot] Breakage on arm/next

[Scott Wood]

On Mon, Dec 21, 2009 at 04:30:40PM +0530, apgmoorthy wrote:
> Hunk 1:
> env_addr += CONFIG_ENV_ADDR & (onenand_mtd.eraseregions[0].erasesize-1);
> 
> Hunk 2:
> env_addr += CONFIG_ENV_ADDR & (onenand_mtd.eraseregions[0].erasesize-1);

I'd say it should be the board config file's responsibility to provide a
CONFIG_ENV_ADDR that is properly block-aligned, regardless of what sort of
flash it's using.

> instr.len = onenand_mtd.eraseregions[0].erasesize;

It's unlikely at these block sizes, but theoretically the environment could
span multiple erase blocks.

Again, the board config file should supply a suitable CONFIG_ENV_SIZE.

-Scott
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Re: [U-Boot] [PATCHv2] onenand: Fix compile errors due to FlexOneNAND

[Scott Wood]

On Fri, Dec 18, 2009 at 08:04:55AM -0600, Tom wrote:
> Sanjeev Premi wrote:
> > This patch fixes the compile error while trying to
> > compile for omap3evm.
> > 
> > env_onenand.c: In function 'env_relocate_spec':
> > env_onenand.c:70: error: 'CONFIG_ENV_ADDR_FLEX' undeclared
> >  (first use in this function)
> > env_onenand.c:70: error: (Each undeclared identifier is re
> > ported only once
> > env_onenand.c:70: error: for each function it appears in.)
> > env_onenand.c: In function 'saveenv':
> > env_onenand.c:106: error: 'CONFIG_ENV_ADDR_FLEX' undeclare
> > d (first use in this function)
> > env_onenand.c:107: error: 'CONFIG_ENV_SIZE_FLEX' undeclare
> > d (first use in this function)
> > 
> > Signed-off-by: Sanjeev Premi 
> 
> Ack-ed
> Thank you,
> Tom

Applied to u-boot-nand-flash.

-Scott
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Re: [U-Boot] [PATCH v2] Davinci: davinci_nand.c performance enhancments

[Scott Wood]

On Wed, Dec 16, 2009 at 11:15:58AM +, Nick Thompson wrote:
> Introduces various optimisations that approximately triple the
> read data rate from NAND when run on da830evm.
> 
> Most of these optimisations depend on the endianess of the machine
> and most of them are very similar to optimisations already present
> in the Linux Kernel.
> 
> Signed-off-by: Nick Thompson 
> ---
> Changes:
>   Cleaned up based on Scott Wood's comments:
>   read/write_buf slightly faster and catches more cases.
>   Removed unnecessary and/or badly named variables.
> 
>  drivers/mtd/nand/davinci_nand.c |  200 
> ---
>  1 files changed, 146 insertions(+), 54 deletions(-)

Applied to u-boot-nand-flash.

-Scott
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[U-Boot] [PATCH 2/3] Add ppc440epx USB ehci support.

[Chris Zhang]

Currently ppc440epx uses OHCI for USB full-speed support. This change adds
support for EHCI.

Signed-off-by: Chris Zhang 
---
 drivers/usb/host/Makefile  |1 +
 drivers/usb/host/ehci-ppc4xx.c |   48 
 2 files changed, 49 insertions(+), 0 deletions(-)
 create mode 100644 drivers/usb/host/ehci-ppc4xx.c

diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 940d4a8..255679a 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -36,6 +36,7 @@ COBJS-$(CONFIG_USB_SL811HS) += sl811-hcd.o
 # echi
 COBJS-$(CONFIG_USB_EHCI) += ehci-hcd.o
 COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o
+COBJS-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
 COBJS-$(CONFIG_USB_EHCI_IXP4XX) += ehci-ixp.o
 COBJS-$(CONFIG_USB_EHCI_KIRKWOOD) += ehci-kirkwood.o
 COBJS-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
diff --git a/drivers/usb/host/ehci-ppc4xx.c b/drivers/usb/host/ehci-ppc4xx.c
new file mode 100644
index 000..966a629
--- /dev/null
+++ b/drivers/usb/host/ehci-ppc4xx.c
@@ -0,0 +1,48 @@
+/*
+ * (C) Copyright 2010, Chris Zhang 
+ *
+ * Author: Chris Zhang 
+ * This code is based on ehci freescale driver
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include 
+#include 
+
+#include "ehci.h"
+#include "ehci-core.h"
+
+/*
+ * Create the appropriate control structures to manage
+ * a new EHCI host controller.
+ */
+int ehci_hcd_init(void)
+{
+   hccr = (struct ehci_hccr *)(CONFIG_SYS_PPC4XX_USB_ADDR);
+   hcor = (struct ehci_hcor *)((uint32_t) hccr + 
+   HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+   usb_dev_init();
+   return 0;
+}
+
+/*
+ * Destroy the appropriate control structures corresponding
+ * the the EHCI host controller.
+ */
+int ehci_hcd_stop(void)
+{
+   return 0;
+}
-- 
1.5.5

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[U-Boot] [PATCH 3/3] Adds EHCI definitions to sequoia board configuration file.

[Chris Zhang]

Adds required definitions for EHCI support in sequoia configuration file.
But still keeps the OHCI as default driver.

Signed-off-by: Chris Zhang 
---
 include/configs/sequoia.h |   16 +++-
 1 files changed, 15 insertions(+), 1 deletions(-)

diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 5788d58..568d9fc 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -282,8 +282,20 @@
 
 /* USB */
 #ifdef CONFIG_440EPX
+
+#undef CONFIG_USB_EHCI /* OHCI by default */
+
+#ifdef CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_PPC4XX
+#define CONFIG_SYS_PPC4XX_USB_ADDR 0xe300
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#define CONFIG_EHCI_MMIO_BIG_ENDIAN
+#define CONFIG_EHCI_DESC_BIG_ENDIAN
+#ifdef CONFIG_4xx_DCACHE
+#define CONFIG_EHCI_DCACHE
+#endif
+#else /* CONFIG_USB_EHCI */
 #define CONFIG_USB_OHCI_NEW
-#define CONFIG_USB_STORAGE
 #define CONFIG_SYS_OHCI_BE_CONTROLLER
 
 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
@@ -291,7 +303,9 @@
 #define CONFIG_SYS_USB_OHCI_REGS_BASE  CONFIG_SYS_USB_HOST
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME  "ppc440"
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
+#endif
 
+#define CONFIG_USB_STORAGE
 /* Comment this out to enable USB 1.1 device */
 #define USB_2_0_DEVICE
 
-- 
1.5.5

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[U-Boot] [PATCH 1/3] Fix EHCI port reset.

[Chris Zhang]

In USB ehci driver, the port reset is not terminated. EHCI spec says "A host
 controller must terminate the reset and stabilize the state of the port within
 2 milliseconds". Without termination, a port stays at reset state. This is
 observed on ppc4xx(sequoia) boards.

Signed-off-by: Chris Zhang 
---
 drivers/usb/host/ehci-hcd.c |3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index ba85991..9ebeb4f 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -708,6 +708,9 @@ ehci_submit_root(struct usb_device *dev, unsigned long 
pipe, void *buffer,
 * root
 */
wait_ms(50);
+   /* terminate the reset */
+   ehci_writel(status_reg, reg & ~EHCI_PS_PR);
+   wait_ms(2);
portreset |= 1 << le16_to_cpu(req->index);
}
break;
-- 
1.5.5

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[U-Boot] [PATCH 0/3] PPC440EPX(sequoia) USB EHCI support.

[Chris Zhang]

This patch adds echi support for ppc440epx(sequoia board). Also a
fix for ECHI host controller port reset.

Chris

Chris Zhang (3):
  Fix EHCI port reset.
  Add ppc440epx USB ehci support.
  Adds EHCI definitions to sequoia board configuration file.

 drivers/usb/host/Makefile  |1 +
 drivers/usb/host/ehci-hcd.c|3 ++
 drivers/usb/host/ehci-ppc4xx.c |   48 
 include/configs/sequoia.h  |   16 -
 4 files changed, 67 insertions(+), 1 deletions(-)
 create mode 100644 drivers/usb/host/ehci-ppc4xx.c

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Re: [U-Boot] [PATCH 2/4] Use LINK_OFF to access global data

[Scott Wood]

Joakim Tjernlund wrote:
> 
> u-boot-boun...@lists.denx.de wrote on 05/01/2010 21:20:32:
> 
>> From: Scott Wood 
>> To: Albert ARIBAUD 
>> Cc: u-boot@lists.denx.de
>> Date: 05/01/2010 21:22
>> Subject: Re: [U-Boot] [PATCH 2/4] Use LINK_OFF to access global data
>> Sent by: u-boot-boun...@lists.denx.de
>>
>> On Sun, Jan 03, 2010 at 09:06:51PM +0100, Albert ARIBAUD wrote:
>>> Hmm... PIC is interesting only if you want the same binary to run from
>>> two places, like NOR then RAM, which is the case when U-boot is the code
>>> which gets run in NOR at power-up and ends up running in RAM later.
>>>
>>> For NAND-based boards, the NAND bootloader will load U-boot to RAM, and
>>> U-boot will never run from anywhere else but its intended RAM location.
>> Note that the first-stage NAND loader still needs to be able to relocate
>> itself to RAM in order to free up the NAND buffer for loading more data.
> 
> Hmm, does that mean that the LINK_OFF patches are useful to you or not?

I was just responding to a suggestion that a split similar to the NAND 
loader might eliminate the need for relocation/PIC support.

I am a bit nervous about this stuff, though -- why is it needed?  We 
just got rid of the need for manual relocations, and now we're adding 
them back (pre-reloc instead of post-reloc). :-(

-Scott
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[U-Boot] ARM pull request

[Tom]

Wolfgang,
Please pull these changes from arm/master.
Tom

The following changes since commit 87d93a1ba2ae23550e1370adb7a3b00af0831165:
   Wolfgang Wegner (1):
 move prototypes for gunzip() and zunzip() to common.h

are available in the git repository at:

   git://git.denx.de/u-boot-arm master

Grazvydas Ignotas (2):
   TWL4030: make LEDs selectable for twl4030_led_init()
   pandora: don't enable VAUX3, VDAC and VPLL2 regulators

Nick Thompson (3):
   Davinci: Table driven pinmux configuration
   Davinci: Configurable NAND chip selects
   Davinci: NAND enable ECC even when not in NAND boot mode

Robert P. J. Day (1):
   Remove superfluous uses of V_PROMPT macro.

Tom Rix (1):
   ARM Update mach-types

  board/davinci/common/misc.c  |   31 ++
  board/davinci/common/misc.h  |   13 +
  board/logicpd/zoom1/zoom1.c  |2 +-
  board/logicpd/zoom2/zoom2.c  |2 +-
  board/overo/overo.c  |2 +-
  board/pandora/pandora.c  |3 +-
  board/ti/beagle/beagle.c |2 +-
  board/timll/devkit8000/devkit8000.c  |2 +-
  drivers/misc/twl4030_led.c   |   18 +-
  drivers/mtd/nand/davinci_nand.c  |   27 +-
  include/asm-arm/arch-davinci/emif_defs.h |   13 +-
  include/asm-arm/mach-types.h |  631 +-
  include/configs/apollon.h|4 +-
  include/configs/davinci_dm355evm.h   |1 +
  include/configs/davinci_dm355leopard.h   |1 +
  include/configs/davinci_dm365evm.h   |1 +
  include/configs/davinci_dm6467evm.h  |1 +
  include/configs/davinci_dvevm.h  |1 +
  include/configs/davinci_schmoogie.h  |1 +
  include/configs/davinci_sffsdr.h |1 +
  include/configs/davinci_sonata.h |1 +
  include/configs/omap2420h4.h |8 +-
  include/configs/omap3_beagle.h   |4 +-
  include/configs/omap3_evm.h  |4 +-
  include/configs/omap3_overo.h|4 +-
  include/configs/omap3_pandora.h  |4 +-
  include/configs/omap3_sdp3430.h  |3 +-
  include/configs/omap3_zoom1.h|4 +-
  include/twl4030.h|6 +-
  29 files changed, 723 insertions(+), 72 deletions(-)
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Re: [U-Boot] [PATCH v4] TI DaVinci: Driver for the davinci SPI controller

[Mike Frysinger]

On Wednesday 06 January 2010 06:18:21 Sudhakar Rajashekhara wrote:
> + ds = malloc(sizeof(struct davinci_spi_slave));

personally i find sizeof(*ds) to be better

> +void spi_free_slave(struct spi_slave *slave)
> +{
> + struct davinci_spi_slave *ds = to_davinci_spi(slave);
> +
> + if (ds) {
> + free(ds);
> + ds = NULL;
> + }
> +}

free() already does a NULL pointer check, and assigning NULL to a stack 
variable is pointless.  i.e. this function should simply be:
free(slave);

> +static inline struct davinci_spi_slave *to_davinci_spi(struct spi_slave
>  *slave) +{
> + if (!slave)
> + return NULL;
> + else
> + return container_of(slave, struct davinci_spi_slave, slave);
> +}

this logic is pointless ... container_of() on a NULL pointer is a NULL 
pointer, and it isnt like container_of() will deref the pointer causing a 
crash.
-mike


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Re: [U-Boot] TI:OMAP:[PATCH 2/4] Support 720Mhz configuration for OMAP35xx

[Michelle Konzack]

Salam Khasim Syed Mohammed,

yesterday i was talking with the Tech-Support  of  TI-France  and  today
morning I have gotten my OMAP 3530 (720 Mhz version) and I  hope  I  get
the microcontrolelr soldered this weekend...  and can profit  from  your
code.

Thanks and Khoda Hafez
Michelle Konzack
Systemadministrator
Electronic Engineer
Tamay Dogan Network
Debian GNU/Linux Consultant



Am 2010-01-06 19:52:14, schrieb Khasim Syed Mohammed:
> Adds a new API "twl4030_pmrecv_vsel_cfg" to select voltage and group
> Adds support for 720Mhz in clock.c
> Board file modified to use these new APIs and boot at 720Mhz
 END OF REPLIED MESSAGE 



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# Debian GNU/Linux Consultant #
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   Apt. 917
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Jabber linux4miche...@jabber.ccc.de   67100 Strabourg/France
IRC#Debian (irc.icq.com)  Tel. DE: +49 177 9351947
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Re: [U-Boot] [PATCH 0/4] No GOT in IRQ and use r12 as GOT ptr

[Joakim Tjernlund]

Has this been forgotten(again)?

 Jocke
>
> This series removes the needs to access the GOT in
> IRQ handlers, then switches GOT PTR in start.S asm to
> use r12 instead of r14. This leads up to the removal of
> -ffixed-r14 gcc option for ppc
>
> This is a resend since the it seems like the series was lost
>
> Joakim Tjernlund (3):
>   ppc: Loose GOT access in IRQ
>   ppc: Use r12 instead of r14 as GOT pointer.
>   ppc: remove -ffixed-r14 gcc option.
>   ppc: Update README about the new GOT ptr.
>
>  cpu/74xx_7xx/config.mk |2 +-
>  cpu/74xx_7xx/start.S   |   47 +++-
>  cpu/mpc512x/config.mk  |2 +-
>  cpu/mpc512x/start.S|   46 +++
>  cpu/mpc5xx/config.mk   |2 +-
>  cpu/mpc5xx/start.S |   48 +++--
>  cpu/mpc5xxx/config.mk  |2 +-
>  cpu/mpc5xxx/start.S|   46 +++
>  cpu/mpc8220/config.mk  |2 +-
>  cpu/mpc8220/start.S|   46 +++
>  cpu/mpc824x/config.mk  |2 +-
>  cpu/mpc824x/start.S|   44 +++--
>  cpu/mpc8260/config.mk  |2 +-
>  cpu/mpc8260/start.S|   50 ++-
>  cpu/mpc83xx/config.mk  |2 +-
>  cpu/mpc83xx/start.S|   45 +++---
>  cpu/mpc85xx/config.mk  |2 +-
>  cpu/mpc85xx/start.S|   44 +++--
>  cpu/mpc86xx/config.mk  |2 +-
>  cpu/mpc86xx/start.S|   47 +++-
>  cpu/mpc8xx/config.mk   |2 +-
>  cpu/mpc8xx/start.S |   47 +++-
>  cpu/ppc4xx/config.mk   |2 +-
>  cpu/ppc4xx/start.S |   44 +++--
>  include/ppc_asm.tmpl   |   55 ++-
>  lib_ppc/Makefile   |1 +
>  lib_ppc/reloc.S|   49 ++
>  README |4 +++-
>  28 files changed, 202 insertions(+), 485 deletions(-)
>  create mode 100644 lib_ppc/reloc.S
>
> ___
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Re: [U-Boot] TI:OMAP: [ PATCH 2/4 ] Configure PRCM registers to support 720 Mhz

[Khasim Syed Mohammed]

On Wed, Jan 6, 2010 at 12:28 PM, Khasim Syed Mohammed
 wrote:
> On Wed, Jan 6, 2010 at 12:48 AM, Nishanth Menon
>  wrote:
>> On Tue, Jan 5, 2010 at 10:11 AM, Khasim Syed Mohammed
>>  wrote:
>>> From 1bb1a2441e6f54f3fe7d71e30da3bc22732aa7d3 Mon Sep 17 00:00:00 2001
>>> From: Syed Mohammed Khasim 
>>> Date: Tue, 5 Jan 2010 20:28:01 +0530
>>> Subject: [PATCH] Configure PRCM registers to support 720 Mhz on Beagle
>>> REV C4 and Latest OMAP3530 ES version
>> watch the subject length ;)..
>>
>>>
>> no commit message?
>>
> Will correct these :)
>
>> Why do you need to bump up to 720Mhz in u-boot? can't you do that as
>> part of dvfs in kernel? wont that be better? can't you do a standard
>> boot or is this device never capable of OPP3?
>>
> Question is why not in u-boot as well ?? Kernel can do its own stuff
> later and this device supports the same.
>
>>> Signed-off-by: Syed Mohammed Khasim 
>>> ---
>>>  board/ti/beagle/beagle.c       |    9 +++--
>>>  cpu/arm_cortexa8/omap3/clock.c |   22 ++
>>>  drivers/power/twl4030.c        |   21 +
>>>  3 files changed, 50 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
>>> index 17840cf..d76df30 100644
>>> --- a/board/ti/beagle/beagle.c
>>> +++ b/board/ti/beagle/beagle.c
>>> @@ -122,9 +122,16 @@ int misc_init_r(void)
>>>        struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
>>>        struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
>>>
>>> +       beagle_identify();
>>> +
>>>        twl4030_power_init();
>>>        twl4030_led_init();
>>>
>>> +       if (beagle_revision == REVISION_C4) {
>>> +               twl4030_power_init_es3_720();
>>> +               prcm_config_720mhz();
>>> +       }
>>> +
>>>        /* Configure GPIOs to output */
>>>        writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
>>>        writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
>>> @@ -136,8 +143,6 @@ int misc_init_r(void)
>>>        writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
>>>                GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
>>>
>>> -       beagle_identify();
>>> -
>>>        dieid_num_r();
>>>
>>>        return 0;
>>> diff --git a/cpu/arm_cortexa8/omap3/clock.c b/cpu/arm_cortexa8/omap3/clock.c
>>> index 174c453..ab96a46 100644
>>> --- a/cpu/arm_cortexa8/omap3/clock.c
>>> +++ b/cpu/arm_cortexa8/omap3/clock.c
>>> @@ -402,3 +402,25 @@ void per_clocks_enable(void)
>>>
>>>        sdelay(1000);
>>>  }
>>> +
>>> +/*
>>> + * Configure PRCM registers to get 720 Mhz
>>> + *
>>> + * NOTE: N value doesn't change, only M gets affected
>>> + */
>>> +
>> unwanted EOL?
> noted, will change.
>
>>> +void prcm_config_720mhz (void)
>> you are assuming 3430 ONLY support here, how abt 3630 and family?
> Not sure, I don't have a 3630 version of a board, if some one wants to
> add support for the same, I am open. For now I will focus on 3430 /
> 3530 versions.
>
>>
>>> +{
>>> +       struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
>>> +
>>> +       /* Unlock MPU DPLL (slows things down, and needed later) */
>>> +       sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOW_POWER_BYPASS);
>>> +       wait_on_value(ST_MPU_CLK, 0, &prcm_base->idlest_pll_mpu, LDELAY);
>>> +
>>> +       /* Set M */
>>> +       sr32(&prcm_base->clksel1_pll_mpu, 8, 11, 0x2D0);
>>> +
>>> +       /* lock mode */
>>> +       sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOCK);
>>> +       wait_on_value(ST_MPU_CLK, 1, &prcm_base->idlest_pll_mpu, LDELAY);
>>> +}
>>> diff --git a/drivers/power/twl4030.c b/drivers/power/twl4030.c
>>> index eb066cb..fa1c7d5 100644
>>> --- a/drivers/power/twl4030.c
>>> +++ b/drivers/power/twl4030.c
>>> @@ -68,6 +68,8 @@ void twl4030_power_reset_init(void)
>>>  #define DEV_GRP_ALL            0xE0
>>>  #define VPLL2_VSEL_18          0x05
>>>  #define VDAC_VSEL_18           0x03
>>> +#define VAUX2_VSEL_18          0x05
>>> +#define VDD1_VSEL_14           0x40
>>>
>>>  void twl4030_power_init(void)
>>>  {
>>> @@ -113,3 +115,22 @@ void twl4030_power_mmc_init(void)
>>>        twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte,
>>>                             TWL4030_PM_RECEIVER_VMMC1_DEDICATED);
>>>  }
>>> +
>>> +void twl4030_power_init_es3_720(void)
>> naming is confusing - is it 4030 or 3530 ES you are trying to describe here?
> yeah,  looks bit confusing. Will change it to an appropriate one.
>
>>
>>> +{
>>> +       unsigned char byte;
>>> +
>>> +       /* VAUX2 needs to be 1.8v */
>>> +       byte = DEV_GRP_P1;
>>> +       twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte,
>>> +                               TWL4030_PM_RECEIVER_VAUX2_DEV_GRP);
>>> +
>>> +       byte = VAUX2_VSEL_18;
>>> +       twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte,
>>> +                               TWL4030_PM_RECEIVER_VAUX2_DEDICATED);
>>> +
>>> +       /* Put VSEL for VDD1 to 1.4v to get 720Mhz */
>>> +       byte = VDD1_VSEL_14;
>>>

[U-Boot] TI:OMAP:[PATCH 2/4] Support 720Mhz configuration for OMAP35xx

[Khasim Syed Mohammed]

>From 0e03adedf321673e6051c136a38aac996f9b4d50 Mon Sep 17 00:00:00 2001
From: Syed Mohammed Khasim 
Date: Wed, 6 Jan 2010 19:42:24 +0530
Subject: [PATCH] Support 720Mhz configuration for OMAP35xx

Adds a new API "twl4030_pmrecv_vsel_cfg" to select voltage and group
Adds support for 720Mhz in clock.c
Board file modified to use these new APIs and boot at 720Mhz

Signed-off-by: Syed Mohammed Khasim 
---
 board/ti/beagle/beagle.c   |   20 ++--
 cpu/arm_cortexa8/omap3/clock.c |   21 +
 drivers/power/twl4030.c|   20 +++-
 include/twl4030.h  |   16 
 4 files changed, 66 insertions(+), 11 deletions(-)

diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index 17840cf..28f3685 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -122,9 +122,27 @@ int misc_init_r(void)
struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;

+   beagle_identify();
+
twl4030_power_init();
twl4030_led_init();

+   if (beagle_revision == REVISION_C4) {
+
+   /* Select TWL4030 VSEL to support 720Mhz */
+   twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
+   VAUX2_VSEL_18,
+   TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
+   DEV_GRP_P1);
+   
+   twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VDD1_VSEL,
+   VDD1_VSEL_14,
+   TWL4030_PM_RECEIVER_VDD1_DEV_GRP,
+   DEV_GRP_P1);
+   
+   prcm_config_720mhz();
+   }
+
/* Configure GPIOs to output */
writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
@@ -136,8 +154,6 @@ int misc_init_r(void)
writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);

-   beagle_identify();
-
dieid_num_r();

return 0;
diff --git a/cpu/arm_cortexa8/omap3/clock.c b/cpu/arm_cortexa8/omap3/clock.c
index 174c453..f1560fa 100644
--- a/cpu/arm_cortexa8/omap3/clock.c
+++ b/cpu/arm_cortexa8/omap3/clock.c
@@ -402,3 +402,24 @@ void per_clocks_enable(void)

sdelay(1000);
 }
+
+/*
+ * Configure PRCM registers to get 720 Mhz
+ *
+ * NOTE: N value doesn't change, only M gets affected
+ */
+void prcm_config_720mhz (void)
+{
+   struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+
+   /* Unlock MPU DPLL (slows things down, and needed later) */
+   sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOW_POWER_BYPASS);
+   wait_on_value(ST_MPU_CLK, 0, &prcm_base->idlest_pll_mpu, LDELAY);
+
+   /* Set M */
+   sr32(&prcm_base->clksel1_pll_mpu, 8, 11, 0x2D0);
+
+   /* lock mode */
+   sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOCK);
+   wait_on_value(ST_MPU_CLK, 1, &prcm_base->idlest_pll_mpu, LDELAY);
+}
diff --git a/drivers/power/twl4030.c b/drivers/power/twl4030.c
index eb066cb..11cc727 100644
--- a/drivers/power/twl4030.c
+++ b/drivers/power/twl4030.c
@@ -59,16 +59,9 @@ void twl4030_power_reset_init(void)
}
 }

-
 /*
  * Power Init
  */
-#define DEV_GRP_P1 0x20
-#define VAUX3_VSEL_28  0x03
-#define DEV_GRP_ALL0xE0
-#define VPLL2_VSEL_18  0x05
-#define VDAC_VSEL_18   0x03
-
 void twl4030_power_init(void)
 {
unsigned char byte;
@@ -98,8 +91,6 @@ void twl4030_power_init(void)
 TWL4030_PM_RECEIVER_VDAC_DEDICATED);
 }

-#define VMMC1_VSEL_30  0x02
-
 void twl4030_power_mmc_init(void)
 {
unsigned char byte;
@@ -113,3 +104,14 @@ void twl4030_power_mmc_init(void)
twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte,
 TWL4030_PM_RECEIVER_VMMC1_DEDICATED);
 }
+
+void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val, u8 dev_grp, u8
dev_grp_sel)
+{
+   /* Select the Device Group */
+   twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, dev_grp_sel,
+   dev_grp);
+
+   /* Select the Voltage */
+   twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, vsel_val,
+   vsel_reg);
+}
diff --git a/include/twl4030.h b/include/twl4030.h
index f260ecb..b96c96c 100644
--- a/include/twl4030.h
+++ b/include/twl4030.h
@@ -359,6 +359,22 @@
 #define TWL4030_USB_PHY_DPLL_CLK   (1 << 0)

 /*
+ * Voltage Selection in PM Receiver Module
+ */
+#define VAUX2_VSEL_18  0x05
+#define VDD1_VSEL_14   0x40
+#define VAUX3_VSEL_28  0x03
+#define VPLL2_VSEL_18  0x05
+#define VDAC_VSEL_18   0x03
+#define VMMC1_VSEL_30  0x02
+
+/*
+ * Device Selection

Re: [U-Boot] [PATCH 1/3] omap3: Consolidate SDRC related operations

[Hiremath, Vaibhav]

> -Original Message-
> From: Hiremath, Vaibhav
> Sent: Wednesday, December 23, 2009 8:16 PM
> To: u-boot@lists.denx.de
> Cc: Hiremath, Vaibhav; Premi, Sanjeev
> Subject: [PATCH 1/3] omap3: Consolidate SDRC related operations
>
> Consolidated SDRC related functions into one
> file - sdrc.c.
>
> Signed-off-by: Sanjeev Premi 
> ---
>  cpu/arm_cortexa8/omap3/Makefile|3 +
>  cpu/arm_cortexa8/omap3/board.c |   34 +--
>  cpu/arm_cortexa8/omap3/mem.c   |   70 -
>  cpu/arm_cortexa8/omap3/sdrc.c  |  169
> 
>  cpu/arm_cortexa8/omap3/sys_info.c  |   42 +
>  include/asm-arm/arch-omap3/mem.h   |   14 +++
>  include/asm-arm/arch-omap3/sys_proto.h |4 +-
>  include/configs/omap3_beagle.h |2 +
>  include/configs/omap3_evm.h|2 +
>  include/configs/omap3_overo.h  |2 +
>  include/configs/omap3_pandora.h|2 +
>  include/configs/omap3_sdp3430.h|2 +
>  include/configs/omap3_zoom1.h  |2 +
>  include/configs/omap3_zoom2.h  |2 +
>  14 files changed, 204 insertions(+), 146 deletions(-)
>  create mode 100644 cpu/arm_cortexa8/omap3/sdrc.c
>
[Hiremath, Vaibhav] Hi,
Any update on this? If we do not have any comments then can we merge these 
patches?

Thanks,
Vaibhav

> diff --git a/cpu/arm_cortexa8/omap3/Makefile
> b/cpu/arm_cortexa8/omap3/Makefile
> index 136b163..8cc7802 100644
> --- a/cpu/arm_cortexa8/omap3/Makefile
> +++ b/cpu/arm_cortexa8/omap3/Makefile
> @@ -33,6 +33,9 @@ COBJS   += board.o
>  COBJS+= clock.o
>  COBJS+= gpio.o
>  COBJS+= mem.o
> +ifdefCONFIG_SDRC
> +COBJS+= sdrc.o
> +endif
>  COBJS+= syslib.o
>  COBJS+= sys_info.o
>  COBJS+= timer.o
> diff --git a/cpu/arm_cortexa8/omap3/board.c
> b/cpu/arm_cortexa8/omap3/board.c
> index 2aa69b3..0bad682 100644
> --- a/cpu/arm_cortexa8/omap3/board.c
> +++ b/cpu/arm_cortexa8/omap3/board.c
> @@ -40,8 +40,6 @@
>
>  extern omap3_sysinfo sysinfo;
>
> -extern u32 is_mem_sdr(void);
> -
>
> /***
> ***
>   * Routine: delay
>   * Description: spinning delay to use before udelay works
> @@ -227,7 +225,7 @@ void s_init(void)
>   per_clocks_enable();
>
>   if (!in_sdram)
> - sdrc_init();
> + mem_init();
>  }
>
>
> /***
> ***
> @@ -268,36 +266,6 @@ void watchdog_init(void)
>  }
>
>
> /***
> ***
> - * Routine: dram_init
> - * Description: sets uboots idea of sdram size
> -
> 
> */
> -int dram_init(void)
> -{
> - DECLARE_GLOBAL_DATA_PTR;
> - unsigned int size0 = 0, size1 = 0;
> -
> - /*
> -  * If a second bank of DDR is attached to CS1 this is
> -  * where it can be started.  Early init code will init
> -  * memory on CS0.
> -  */
> - if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype ==
> DDR_STACKED)) {
> - do_sdrc_init(CS1, NOT_EARLY);
> - make_cs1_contiguous();
> - }
> -
> - size0 = get_sdr_cs_size(CS0);
> - size1 = get_sdr_cs_size(CS1);
> -
> - gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> - gd->bd->bi_dram[0].size = size0;
> - gd->bd->bi_dram[1].start = PHYS_SDRAM_1 +
> get_sdr_cs_offset(CS1);
> - gd->bd->bi_dram[1].size = size1;
> -
> - return 0;
> -}
> -
> -
> /***
> ***
>   * Dummy function to handle errors for EABI incompatibility
>
> 
> */
>  void abort(void)
> diff --git a/cpu/arm_cortexa8/omap3/mem.c
> b/cpu/arm_cortexa8/omap3/mem.c
> index dfb7e4c..107ffb2 100644
> --- a/cpu/arm_cortexa8/omap3/mem.c
> +++ b/cpu/arm_cortexa8/omap3/mem.c
> @@ -123,76 +123,6 @@ u32 mem_ok(u32 cs)
>   return 1;
>  }
>
> -/
> - *  sdrc_init() - init the sdrc chip selects CS0 and CS1
> - *  - early init routines, called from flash or
> - *  SRAM.
> - ***/
> -void sdrc_init(void)
> -{
> - /* only init up first bank here */
> - do_sdrc_init(CS0, EARLY_INIT);
> -}
> -
> -
> /***
> **
> - * do_sdrc_init(): initialize the SDRAM for use.
> - *  -code sets up SDRAM basic SDRC timings for CS0
> - *  -optimal settings can be placed here, or redone after i2c
> - *  inspection of board info
> - *
> - *  - code called once in C-Stack only context for CS0 and a
> possible 2nd
> - *  time depending on memory configuration from stack+global
> context
> -
> *

[U-Boot] [PATCH v2] add ASTRO MCF5373L board

[Wolfgang Wegner]

This patch adds support for ASTRO board(s) based on MCF5373L.

Signed-off-by: Wolfgang Wegner 
---
I hope to have addressed all the comments and errors that were present
in the first submission; exceptions are the linker script because there
was no feedback by Tsi Chung Liew on this issue and the crc routine
because the update protocol is fixed and uses this (as far as I can see)
non-standard CRC polynomial.
This patch (or the boot script/images) relies on the following previously
sent patches:
add include/asm-m68k/unaligned.h
(Message-Id 1260376332-15835-1-git-send-email-w.weg...@astro-kom.de)
non-blocking flash write/erase/status check functions
(Message-Id 1260374411-11299-1-git-send-email-w.weg...@astro-kom.de)
add ability to handle compressed images to imxtract
(Message-Id 1260436281-31824-1-git-send-email-w.weg...@astro-kom.de)
add block write function to spartan3 slave serial load
(Message-Id 1256918102-3760-1-git-send-email-w.weg...@astro-kom.de)
allow MCF532x to use CONFIG_MONITOR_IS_IN_RAM
(Message-Id 1256739061-13311-2-git-send-email-w.weg...@astro-kom.de)
MCF532x: make icache_enable use CONFIG_SYS_SDRAM_SIZE
(Message-Id 1256739061-13311-1-git-send-email-w.weg...@astro-kom.de)

 MAINTAINERS  |4 +
 MAKEALL  |1 +
 Makefile |4 +
 board/astro/mcf5373l/Makefile|   44 +++
 board/astro/mcf5373l/astro.h |   39 +++
 board/astro/mcf5373l/config.mk   |   27 ++
 board/astro/mcf5373l/fpga.c  |  431 ++
 board/astro/mcf5373l/mcf5373l.c  |  209 +
 board/astro/mcf5373l/u-boot.lds  |  142 +
 board/astro/mcf5373l/update.c|  625 ++
 include/configs/astro_mcf5373l.h |  427 ++
 11 files changed, 1953 insertions(+), 0 deletions(-)
 create mode 100644 board/astro/mcf5373l/Makefile
 create mode 100644 board/astro/mcf5373l/astro.h
 create mode 100644 board/astro/mcf5373l/config.mk
 create mode 100644 board/astro/mcf5373l/fpga.c
 create mode 100644 board/astro/mcf5373l/mcf5373l.c
 create mode 100644 board/astro/mcf5373l/u-boot.lds
 create mode 100644 board/astro/mcf5373l/update.c
 create mode 100644 include/configs/astro_mcf5373l.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 9734b1d..016a308 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -869,6 +869,10 @@ TsiChung Liew 
M5475EVBmcf547x_8x
M5485EVBmcf547x_8x
 
+Wolfgang Wegner 
+
+   astro_mcf5373l  MCF5373L
+
 #
 # AVR32 Systems:   #
 #  #
diff --git a/MAKEALL b/MAKEALL
index ab1bb6f..6f4f76c 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -822,6 +822,7 @@ LIST_microblaze="   \
 #
 
 LIST_coldfire="\
+   astro_mcf5373l  \
cobra5272   \
EB+MCF-EV123\
EB+MCF-EV123_internal   \
diff --git a/Makefile b/Makefile
index 75b2c1e..a8d3517 100644
--- a/Makefile
+++ b/Makefile
@@ -2024,6 +2024,10 @@ ZPC1900_config: unconfig
 ## Coldfire
 #
 
+astro_mcf5373l_config \
+astro_mcf5373l_RAM_config :unconfig
+   @$(MKCONFIG) -t $(@:_config=) astro_mcf5373l m68k mcf532x mcf5373l astro
+
 M5208EVBE_config : unconfig
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5208evbe freescale
 
diff --git a/board/astro/mcf5373l/Makefile b/board/astro/mcf5373l/Makefile
new file mode 100644
index 000..e0b1bc6
--- /dev/null
+++ b/board/astro/mcf5373l/Makefile
@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS  = $(BOARD).o fpga.o update.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(AR) $(ARFLAGS)

[U-Boot] [PATCH v4] TI DaVinci: Driver for the davinci SPI controller

[Sudhakar Rajashekhara]

From: Sekhar Nori 

This adds a driver for the SPI controller found on davinci
based SoCs from Texas Instruments.

Signed-off-by: Sekhar Nori 
Signed-off-by: Sudhakar Rajashekhara 
---
>From previous version, following are the modifications:
 1. Global variable data1_reg_val was removed and made local.
 2. Pointer is being checked before freeing it in spi_free_slave()
function.
 3. Shifting 0's in spi_claim_bus() function has been removed.
 4. Anding an u8 variable with 0xff was removed in the spi_xfer()
function.
 5. Few comments have been added to increase code readability.
 6. Pointer is being checked before calling container_of() function
in the SPI header file.

 drivers/spi/Makefile  |1 +
 drivers/spi/davinci_spi.c |  226 +
 drivers/spi/davinci_spi.h |  105 +
 3 files changed, 332 insertions(+), 0 deletions(-)
 create mode 100644 drivers/spi/davinci_spi.c
 create mode 100644 drivers/spi/davinci_spi.h

diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 824d8e7..f112ed0 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -29,6 +29,7 @@ COBJS-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
 COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o
 COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o
 COBJS-$(CONFIG_CF_SPI) += cf_spi.o
+COBJS-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
 COBJS-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
 COBJS-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
 COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
new file mode 100644
index 000..8ba8c04
--- /dev/null
+++ b/drivers/spi/davinci_spi.c
@@ -0,0 +1,226 @@
+/*
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Driver for SPI controller on DaVinci. Based on atmel_spi.c
+ * by Atmel Corporation
+ *
+ * Copyright (C) 2007 Atmel Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "davinci_spi.h"
+
+void spi_init()
+{
+   /* do nothing */
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+   unsigned int max_hz, unsigned int mode)
+{
+   struct davinci_spi_slave*ds;
+
+   if (!spi_cs_is_valid(bus, cs))
+   return NULL;
+
+   ds = malloc(sizeof(struct davinci_spi_slave));
+   if (!ds)
+   return NULL;
+
+   ds->slave.bus = bus;
+   ds->slave.cs = cs;
+   ds->regs = (struct davinci_spi_regs *)CONFIG_SYS_SPI_BASE;
+   ds->freq = max_hz;
+
+   return &ds->slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+   struct davinci_spi_slave *ds = to_davinci_spi(slave);
+
+   if (ds) {
+   free(ds);
+   ds = NULL;
+   }
+}
+
+int spi_claim_bus(struct spi_slave *slave)
+{
+   struct davinci_spi_slave *ds = to_davinci_spi(slave);
+   unsigned int scalar, data1_reg_val = 0;
+
+   /* Enable the SPI hardware */
+   writel(SPIGCR0_SPIRST_MASK, &ds->regs->gcr0);
+   udelay(1000);
+   writel(SPIGCR0_SPIENA_MASK, &ds->regs->gcr0);
+
+   /* Set master mode, powered up and not activated */
+   writel(SPIGCR1_MASTER_MASK | SPIGCR1_CLKMOD_MASK, &ds->regs->gcr1);
+
+   /* CS, CLK, SIMO and SOMI are functional pins */
+   writel((SPIPC0_EN0FUN_MASK | SPIPC0_CLKFUN_MASK |
+   SPIPC0_DOFUN_MASK | SPIPC0_DIFUN_MASK), &ds->regs->pc0);
+
+   /* setup format */
+   scalar = ((CONFIG_SYS_SPI_CLK / ds->freq) - 1) & 0xFF;
+
+   /*
+* Use following format:
+*   character length = 8,
+*   clock signal delayed by half clk cycle,
+*   clock low in idle state - Mode 0,
+*   MSB shifted out first
+*/
+   writel(8 | (scalar << SPIFMT_PRESCALE_SHIFT) |
+   (1 << SPIFMT_PHASE_SHIFT), &ds->regs->fmt0);
+
+   /* hold cs active at end of transfer until explicitly de-asserted */
+   data1_reg_val = (1 << SPIDAT1_CSHOLD_SHIFT) |
+   (slave->cs << SPIDAT1_CSNR_SHIFT);
+   writel(data1_reg_val, &ds->regs->dat1);
+
+   /*
+* Including a minor delay. No scien

Re: [U-Boot] [PATCH v2] TI DaVinci: Driver for the davinci SPI controller

[Sudhakar Rajashekhara]

Hi,

On Tue, Jan 05, 2010 at 19:49:19, Tom wrote:
> Sudhakar Rajashekhara wrote:
> > From: Sekhar Nori 
> > 
> > This adds a driver for the SPI controller found on davinci
> > based SoCs from Texas Instruments.
> > 
> > Signed-off-by: Sekhar Nori 
> > Signed-off-by: Sudhakar Rajashekhara 
> > ---


> >
> > new file mode 100644
> > index 000..c3f1810
> > --- /dev/null
> > +++ b/drivers/spi/davinci_spi.c
> > @@ -0,0 +1,221 @@
> > +/*
> > + * Copyright (C) 2009 Sekhar Nori, Texas Instruments, Inc 
> > + *
> > + * Driver for SPI controller on DaVinci. Based on atmel_spi.c
> > + * by Atmel Corporation
> > + *
> > + * Copyright (C) 2007 Atmel Corporation
> > + *
> > + * See file CREDITS for list of people who contributed to this
> > + * project.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> > + * MA 02111-1307 USA
> > + */
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#include 
> > +
> > +#include 
> > +
> > +#include "davinci_spi.h"
> > +
> 
> Please remove the extra spaces
> 

I'll remove extra lines between the header file inclusions.

> > +static unsigned int data1_reg_val;
> 
> Why is this static value used instead of reading
> ds->regs->dat1 ?
> Depending on the order of the function calling, this
> value may not mirror what is in the register.
> 

I'll remove the static variable.

> > +
> > +void spi_init()
> > +{
> > +   /* do nothing */
> > +}
> > +
> > +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
> > +   unsigned int max_hz, unsigned int mode)
> > +{
> > +   struct davinci_spi_slave*ds;
> > +
> > +   ds = malloc(sizeof(struct davinci_spi_slave));
> > +   if (!ds)
> > +   return NULL;
> > +
> > +   ds->slave.bus = bus;
> > +   ds->slave.cs = cs;
> > +   ds->regs = (struct davinci_spi_regs *)CONFIG_SYS_SPI_BASE;
> > +   ds->freq = max_hz;
> > +
> > +   return &ds->slave;
> > +}
> > +
> > +void spi_free_slave(struct spi_slave *slave)
> > +{
> > +   struct davinci_spi_slave *ds = to_davinci_spi(slave);
> > +
> Check before you free.
> It would be nice if you could poison the pointer.
> 

OK.

> > +   free(ds);
> > +}
> > +
> > +int spi_claim_bus(struct spi_slave *slave)
> > +{
> > +   struct davinci_spi_slave *ds = to_davinci_spi(slave);
> > +   unsigned int scalar;
> > +
> > +   /* Enable the SPI hardware */
> > +   writel(SPIGCR0_SPIRST_MASK, &ds->regs->gcr0);
> > +   udelay(1000);
> > +   writel(SPIGCR0_SPIENA_MASK, &ds->regs->gcr0);
> > +
> > +   /* Set master mode, powered up and not activated */
> > +   writel(SPIGCR1_MASTER_MASK | SPIGCR1_CLKMOD_MASK, &ds->regs->gcr1);
> > +
> > +   /* CS, CLK, SIMO and SOMI are functional pins */
> > +   writel((SPIPC0_EN0FUN_MASK) | (SPIPC0_CLKFUN_MASK) |
> > +   (SPIPC0_DOFUN_MASK) | (SPIPC0_DIFUN_MASK), &ds->regs->pc0);
> > +
> > +   /* setup format */
> > +   scalar = ((CONFIG_SYS_SPI_CLK / ds->freq) - 1) & 0xFF;
> > +
> > +   writel(8 |  /* character length */
> > +   (scalar << SPIFMT_PRESCALE_SHIFT)   |
> > +   /* clock signal delayed by half clk cycle */
> > +   (1 << SPIFMT_PHASE_SHIFT)   |
> > +   /* clock low in idle state - Mode 0 */
> > +   (0 << SPIFMT_POLARITY_SHIFT)|
> > +   /* MSB shifted out first */
> > +   (0 << SPIFMT_SHIFTDIR_SHIFT), &ds->regs->fmt0);
> Shifting 0's..
> This could be improved

OK.

> > +
> > +   /* hold cs active at end of transfer until explicitly de-asserted */
> > +   data1_reg_val = (1 << SPIDAT1_CSHOLD_SHIFT) |
> > +   (slave->cs << SPIDAT1_CSNR_SHIFT);
> > +   writel(data1_reg_val, &ds->regs->dat1);
> > +
> > +   /*
> > +* Including a minor delay. No science here. Should be good even with
> > +* no delay
> > +*/
> > +   writel((50 << SPI_C2TDELAY_SHIFT) |
> > +   (50 << SPI_T2CDELAY_SHIFT), &ds->regs->delay);
> > +
> > +   /* default chip select register */
> > +   writel(SPIDEF_CSDEF0_MASK, &ds->regs->def);
> > +
> > +   /* no interrupts */
> > +   writel(0, &ds->regs->int0);
> > +   writel(0, &ds->regs->lvl);
> > +
> > +   /* enable SPI */
> > +   writel(readl(&ds->regs->gcr1) | (SPIGCR1_SPIENA_MASK), &ds->regs->gcr1);
> > +
> > +   return 0;
> > +}
> > +
> > +void spi_release_bus(struct spi_slave *slave)
> > +{

Re: [U-Boot] TI:OMAP: [PATCH 4/4] Enable I2C bus switching

[Paulraj, Sandeep]

> 
> On Wed, Jan 6, 2010 at 12:52 AM, Nishanth Menon
>  wrote:
> > does this really belong to this series?
> I lately figured out that all are independent. This can be merged
> separately.
> 
> Sandeep can you consider this patch as there are no comments. I will
> work on the other two and submit them accordingly.

Again it needs to spend a little more time on the list to give others a fair 
chance at review.

Also I see it involves I2c so even though the change seems simple enough it 
should go through u-boot-i2c or I should atleast wait for some time for an ACK 
from Heiko.

I've applied such patches(e.g NAND, I2c and net related stuff)  but only after 
the respective custodians are OK with it 
> 
> Regards,
> Khasim
> 
> 
> > On Tue, Jan 5, 2010 at 10:13 AM, Khasim Syed Mohammed
> >  wrote:
> >> From 3aa4b510a95b5313dc103c286eea44a6054b67d4 Mon Sep 17 00:00:00 2001
> >> From: Syed Mohammed Khasim 
> >> Date: Tue, 5 Jan 2010 20:52:36 +0530
> >> Subject: [PATCH] Enable I2C bus switching
> >>
> >> OMAP3 supports Multiple I2C channels, this patch allows
> >> us to use i2c dev  command to switch between busses.
> >>
> >> Signed-off-by: Syed Mohammed Khasim 
> >> ---
> >>  drivers/i2c/omap24xx_i2c.c     |    5 +
> >>  include/configs/omap3_beagle.h |    4 
> >>  2 files changed, 9 insertions(+), 0 deletions(-)
> >>
> >> diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
> >> index ff18991..a9250be 100644
> >> --- a/drivers/i2c/omap24xx_i2c.c
> >> +++ b/drivers/i2c/omap24xx_i2c.c
> >> @@ -435,3 +435,8 @@ int i2c_set_bus_num(unsigned int bus)
> >>
> >>        return 0;
> >>  }
> >> +
> >> +int i2c_get_bus_num(void)
> >> +{
> >> +       return ((int) current_bus);
> >> +}
> >> diff --git a/include/configs/omap3_beagle.h
> b/include/configs/omap3_beagle.h
> >> index d1c9cd0..fa26b35 100644
> >> --- a/include/configs/omap3_beagle.h
> >> +++ b/include/configs/omap3_beagle.h
> >> @@ -100,6 +100,10 @@
> >>  /* DDR - I use Micron DDR */
> >>  #define CONFIG_OMAP3_MICRON_DDR                1
> >>
> >> +/* Enable Multi Bus support for I2C */
> >> +#define CONFIG_I2C_MULTI_BUS           1
> >> +#define CONFIG_SYS_I2C_NOPROBES                {0x0,0x0}
> >> +
> >>  /* commands to include */
> >>  #include 
> >>
> >> --
> >> 1.5.6.3
> >> ___
> >> U-Boot mailing list
> >> U-Boot@lists.denx.de
> >> http://lists.denx.de/mailman/listinfo/u-boot
> >>
> >
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Re: [U-Boot] TI:OMAP: [ PATCH 1/4 ] OMAP3: Beagle: Update revision detection

[Paulraj, Sandeep]

> 
> Sandeep,
> 
> On Tue, Jan 5, 2010 at 9:41 PM, Khasim Syed Mohammed
>  wrote:
> > From 3a540c9746d080d3e45e820081684da4f14d28a2 Mon Sep 17 00:00:00 2001
> > From: Dirk Behme 
> > Date: Tue, 5 Jan 2010 20:04:27 +0530
> > Subject: [PATCH] OMAP3: Beagle: Update revision detection
> >
> > New BeagleBoard revision C4 uses a new ID. Update revision detection.
> >
> > Signed-off-by: Dirk Behme 
> > ---
> >  board/ti/beagle/beagle.c |   64 ---
> --
> >  board/ti/beagle/beagle.h |    8 -
> >  2 files changed, 46 insertions(+), 26 deletions(-)
> >
> > diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
> > index 32d501e..17840cf 100644
> > --- a/board/ti/beagle/beagle.c
> > +++ b/board/ti/beagle/beagle.c
> > @@ -38,7 +38,7 @@
> >  #include 
> >  #include "beagle.h"
> >
> > -static int beagle_revision_c;
> > +static int beagle_revision;
> >
> >  /*
> >  * Routine: board_init
> > @@ -60,41 +60,57 @@ int board_init(void)
> >  /*
> >  * Routine: beagle_get_revision
> >  * Description: Return the revision of the BeagleBoard this code is
> running on.
> > - *              If it is a revision Ax/Bx board, this function returns
> 0,
> > - *              on a revision C board you will get a 1.
> >  */
> >  int beagle_get_revision(void)
> >  {
> > -       return beagle_revision_c;
> > +       return beagle_revision;
> >  }
> >
> >  /*
> >  * Routine: beagle_identify
> > - * Description: Detect if we are running on a Beagle revision Ax/Bx or
> > - *              Cx. This can be done by GPIO_171. If this is low, we
> are
> > - *              running on a revision C board.
> > + * Description: Detect if we are running on a Beagle revision Ax/Bx,
> > + *             C1/2/3, C4 or D. This can be done by reading
> > + *             the level of GPIO173, GPIO172 and GPIO171. This should
> > + *             result in
> > + *             GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
> > + *             GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
> > + *             GPIO173, GPIO172, GPIO171: 1 0 1 => C4
> > + *             GPIO173, GPIO172, GPIO171: 0 0 0 => D
> >  */
> >  void beagle_identify(void)
> >  {
> > -       beagle_revision_c = 0;
> > -       if (!omap_request_gpio(171)) {
> > -               unsigned int val;
> > -
> > -               omap_set_gpio_direction(171, 1);
> > -               val = omap_get_gpio_datain(171);
> > -               omap_free_gpio(171);
> > -
> > -               if (val)
> > -                       beagle_revision_c = 0;
> > -               else
> > -                       beagle_revision_c = 1;
> > -       }
> > +       omap_request_gpio(171);
> > +       omap_request_gpio(172);
> > +       omap_request_gpio(173);
> > +       omap_set_gpio_direction(171, 1);
> > +       omap_set_gpio_direction(172, 1);
> > +       omap_set_gpio_direction(173, 1);
> > +
> > +       beagle_revision = omap_get_gpio_datain(173) << 2 |
> > +                         omap_get_gpio_datain(172) << 1 |
> > +                         omap_get_gpio_datain(171);
> > +       omap_free_gpio(171);
> > +       omap_free_gpio(172);
> > +       omap_free_gpio(173);
> >
> >        printf("Board revision ");
> > -       if (beagle_revision_c)
> > -               printf("C\n");
> > -       else
> > +
> > +       switch (beagle_revision) {
> > +       case REVISION_AXBX:
> >                printf("Ax/Bx\n");
> > +               break;
> > +       case REVISION_CX:
> > +               printf("C1/C2/C3\n");
> > +               break;
> > +       case REVISION_C4:
> > +               printf("C4\n");
> > +               break;
> > +       case REVISION_D:
> > +               printf("D\n");
> > +               break;
> > +       default:
> > +               printf("unknown 0x%02x\n", beagle_revision);
> > +       }
> >  }
> >
> >  /*
> > @@ -137,7 +153,7 @@ void set_muxconf_regs(void)
> >  {
> >        MUX_BEAGLE();
> >
> > -       if (beagle_revision_c) {
> > +       if (beagle_revision != REVISION_AXBX) {
> >                MUX_BEAGLE_C();
> >        }
> >  }
> > diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
> > index 7fe6275..b1720c9 100644
> > --- a/board/ti/beagle/beagle.h
> > +++ b/board/ti/beagle/beagle.h
> > @@ -33,7 +33,11 @@ const omap3_sysinfo sysinfo = {
> >  #endif
> >  };
> >
> > -#define BOARD_REVISION_MASK    (0x1 << 11)
> > +/* BeagleBoard revisions */
> > +#define REVISION_AXBX  0x7
> > +#define REVISION_CX    0x6
> > +#define REVISION_C4    0x5
> > +#define REVISION_D     0x0
> >
> >  /*
> >  * IEN  - Input Enable
> > @@ -264,7 +268,7 @@ const omap3_sysinfo sysinfo = {
> >        MUX_VAL(CP(HDQ_SIO),            (IDIS | PTU | EN  | M4))
> /*GPIO_170*/\
> >        MUX_VAL(CP(MCSPI1_CLK),         (IEN  | PTU | EN  | M4))
> /*GPIO_171*/\
> >        MUX_VAL(CP(MCSPI1_SIMO),        (IEN  | PTU | EN  | M4))
> /*GPIO_172*/\
> > -       MUX_VAL(CP(MCSPI1_SOMI),        (IEN  | PTD | DIS | M0))
> /*McSPI1_SOMI*/\
> > +       MUX_VAL(CP(MCSPI1_SOMI),        (IEN  

Re: [U-Boot] [PATCH] Add support for Indefia Nimbus Cloud Board

[Semih Hazar]

Hi,

I had sent a few patches almost a month ago about a new AVR32 board, but
couldn't get a reply from anyone.

I'd appreciate if we can get these patches into the upcoming release.

Regards,
Semih Hazar

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