Re: [U-Boot] [PATCH] net, fec_mxc: use mac address stored in env before looking in eeprom
Hello Mike, Mike Frysinger wrote: On Wednesday 24 March 2010 07:56:28 Heiko Schocher wrote: doc/README.enetaddr prescribes, to use a mac address stored in environment, before using a mac address stored in some special place. you're reading things incorrectly, or you didnt read the whole thing. the fec_mxc driver is correct today. its initialize function seeds eth_device- enetaddr with the hardware storage. it is up to the common networking code to sync the environment to eth_device before calling the driver init function (which it does). then the driver always uses eth_device-enetaddr. Ok, but this driver initialize in fec_probe() (which gets called through fecmxc_initialize() on uboot startup) always the fec mac address registers with eeprom mac address. So, if uboot not uses network interface, linux uses this mac address (and if no valid mac address is in eeprom, linux has no valid mac address). But, if uboot uses network, before booting linux, linux gets the network address stored in ethaddr, because this driver sets again in fec_init the mac address (at this point the content from ethaddr) - 2 different mac addresses used on this plattform ... I think this could not be correct, and should be fixed ... So, if not changing something in the driver, how is this intended to solve? (I know, it would be great to have a standard to pass the mac address to linux on arm based plattforms, but as Detlev wrote, such attempts failed ...) I don;t want to make this through board specific code ... While writing this, and realizing that this behaviour is a feature, maybe this problem occur on other network drivers on arm plattforms too ... hah, found one: drivers/net/kirkwood_egiga.c did it in the same way as drivers/net/fec_mxc.c ... Ok, it is in line with uboot standard, but arm plattforms which booting linux without doing network trafic under uboot tend to have different mac addresses ... This should be solved! (Actual I don;t know, if arm linux prescribes something about how to setup the mac address before it ...) bye Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] unneeded exported function i2c_mux_add_device
Hello Frans, Frans Meulenbroeks wrote: While grepping some sources I bumped upon i2c_mux_add_device This one is implemented in cmd_i2c.c and exported through i2c.h. However no-one outside cmd_i2c.c is using it: fr...@linux-suse:~/u-boot grep -r i2c_mux_add_device . ./common/cmd_i2c.c:int i2c_mux_add_device(I2C_MUX_DEVICE *dev) ./common/cmd_i2c.c: i2c_mux_add_device (device); ./include/i2c.h:int i2c_mux_add_device(I2C_MUX_DEVICE *dev); fr...@linux-suse:~/u-boot Should we make this function static and remove from the .h file? Yep, good catch. Please post a patch. bye Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] The purpose of enabling CONFIG_PCI_BOOTDELAY
Hi, we've seen platforms where the delay brings you out of problems. Of course this is caused by weird PCI hardware in most cases :-) I must also admit that the implementation of CONFIG_PCI_BOOTDELAY is not usable in all situations. We have some boards (e.g. PMC440) that can be system cpu or PCI adapter. It's not a good idea to add a pci delay in adapter mode because your device will probably not get configured. So we implemented our own pcidelay mechanism (see board/esd/pmc440/pmc440.c), because we didn't want to adjust pcidelay when switching from system cpu to adapter mode and vice vera. CONFIG_PCI_BOOTDELAY is of course not intended for fixing WDT issues :-) It's a good idea to turn on this option when you are running U-Boot on system CPUs that connect to unknown PCI hardware, e.g you have some PCI/PCIe slots on your board. We never needed it for well known onboard PCI devices. Matthias On Wednesday 24 March 2010 21:49, mike.john...@apc.com wrote: All, What is the purpose of CONFIG_PCI_BOOTDELAY? I am using uboot version 1.1.4. I know it's old, but in \drivers\pci.c there is a section of code right before pci_init.c is called that can delay the call to pci_init.c. The code is enabled by defining CONFIG_PCI_BOOTDELAY. But why would it be necessary to delay initializing the PCI hardware? Specifically in my case, all the resets on my board have occurred well before (500 msec) this portion of the code would execute, so it would seem safe to say that any peripherals like PCI controllers would be satisfied reset-wise. In my case though, I need to enable CONFIG_PCI_BOOTDELAY to eliminate a WDT problem with a PCI access. If I do not use CONFIG_PCI_BOOTDELAY, my hardware can exhibit a PCI hang, leading to the above mentioned WDT. Any information or background that this group can provide would be appreciated. Thank-you, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] console_buffer
Hi Frans, (btw personally I feel that it is a sign of clean programming to declare all exported functions in a header file, and only to use header files to import functions, but maybe that is a personal thingie). Seconded. Any patch to this end is highly welcome ;) Cheers Detlev -- I've never understood the tendency to pick up tastes because they are popular. In fact, I think it is foolish to do that. I mean, don't you know what you like? People who are so weak that they will take their tastes from people around them in the desperate desire to be accepted, I think of them as cowards. -- Richard M. Stallman -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] cfi flash: add status polling method for amd flash
On Wednesday 24 March 2010 03:29:21 Thomas Chou wrote: This patch adds status polling method to offer an alternative to data toggle method for amd flash chips. This patch is needed for nios2 cfi flash interface, where the bus controller performs 4 bytes read cycles for a single byte read instruction. The data toggle method can not detect chip busy status correctly. So we have to poll DQ7, which will be inverted when the chip is busy. This feature is enabled with the config def, CONFIG_SYS_CFI_FLASH_STATUS_POLL In flash_erase, the verbose printing of '.' is changed that it will go with each sector whether successed or failed. Applied to u-boot-cfi-flash/next. Thanks. Cheers, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-cfi-flash/next
The following changes since commit 859500a2be94bfa77a845b9c8a4c499587035fd5: Wolfgang Denk (1): Merge remote branch 'origin/master' into next are available in the git repository at: git://www.denx.de/git/u-boot-cfi-flash.git next Thomas Chou (1): cfi flash: add status polling method for amd flash drivers/mtd/cfi_flash.c | 95 +++ 1 files changed, 87 insertions(+), 8 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] cfi_flash: precision and underflow problem in tout calculation
On Wednesday 24 March 2010 16:00:47 Thomas Chou wrote: From: Renato Andreola renato.andre...@imagos.it With old configuration it could happen tout=0 if CONFIG_SYS_HZ1000. Applied to u-boot-cfi-flash/master. Thanks. Cheers, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-cfi-flash/master
Hi Wolfgang, please pull this fix into master. Thanks. The following changes since commit 7027d5622d56ee2292713773044fb6352e431f31: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-video are available in the git repository at: git://www.denx.de/git/u-boot-cfi-flash.git master Renato Andreola (1): cfi_flash: precision and underflow problem in tout calculation drivers/mtd/cfi_flash.c |5 - 1 files changed, 4 insertions(+), 1 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net, fec_mxc: use mac address stored in env before looking in eeprom
Dear Heiko, In message 4bab0357.60...@denx.de you wrote: Ok, but this driver initialize in fec_probe() (which gets called through fecmxc_initialize() on uboot startup) always the fec mac address registers with eeprom mac address. So, if uboot not uses The question to me is why fec_probe() is called at all, even in cases where U-Boot does not use any network related commands. This is IMO wrong. Eventually somebody comes up with patches to fix this? network interface, linux uses this mac address (and if no valid mac address is in eeprom, linux has no valid mac address). But, if uboot uses network, before booting linux, linux gets the network address stored in ethaddr, because this driver sets again in fec_init the mac address (at this point the content from ethaddr) - 2 different mac addresses used on this plattform ... I think this could not be correct, and should be fixed ... Thisis wrong in any case, and indeed should fixed. Is the bigger, more strategical fix above is not performed now (for whatever reasons),then this issue should be fixed anyway. So, if not changing something in the driver, how is this intended to solve? (I know, it would be great to have a standard to pass the mac address to linux on arm based plattforms, but as Detlev wrote, such attempts failed ...) Well, they failed temporarily. A long-term solution is to use the device tree; a RFC for the ARM Boot standard for passing device tree blob has just been posted yesterday, see http://thread.gmane.org/gmane.linux.drivers.devicetree/1938 drivers/net/kirkwood_egiga.c did it in the same way as drivers/net/fec_mxc.c ... Ok, it is in line with uboot standard, but arm plattforms which booting linux without doing network trafic under uboot tend to have different mac addresses ... This should be solved! Please include in your fix. (Actual I don;t know, if arm linux prescribes something about how to setup the mac address before it ...) The PTBs for the ARM Linux kernel recommend to use an initramfs file system and use user space tools to set the MAC address. I don't know if such an approach makes any sense to you :-( Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Research is what I'm doing when I don't know what I'm doing. -- Wernher von Braun ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] nios2: add dma_alloc_coherent with asm-nios2/dma-mapping.h
This function return cache-line aligned allocation which is mapped
to uncached io region.
Signed-off-by: Thomas Chou tho...@wytron.com.tw
---
include/asm-nios2/dma-mapping.h | 23 +++
1 files changed, 23 insertions(+), 0 deletions(-)
create mode 100644 include/asm-nios2/dma-mapping.h
diff --git a/include/asm-nios2/dma-mapping.h b/include/asm-nios2/dma-mapping.h
new file mode 100644
index 000..1350e3b
--- /dev/null
+++ b/include/asm-nios2/dma-mapping.h
@@ -0,0 +1,23 @@
+#ifndef __ASM_NIOS2_DMA_MAPPING_H
+#define __ASM_NIOS2_DMA_MAPPING_H
+
+/* dma_alloc_coherent() return cache-line aligned allocation which is mapped
+ * to uncached io region.
+ *
+ * IO_REGION_BASE should be defined in board config header file
+ * 0x8000 for nommu, 0xe000 for mmu
+ */
+
+static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
+{
+ void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE);
+ if (!addr)
+ return 0;
+ flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE);
+ *handle = ((unsigned long)addr +
+ (CONFIG_SYS_DCACHELINE_SIZE - 1))
+ ~(CONFIG_SYS_DCACHELINE_SIZE - 1) ~(IO_REGION_BASE);
+ return (void *)(*handle | IO_REGION_BASE);
+}
+
+#endif /* __ASM_NIOS2_DMA_MAPPING_H */
--
1.6.6.1
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[U-Boot] [PATCH v2] net: add altera triple speeds ethernet mac driver
This driver supports the Altera triple speeds 10/100/1000 ethernet
mac.
Signed-off-by: Thomas Chou tho...@wytron.com.tw
---
drivers/net/Makefile |1 +
drivers/net/altera_tse.c | 977 ++
drivers/net/altera_tse.h | 512
include/netdev.h |1 +
4 files changed, 1491 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/altera_tse.c
create mode 100644 drivers/net/altera_tse.h
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 0e68e52..b75c02f 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -27,6 +27,7 @@ LIB := $(obj)libnet.a
COBJS-$(CONFIG_DRIVER_3C589) += 3c589.o
COBJS-$(CONFIG_PPC4xx_EMAC) += 4xx_enet.o
+COBJS-$(CONFIG_ALTERA_TSE) += altera_tse.o
COBJS-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
COBJS-$(CONFIG_DRIVER_AX88180) += ax88180.o
COBJS-$(CONFIG_BCM570x) += bcm570x.o bcm570x_autoneg.o 5701rls.o
diff --git a/drivers/net/altera_tse.c b/drivers/net/altera_tse.c
new file mode 100644
index 000..768100e
--- /dev/null
+++ b/drivers/net/altera_tse.c
@@ -0,0 +1,977 @@
+/*
+ * altera 10/100/1000 triple speed ethernet mac driver
+ *
+ * Copyright (C) 2008 Altera Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include config.h
+#include common.h
+#include malloc.h
+#include net.h
+#include command.h
+#include asm/cache.h
+#include asm/dma-mapping.h
+#include miiphy.h
+#include altera_tse.h
+
+static int tse_eth_send(struct eth_device *dev, volatile void *packet,
+ int length);
+static int tse_eth_rx(struct eth_device *dev);
+static void tse_eth_halt(struct eth_device *dev);
+static void tse_eth_reset(struct eth_device *dev);
+static int tse_eth_init(struct eth_device *dev, bd_t *bd);
+
+static int tse_mdio_read(struct altera_tse_priv *priv, unsigned int regnum);
+static int tse_mdio_write(struct altera_tse_priv *priv, unsigned int regnum,
+ unsigned int value);
+#define read_phy_reg(priv, regnum) tse_mdio_read(priv, regnum)
+#define write_phy_reg(priv, regnum, value) tse_mdio_write(priv, regnum, value)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) !defined(BITBANGMII)
+static int altera_tse_miiphy_write(char *devname, unsigned char addr,
+ unsigned char reg, unsigned short value);
+static int altera_tse_miiphy_read(char *devname, unsigned char addr,
+ unsigned char reg, unsigned short *value);
+#endif
+
+static int tse_adjust_link(struct altera_tse_priv *priv);
+
+static uint mii_parse_88E1011_psr(uint mii_reg, struct altera_tse_priv *priv);
+static uint mii_parse_sr(uint mii_reg, struct altera_tse_priv *priv);
+static uint mii_m88es_setmode_sr(uint mii_reg,
+struct altera_tse_priv *priv);
+static uint mii_m88es_setmode_cr(uint mii_reg,
+struct altera_tse_priv *priv);
+static uint mii_cr_init(uint mii_reg, struct altera_tse_priv *priv);
+
+static struct phy_info *get_phy_info(struct eth_device *dev);
+static void phy_run_commands(struct altera_tse_priv *priv, struct phy_cmd
*cmd);
+static int init_phy(struct eth_device *dev);
+
+/* sgdma debug - print descriptor */
+static void alt_sgdma_print_desc(volatile struct alt_sgdma_descriptor *desc)
+{
+ debug(SGDMA DEBUG :\n);
+ debug(desc-source : 0x%x \n, (unsigned int)desc-source);
+ debug(desc-destination : 0x%x \n, (unsigned int)desc-destination);
+ debug(desc-next : 0x%x \n, (unsigned int)desc-next);
+ debug(desc-source_pad : 0x%x \n, (unsigned int)desc-source_pad);
+ debug(desc-destination_pad : 0x%x \n,
+ (unsigned int)desc-destination_pad);
+ debug(desc-next_pad : 0x%x \n, (unsigned int)desc-next_pad);
+ debug(desc-bytes_to_transfer : 0x%x \n,
+ (unsigned int)desc-bytes_to_transfer);
+ debug(desc-actual_bytes_transferred : 0x%x \n,
+ (unsigned int)desc-actual_bytes_transferred);
+ debug(desc-descriptor_status : 0x%x \n,
+ (unsigned int)desc-descriptor_status);
+ debug(desc-descriptor_control : 0x%x \n,
+ (unsigned int)desc-descriptor_control);
+}
+
+/* This is a generic routine that the SGDMA mode-specific routines
+ * call to populate a descriptor.
+ * arg1 :pointer to first SGDMA descriptor.
+ * arg2 :pointer to next SGDMA descriptor.
+ * arg3 :Address to where data to be written.
+ * arg4 :Address from where data to be read.
+ * arg5 :no of byte to transaction.
+ * arg6 :variable indicating to generate start of packet or not
+ * arg7 :read fixed
+ * arg8 :write fixed
+ * arg9 :read burst
+ * arg10:write burst
+ * arg11:atlantic_channel number
+ */
+static void alt_sgdma_construct_descriptor_burst(
+
[U-Boot] ppc u-boot string comparison problem
Hi denx, I am using u-boot-1.3.4 on my MPC7410 based target. I am facing one problem on using different ELDK version. On my custom application i just want compare two strings, based upon that i need to print some string. So when i use ELDK-4.2 this is working fine for me but in case of using ELDK-4.0 FPU unavailable exception is coming. Thank you Thirumalai ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] net: add altera triple speeds ethernet mac driver
This driver supports the Altera triple speeds 10/100/1000 ethernet
mac.
Signed-off-by: Thomas Chou tho...@wytron.com.tw
---
drivers/net/Makefile |1 +
drivers/net/altera_tse.c | 978 ++
drivers/net/altera_tse.h | 512
include/netdev.h |1 +
4 files changed, 1492 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/altera_tse.c
create mode 100644 drivers/net/altera_tse.h
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 0e68e52..b75c02f 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -27,6 +27,7 @@ LIB := $(obj)libnet.a
COBJS-$(CONFIG_DRIVER_3C589) += 3c589.o
COBJS-$(CONFIG_PPC4xx_EMAC) += 4xx_enet.o
+COBJS-$(CONFIG_ALTERA_TSE) += altera_tse.o
COBJS-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
COBJS-$(CONFIG_DRIVER_AX88180) += ax88180.o
COBJS-$(CONFIG_BCM570x) += bcm570x.o bcm570x_autoneg.o 5701rls.o
diff --git a/drivers/net/altera_tse.c b/drivers/net/altera_tse.c
new file mode 100644
index 000..10c1956
--- /dev/null
+++ b/drivers/net/altera_tse.c
@@ -0,0 +1,978 @@
+/*
+ * altera 10/100/1000 triple speed ethernet mac driver
+ *
+ * Copyright (C) 2008 Altera Corporation.
+ * Copyright (C) 2010 Thomas Chou tho...@wytron.com.tw
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include config.h
+#include common.h
+#include malloc.h
+#include net.h
+#include command.h
+#include asm/cache.h
+#include asm/dma-mapping.h
+#include miiphy.h
+#include altera_tse.h
+
+static int tse_eth_send(struct eth_device *dev, volatile void *packet,
+ int length);
+static int tse_eth_rx(struct eth_device *dev);
+static void tse_eth_halt(struct eth_device *dev);
+static void tse_eth_reset(struct eth_device *dev);
+static int tse_eth_init(struct eth_device *dev, bd_t *bd);
+
+static int tse_mdio_read(struct altera_tse_priv *priv, unsigned int regnum);
+static int tse_mdio_write(struct altera_tse_priv *priv, unsigned int regnum,
+ unsigned int value);
+#define read_phy_reg(priv, regnum) tse_mdio_read(priv, regnum)
+#define write_phy_reg(priv, regnum, value) tse_mdio_write(priv, regnum, value)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) !defined(BITBANGMII)
+static int altera_tse_miiphy_write(char *devname, unsigned char addr,
+ unsigned char reg, unsigned short value);
+static int altera_tse_miiphy_read(char *devname, unsigned char addr,
+ unsigned char reg, unsigned short *value);
+#endif
+
+static int tse_adjust_link(struct altera_tse_priv *priv);
+
+static uint mii_parse_88E1011_psr(uint mii_reg, struct altera_tse_priv *priv);
+static uint mii_parse_sr(uint mii_reg, struct altera_tse_priv *priv);
+static uint mii_m88es_setmode_sr(uint mii_reg,
+struct altera_tse_priv *priv);
+static uint mii_m88es_setmode_cr(uint mii_reg,
+struct altera_tse_priv *priv);
+static uint mii_cr_init(uint mii_reg, struct altera_tse_priv *priv);
+
+static struct phy_info *get_phy_info(struct eth_device *dev);
+static void phy_run_commands(struct altera_tse_priv *priv, struct phy_cmd
*cmd);
+static int init_phy(struct eth_device *dev);
+
+/* sgdma debug - print descriptor */
+static void alt_sgdma_print_desc(volatile struct alt_sgdma_descriptor *desc)
+{
+ debug(SGDMA DEBUG :\n);
+ debug(desc-source : 0x%x \n, (unsigned int)desc-source);
+ debug(desc-destination : 0x%x \n, (unsigned int)desc-destination);
+ debug(desc-next : 0x%x \n, (unsigned int)desc-next);
+ debug(desc-source_pad : 0x%x \n, (unsigned int)desc-source_pad);
+ debug(desc-destination_pad : 0x%x \n,
+ (unsigned int)desc-destination_pad);
+ debug(desc-next_pad : 0x%x \n, (unsigned int)desc-next_pad);
+ debug(desc-bytes_to_transfer : 0x%x \n,
+ (unsigned int)desc-bytes_to_transfer);
+ debug(desc-actual_bytes_transferred : 0x%x \n,
+ (unsigned int)desc-actual_bytes_transferred);
+ debug(desc-descriptor_status : 0x%x \n,
+ (unsigned int)desc-descriptor_status);
+ debug(desc-descriptor_control : 0x%x \n,
+ (unsigned int)desc-descriptor_control);
+}
+
+/* This is a generic routine that the SGDMA mode-specific routines
+ * call to populate a descriptor.
+ * arg1 :pointer to first SGDMA descriptor.
+ * arg2 :pointer to next SGDMA descriptor.
+ * arg3 :Address to where data to be written.
+ * arg4 :Address from where data to be read.
+ * arg5 :no of byte to transaction.
+ * arg6 :variable indicating to generate start of packet or not
+ * arg7 :read fixed
+ * arg8 :write fixed
+ * arg9 :read burst
+ * arg10:write burst
+ * arg11:atlantic_channel number
+
[U-Boot] [RFC][PATCH 01/21] [x86] Add unaligned.h
--- include/asm-i386/unaligned.h | 14 ++ 1 files changed, 14 insertions(+), 0 deletions(-) create mode 100644 include/asm-i386/unaligned.h diff --git a/include/asm-i386/unaligned.h b/include/asm-i386/unaligned.h new file mode 100644 index 000..1e16b7d --- /dev/null +++ b/include/asm-i386/unaligned.h @@ -0,0 +1,14 @@ +#ifndef _ASM_ARM_UNALIGNED_H +#define _ASM_ARM_UNALIGNED_H + +/* + * The x86 can do unaligned accesses itself. + */ + +#include linux/unaligned/access_ok.h +#include linux/unaligned/generic.h + +#define get_unaligned __get_unaligned_le +#define put_unaligned __put_unaligned_le + +#endif /* _ASM_ARM_UNALIGNED_H */ -- 1.7.0.2.182.ge007 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC][PATCH 02/21] [x86] #ifdef out getenv_IPaddr()
--- I cannot recall exactly why this is needed but it is lib_i386/board.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/lib_i386/board.c b/lib_i386/board.c index f3b6348..af81cd5 100644 --- a/lib_i386/board.c +++ b/lib_i386/board.c @@ -280,8 +280,10 @@ void board_init_r(gd_t *id, ulong ram_start) show_boot_progress(0x26); +#ifdef CONFIG_CMD_NET /* IP Address */ bd_data.bi_ip_addr = getenv_IPaddr (ipaddr); +#endif #if defined(CONFIG_PCI) /* -- 1.7.0.2.182.ge007 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC][PATCH 17/21] [eNET] Fix Flash Write
Onboard AMD Flash chip does not support buffered writes --- include/configs/eNET.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/eNET.h b/include/configs/eNET.h index 971840f..58f63f8 100644 --- a/include/configs/eNET.h +++ b/include/configs/eNET.h @@ -197,7 +197,7 @@ CONFIG_SYS_FLASH_BASE_1, \ CONFIG_SYS_FLASH_BASE_2} #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#undef CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT #define CONFIG_SYS_FLASH_LEGACY_512Kx8 -- 1.7.0.2.182.ge007 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC][PATCH 03/21] [x86] Fix MMCR Access
Change sc520 MMCR Access to use memory accessor functions
---
board/eNET/eNET.c| 86 +-
cpu/i386/sc520/sc520.c | 33 +---
cpu/i386/sc520/sc520_pci.c | 24 +++
cpu/i386/sc520/sc520_ssi.c | 27 +++--
cpu/i386/sc520/sc520_timer.c | 31 ---
5 files changed, 106 insertions(+), 95 deletions(-)
diff --git a/board/eNET/eNET.c b/board/eNET/eNET.c
index 6d0b15a..f794beb 100644
--- a/board/eNET/eNET.c
+++ b/board/eNET/eNET.c
@@ -46,7 +46,7 @@ unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN;
void init_sc520_enet (void)
{
/* Set CPU Speed to 100MHz */
- sc520_mmcr-cpuctl = 0x01;
+ writeb(0x01, sc520_mmcr-cpuctl);
/* wait at least one millisecond */
asm(movl $0x2000,%%ecx\n
@@ -55,7 +55,7 @@ void init_sc520_enet (void)
loop 0b\n: : : ecx);
/* turn on the SDRAM write buffer */
- sc520_mmcr-dbctl = 0x11;
+ writeb(0x11, sc520_mmcr-dbctl);
/* turn on the cache and disable write through */
asm(movl %%cr0, %%eax\n
@@ -70,51 +70,51 @@ int board_early_init_f(void)
{
init_sc520_enet();
- sc520_mmcr-gpcsrt = 0x01; /* GP Chip Select Recovery Time
*/
- sc520_mmcr-gpcspw = 0x07; /* GP Chip Select Pulse Width */
- sc520_mmcr-gpcsoff = 0x00; /* GP Chip Select Offset */
- sc520_mmcr-gprdw = 0x05; /* GP Read pulse width */
- sc520_mmcr-gprdoff = 0x01; /* GP Read offset */
- sc520_mmcr-gpwrw = 0x05; /* GP Write pulse width */
- sc520_mmcr-gpwroff = 0x01; /* GP Write offset */
-
- sc520_mmcr-piodata15_0 = 0x0630; /* PIO15_PIO0 Data */
- sc520_mmcr-piodata31_16 = 0x2000; /* PIO31_PIO16 Data */
- sc520_mmcr-piodir31_16 = 0x2000; /* GPIO Direction */
- sc520_mmcr-piodir15_0 = 0x87b5;/* GPIO Direction */
- sc520_mmcr-piopfs31_16 = 0x0dfe; /* GPIO pin function 31-16 reg
*/
- sc520_mmcr-piopfs15_0 = 0x200a;/* GPIO pin function 15-0 reg */
- sc520_mmcr-cspfs = 0x00f8; /* Chip Select Pin Function
Select */
-
- sc520_mmcr-par[2] = 0x200713f8;/* Uart A (GPCS0, 0x013f8, 8
Bytes) */
- sc520_mmcr-par[3] = 0x2c0712f8;/* Uart B (GPCS3, 0x012f8, 8
Bytes) */
- sc520_mmcr-par[4] = 0x300711f8;/* Uart C (GPCS4, 0x011f8, 8
Bytes) */
- sc520_mmcr-par[5] = 0x340710f8;/* Uart D (GPCS5, 0x010f8, 8
Bytes) */
- sc520_mmcr-par[6] = 0xe3ffc000; /* SDRAM (0x, 128MB) */
- sc520_mmcr-par[7] = 0xaa3fd000;/* StrataFlash (ROMCS1,
0x1000, 16MB) */
- sc520_mmcr-par[8] = 0xca3fd100;/* StrataFlash (ROMCS2,
0x1100, 16MB) */
- sc520_mmcr-par[9] = 0x4203d900;/* SRAM (GPCS0, 0x1900,
1MB) */
- sc520_mmcr-par[10] = 0x4e03d910; /* SRAM (GPCS3, 0x1910,
1MB) */
- sc520_mmcr-par[11] = 0x50018100; /* DP-RAM (GPCS4, 0x1810,
4kB) */
- sc520_mmcr-par[12] = 0x5402; /* CFLASH1 (0x2, 4kB) */
- sc520_mmcr-par[13] = 0x5c020001; /* CFLASH2 (0x20001, 4kB) */
-/* sc520_mmcr-par14 = 0x8bfff800; */ /* BOOTCS at 0x1800 */
-/* sc520_mmcr-par15 = 0x38201000; */ /* LEDs etc (GPCS6, 0x1000, 20
Bytes */
+ writeb(0x01, sc520_mmcr-gpcsrt); /* GP Chip Select
Recovery Time */
+ writeb(0x07, sc520_mmcr-gpcspw); /* GP Chip Select Pulse
Width */
+ writeb(0x00, sc520_mmcr-gpcsoff); /* GP Chip Select
Offset */
+ writeb(0x05, sc520_mmcr-gprdw); /* GP Read pulse width
*/
+ writeb(0x01, sc520_mmcr-gprdoff); /* GP Read offset */
+ writeb(0x05, sc520_mmcr-gpwrw); /* GP Write pulse width
*/
+ writeb(0x01, sc520_mmcr-gpwroff); /* GP Write offset */
+
+ writew(0x0630, sc520_mmcr-piodata15_0); /* PIO15_PIO0 Data */
+ writew(0x2000, sc520_mmcr-piodata31_16); /* PIO31_PIO16 Data */
+ writew(0x2000, sc520_mmcr-piodir31_16); /* GPIO Direction */
+ writew(0x87b5, sc520_mmcr-piodir15_0);/* GPIO Direction */
+ writew(0x0dfe, sc520_mmcr-piopfs31_16); /* GPIO pin function
31-16 reg */
+ writew(0x200a, sc520_mmcr-piopfs15_0);/* GPIO pin function
15-0 reg */
+ writeb(0xf8, sc520_mmcr-cspfs); /* Chip Select Pin
Function Select */
+
+ writel(0x200713f8, sc520_mmcr-par[2]);/* Uart A (GPCS0,
0x013f8, 8 Bytes) */
+ writel(0x2c0712f8, sc520_mmcr-par[3]);/* Uart B (GPCS3,
0x012f8, 8 Bytes) */
+ writel(0x300711f8, sc520_mmcr-par[4]);/* Uart C (GPCS4,
0x011f8, 8 Bytes) */
+ writel(0x340710f8, sc520_mmcr-par[5]);/* Uart D (GPCS5,
0x010f8, 8 Bytes) */
+
[U-Boot] [RFC][PATCH 09/21] [x86] Move GDT to a safe location in RAM
Currently, the GDT is either located in FLASH or in the non-relocated U-Boot image in RAM. Both of these locations are unsafe as those locations can be erased during a U-Boot update. Move the GDT into the highest available memory location and relocate U-Boot to just below it --- cpu/i386/start.S | 110 +--- cpu/i386/start16.S | 28 +++-- 2 files changed, 111 insertions(+), 27 deletions(-) diff --git a/cpu/i386/start.S b/cpu/i386/start.S index e1d4492..8874470 100644 --- a/cpu/i386/start.S +++ b/cpu/i386/start.S @@ -49,13 +49,8 @@ _i386boot_start: movl%eax, %cr0 wbinvd - lidtblank_idt_ptr - - /* Tell 32-bit code it is being entered from */ + /* Tell 32-bit code it is being entered from an in-RAM copy */ movw$0x, %bx - - /* Flush the prefetch queue */ - jmp _start _start: /* This is the 32-bit cold-reset entry point */ @@ -67,6 +62,9 @@ _start: movw%ax,%es movw%ax,%ss + /* Clear the interupt vectors */ + lidtblank_idt_ptr + /* * Skip low-level board and memory initialization if not starting * from cold-reset. This allows us to do a fail safe boot-strap @@ -102,6 +100,53 @@ mem_init_ret: jmp get_mem_size get_mem_size_ret: + /* +* We are now in 'Flat Protected Mode' and we know how much memory +* the board has. The (temporary) Global Descriptor Table is not +* in a 'Safe' place (it is either in Flash which can be erased or +* reprogrammed or in a fail-safe boot-strap image which could be +* over-ridden). +* +* Move the final gdt to a safe place (top of RAM) and load it. +* This is not a trivial excercise - the lgdt instruction does not +* have a register operand (memory only) and we may well be +* running from Flash, so self modifying code will not work here. +* To overcome this, we copy a stub into upper memory along with +* the GDT. +*/ + + /* Reduce upper memory limit by (Stub + GDT Pointer + GDT) */ + subl$(end_gdt_setup - start_gdt_setup), %eax + + /* Copy the GDT and Stub */ + movl$start_gdt_setup, %esi + movl%eax, %edi + movl$(end_gdt_setup - start_gdt_setup), %ecx + shrl$2, %ecx + cld + rep movsl + + /* write the lgdt 'parameter' */ + subl$(jmp_instr - start_gdt_setup - 4), %ebp + addl%eax, %ebp + movl$(gdt_ptr - start_gdt_setup), %ebx + addl%eax, %ebx + movl%ebx, (%ebp) + + /* write the gdt address into the pointer */ + movl$(gdt_addr - start_gdt_setup), %ebp + addl%eax, %ebp + movl$(gdt - start_gdt_setup), %ebx + addl%eax, %ebx + movl%ebx, (%ebp) + + /* Save the return address */ + movl$load_gdt_ret, %ebp + + /* Load the new (safe) Global Descriptor Table */ + jmp *%eax + +load_gdt_ret: /* Check we have enough memory for stack */ movl$CONFIG_SYS_STACK_SIZE, %ecx cmpl%ecx, %eax @@ -172,3 +217,56 @@ stack_ok: die: hlt jmp die hlt + +blank_idt_ptr: + .word 0 /* limit */ + .long 0 /* base */ + +.align 4 +start_gdt_setup: + lgdtgdt_ptr +jmp_instr: + jmp *%ebp + +.align 4 +gdt_ptr: + .word 0x30/* limit (48 bytes = 6 GDT entries) */ +gdt_addr: + .long gdt /* base */ + + /* The GDT table ... +* +* Selector Type +* 0x00 NULL +* 0x08 Unused +* 0x10 32bit code +* 0x18 32bit data/stack +* 0x20 16bit code +* 0x28 16bit data/stack +*/ + +.align 4 +gdt: + .word 0, 0, 0, 0 /* NULL */ + .word 0, 0, 0, 0 /* unused */ + + .word 0x /* 4Gb - (0x10*0x1000 = 4Gb) */ + .word 0 /* base address = 0 */ + .word 0x9B00 /* code read/exec */ + .word 0x00CF /* granularity = 4096, 386 (+5th nibble of limit) */ + + .word 0x /* 4Gb - (0x10*0x1000 = 4Gb) */ + .word 0x0 /* base address = 0 */ + .word 0x9300 /* data read/write */ + .word 0x00CF /* granularity = 4096, 386 (+5th nibble of limit) */ + + .word 0x /* 64kb */ + .word 0 /* base address = 0 */ + .word 0x9b00 /* data read/write */ + .word 0x0010 /* granularity = 1 (+5th nibble of limit) */ + + .word 0x /* 64kb */ + .word 0 /* base address = 0 */ + .word 0x9300 /*
[U-Boot] [RFC][PATCH 14/21] [x86] Provide weak PC/AT compatibility setup function
It is possibly to setup x86 boards to use non-PC/AT configurations. For
example, the sc520 is an x86 CPU with PC/AT and non-PC/AT peripherals.
This function allows the board to set itself up for maximum PC/AT
compatibility just before booting the Linux kernel (the Linux kernel
'just works' if everything is PC/AT compliant)
---
include/asm-i386/u-boot-i386.h |2 ++
lib_i386/board.c |8
2 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/include/asm-i386/u-boot-i386.h b/include/asm-i386/u-boot-i386.h
index 7c99c8c..2bce82e 100644
--- a/include/asm-i386/u-boot-i386.h
+++ b/include/asm-i386/u-boot-i386.h
@@ -43,6 +43,8 @@ int cpu_init_interrupts(void);
int board_init(void);
int dram_init(void);
+void setup_pcat_compatibility(void);
+
void isa_unmap_rom(u32 addr);
u32 isa_map_rom(u32 bus_addr, int size);
diff --git a/lib_i386/board.c b/lib_i386/board.c
index 7115a2f..b852ed1 100644
--- a/lib_i386/board.c
+++ b/lib_i386/board.c
@@ -441,3 +441,11 @@ unsigned long do_go_exec (ulong (*entry)(int, char *[]),
int argc, char *argv[])
return (entry) (argc, argv);
}
+
+void setup_pcat_compatibility(void)
+ __attribute__((weak, alias(__setup_pcat_compatibility)));
+
+void __setup_pcat_compatibility(void)
+{
+}
+
--
1.7.0.2.182.ge007
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC][PATCH 10/21] [x86] Pass relocation offset into Global Data
In order to locate the 16-bit BIOS code, we need to know the reloaction
offset.
---
This was a lot tricker than it should have been
---
lib_i386/board.c | 63 ++---
1 files changed, 36 insertions(+), 27 deletions(-)
diff --git a/lib_i386/board.c b/lib_i386/board.c
index 5e28c6f..947a8ec 100644
--- a/lib_i386/board.c
+++ b/lib_i386/board.c
@@ -52,7 +52,9 @@ extern ulong _i386boot_rel_dyn_start;
extern ulong _i386boot_rel_dyn_end;
extern ulong _i386boot_bss_start;
extern ulong _i386boot_bss_size;
-void ram_bootstrap (void *);
+
+void ram_bootstrap (void *, ulong);
+
const char version_string[] =
U_BOOT_VERSION ( U_BOOT_DATE - U_BOOT_TIME );
@@ -162,6 +164,7 @@ init_fnc_t *init_sequence[] = {
NULL,
};
+static gd_t gd_data;
gd_t *gd;
/*
@@ -174,21 +177,18 @@ void board_init_f (ulong stack_limit)
Elf32_Rel *rel_dyn_start = (Elf32_Rel *)_i386boot_rel_dyn_start;
Elf32_Rel *rel_dyn_end = (Elf32_Rel *)_i386boot_rel_dyn_end;
void *bss_start = _i386boot_bss_start;
- void *bss_size = _i386boot_bss_size;
+ ulong bss_size = (ulong)_i386boot_bss_size;
- size_t uboot_size;
- void *ram_start;
+ ulong uboot_size;
+ void *dest_addr;
ulong rel_offset;
Elf32_Rel *re;
- void (*start_func)(void *);
-
- /* compiler optimization barrier needed for GCC = 3.4 */
- __asm__ __volatile__(: : :memory);
+ void (*start_func)(void *, ulong);
- uboot_size = (size_t)u_boot_cmd_end - (size_t)text_start;
- ram_start = (void *)stack_limit - (uboot_size + (ulong)bss_size);
- rel_offset = text_start - ram_start;
+ uboot_size = (ulong)u_boot_cmd_end - (ulong)text_start;
+ dest_addr = (void *)stack_limit - (uboot_size + (ulong)bss_size);
+ rel_offset = text_start - dest_addr;
start_func = ram_bootstrap - rel_offset;
/* First stage CPU initialization */
@@ -200,10 +200,10 @@ void board_init_f (ulong stack_limit)
hang();
/* Copy U-Boot into RAM */
- memcpy(ram_start, text_start, (size_t)uboot_size);
+ memcpy(dest_addr, text_start, uboot_size);
/* Clear BSS */
- memset(bss_start - rel_offset, 0, (size_t)bss_size);
+ memset(bss_start - rel_offset, 0, bss_size);
/* Perform relocation adjustments */
for (re = rel_dyn_start; re rel_dyn_end; re++)
@@ -213,27 +213,39 @@ void board_init_f (ulong stack_limit)
*(ulong *)(re-r_offset - rel_offset) -=
(Elf32_Addr)rel_offset;
}
- start_func(ram_start);
-
- /* NOTREACHED - relocate_code() does not return */
+ /* Enter the relocated U-Boot! */
+ start_func(dest_addr, rel_offset);
+ /* NOTREACHED - board_init_f() does not return */
while(1);
}
/*
- * All attempts to jump straight from board_init_f() to board_init_r()
- * have failed, hence this special 'bootstrap' function.
+ * We cannot initialize gd_data in board_init_f() because we would be
+ * attempting to write to flash (I have even tried using manual relocation
+ * adjustments on pointers but it just won't work) and board_init_r() does
+ * not have enough arguments to allow us to pass the relocation offset
+ * straight up. This bootstrap function (which runs in RAM) is used to
+ * setup gd_data in order to pass the relocation offset to the rest of
+ * U-Boot.
+ *
+ * TODO: The compiler optimization barrier is intended to stop GCC from
+ * optimizing this function into board_init_f(). It seems to work without
+ * it, but I've left it in to be sure. I think also that the barrier in
+ * board_init_r() is no longer needed, but left it in 'just in case'
*/
-void ram_bootstrap (void *ram_start)
+void ram_bootstrap (void *dest_addr, ulong rel_offset)
{
- static gd_t gd_data;
-
/* compiler optimization barrier needed for GCC = 3.4 */
__asm__ __volatile__(: : :memory);
- board_init_r(gd_data, (ulong)ram_start);
+ /* tell others: relocation done */
+ gd_data.reloc_off = rel_offset;
+ gd_data.flags |= GD_FLG_RELOC;
+
+ board_init_r(gd_data, (ulong)dest_addr);
}
-void board_init_r(gd_t *id, ulong ram_start)
+void board_init_r(gd_t *id, ulong dest_addr)
{
char *s;
int i;
@@ -247,16 +259,13 @@ void board_init_r(gd_t *id, ulong ram_start)
/* compiler optimization barrier needed for GCC = 3.4 */
__asm__ __volatile__(: : :memory);
- memset (gd, 0, sizeof (gd_t));
gd-bd = bd_data;
memset (gd-bd, 0, sizeof (bd_t));
show_boot_progress(0x22);
gd-baudrate = CONFIG_BAUDRATE;
- gd-flags |= GD_FLG_RELOC; /* tell others: relocation done */
-
- mem_malloc_initulong)ram_start - CONFIG_SYS_MALLOC_LEN)+3)~3,
+ mem_malloc_initulong)dest_addr - CONFIG_SYS_MALLOC_LEN)+3)~3,
CONFIG_SYS_MALLOC_LEN);
[U-Boot] [RFC][PATCH 00/21] [x86] 'Comming of Age'
Hello Everyone It has been a while since I posted to the U-Boot list, but I have not been idle. This patch series represents a 'comming of age' for the x86 U-Boot port. I can now boot a Linux 2.6.33 kernel *very happy hacker* I've spent a lot of effort organising and cleaning up this patch series for community comment. This is an RFC patchset only - Over the next few days/weeks I plan to rebuild from scratch at each patch and apply a few little tidy-ups but the content and numbering of this series should not change. This patch series can be examined as several distinct functional changes - Patches 1-3 are x86 specific build and core fixups - Patches 4-11 are x86 specific functional improvements - Patches 12-13 switch the x86 port to CONFIG_SERIAL_MULTI - Patches 14-15 provide Linux boot support - Patch 16 is an sc520 specific patch (this one can be delayed) - Patches 17-21 are various eNET specific patches I will draw your attentions to patches 12,13 and 19. These are the only patches which touch files outside the x86 tree. In particular patch 19 - I had to tweak how the eNET accessed the PCI Address Space (don't know if this is really the correct terminology) Once this patchset is applied I believe the x86 port of U-Boot will be ready for more mainstream use Wolfgang - If there is any other renewed interest in the x86 port, I would be more than happy to be an official custodian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC][PATCH 06/21] [x86] Fix sc520 memory size reporting
There is an error in how the assembler version of the sc520 memory size reporting code works. As a result, it will only ever report at most the size of one bank of RAM --- cpu/i386/sc520/sc520_asm.S | 35 +-- 1 files changed, 17 insertions(+), 18 deletions(-) diff --git a/cpu/i386/sc520/sc520_asm.S b/cpu/i386/sc520/sc520_asm.S index 2042d9b..135f7b4 100644 --- a/cpu/i386/sc520/sc520_asm.S +++ b/cpu/i386/sc520/sc520_asm.S @@ -503,38 +503,37 @@ dram_done: movl$DRCBENDADR, %edi/* DRAM ending address register */ - movl(%edi), %eax - movl%eax, %ecx - andl$0x8000, %ecx - jz bank2 - andl$0x7f00, %eax - shrl$2, %eax - movl%eax, %ebx - -bank2: movl(%edi), %eax +bank0: movl(%edi), %eax movl%eax, %ecx - andl$0x0080, %ecx + andl$0x0080, %ecx jz bank1 - andl$0x007f, %eax - shll$6, %eax + andl$0x007f, %eax + shll$22, %eax movl%eax, %ebx bank1: movl(%edi), %eax movl%eax, %ecx andl$0x8000, %ecx - jz bank0 + jz bank2 andl$0x7f00, %eax shll$14, %eax movl%eax, %ebx -bank0: movl(%edi), %eax +bank2: movl(%edi), %eax movl%eax, %ecx - andl$0x0080, %ecx - jz done - andl$0x007f, %eax - shll$22, %eax + andl$0x0080, %ecx + jz bank3 + andl$0x007f, %eax + shll$6, %eax movl%eax, %ebx +bank3: movl(%edi), %eax + movl%eax, %ecx + andl$0x8000, %ecx + jz done + andl$0x7f00, %eax + shrl$2, %eax + movl%eax, %ebx done: movl%ebx, %eax -- 1.7.0.2.182.ge007 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC][PATCH 11/21] [x86] Fix copying of Real-Mode code into RAM
Now that the relocation offset is in Global Data, we can locate the BIOS
code in the U-Boot image
---
lib_i386/bios_setup.c |2 +-
lib_i386/realmode.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib_i386/bios_setup.c b/lib_i386/bios_setup.c
index 6491e52..a92b77e 100644
--- a/lib_i386/bios_setup.c
+++ b/lib_i386/bios_setup.c
@@ -141,7 +141,7 @@ static void setvector(int vector, u16 segment, void
*handler)
int bios_setup(void)
{
- ulong i386boot_bios = (ulong)_i386boot_bios;
+ ulong i386boot_bios = (ulong)_i386boot_bios + gd-reloc_off;
ulong i386boot_bios_size = (ulong)_i386boot_bios_size;
static int done=0;
diff --git a/lib_i386/realmode.c b/lib_i386/realmode.c
index 3c3c1fc..b3f5123 100644
--- a/lib_i386/realmode.c
+++ b/lib_i386/realmode.c
@@ -37,7 +37,7 @@ extern char realmode_enter;
int realmode_setup(void)
{
- ulong i386boot_realmode = (ulong)_i386boot_realmode;
+ ulong i386boot_realmode = (ulong)_i386boot_realmode +
gd-reloc_off;
ulong i386boot_realmode_size = (ulong)_i386boot_realmode_size;
/* copy the realmode switch code */
--
1.7.0.2.182.ge007
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[U-Boot] [RFC][PATCH 16/21] [sc520] Allow boards to override udelay
If the board has a high precision mico-second timer, it maked sense to use
it instead of the on-chip one
---
cpu/i386/sc520/sc520_timer.c |4
include/asm-i386/ic/sc520.h |1 +
2 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/cpu/i386/sc520/sc520_timer.c b/cpu/i386/sc520/sc520_timer.c
index eca48e0..d5617e9 100644
--- a/cpu/i386/sc520/sc520_timer.c
+++ b/cpu/i386/sc520/sc520_timer.c
@@ -69,7 +69,11 @@ int timer_init(void)
return 0;
}
+/* Allow boards to override udelay implementation */
void __udelay(unsigned long usec)
+ __attribute__((weak, alias(sc520_udelay)));
+
+void sc520_udelay(unsigned long usec)
{
int m = 0;
long u;
diff --git a/include/asm-i386/ic/sc520.h b/include/asm-i386/ic/sc520.h
index 57c9904..20384a4 100644
--- a/include/asm-i386/ic/sc520.h
+++ b/include/asm-i386/ic/sc520.h
@@ -28,6 +28,7 @@
void init_sc520(void);
unsigned long init_sc520_dram(void);
+void sc520_udelay(unsigned long usec);
/* Memory mapped configuration registers */
typedef struct sc520_mmcr {
--
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[U-Boot] [RFC][PATCH 19/21] [eNET] Add support for onboard RTL8100B (RTL8139) chips
---
I simply do not know why PCI_BASE_ADDRESS_1 has to be changed to
PCI_BASE_ADDRESS_0 - Please comment
board/eNET/eNET.c | 12
drivers/net/rtl8139.c |2 +-
include/asm-i386/ic/sc520.h |6 +++---
include/configs/eNET.h |9 -
4 files changed, 24 insertions(+), 5 deletions(-)
diff --git a/board/eNET/eNET.c b/board/eNET/eNET.c
index 52ea140..9d782f3 100644
--- a/board/eNET/eNET.c
+++ b/board/eNET/eNET.c
@@ -24,6 +24,8 @@
#include common.h
#include asm/io.h
#include asm/ic/sc520.h
+#include net.h
+#include netdev.h
#ifdef CONFIG_HW_WATCHDOG
#include watchdog.h
@@ -173,3 +175,13 @@ ulong board_flash_get_legacy (ulong base, int banknum,
flash_info_t * info)
} else
return 0;
}
+
+int board_eth_init(bd_t *bis)
+{
+ int adapters;
+ adapters = pci_eth_init(bis);
+
+ if (adapters 0)
+ eth_init(bis);
+
+ return adapters;
diff --git a/drivers/net/rtl8139.c b/drivers/net/rtl8139.c
index db8a727..a3df564 100644
--- a/drivers/net/rtl8139.c
+++ b/drivers/net/rtl8139.c
@@ -214,7 +214,7 @@ int rtl8139_initialize(bd_t *bis)
if ((devno = pci_find_devices(supported, idx++)) 0)
break;
- pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, iobase);
+ pci_read_config_dword(devno, PCI_BASE_ADDRESS_0, iobase);
iobase = ~0xf;
debug (rtl8139: REALTEK RTL8139 @0x%x\n, iobase);
diff --git a/include/asm-i386/ic/sc520.h b/include/asm-i386/ic/sc520.h
index 20384a4..d19cac6 100644
--- a/include/asm-i386/ic/sc520.h
+++ b/include/asm-i386/ic/sc520.h
@@ -307,14 +307,14 @@ extern volatile sc520_mmcr_t *sc520_mmcr;
/* PCI I/O space from 0x1000 to 0xdfff
* (make 0xe000-0xfdff available for stuff like PCCard boot) */
-#define SC520_PCI_IO_PHYS 0x1000
-#define SC520_PCI_IO_BUS 0x1000
+#define SC520_PCI_IO_PHYS 0x2000
+#define SC520_PCI_IO_BUS 0x2000
#define SC520_PCI_IO_SIZE 0xd000
/* system memory from 0x to 0x0fff */
#defineSC520_PCI_MEMORY_PHYS 0x
#defineSC520_PCI_MEMORY_BUS0x
-#define SC520_PCI_MEMORY_SIZE 0x1000
+#define SC520_PCI_MEMORY_SIZE 0x0800
/* PCI bus memory from 0x1000 to 0x26ff
* (make 0x2700 - 0x27ff available for stuff like PCCard boot) */
diff --git a/include/configs/eNET.h b/include/configs/eNET.h
index 19a81b8..4380bb1 100644
--- a/include/configs/eNET.h
+++ b/include/configs/eNET.h
@@ -104,9 +104,10 @@
#define CONFIG_CMD_LOADS /* loads*/
#define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop mtest */
#define CONFIG_CMD_MISC/* Misc functions like sleep etc*/
-#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot*/
+#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot*/
#undef CONFIG_CMD_NFS /* NFS support */
#define CONFIG_CMD_PCI /* PCI support */
+#define CONFIG_CMD_PING/* ICMP echo support*/
#define CONFIG_CMD_RUN /* run command in env variable */
#define CONFIG_CMD_SAVEENV /* saveenv */
#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
@@ -225,6 +226,12 @@
#define CONFIG_SYS_THIRD_PCI_IRQ 11
#define CONFIG_SYS_FORTH_PCI_IRQ 15
+ /*
+ * Network device (TRL8100B) support
+ */
+#define CONFIG_NET_MULTI
+#define CONFIG_RTL8139
+
/*---
* Hardware watchdog configuration
*/
--
1.7.0.2.182.ge007
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[U-Boot] [RFC][PATCH 13/21] [x86] Use CONFIG_SERIAL_MULTI
--- board/eNET/eNET.c |3 +- common/serial.c|3 +- cpu/i386/Makefile |2 +- cpu/i386/serial.c | 506 include/configs/eNET.h | 25 ++- include/serial.h |3 +- lib_i386/board.c |5 +- 7 files changed, 31 insertions(+), 516 deletions(-) delete mode 100644 cpu/i386/serial.c diff --git a/board/eNET/eNET.c b/board/eNET/eNET.c index f794beb..52ea140 100644 --- a/board/eNET/eNET.c +++ b/board/eNET/eNET.c @@ -111,8 +111,9 @@ int board_early_init_f(void) writew(0x0615, sc520_mmcr-romcs1ctl); writew(0x0615, sc520_mmcr-romcs2ctl); - writeb(0x02, sc520_mmcr-adddecctl); + writeb(0x00, sc520_mmcr-adddecctl); writeb(0x07, sc520_mmcr-uart1ctl); + writeb(0x07, sc520_mmcr-uart2ctl); writeb(0x06, sc520_mmcr-sysarbctl); writew(0x0003, sc520_mmcr-sysarbmenb); diff --git a/common/serial.c b/common/serial.c index 5f9ffd7..d4a632b 100644 --- a/common/serial.c +++ b/common/serial.c @@ -41,7 +41,8 @@ struct serial_device *__default_serial_console (void) #elif defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) \ || defined(CONFIG_405EP) || defined(CONFIG_405EZ) || defined(CONFIG_405EX) \ || defined(CONFIG_MPC5xxx) || defined(CONFIG_MPC83xx) \ - || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) + || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) \ + || defined(CONFIG_SYS_SC520) #if defined(CONFIG_CONS_INDEX) defined(CONFIG_SYS_NS16550_SERIAL) #if (CONFIG_CONS_INDEX==1) return eserial1_device; diff --git a/cpu/i386/Makefile b/cpu/i386/Makefile index c658c6e..bb0a48f 100644 --- a/cpu/i386/Makefile +++ b/cpu/i386/Makefile @@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk LIB= $(obj)lib$(CPU).a START = start.o start16.o resetvec.o -COBJS = serial.o interrupts.o cpu.o +COBJS = interrupts.o cpu.o SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/i386/serial.c b/cpu/i386/serial.c deleted file mode 100644 index e7025a3..000 --- a/cpu/i386/serial.c +++ /dev/null @@ -1,506 +0,0 @@ -/* - * (C) Copyright 2002 - * Daniel Engström, Omicron Ceti AB, dan...@omicron.se - * - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, w...@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -/*--+ */ - -/* - * This source code is dual-licensed. You may use it under the terms of the - * GNU General Public License version 2, or under the license below. - * - * This source code has been made available to you by IBM on an AS-IS - * basis. Anyone receiving this source is licensed under IBM - * copyrights to use it in any way he or she deems fit, including - * copying it, modifying it, compiling it, and redistributing it either - * with or without modifications. No license under IBM patents or - * patent applications is to be implied by the copyright license. - * - * Any user of this software should understand that IBM cannot provide - * technical support for this software and will not be responsible for - * any consequences resulting from the use of this software. - * - * Any person who transfers this source code or any derivative work - * must include the IBM copyright notice, this paragraph, and the - * preceding two paragraphs in the transferred software. - * - * COPYRIGHT I B M CORPORATION 1995 - * LICENSED MATERIAL - PROGRAM PROPERTY OF I B M - */ -/*--- */ - -#include common.h -#include watchdog.h -#include asm/io.h -#include asm/ibmpc.h - -#ifdef CONFIG_SERIAL_SOFTWARE_FIFO -#include malloc.h -#endif - -DECLARE_GLOBAL_DATA_PTR; - -#define UART_RBR0x00 -#define UART_THR0x00 -#define UART_IER0x01 -#define UART_IIR0x02 -#define UART_FCR0x02 -#define UART_LCR0x03 -#define UART_MCR0x04 -#define UART_LSR0x05 -#define UART_MSR0x06 -#define UART_SCR0x07 -#define UART_DLL0x00 -#define UART_DLM0x01 - -/*-+
[U-Boot] [RFC][PATCH 08/21] [x86] Add RAM bootstrap functionality
Add a parameter to the 32-bit entry to indicate if entry is from Real
Mode or not. If entry is from Real Mode, execute the destructive 'sizer'
routine to determine memory size as we are booting cold and running in
Flash. If not entering from Real Mode, we are executing a U-Boot image
from RAM and therefore the memory size is already known (and running
'sizer' will destroy the running image)
There are now two 32-bit entry points. The first is the 'in RAM' entry
point which exists at the start of the U-Boot binary image. As such,
you can load u-boot.bin in RAM and jump directly to the load address
without needing to calculate any offsets. The second entry point is
used by the real-to-protected mode switch
This patch also changes TEXT_BASE to 0x600 (in RAM). You can load
the resulting image at 0x600 and simple go 0x600 from the u-boot
prompt
Hopefully a later patch will completely elliminate any dependency on
TEXT_BASE like a relocatable linux kernel (perfect world)
---
board/eNET/config.mk |2 +-
board/eNET/u-boot.lds |9 -
cpu/i386/start.S | 34 ++
cpu/i386/start16.S|7 +--
4 files changed, 44 insertions(+), 8 deletions(-)
diff --git a/board/eNET/config.mk b/board/eNET/config.mk
index 5c64804..cb2e24d 100644
--- a/board/eNET/config.mk
+++ b/board/eNET/config.mk
@@ -21,7 +21,7 @@
# MA 02111-1307 USA
#
-TEXT_BASE = 0x3804
+TEXT_BASE = 0x0600
CFLAGS_dlmalloc.o += -Wa,--no-warn -fno-strict-aliasing
PLATFORM_RELFLAGS += -fvisibility=hidden
PLATFORM_CPPFLAGS += -fno-dwarf2-cfi-asm
diff --git a/board/eNET/u-boot.lds b/board/eNET/u-boot.lds
index 0d74021..7b0ffaa 100644
--- a/board/eNET/u-boot.lds
+++ b/board/eNET/u-boot.lds
@@ -27,7 +27,7 @@ ENTRY(_start)
SECTIONS
{
- . = 0x3804; /* Location of bootcode in flash */
+ . = 0x0600; /* Location of bootcode in flash */
_i386boot_text_start = .;
.text : { *(.text); }
@@ -97,14 +97,13 @@ SECTIONS
* at reset and the code have to fit.
* The fff0 offset of resetvec is important, however.
*/
-
. = 0xfe00;
- .start32 : AT (0x3807fe00) { *(.start32); }
+ .start32 : AT (0x0603fe00) { *(.start32); }
. = 0xf800;
- .start16 : AT (0x3807f800) { *(.start16); }
+ .start16 : AT (0x0603f800) { *(.start16); }
. = 0xfff0;
- .resetvec : AT (0x3807fff0) { *(.resetvec); }
+ .resetvec : AT (0x0603fff0) { *(.resetvec); }
_i386boot_end = (LOADADDR(.resetvec) + SIZEOF(.resetvec) );
}
diff --git a/cpu/i386/start.S b/cpu/i386/start.S
index 1980f1a..e1d4492 100644
--- a/cpu/i386/start.S
+++ b/cpu/i386/start.S
@@ -33,7 +33,32 @@
.type _start, @function
.globl _i386boot_start
_i386boot_start:
+ /*
+* This is the fail safe 32-bit bootstrap entry point. The
+* following code is not executed from a cold-reset (actually, a
+* lot of it is, but from real-mode after cold reset. It is
+* repeated here to put the board into a state as close to cold
+* reset as necessary)
+*/
+ cli
+ cld
+
+ /* Turn of cache (this might require a 486-class CPU) */
+ movl%cr0, %eax
+ orl $0x6000,%eax
+ movl%eax, %cr0
+ wbinvd
+
+ lidtblank_idt_ptr
+
+ /* Tell 32-bit code it is being entered from */
+ movw$0x, %bx
+
+ /* Flush the prefetch queue */
+ jmp _start
_start:
+ /* This is the 32-bit cold-reset entry point */
+
movl$0x18,%eax /* Load our segement registes, the
* gdt have already been loaded by start16.S */
movw%ax,%fs
@@ -42,6 +67,15 @@ _start:
movw%ax,%es
movw%ax,%ss
+ /*
+* Skip low-level board and memory initialization if not starting
+* from cold-reset. This allows us to do a fail safe boot-strap
+* into a new build of U-Boot from a known-good boot flash
+*/
+ movw$0x0001, %ax
+ cmpw%ax, %bx
+ jne mem_init_ret
+
/* We call a few functions in the board support package
* since we have no stack yet we'll have to use %ebp
* to store the return address */
diff --git a/cpu/i386/start16.S b/cpu/i386/start16.S
index 1ebb6bc..1caa686 100644
--- a/cpu/i386/start16.S
+++ b/cpu/i386/start16.S
@@ -45,7 +45,7 @@ board_init16_ret:
wbinvd
/* load the descriptor tables */
-o32 cs lidtidt_ptr
+o32 cs lidtblank_idt_ptr
o32 cs lgdtgdt_ptr
@@ -57,6 +57,8 @@ o32 cslgdtgdt_ptr
/* Flush the prefetch queue */
jmp ff
ff:
+ /* Tell 32-bit code it is being entered from hard-reset */
+ movw$0x0001, %bx
/* Finally jump to the 32bit initialization code */
movw$code32start, %ax
@@ -68,7 +70,8 @@ code32start:
.long _start
[U-Boot] [RFC][PATCH 12/21] [ns16550] Enable port-mapped access
The x86 architecture exclusively uses Port-Mapped I/O (inb/outb) to access
the 16550 UARTs. This patch mimics how Linux selects between Memory-Mapped
and Port-Mapped I/O. This allows x86 boards to use CONFIG_SERIAL_MUTLI and
drop the custom serial port driver
---
drivers/serial/ns16550.c | 69 ++
1 files changed, 39 insertions(+), 30 deletions(-)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index b3bf10b..0e9beb7 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -7,6 +7,8 @@
#include config.h
#include ns16550.h
#include watchdog.h
+#include linux/types.h
+#include asm/io.h
#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
#define UART_MCRVAL (UART_MCR_DTR | \
@@ -14,28 +16,35 @@
#define UART_FCRVAL (UART_FCR_FIFO_EN |\
UART_FCR_RXSR |\
UART_FCR_TXSR) /* Clear enable FIFOs */
+#ifdef CONFIG_X86
+#define serial_out(x,y)outb(x,(ulong)y)
+#define serial_in(y) inb((ulong)y)
+#else
+#define serial_out(x,y) writeb(x,y)
+#define serial_in(y) readb(y)
+#endif
void NS16550_init (NS16550_t com_port, int baud_divisor)
{
- com_port-ier = 0x00;
+ serial_out(0x00, com_port-ier);
#if defined(CONFIG_OMAP) !defined(CONFIG_OMAP3_ZOOM2)
- com_port-mdr1 = 0x7; /* mode select reset TL16C750*/
+ serial_out(0x7, com_port-mdr1); /* mode select reset TL16C750*/
#endif
- com_port-lcr = UART_LCR_BKSE | UART_LCRVAL;
- com_port-dll = 0;
- com_port-dlm = 0;
- com_port-lcr = UART_LCRVAL;
- com_port-mcr = UART_MCRVAL;
- com_port-fcr = UART_FCRVAL;
- com_port-lcr = UART_LCR_BKSE | UART_LCRVAL;
- com_port-dll = baud_divisor 0xff;
- com_port-dlm = (baud_divisor 8) 0xff;
- com_port-lcr = UART_LCRVAL;
+ serial_out(UART_LCR_BKSE | UART_LCRVAL, (ulong)com_port-lcr);
+ serial_out(0, com_port-dll);
+ serial_out(0, com_port-dlm);
+ serial_out(UART_LCRVAL, com_port-lcr);
+ serial_out(UART_MCRVAL, com_port-mcr);
+ serial_out(UART_FCRVAL, com_port-fcr);
+ serial_out(UART_LCR_BKSE | UART_LCRVAL, com_port-lcr);
+ serial_out(baud_divisor 0xff, com_port-dll);
+ serial_out((baud_divisor 8) 0xff, com_port-dlm);
+ serial_out(UART_LCRVAL, com_port-lcr);
#if defined(CONFIG_OMAP) !defined(CONFIG_OMAP3_ZOOM2)
#if defined(CONFIG_APTIX)
- com_port-mdr1 = 3; /* /13 mode so Aptix 6MHz can hit 115200 */
+ serial_out(3, com_port-mdr1); /* /13 mode so Aptix 6MHz can hit
115200 */
#else
- com_port-mdr1 = 0; /* /16 is proper to hit 115200 with 48MHz */
+ serial_out(0, com_port-mdr1); /* /16 is proper to hit 115200 with
48MHz */
#endif
#endif /* CONFIG_OMAP */
}
@@ -43,42 +52,42 @@ void NS16550_init (NS16550_t com_port, int baud_divisor)
#ifndef CONFIG_NS16550_MIN_FUNCTIONS
void NS16550_reinit (NS16550_t com_port, int baud_divisor)
{
- com_port-ier = 0x00;
- com_port-lcr = UART_LCR_BKSE | UART_LCRVAL;
- com_port-dll = 0;
- com_port-dlm = 0;
- com_port-lcr = UART_LCRVAL;
- com_port-mcr = UART_MCRVAL;
- com_port-fcr = UART_FCRVAL;
- com_port-lcr = UART_LCR_BKSE;
- com_port-dll = baud_divisor 0xff;
- com_port-dlm = (baud_divisor 8) 0xff;
- com_port-lcr = UART_LCRVAL;
+ serial_out(0x00, com_port-ier);
+ serial_out(UART_LCR_BKSE | UART_LCRVAL, com_port-lcr);
+ serial_out(0, com_port-dll);
+ serial_out(0, com_port-dlm);
+ serial_out(UART_LCRVAL, com_port-lcr);
+ serial_out(UART_MCRVAL, com_port-mcr);
+ serial_out(UART_FCRVAL, com_port-fcr);
+ serial_out(UART_LCR_BKSE, com_port-lcr);
+ serial_out(baud_divisor 0xff, com_port-dll);
+ serial_out((baud_divisor 8) 0xff, com_port-dlm);
+ serial_out(UART_LCRVAL, com_port-lcr);
}
#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
void NS16550_putc (NS16550_t com_port, char c)
{
- while ((com_port-lsr UART_LSR_THRE) == 0);
- com_port-thr = c;
+ while ((serial_in(com_port-lsr) UART_LSR_THRE) == 0);
+ serial_out(c, com_port-thr);
}
#ifndef CONFIG_NS16550_MIN_FUNCTIONS
char NS16550_getc (NS16550_t com_port)
{
- while ((com_port-lsr UART_LSR_DR) == 0) {
+ while ((serial_in(com_port-lsr) UART_LSR_DR) == 0) {
#ifdef CONFIG_USB_TTY
extern void usbtty_poll(void);
usbtty_poll();
#endif
WATCHDOG_RESET();
}
- return (com_port-rbr);
+ return serial_in(com_port-rbr);
}
int NS16550_tstc (NS16550_t com_port)
{
- return ((com_port-lsr UART_LSR_DR) != 0);
+ return ((serial_in(com_port-lsr) UART_LSR_DR) != 0);
}
#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
--
1.7.0.2.182.ge007
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[U-Boot] [RFC][PATCH 04/21] [x86] Add register dump to crash handlers
Shamelessly steal the Linux x86 crash handling code and shove it into U-Boot
(cool - it fits). Be sure to include suitable attribution to Linus
---
This patch also fixed the annoyance of adding an extra 3 bytes per IRQ
handler. I _really_ like this patch - It has probably been the single most
useful patch as it adds the ability to use int3 to help debugging
cpu/i386/interrupts.c | 310 -
1 files changed, 228 insertions(+), 82 deletions(-)
diff --git a/cpu/i386/interrupts.c b/cpu/i386/interrupts.c
index 4b57437..2eae5be 100644
--- a/cpu/i386/interrupts.c
+++ b/cpu/i386/interrupts.c
@@ -5,6 +5,9 @@
* (C) Copyright 2002
* Daniel Engström, Omicron Ceti AB, dan...@omicron.se.
*
+ * Portions of this file are derived from the Linux kernel source
+ * Copyright (C) 1991, 1992 Linus Torvalds
+ *
* See file CREDITS for list of people who contributed to this
* project.
*
@@ -32,12 +35,112 @@
.hidden irq_#x\n \
.type irq_#x, @function\n \
irq_#x:\n \
- pushl %ebp\n \
- movl %esp,%ebp\n \
- pusha\n \
pushl $#x\n \
jmp irq_common_entry\n
+/*
+ * Volatile isn't enough to prevent the compiler from reordering the
+ * read/write functions for the control registers and messing everything up.
+ * A memory clobber would solve the problem, but would prevent reordering of
+ * all loads stores around it, which can hurt performance. Solution is to
+ * use a variable and mimic reads and writes to it to enforce serialization
+ */
+static unsigned long __force_order;
+
+static inline unsigned long read_cr0(void)
+{
+ unsigned long val;
+ asm volatile(mov %%cr0,%0\n\t : =r (val), =m (__force_order));
+ return val;
+}
+
+static inline unsigned long read_cr2(void)
+{
+ unsigned long val;
+ asm volatile(mov %%cr2,%0\n\t : =r (val), =m (__force_order));
+ return val;
+}
+
+static inline unsigned long read_cr3(void)
+{
+ unsigned long val;
+ asm volatile(mov %%cr3,%0\n\t : =r (val), =m (__force_order));
+ return val;
+}
+
+static inline unsigned long read_cr4(void)
+{
+ unsigned long val;
+ asm volatile(mov %%cr4,%0\n\t : =r (val), =m (__force_order));
+ return val;
+}
+
+static inline unsigned long get_debugreg(int regno)
+{
+ unsigned long val = 0; /* Damn you, gcc! */
+
+ switch (regno) {
+ case 0:
+ asm(mov %%db0, %0 :=r (val));
+ break;
+ case 1:
+ asm(mov %%db1, %0 :=r (val));
+ break;
+ case 2:
+ asm(mov %%db2, %0 :=r (val));
+ break;
+ case 3:
+ asm(mov %%db3, %0 :=r (val));
+ break;
+ case 6:
+ asm(mov %%db6, %0 :=r (val));
+ break;
+ case 7:
+ asm(mov %%db7, %0 :=r (val));
+ break;
+ default:
+ val = 0;
+ }
+ return val;
+}
+
+void dump_regs(struct pt_regs *regs)
+{
+ unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;
+ unsigned long d0, d1, d2, d3, d6, d7;
+
+ printf(EIP: %04x:[%08lx] EFLAGS: %08lx\n,
+ (u16)regs-xcs, regs-eip, regs-eflags);
+
+ printf(EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n,
+ regs-eax, regs-ebx, regs-ecx, regs-edx);
+ printf(ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n,
+ regs-esi, regs-edi, regs-ebp, regs-esp);
+ printf( DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x\n,
+ (u16)regs-xds, (u16)regs-xes, (u16)regs-xfs, (u16)regs-xgs,
(u16)regs-xss);
+
+ cr0 = read_cr0();
+ cr2 = read_cr2();
+ cr3 = read_cr3();
+ cr4 = read_cr4();
+
+ printf(CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n,
+ cr0, cr2, cr3, cr4);
+
+ d0 = get_debugreg(0);
+ d1 = get_debugreg(1);
+ d2 = get_debugreg(2);
+ d3 = get_debugreg(3);
+
+ printf(DR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n,
+ d0, d1, d2, d3);
+
+ d6 = get_debugreg(6);
+ d7 = get_debugreg(7);
+ printf(DR6: %08lx DR7: %08lx\n,
+ d6, d7);
+}
+
struct idt_entry {
u16 base_low;
u16 selector;
@@ -122,7 +225,7 @@ int disable_interrupts(void)
}
/* IRQ Low-Level Service Routine */
-__isr__ irq_llsr(int ip, int seg, int irq)
+__isr__ irq_llsr(struct pt_regs *regs)
{
/*
* For detailed description of each exception, refer to:
@@ -131,74 +234,93 @@ __isr__ irq_llsr(int ip, int seg, int irq)
* Order Number: 253665-029US, November 2008
* Table 6-1. Exceptions and Interrupts
*/
- switch (irq) {
- case 0x00:
- printf(Divide Error (Division by zero) at %04x:%08x\n, seg,
ip);
- while(1);
- break;
- case 0x01:
- printf(Debug Interrupt (Single step) at
[U-Boot] [RFC][PATCH 18/21] [eNET] Fix CONFIG_SYS_HZ to be 1000
The clock interupt has always been 1kHz as per timer_init() in /cpu/i386/sc520/sc520_timer.c --- include/configs/eNET.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/eNET.h b/include/configs/eNET.h index 58f63f8..19a81b8 100644 --- a/include/configs/eNET.h +++ b/include/configs/eNET.h @@ -139,7 +139,7 @@ #defineCONFIG_SYS_LOAD_ADDR0x10/* default load address */ -#defineCONFIG_SYS_HZ 1024/* incrementer freq: 1kHz */ +#defineCONFIG_SYS_HZ 1000/* incrementer freq: 1kHz */ /*--- * SDRAM Configuration -- 1.7.0.2.182.ge007 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC][PATCH 21/21] Use SC520 MMCR to reset eNET board
--- include/configs/eNET.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/eNET.h b/include/configs/eNET.h index 4380bb1..1713cd1 100644 --- a/include/configs/eNET.h +++ b/include/configs/eNET.h @@ -159,7 +159,7 @@ * CPU Features */ #define CONFIG_SYS_SC520_HIGH_SPEED0 /* 100 or 133MHz */ -#undef CONFIG_SYS_SC520_RESET /* use SC520 MMCR's to reset cpu */ +#define CONFIG_SYS_SC520_RESET /* use SC520 MMCR's to reset cpu */ #define CONFIG_SYS_SC520_TIMER /* use SC520 swtimers */ #undef CONFIG_SYS_GENERIC_TIMER /* use the i8254 PIT timers */ #undef CONFIG_SYS_TSC_TIMER /* use the Pentium TSC timers */ -- 1.7.0.2.182.ge007 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC][PATCH 20/21] [eNET] Add PC/AT compatibility setup function
The eNET uses the sc520 software timers rather than the PC/AT clones
Set all interrupts and timers up to be PC/AT compatible
---
board/eNET/eNET.c | 38 ++
1 files changed, 38 insertions(+), 0 deletions(-)
diff --git a/board/eNET/eNET.c b/board/eNET/eNET.c
index 9d782f3..ac3f958 100644
--- a/board/eNET/eNET.c
+++ b/board/eNET/eNET.c
@@ -185,3 +185,41 @@ int board_eth_init(bd_t *bis)
eth_init(bis);
return adapters;
+
+void setup_pcat_compatibility()
+{
+ /* disable global interrupt mode */
+ writeb(0x40, sc520_mmcr-picicr);
+
+ /* set all irqs to edge */
+ writeb(0x00, sc520_mmcr-pic_mode[0]);
+ writeb(0x00, sc520_mmcr-pic_mode[1]);
+ writeb(0x00, sc520_mmcr-pic_mode[2]);
+
+ /*
+* active low polarity on PIC interrupt pins,
+* active high polarity on all other irq pins
+*/
+ writew(0x,sc520_mmcr-intpinpol);
+
+ /* Set PIT 0 - IRQ0, RTC - IRQ8, FP error - IRQ13 */
+ writeb(SC520_IRQ0, sc520_mmcr-pit_int_map[0]);
+ writeb(SC520_IRQ8, sc520_mmcr-rtcmap);
+ writeb(SC520_IRQ13, sc520_mmcr-ferrmap);
+
+ /* Disable all other interrupt sources */
+ writeb(SC520_IRQ_DISABLED, sc520_mmcr-gp_tmr_int_map[0]);
+ writeb(SC520_IRQ_DISABLED, sc520_mmcr-gp_tmr_int_map[1]);
+ writeb(SC520_IRQ_DISABLED, sc520_mmcr-gp_tmr_int_map[2]);
+ writeb(SC520_IRQ_DISABLED, sc520_mmcr-pit_int_map[1]);
+ writeb(SC520_IRQ_DISABLED, sc520_mmcr-pit_int_map[2]);
+ writeb(SC520_IRQ_DISABLED, sc520_mmcr-pci_int_map[0]);/*
disable PCI INT A */
+ writeb(SC520_IRQ_DISABLED, sc520_mmcr-pci_int_map[1]);/*
disable PCI INT B */
+ writeb(SC520_IRQ_DISABLED, sc520_mmcr-pci_int_map[2]);/*
disable PCI INT C */
+ writeb(SC520_IRQ_DISABLED, sc520_mmcr-pci_int_map[3]);/*
disable PCI INT D */
+ writeb(SC520_IRQ_DISABLED, sc520_mmcr-dmabcintmap); /*
disable DMA INT */
+ writeb(SC520_IRQ_DISABLED, sc520_mmcr-ssimap);
+ writeb(SC520_IRQ_DISABLED, sc520_mmcr-wdtmap);
+ writeb(SC520_IRQ_DISABLED, sc520_mmcr-wpvmap);
+ writeb(SC520_IRQ_DISABLED, sc520_mmcr-icemap);
+}
--
1.7.0.2.182.ge007
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[U-Boot] [RFC][PATCH 05/21] [x86] Fix do_go_exec()
This was broken a long time ago by a49864593e083a5d0779fb9ca98e5a0f2053183d
which munged the NIOS and x86 do_go_exec()
---
PS - I think NIOS is still broken (can someone please check)
lib_i386/board.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/lib_i386/board.c b/lib_i386/board.c
index af81cd5..5e28c6f 100644
--- a/lib_i386/board.c
+++ b/lib_i386/board.c
@@ -422,10 +422,10 @@ void hang (void)
unsigned long do_go_exec (ulong (*entry)(int, char *[]), int argc, char
*argv[])
{
/*
-* TODO: Test this function - changed to fix compiler error.
-* Original code was:
-* return (entry 1) (argc, argv);
-* with a comment about Nios function pointers are address 1
+* x86 does not use a dedicated register to pass the pointer
+* to the global_data
*/
+ argv[-1] = (char *)gd;
+
return (entry) (argc, argv);
}
--
1.7.0.2.182.ge007
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[U-Boot] [RFC][PATCH 07/21] [x86] Split sc520 memory sizing versus reporting
This patch allows the low-level assembler boot-strap to obtain the RAM size without calling the destructive 'sizer' routine. This allows boot-strapping from a U-Boot image loaded in RAM --- cpu/i386/sc520/sc520_asm.S | 95 ++- cpu/i386/start.S |5 ++ 2 files changed, 62 insertions(+), 38 deletions(-) diff --git a/cpu/i386/sc520/sc520_asm.S b/cpu/i386/sc520/sc520_asm.S index 135f7b4..c745454 100644 --- a/cpu/i386/sc520/sc520_asm.S +++ b/cpu/i386/sc520/sc520_asm.S @@ -498,47 +498,21 @@ bad_ram: dram_done: - /* readback DRCBENDADR and return the number -* of available ram bytes in %eax */ - - movl$DRCBENDADR, %edi/* DRAM ending address register */ - -bank0: movl(%edi), %eax - movl%eax, %ecx - andl$0x0080, %ecx - jz bank1 - andl$0x007f, %eax - shll$22, %eax - movl%eax, %ebx - -bank1: movl(%edi), %eax - movl%eax, %ecx - andl$0x8000, %ecx - jz bank2 - andl$0x7f00, %eax - shll$14, %eax - movl%eax, %ebx - -bank2: movl(%edi), %eax - movl%eax, %ecx - andl$0x0080, %ecx - jz bank3 - andl$0x007f, %eax - shll$6, %eax - movl%eax, %ebx +#if CONFIG_SYS_SDRAM_ECC_ENABLE + /* +* We are in the middle of an existing 'call' - Need to store the +* existing return address before making another 'call' +*/ + movl%ebp, %ebx -bank3: movl(%edi), %eax - movl%eax, %ecx - andl$0x8000, %ecx - jz done - andl$0x7f00, %eax - shrl$2, %eax - movl%eax, %ebx + /* Get the memory size */ + movl$init_ecc, %ebp + jmplget_mem_size -done: - movl%ebx, %eax +init_ecc: + /* Restore the orignal return address */ + movl%ebx, %ebp -#if CONFIG_SYS_SDRAM_ECC_ENABLE /* A nominal memory test: just a byte at each address line */ movl%eax, %ecx shrl$0x1, %ecx @@ -575,6 +549,51 @@ set_ecc: mov $0x05, %al movb%al, (%edi) #endif + out: + jmp *%ebp + +/* + * Read and decode the sc520 DRCBENDADR MMCR and return the number of + * available ram bytes in %eax + */ +.globl get_mem_size +get_mem_size: + movl$DRCBENDADR, %edi/* DRAM ending address register */ + +bank0: movl(%edi), %eax + movl%eax, %ecx + andl$0x0080, %ecx + jz bank1 + andl$0x007f, %eax + shll$22, %eax + movl%eax, %ebx + +bank1: movl(%edi), %eax + movl%eax, %ecx + andl$0x8000, %ecx + jz bank2 + andl$0x7f00, %eax + shll$14, %eax + movl%eax, %ebx + +bank2: movl(%edi), %eax + movl%eax, %ecx + andl$0x0080, %ecx + jz bank3 + andl$0x007f, %eax + shll$6, %eax + movl%eax, %ebx + +bank3: movl(%edi), %eax + movl%eax, %ecx + andl$0x8000, %ecx + jz done + andl$0x7f00, %eax + shrl$2, %eax + movl%eax, %ebx + +done: movl%ebx, %eax jmp *%ebp + diff --git a/cpu/i386/start.S b/cpu/i386/start.S index 25d32e6..1980f1a 100644 --- a/cpu/i386/start.S +++ b/cpu/i386/start.S @@ -63,6 +63,11 @@ early_board_init_ret: jmp mem_init mem_init_ret: + /* fetch memory size (into %eax) */ + mov $get_mem_size_ret, %ebp + jmp get_mem_size +get_mem_size_ret: + /* Check we have enough memory for stack */ movl$CONFIG_SYS_STACK_SIZE, %ecx cmpl%ecx, %eax -- 1.7.0.2.182.ge007 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] cfi flash: add status polling method for amd flash
Dear Thomas Chou, In message 1269397761-23394-1-git-send-email-tho...@wytron.com.tw you wrote: This patch adds status polling method to offer an alternative to data toggle method for amd flash chips. This patch is needed for nios2 cfi flash interface, where the bus controller performs 4 bytes read cycles for a single byte read instruction. The data toggle method can not detect chip busy status correctly. So we have to poll DQ7, which will be inverted when the chip is busy. This feature is enabled with the config def, CONFIG_SYS_CFI_FLASH_STATUS_POLL In flash_erase, the verbose printing of '.' is changed that it will go with each sector whether successed or failed. Please split this part off into a separate patch. This is a global change to the user interface and must be discussed separately. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The easiest way to figure the cost of living is to take your income and add ten percent. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] cfi flash: add status polling method for amd flash
Dear Stefan Roese, In message 201003250943.17140...@denx.de you wrote: On Wednesday 24 March 2010 03:29:21 Thomas Chou wrote: This patch adds status polling method to offer an alternative to data toggle method for amd flash chips. This patch is needed for nios2 cfi flash interface, where the bus controller performs 4 bytes read cycles for a single byte read instruction. The data toggle method can not detect chip busy status correctly. So we have to poll DQ7, which will be inverted when the chip is busy. This feature is enabled with the config def, CONFIG_SYS_CFI_FLASH_STATUS_POLL In flash_erase, the verbose printing of '.' is changed that it will go with each sector whether successed or failed. Applied to u-boot-cfi-flash/next. Thanks. I object against pulling in a global change to the user interface just like that, without any discussion. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de No journaling file system can recover your data if the disk dies. - Steve Rago in d4cw1p@plc.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC][PATCH 02/21] [x86] #ifdef out getenv_IPaddr()
On Thu, Mar 25, 2010 at 4:52 PM, Graeme Russ graeme.r...@gmail.com wrote: --- I cannot recall exactly why this is needed but it is lib_i386/board.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/lib_i386/board.c b/lib_i386/board.c index f3b6348..af81cd5 100644 --- a/lib_i386/board.c +++ b/lib_i386/board.c @@ -280,8 +280,10 @@ void board_init_r(gd_t *id, ulong ram_start) show_boot_progress(0x26); +#ifdef CONFIG_CMD_NET /* IP Address */ bd_data.bi_ip_addr = getenv_IPaddr (ipaddr); +#endif Some boards do not support CMD_NET interface. getenvIPaddr is not defined in that case. that's why #if defined(CONFIG_PCI) /* -- 1.7.0.2.182.ge007 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] cmd_usb.c: print debug messages only when DEBUG is defined
Signed-off-by: Wolfgang Denk w...@denx.de
---
common/cmd_usb.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/cmd_usb.c b/common/cmd_usb.c
index 9de515c..6b5c582 100644
--- a/common/cmd_usb.c
+++ b/common/cmd_usb.c
@@ -601,7 +601,7 @@ int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char
*argv[])
ok++;
if (devno)
printf(\n);
- printf(print_part of %x\n, devno);
+ debug(print_part of %x\n, devno);
print_part(stor_dev);
}
}
@@ -610,7 +610,7 @@ int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char
*argv[])
stor_dev = usb_stor_get_dev(devno);
if (stor_dev-type != DEV_TYPE_UNKNOWN) {
ok++;
- printf(print_part of %x\n, devno);
+ debug(print_part of %x\n, devno);
print_part(stor_dev);
}
}
--
1.6.6.1
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[U-Boot] Rejected: [PATCH v2] nios2: flush data cache after relocating code in start.S
Hi Thomas, Patch is reject. diff --git a/cpu/nios2/start.S b/cpu/nios2/start.S index 31cd5b0..61784d8 100644 --- a/cpu/nios2/start.S +++ b/cpu/nios2/start.S @@ -98,6 +98,17 @@ _cur: movhi r5, %hi(_cur - _start) stwio r7, 0(r5) ^ The existing code uses stxio instructions, which by their very purpose, bypass the cache. So there's no need to flush the data cache. One could argue that invalidating the _instruction_ cache may be necessary ... but I doubt it, given that first instructions after reset invalidate the entire instruction cache. It would be a defensive nevertheless. Regards, --Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net, fec_mxc: use mac address stored in env before looking in eeprom
Hi Wolfgang, Ok, but this driver initialize in fec_probe() (which gets called through fecmxc_initialize() on uboot startup) always the fec mac address registers with eeprom mac address. So, if uboot not uses The question to me is why fec_probe() is called at all, even in cases where U-Boot does not use any network related commands. This is IMO wrong. Eventually somebody comes up with patches to fix this? As I said before, this is documented in doc/README.drivers.eth. If you want to change this, then maybe one should first fix the documentation to know what is actually wanted. I certainly have lost track of what is wanted and what is sensible. Cheers Detlev -- Programming X-Windows is like trying to find the square root of pi using roman numerals. -- The UNIX Haters Handbook -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] at91: use C structs for AT91 OHCI code
This patch is part of migrating the AT91 support towards
using C struct for all SOC access.
It removes one more CONFIG_AT91_LEGACY warning.
at91_pmc.h needs cleanup after migration of the drivers
has been done.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
drivers/usb/host/ohci-at91.c | 28 +---
include/asm-arm/arch-at91/at91_pmc.h | 23 ++-
2 files changed, 31 insertions(+), 20 deletions(-)
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 29f3ba1..b2e03bc 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -25,11 +25,6 @@
#if defined(CONFIG_USB_OHCI_NEW) defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
-#ifndef CONFIG_AT91_LEGACY
-#define CONFIG_AT91_LEGACY
-#warning Please update to use C structur SoC access !
-#endif
-
#include asm/arch/hardware.h
#include asm/arch/io.h
#include asm/arch/at91_pmc.h
@@ -37,22 +32,23 @@
int usb_cpu_init(void)
{
+ at91_pmc_t *pmc = (at91_pmc_t *)AT91_PMC_BASE;
#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
defined(CONFIG_AT91SAM9261)
/* Enable PLLB */
- at91_sys_write(AT91_CKGR_PLLBR, get_pllb_init());
- while ((at91_sys_read(AT91_PMC_SR) AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
+ writel(get_pllb_init(), pmc-pllbr);
+ while ((readl(pmc-sr) AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
;
#endif
/* Enable USB host clock. */
- at91_sys_write(AT91_PMC_PCER, 1 AT91_ID_UHP);
+ writel(1 AT91_ID_UHP, pmc-pcer);
#ifdef CONFIG_AT91SAM9261
- at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP | AT91_PMC_HCK0);
+ writel(AT91_PMC_UHP | AT91_PMC_HCK0, pmc-scer);
#else
- at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP);
+ writel(AT91_PMC_UHP, pmc-scer);
#endif
return 0;
@@ -60,19 +56,21 @@ int usb_cpu_init(void)
int usb_cpu_stop(void)
{
+ at91_pmc_t *pmc = (at91_pmc_t *)AT91_PMC_BASE;
+
/* Disable USB host clock. */
- at91_sys_write(AT91_PMC_PCDR, 1 AT91_ID_UHP);
+ writel(1 AT91_ID_UHP, pmc-pcdr);
#ifdef CONFIG_AT91SAM9261
- at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_HCK0);
+ writel(AT91_PMC_UHP | AT91_PMC_HCK0, pmc-scdr);
#else
- at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP);
+ writel(AT91_PMC_UHP, pmc-scdr);
#endif
#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
/* Disable PLLB */
- at91_sys_write(AT91_CKGR_PLLBR, 0);
- while ((at91_sys_read(AT91_PMC_SR) AT91_PMC_LOCKB) != 0)
+ writel(0, pmc-pllbr);
+ while ((readl(pmc-sr) AT91_PMC_LOCKB) != 0)
;
#endif
diff --git a/include/asm-arm/arch-at91/at91_pmc.h
b/include/asm-arm/arch-at91/at91_pmc.h
index 680fe33..5b1a85d 100644
--- a/include/asm-arm/arch-at91/at91_pmc.h
+++ b/include/asm-arm/arch-at91/at91_pmc.h
@@ -108,11 +108,12 @@ typedef struct at91_pmc {
#define AT91_PMC_IXR_PCKRDY3 0x0800
#ifdef CONFIG_AT91_LEGACY
-
#defineAT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock
Enable Register */
#defineAT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock
Disable Register */
#defineAT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock
Status Register */
+#endif
+
#defineAT91_PMC_PCK(1 0) /*
Processor Clock */
#defineAT91RM9200_PMC_UDP (1 1) /* USB
Devcice Port Clock [AT91RM9200 only] */
#defineAT91RM9200_PMC_MCKUDP (1 2) /* USB
Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
@@ -128,27 +129,34 @@ typedef struct at91_pmc {
#defineAT91_PMC_HCK0 (1 16) /* AHB
Clock (USB host) [AT91SAM9261 only] */
#defineAT91_PMC_HCK1 (1 17) /* AHB
Clock (LCD) [AT91SAM9261 only] */
+#ifdef CONFIG_AT91_LEGACY
#defineAT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral
Clock Enable Register */
#defineAT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral
Clock Disable Register */
#defineAT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral
Clock Status Register */
#defineAT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock
Register [SAM9RL, CAP9] */
+#endif
+
#defineAT91_PMC_UPLLEN (116) /* UTMI
PLL Enable */
#defineAT91_PMC_UPLLCOUNT (0xf 20) /* UTMI
PLL Start-up Time */
#defineAT91_PMC_BIASEN (124) /* UTMI
BIAS Enable */
#defineAT91_PMC_BIASCOUNT (0xf 28) /* UTMI
PLL Start-up Time */
+#ifdef CONFIG_AT91_LEGACY
Re: [U-Boot] [PATCH] net, fec_mxc: use mac address stored in env before looking in eeprom
Dear Detlev Zundel, In message m2tys4k0c8@ohwell.denx.de you wrote: The question to me is why fec_probe() is called at all, even in cases where U-Boot does not use any network related commands. This is IMO wrong. Eventually somebody comes up with patches to fix this? As I said before, this is documented in doc/README.drivers.eth. If you want to change this, then maybe one should first fix the documentation I think the documentation should be changed when the code gets changed, not sooner nor later. to know what is actually wanted. I certainly have lost track of what is wanted and what is sensible. We do not want to touch interfaces that we don't use. If we don't use Ethernet in U-Boot, there is no need to probe or initialize it. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Love your country but never trust its government. - from a hand-painted road sign in central Pennsylvania ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Lists, lists and more lists we have lots of good ones at fair prices
For details, samples and counts on our US listings please email me at my other email address blanche.f...@discountdatabases.co.cc Send us an email to rem...@discountdatabases.co.cc we will discontinue from the list ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] cfi flash: add status polling method for amd flash
On 03/25/2010 07:49 PM, Wolfgang Denk wrote: Dear Thomas Chou, In message1269397761-23394-1-git-send-email-tho...@wytron.com.tw you wrote: This patch adds status polling method to offer an alternative to data toggle method for amd flash chips. This patch is needed for nios2 cfi flash interface, where the bus controller performs 4 bytes read cycles for a single byte read instruction. The data toggle method can not detect chip busy status correctly. So we have to poll DQ7, which will be inverted when the chip is busy. This feature is enabled with the config def, CONFIG_SYS_CFI_FLASH_STATUS_POLL In flash_erase, the verbose printing of '.' is changed that it will go with each sector whether successed or failed. Please split this part off into a separate patch. This is a global change to the user interface and must be discussed separately. Best regards, Wolfgang Denk Hi Wolfgang and Stefan, I will restore the original printing so that the user interface won't change. Best regards, Thomas ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5] cfi flash: add status polling method for amd flash
This patch adds status polling method to offer an alternative to
data toggle method for amd flash chips.
This patch is needed for nios2 cfi flash interface, where the bus
controller performs 4 bytes read cycles for a single byte read
instruction. The data toggle method can not detect chip busy
status correctly. So we have to poll DQ7, which will be inverted
when the chip is busy.
This feature is enabled with the config def,
CONFIG_SYS_CFI_FLASH_STATUS_POLL
Signed-off-by: Thomas Chou tho...@wytron.com.tw
---
drivers/mtd/cfi_flash.c | 99 ++
1 files changed, 90 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index cd1a86e..8d2c623 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -605,6 +605,63 @@ static int flash_full_status_check (flash_info_t * info,
flash_sect_t sector,
return retcode;
}
+static int use_flash_status_poll(flash_info_t *info)
+{
+#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
+ if (info-vendor == CFI_CMDSET_AMD_EXTENDED ||
+ info-vendor == CFI_CMDSET_AMD_STANDARD)
+ return 1;
+#endif
+ return 0;
+}
+
+static int flash_status_poll(flash_info_t *info, void *src, void *dst,
+ulong tout, char *prompt)
+{
+#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
+ ulong start;
+ int ready;
+
+#if CONFIG_SYS_HZ != 1000
+ if ((ulong)CONFIG_SYS_HZ 10)
+ tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid
overflow */
+ else
+ tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
+#endif
+
+ /* Wait for command completion */
+ start = get_timer(0);
+ while (1) {
+ switch (info-portwidth) {
+ case FLASH_CFI_8BIT:
+ ready = flash_read8(dst) == flash_read8(src);
+ break;
+ case FLASH_CFI_16BIT:
+ ready = flash_read16(dst) == flash_read16(src);
+ break;
+ case FLASH_CFI_32BIT:
+ ready = flash_read32(dst) == flash_read32(src);
+ break;
+ case FLASH_CFI_64BIT:
+ ready = flash_read64(dst) == flash_read64(src);
+ break;
+ default:
+ ready = 0;
+ break;
+ }
+ if (ready)
+ break;
+ if (get_timer(start) tout) {
+ printf(Flash %s timeout at address %lx data %lx\n,
+ prompt, (ulong)dst, (ulong)flash_read8(dst));
+ return ERR_TIMOUT;
+ }
+ udelay(1); /* also triggers watchdog */
+ }
+#endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
+ return ERR_OK;
+}
+
/*---
*/
static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
@@ -752,7 +809,12 @@ static int flash_write_cfiword (flash_info_t * info, ulong
dest,
if (!sect_found)
sect = find_sector (info, dest);
- return flash_full_status_check (info, sect, info-write_tout, write);
+ if (use_flash_status_poll(info))
+ return flash_status_poll(info, cword, dstaddr,
+info-write_tout, write);
+ else
+ return flash_full_status_check(info, sect,
+ info-write_tout, write);
}
#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
@@ -914,9 +976,15 @@ static int flash_write_cfibuffer (flash_info_t * info,
ulong dest, uchar * cp,
}
flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
- retcode = flash_full_status_check (info, sector,
- info-buffer_write_tout,
- buffer write);
+ if (use_flash_status_poll(info))
+ retcode = flash_status_poll(info, src - (1 shift),
+ dst - (1 shift),
+ info-buffer_write_tout,
+ buffer write);
+ else
+ retcode = flash_full_status_check(info, sector,
+
info-buffer_write_tout,
+ buffer write);
break;
default:
@@ -1001,11 +1069,24 @@ int flash_erase (flash_info_t * info, int s_first, int
s_last)
break;
}
- if (flash_full_status_check
- (info, sect, info-erase_blk_tout,
[U-Boot] i.MX51 How to use and program LED's
Hello, I need help on how to write a simple routine in C to turn on and off the general purpose diagnostic LED's of the iMX51 EVK board. I am developing under Linux. Any help appreciated. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] i.MX51 How to use and program LED's
Carlo McKee wrote: Hello, I need help on how to write a simple routine in C to turn on and off the general purpose diagnostic LED's of the iMX51 EVK board. I am developing under Linux. Any help appreciated. As I cann see from schematics, the diagnostic led is connected with GPIO2_6. At the moment, there are no accessors function to access the gpio, in the same way we have for i.MX31. It should be nice to have it, however ;) Anyway, you can directly access to the gpio controller with readl/writel accessors. You can see an example (read) in mx51evk.c in board_mmc_getcd(). Check the gpio controller part of the manual, you need at least to set the direction as output for the GPIO2_6 pin before setting it. Regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net, fec_mxc: use mac address stored in env before looking in eeprom
On Thursday 25 March 2010 05:40:01 Wolfgang Denk wrote: Heiko wrote: Ok, but this driver initialize in fec_probe() (which gets called through fecmxc_initialize() on uboot startup) always the fec mac address registers with eeprom mac address. So, if uboot not uses The question to me is why fec_probe() is called at all, even in cases where U-Boot does not use any network related commands. This is IMO wrong. Eventually somebody comes up with patches to fix this? the current fec_mxc driver has squashed the initialize and probe steps. it should have half the things removed from probe and put into initialize and then the call to probe moved to the init step. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC][PATCH 01/21] [x86] Add unaligned.h
why dont you just use asm-generic/unaligned.h ? see asm-blackfin/ ... -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net, fec_mxc: use mac address stored in env before looking in eeprom
On Thursday 25 March 2010 09:16:55 Detlev Zundel wrote: Ok, but this driver initialize in fec_probe() (which gets called through fecmxc_initialize() on uboot startup) always the fec mac address registers with eeprom mac address. So, if uboot not uses The question to me is why fec_probe() is called at all, even in cases where U-Boot does not use any network related commands. This is IMO wrong. Eventually somebody comes up with patches to fix this? As I said before, this is documented in doc/README.drivers.eth. If you want to change this, then maybe one should first fix the documentation to know what is actually wanted. I certainly have lost track of what is wanted and what is sensible. and as i said before, i think you're mistaken. please highlight the *exact* areas of the doc you think permits this behavior. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] i.MX51 How to use and program LED's
Dear Carlo McKee, In message aa75524c1003250838l4cfb3d72wd4967a0935a0b...@mail.gmail.com you wrote: I am developing under Linux. Any help appreciated. You might get more help when posting on a Linux mailing list - here you are completely off topic. Before reposting ona Linux mailing list: chek if you have cinfigured the GPIO driver in your kernel, and explain in detail how you tried to access it, and what exactly is not working. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Randal said it would be tough to do in sed. He didn't say he didn't understand sed. Randal understands sed quite well. Which is why he uses Perl. :-) - Larry Wall in 7...@jpl-devvax.jpl.nasa.gov ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net, fec_mxc: use mac address stored in env before looking in eeprom
Dear Mike Frysinger, In message 201003251338.18817.vap...@gentoo.org you wrote: The question to me is why fec_probe() is called at all, even in cases where U-Boot does not use any network related commands. This is IMO wrong. Eventually somebody comes up with patches to fix this? the current fec_mxc driver has squashed the initialize and probe steps. it should have half the things removed from probe and put into initialize and then the call to probe moved to the init step. OK - but why should we always probe? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Sometimes a feeling is all we humans have to go on. -- Kirk, A Taste of Armageddon, stardate 3193.9 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net, fec_mxc: use mac address stored in env before looking in eeprom
On Thursday 25 March 2010 15:11:10 Wolfgang Denk wrote: Mike Frysinger wrote: The question to me is why fec_probe() is called at all, even in cases where U-Boot does not use any network related commands. This is IMO wrong. Eventually somebody comes up with patches to fix this? the current fec_mxc driver has squashed the initialize and probe steps. it should have half the things removed from probe and put into initialize and then the call to probe moved to the init step. OK - but why should we always probe? i merely mean that the structure set up and enetaddr seeding should be split out into the initialize function. as for the contents of probe vs init and how much the driver should probe the hw, i leave that up to the fec_mxc maintainer -- i have no vested interest in this driver beyond the common eth interface. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Killed Sheeva Plug
Hello Let me first say that I am *completely* new to U-Boot. I have a Sheeva Plug with a board Rev1.3. While trying to learn about it, at the U-Boot prompt I issued a command I'd better not issued: nand erase It seems, U-Boot did what I asked to do... No U-Boot prompt any more and nothing else:-( Is there any description available on how to bring it back to life? Do I need additional hardware to do so? I read about a JTAG board in this context. Is such a thing necessary? You see, I am really not familiar with this topic. Therefore any advice would really be appreciated. Thanks in advance Norbert Wegener ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mpc8610hpcd: set the guarded bit to DBAT of system memory
On Mar 25, 2010, at 11:30 AM, Dave Liu wrote: The BAT of system memory is setting as 2GB block, however the mpc8610hpcd is shipping with 512MB DDR2 memory, there will be a hole in the 2GB memory space, no any physical memory cover the hole. It will cause PPC speculative data access to the hole, the result is machine check. There are two options to resolve the issue, one is changing the block size to 512MB, another one is setting the G bit to DBAT. but the mpc8610hpcd memory is DIMM-based, the size is variable. so the second option is the best. The issue is seen by Timur Tabi with the latest u-boot tree when boot up the Linux kernel. Report-by: Timur Tabi b04...@freescale.com Signed-off-by: Dave Liu dave...@freescale.com --- include/configs/MPC8610HPCD.h |9 +++-- 1 files changed, 7 insertions(+), 2 deletions(-) Acked-by: Kumar Gala ga...@kernel.crashing.org Wolfgang, can you pick this up for v2010.03 - k diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 1d2d659..629c971 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -338,10 +338,15 @@ #endif/* CONFIG_PCI */ /* - * BAT0 2G Cacheable, non-guarded + * BAT0 2G Cacheable, guarded for data side. it will avoid + * speculative data access to the memory hole when + * the board use the DIMM memory size 2GB, such as + * 512MB. If you need better performance in u-boot, + * use the matching memory size to BAT. + * * 0x_2G DDR */ -#define CONFIG_SYS_DBAT0L(BATL_PP_RW | BATL_MEMCOHERENCE) +#define CONFIG_SYS_DBAT0L(BATL_PP_RW | BATL_MEMCOHERENCE | BATL_GUARDEDSTORAGE) #define CONFIG_SYS_DBAT0U (BATU_BL_2G | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT0L (BATL_PP_RW | BATL_MEMCOHERENCE ) #define CONFIG_SYS_IBAT0U CONFIG_SYS_DBAT0U -- 1.6.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] Add initial support for Matrix Vision mvSMR board based on MPC5200B.
Add initial support for Matrix Vision mvSMR board based on MPC5200B.
Signed-off-by: Andre Schwarz andre.schw...@matrix-vision.de
---
Wolfgang,
I've made all changes requested by Detlev regarding v1.
Patch has been checked with checkpatch.pl from kernel tree showing no obvious
errors. Additionally I strongly followed your explanations regarding
git format-patch and git send-email that saved me from headache last time.
Please let me know if anything regarding this patch is still in bad shape.
TIA,
Andre
CREDITS |2 +-
MAINTAINERS |1 +
MAKEALL |1 +
Makefile |5 +
board/matrix_vision/mvsmr/Makefile | 51 ++
board/matrix_vision/mvsmr/autoscript | 42 +
board/matrix_vision/mvsmr/config.mk | 31
board/matrix_vision/mvsmr/fpga.c | 129 +++
board/matrix_vision/mvsmr/fpga.h | 32
board/matrix_vision/mvsmr/mvsmr.c| 273 +++
board/matrix_vision/mvsmr/mvsmr.h| 43 +
board/matrix_vision/mvsmr/u-boot.lds | 138
doc/README.mvsmr | 55 +++
include/configs/MVSMR.h | 296 ++
14 files changed, 1098 insertions(+), 1 deletions(-)
create mode 100644 board/matrix_vision/mvsmr/Makefile
create mode 100644 board/matrix_vision/mvsmr/autoscript
create mode 100644 board/matrix_vision/mvsmr/config.mk
create mode 100644 board/matrix_vision/mvsmr/fpga.c
create mode 100644 board/matrix_vision/mvsmr/fpga.h
create mode 100644 board/matrix_vision/mvsmr/mvsmr.c
create mode 100644 board/matrix_vision/mvsmr/mvsmr.h
create mode 100644 board/matrix_vision/mvsmr/u-boot.lds
create mode 100644 doc/README.mvsmr
create mode 100644 include/configs/MVSMR.h
diff --git a/CREDITS b/CREDITS
index 2471029..cc96d87 100644
--- a/CREDITS
+++ b/CREDITS
@@ -437,7 +437,7 @@ D: FADS823 configuration, MPC823 video support, I2C,
wireless keyboard, lots mor
N: Andre Schwarz
E: andre.schw...@matrix-vision.de
-D: Support for Matrix Vision boards (MVBLM7/MVBC_P)
+D: Support for Matrix Vision boards (MVBLM7/MVBC_P/MVSMR)
N: Robert Schwebel
E: r.schwe...@pengutronix.de
diff --git a/MAINTAINERS b/MAINTAINERS
index 0340c19..a7d55f9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -424,6 +424,7 @@ Andre Schwarz andre.schw...@matrix-vision.de
mvbc_p MPC5200
mvblm7 MPC8343
+ mvsmr MPC5200
Jon Smirl jonsm...@gmail.com
diff --git a/MAKEALL b/MAKEALL
index 1949985..ce4fe66 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -71,6 +71,7 @@ LIST_5xxx= \
motionpro \
munices \
MVBC_P \
+ MVSMR \
o2dnt \
pcm030 \
pf5200 \
diff --git a/Makefile b/Makefile
index ce77e10..2d2d6d3 100644
--- a/Makefile
+++ b/Makefile
@@ -676,6 +676,11 @@ MVBC_P_config: unconfig
{ echo #define CONFIG_MVBC_P$(obj)include/config.h; }
@$(MKCONFIG) -n $@ -a MVBC_P ppc mpc5xxx mvbc_p matrix_vision
+MVSMR_config: unconfig
+ @mkdir -p $(obj)include
+ @mkdir -p $(obj)board/matrix_vision/mvsmr
+ @$(MKCONFIG) $(@:_config=) ppc mpc5xxx mvsmr matrix_vision
+
o2dnt_config: unconfig
@$(MKCONFIG) o2dnt ppc mpc5xxx o2dnt
diff --git a/board/matrix_vision/mvsmr/Makefile
b/board/matrix_vision/mvsmr/Makefile
new file mode 100644
index 000..fb0f495
--- /dev/null
+++ b/board/matrix_vision/mvsmr/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# (C) Copyright 2004-2008
+# Matrix-Vision GmbH, i...@matrix-vision.de
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o fpga.o
+
+SRCS:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS:= $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+ @mkimage -T script -C none -n mvSMR_Script -d autoscript autoscript.img
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
[U-Boot] [PATCH] cmd_usb.c: implemented standard subcommand handling
also added a missing \n in the help messages
Signed-off-by: Frans Meulenbroeks fransmeulenbro...@gmail.com
---
common/cmd_usb.c | 391 --
1 files changed, 233 insertions(+), 158 deletions(-)
as discussed before on the mailing list
tested on sheevaplug
diff --git a/common/cmd_usb.c b/common/cmd_usb.c
index 9de515c..ef80d78 100644
--- a/common/cmd_usb.c
+++ b/common/cmd_usb.c
@@ -502,199 +502,274 @@ int do_usbboot(cmd_tbl_t *cmdtp, int flag, int argc,
char *argv[])
}
#endif /* CONFIG_USB_STORAGE */
+static int do_usb_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ int i;
-/**
- * usb command intepreter
- */
-int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+ usb_stop();
+ printf((Re)start USB...\n);
+ i = usb_init();
+#ifdef CONFIG_USB_STORAGE
+ /* try to recognize storage devices immediately */
+ if (i = 0)
+ usb_stor_curr_dev = usb_stor_scan(1);
+#endif
+ return 0;
+}
+
+extern char usb_started;
+
+static int do_usb_tree(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
+ if (!usb_started) {
+ printf(USB is stopped. Please issue 'usb start' first.\n);
+ return 1;
+ }
+ printf(\nDevice Tree:\n);
+ usb_show_tree(usb_get_dev_index(0));
+ return 0;
+}
+static int do_usb_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ int d;
int i;
struct usb_device *dev = NULL;
- extern char usb_started;
-#ifdef CONFIG_USB_STORAGE
- block_dev_desc_t *stor_dev;
-#endif
- if ((strncmp(argv[1], reset, 5) == 0) ||
-(strncmp(argv[1], start, 5) == 0)) {
- usb_stop();
- printf((Re)start USB...\n);
- i = usb_init();
-#ifdef CONFIG_USB_STORAGE
- /* try to recognize storage devices immediately */
- if (i = 0)
- usb_stor_curr_dev = usb_stor_scan(1);
-#endif
+ if (!usb_started) {
+ printf(USB is stopped. Please issue 'usb start' first.\n);
+ return 1;
+ }
+
+ if (argc == 1) {
+ for (d = 0; d USB_MAX_DEVICE; d++) {
+ dev = usb_get_dev_index(d);
+ if (dev == NULL)
+ break;
+ usb_display_desc(dev);
+ usb_display_config(dev);
+ }
return 0;
+ } else {
+ i = simple_strtoul(argv[1], NULL, 16);
+ printf(config for device %d\n, i);
+ for (d = 0; d USB_MAX_DEVICE; d++) {
+ dev = usb_get_dev_index(d);
+ if (dev == NULL)
+ break;
+ if (dev-devnum == i)
+ break;
+ }
+ if (dev == NULL) {
+ printf(*** NO Device avaiable ***\n);
+ return 0;
+ } else {
+ usb_display_desc(dev);
+ usb_display_config(dev);
+ }
}
- if (strncmp(argv[1], stop, 4) == 0) {
+ return 0;
+}
+
+#if defined(CONFIG_USB_STORAGE)
+static int do_usb_stop(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
#ifdef CONFIG_USB_KEYBOARD
- if (argc == 2) {
- if (usb_kbd_deregister() != 0) {
- printf(USB not stopped: usbkbd still
-using USB\n);
- return 1;
- }
- } else {
- /* forced stop, switch console in to serial */
- console_assign(stdin, serial);
- usb_kbd_deregister();
+ if (argc == 1) {
+ if (usb_kbd_deregister() != 0) {
+ printf(USB not stopped: usbkbd still
+using USB\n);
+ return 1;
}
-#endif
- printf(stopping USB..\n);
- usb_stop();
- return 0;
+ } else {
+ /* forced stop, switch console in to serial */
+ console_assign(stdin, serial);
+ usb_kbd_deregister();
}
+#endif
+ printf(stopping USB..\n);
+ usb_stop();
+ return 0;
+}
+
+static int do_usb_storage(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
if (!usb_started) {
printf(USB is stopped. Please issue 'usb start' first.\n);
return 1;
}
- if (strncmp(argv[1], tree, 4) == 0) {
- printf(\nDevice Tree:\n);
- usb_show_tree(usb_get_dev_index(0));
- return 0;
+ return
[U-Boot] [PATCH] sheevaplug: enabled long help
long help is more convenient to the user and the room for it is available... Signed-off-by: Frans Meulenbroeks fransmeulenbro...@gmail.com --- include/configs/sheevaplug.h |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index fc401a8..fa6eaf4 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -46,6 +46,11 @@ #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ /* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP/* undef to save memory */ + +/* * CLKs configurations */ #define CONFIG_SYS_HZ 1000 @@ -97,6 +102,7 @@ #define CONFIG_CMD_NAND #define CONFIG_CMD_PING #define CONFIG_CMD_USB +#define CONFIG_SYS_LONGHELP /* * NAND configuration -- 1.6.4.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] sheevaplug issue
I noticed sheevaplug u-boot (build from next head) does boot when loaded to ram using jtag, but does not work when flashed into it. I suspect that there is an issue wrt configuring the address registers. In both cases I used the procedure as given on http://www.plugcomputer.org/plugwiki/index.php/Setting_Up_OpenOCD_Under_Linux Anyone better results for sheeva? I also noticed that the marvell u-boot image has a lot more commands that are not in the u-boot git (e.g. bubt). Are there any plans to merge those ? Frans ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] SD high capacity support
Hi all, Has any one written a u-boot sdhc driver which supports high-capcity cards ? I am trying to implement a SD high capacity driver but looks like you need to implement the protocol (SD CMDs ) a bit differently. Based on the specs i am not sure if my changes will be backward compatible to run a regular SD card. Thanks, Alfred. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Claims Requirements
Agent Name: Mr. Fred Peters Tel: +44 702 406 2856 Email: (mr.fredpetersclaimsagen...@yahoo.com.hk) This is to inform you that you have been selected for a cash prize of £1,000,000 (British Pounds) held on the 24th of March 2010 in London Uk. 1. Name: 2. Address: 3. Country of Residence: 4. Telephone Number: 5. Age ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6] cfi flash: add status polling method for amd flash
This patch adds status polling method to offer an alternative to
data toggle method for amd flash chips.
This patch is needed for nios2 cfi flash interface, where the bus
controller performs 4 bytes read cycles for a single byte read
instruction. The data toggle method can not detect chip busy
status correctly. So we have to poll DQ7, which will be inverted
when the chip is busy.
This feature is enabled with the config def,
CONFIG_SYS_CFI_FLASH_STATUS_POLL
Signed-off-by: Thomas Chou tho...@wytron.com.tw
---
drivers/mtd/cfi_flash.c | 93 +++
1 files changed, 86 insertions(+), 7 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index cd1a86e..d0240f5 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -605,6 +605,63 @@ static int flash_full_status_check (flash_info_t * info,
flash_sect_t sector,
return retcode;
}
+static int use_flash_status_poll(flash_info_t *info)
+{
+#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
+ if (info-vendor == CFI_CMDSET_AMD_EXTENDED ||
+ info-vendor == CFI_CMDSET_AMD_STANDARD)
+ return 1;
+#endif
+ return 0;
+}
+
+static int flash_status_poll(flash_info_t *info, void *src, void *dst,
+ulong tout, char *prompt)
+{
+#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
+ ulong start;
+ int ready;
+
+#if CONFIG_SYS_HZ != 1000
+ if ((ulong)CONFIG_SYS_HZ 10)
+ tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid
overflow */
+ else
+ tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
+#endif
+
+ /* Wait for command completion */
+ start = get_timer(0);
+ while (1) {
+ switch (info-portwidth) {
+ case FLASH_CFI_8BIT:
+ ready = flash_read8(dst) == flash_read8(src);
+ break;
+ case FLASH_CFI_16BIT:
+ ready = flash_read16(dst) == flash_read16(src);
+ break;
+ case FLASH_CFI_32BIT:
+ ready = flash_read32(dst) == flash_read32(src);
+ break;
+ case FLASH_CFI_64BIT:
+ ready = flash_read64(dst) == flash_read64(src);
+ break;
+ default:
+ ready = 0;
+ break;
+ }
+ if (ready)
+ break;
+ if (get_timer(start) tout) {
+ printf(Flash %s timeout at address %lx data %lx\n,
+ prompt, (ulong)dst, (ulong)flash_read8(dst));
+ return ERR_TIMOUT;
+ }
+ udelay(1); /* also triggers watchdog */
+ }
+#endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
+ return ERR_OK;
+}
+
/*---
*/
static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
@@ -752,7 +809,12 @@ static int flash_write_cfiword (flash_info_t * info, ulong
dest,
if (!sect_found)
sect = find_sector (info, dest);
- return flash_full_status_check (info, sect, info-write_tout, write);
+ if (use_flash_status_poll(info))
+ return flash_status_poll(info, cword, dstaddr,
+info-write_tout, write);
+ else
+ return flash_full_status_check(info, sect,
+ info-write_tout, write);
}
#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
@@ -914,9 +976,15 @@ static int flash_write_cfibuffer (flash_info_t * info,
ulong dest, uchar * cp,
}
flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
- retcode = flash_full_status_check (info, sector,
- info-buffer_write_tout,
- buffer write);
+ if (use_flash_status_poll(info))
+ retcode = flash_status_poll(info, src - (1 shift),
+ dst - (1 shift),
+ info-buffer_write_tout,
+ buffer write);
+ else
+ retcode = flash_full_status_check(info, sector,
+
info-buffer_write_tout,
+ buffer write);
break;
default:
@@ -938,6 +1006,7 @@ int flash_erase (flash_info_t * info, int s_first, int
s_last)
int rcode = 0;
int prot;
flash_sect_t sect;
+ int st;
if (info-flash_id != FLASH_MAN_CFI) {
puts (Can't erase unknown flash type
[U-Boot] Invitation to connect on LinkedIn
LinkedIn Christopher McNamara requested to add you as a connection on LinkedIn: -- Srinath, I'd like to add you to my professional network on LinkedIn. - Christopher Accept invitation from Christopher McNamara http://www.linkedin.com/e/YhLefj14Y3m-0E8v1ZCDgtixJP5Kn9_7/blk/I1908441891_2/1BpC5vrmRLoRZcjkkZt5YCpnlOt3RApnhMpmdzgmhxrSNBszYOnP4Ve34Qd3wMej59bRYNkkBLlSFebPkUdPcUdPsScj4LrCBxbOYWrSlI/EML_comm_afe/ View invitation from Christopher McNamara http://www.linkedin.com/e/YhLefj14Y3m-0E8v1ZCDgtixJP5Kn9_7/blk/I1908441891_2/39vcjAUcjgQe30VckALqnpPbOYWrSlI/svi/ -- Why might connecting with Christopher McNamara be a good idea? People Christopher McNamara knows can discover your profile: Connecting to Christopher McNamara will attract the attention of LinkedIn users. See who's been viewing your profile: http://www.linkedin.com/e/wvp/inv18_wvmp/ -- (c) 2010, LinkedIn Corporation___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] spi: add altera spi controller support
This patch adds the driver of altera spi controller, which is also
used as epcs/spi flash controller.
This driver support more than one spi bus, with base list declared
#define CONFIG_SYS_ALTERA_SPI_LIST { BASE_0,BASE_1,... }
With the spi_flash driver, they can replace the epcs driver at
cpu/nios2/epcs.c.
Signed-off-by: Thomas Chou tho...@wytron.com.tw
---
drivers/spi/Makefile |1 +
drivers/spi/altera_spi.c | 152 ++
2 files changed, 153 insertions(+), 0 deletions(-)
create mode 100644 drivers/spi/altera_spi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index f112ed0..dfcbb8b 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk
LIB:= $(obj)libspi.a
+COBJS-$(CONFIG_ALTERA_SPI) += altera_spi.o
COBJS-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o
COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o
diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c
new file mode 100644
index 000..c30caa4
--- /dev/null
+++ b/drivers/spi/altera_spi.c
@@ -0,0 +1,152 @@
+/*
+ * Altera SPI driver
+ *
+ * based on bfin_spi.c
+ * Copyright (c) 2005-2008 Analog Devices Inc.
+ * Copyright (C) 2010 Thomas Chou tho...@wytron.com.tw
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include common.h
+#include asm/io.h
+#include malloc.h
+#include spi.h
+
+#define ALTERA_SPI_RXDATA 0
+#define ALTERA_SPI_TXDATA 4
+#define ALTERA_SPI_STATUS 8
+#define ALTERA_SPI_CONTROL 12
+#define ALTERA_SPI_SLAVE_SEL20
+
+#define ALTERA_SPI_STATUS_ROE_MSK (0x8)
+#define ALTERA_SPI_STATUS_TOE_MSK (0x10)
+#define ALTERA_SPI_STATUS_TMT_MSK (0x20)
+#define ALTERA_SPI_STATUS_TRDY_MSK (0x40)
+#define ALTERA_SPI_STATUS_RRDY_MSK (0x80)
+#define ALTERA_SPI_STATUS_E_MSK(0x100)
+
+#define ALTERA_SPI_CONTROL_IROE_MSK(0x8)
+#define ALTERA_SPI_CONTROL_ITOE_MSK(0x10)
+#define ALTERA_SPI_CONTROL_ITRDY_MSK (0x40)
+#define ALTERA_SPI_CONTROL_IRRDY_MSK (0x80)
+#define ALTERA_SPI_CONTROL_IE_MSK (0x100)
+#define ALTERA_SPI_CONTROL_SSO_MSK (0x400)
+
+#ifndef CONFIG_SYS_ALTERA_SPI_LIST
+#define CONFIG_SYS_ALTERA_SPI_LIST { CONFIG_SYS_SPI_BASE }
+#endif
+
+static ulong altera_spi_base_list[] = CONFIG_SYS_ALTERA_SPI_LIST;
+
+struct altera_spi_slave {
+ struct spi_slave slave;
+ ulong base;
+};
+#define to_altera_spi_slave(s) container_of(s, struct altera_spi_slave, slave)
+
+void spi_init(void)
+{
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode)
+{
+ struct altera_spi_slave *altspi;
+
+ if (cs = 32)
+ return NULL;
+
+ if (bus = (sizeof(altera_spi_base_list) / sizeof(ulong)))
+ return NULL;
+
+ altspi = malloc(sizeof(*altspi));
+ if (!altspi)
+ return NULL;
+
+ altspi-slave.bus = bus;
+ altspi-slave.cs = cs;
+ altspi-base = altera_spi_base_list[bus];
+ debug(%s: bus:%i cs:%i base:%lx\n, __func__,
+ bus, cs, altspi-base);
+
+ return altspi-slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+ struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
+ free(altspi);
+}
+
+int spi_claim_bus(struct spi_slave *slave)
+{
+ struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
+
+ debug(%s: bus:%i cs:%i\n, __func__, slave-bus, slave-cs);
+ writel(0, altspi-base + ALTERA_SPI_CONTROL);
+ writel(1 slave-cs, altspi-base + ALTERA_SPI_SLAVE_SEL);
+ return 0;
+}
+
+void spi_release_bus(struct spi_slave *slave)
+{
+ struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
+
+ debug(%s: bus:%i cs:%i\n, __func__, slave-bus, slave-cs);
+ writel(0, altspi-base + ALTERA_SPI_SLAVE_SEL);
+}
+
+#ifndef CONFIG_ALTERA_SPI_IDLE_VAL
+# define CONFIG_ALTERA_SPI_IDLE_VAL 0xff
+#endif
+
+int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
+void *din, unsigned long flags)
+{
+ struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
+ /* assume spi core configured to do 8 bit transfers */
+ uint bytes = bitlen / 8;
+ const uchar *txp = dout;
+ uchar *rxp = din;
+
+ debug(%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n, __func__,
+ slave-bus, slave-cs, bitlen, bytes, flags);
+ if (bitlen == 0)
+ goto done;
+
+ if (bitlen % 8) {
+ flags |= SPI_XFER_END;
+ goto done;
+ }
+
+ if (flags SPI_XFER_BEGIN) {
+ /* empty read buffer */
+
Re: [U-Boot] [PATCH v3] spi: add altera spi controller support
On Thursday 25 March 2010 23:23:03 Thomas Chou wrote: + if (bus = (sizeof(altera_spi_base_list) / sizeof(ulong))) + return NULL; ARRAY_SIZE(altera_spi_base_list) ? -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] qemu-pc: U-boot for qemu pc
Hi, I am trying to port u-boot to PC. I have managed to boot up until the u-boot prompt and also make PCI command work. Anyone interested can reply to this mail. I am trying this out on qemu-0.12.1. The source code is hosted on github. http://github.com/balu/pc-u-boot Regards, Balagopal. Nothing selected ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4] spi: add altera spi controller support
This patch adds the driver of altera spi controller, which is also
used as epcs/spi flash controller.
This driver support more than one spi bus, with base list declared
#define CONFIG_SYS_ALTERA_SPI_LIST { BASE_0,BASE_1,... }
With the spi_flash driver, they can replace the epcs driver at
cpu/nios2/epcs.c.
Signed-off-by: Thomas Chou tho...@wytron.com.tw
---
drivers/spi/Makefile |1 +
drivers/spi/altera_spi.c | 152 ++
2 files changed, 153 insertions(+), 0 deletions(-)
create mode 100644 drivers/spi/altera_spi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index f112ed0..dfcbb8b 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk
LIB:= $(obj)libspi.a
+COBJS-$(CONFIG_ALTERA_SPI) += altera_spi.o
COBJS-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o
COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o
diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c
new file mode 100644
index 000..a789c71
--- /dev/null
+++ b/drivers/spi/altera_spi.c
@@ -0,0 +1,152 @@
+/*
+ * Altera SPI driver
+ *
+ * based on bfin_spi.c
+ * Copyright (c) 2005-2008 Analog Devices Inc.
+ * Copyright (C) 2010 Thomas Chou tho...@wytron.com.tw
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include common.h
+#include asm/io.h
+#include malloc.h
+#include spi.h
+
+#define ALTERA_SPI_RXDATA 0
+#define ALTERA_SPI_TXDATA 4
+#define ALTERA_SPI_STATUS 8
+#define ALTERA_SPI_CONTROL 12
+#define ALTERA_SPI_SLAVE_SEL20
+
+#define ALTERA_SPI_STATUS_ROE_MSK (0x8)
+#define ALTERA_SPI_STATUS_TOE_MSK (0x10)
+#define ALTERA_SPI_STATUS_TMT_MSK (0x20)
+#define ALTERA_SPI_STATUS_TRDY_MSK (0x40)
+#define ALTERA_SPI_STATUS_RRDY_MSK (0x80)
+#define ALTERA_SPI_STATUS_E_MSK(0x100)
+
+#define ALTERA_SPI_CONTROL_IROE_MSK(0x8)
+#define ALTERA_SPI_CONTROL_ITOE_MSK(0x10)
+#define ALTERA_SPI_CONTROL_ITRDY_MSK (0x40)
+#define ALTERA_SPI_CONTROL_IRRDY_MSK (0x80)
+#define ALTERA_SPI_CONTROL_IE_MSK (0x100)
+#define ALTERA_SPI_CONTROL_SSO_MSK (0x400)
+
+#ifndef CONFIG_SYS_ALTERA_SPI_LIST
+#define CONFIG_SYS_ALTERA_SPI_LIST { CONFIG_SYS_SPI_BASE }
+#endif
+
+static ulong altera_spi_base_list[] = CONFIG_SYS_ALTERA_SPI_LIST;
+
+struct altera_spi_slave {
+ struct spi_slave slave;
+ ulong base;
+};
+#define to_altera_spi_slave(s) container_of(s, struct altera_spi_slave, slave)
+
+void spi_init(void)
+{
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode)
+{
+ struct altera_spi_slave *altspi;
+
+ if (cs = 32)
+ return NULL;
+
+ if (bus = ARRAY_SIZE(altera_spi_base_list))
+ return NULL;
+
+ altspi = malloc(sizeof(*altspi));
+ if (!altspi)
+ return NULL;
+
+ altspi-slave.bus = bus;
+ altspi-slave.cs = cs;
+ altspi-base = altera_spi_base_list[bus];
+ debug(%s: bus:%i cs:%i base:%lx\n, __func__,
+ bus, cs, altspi-base);
+
+ return altspi-slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+ struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
+ free(altspi);
+}
+
+int spi_claim_bus(struct spi_slave *slave)
+{
+ struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
+
+ debug(%s: bus:%i cs:%i\n, __func__, slave-bus, slave-cs);
+ writel(0, altspi-base + ALTERA_SPI_CONTROL);
+ writel(1 slave-cs, altspi-base + ALTERA_SPI_SLAVE_SEL);
+ return 0;
+}
+
+void spi_release_bus(struct spi_slave *slave)
+{
+ struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
+
+ debug(%s: bus:%i cs:%i\n, __func__, slave-bus, slave-cs);
+ writel(0, altspi-base + ALTERA_SPI_SLAVE_SEL);
+}
+
+#ifndef CONFIG_ALTERA_SPI_IDLE_VAL
+# define CONFIG_ALTERA_SPI_IDLE_VAL 0xff
+#endif
+
+int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
+void *din, unsigned long flags)
+{
+ struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
+ /* assume spi core configured to do 8 bit transfers */
+ uint bytes = bitlen / 8;
+ const uchar *txp = dout;
+ uchar *rxp = din;
+
+ debug(%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n, __func__,
+ slave-bus, slave-cs, bitlen, bytes, flags);
+ if (bitlen == 0)
+ goto done;
+
+ if (bitlen % 8) {
+ flags |= SPI_XFER_END;
+ goto done;
+ }
+
+ if (flags SPI_XFER_BEGIN) {
+ /* empty read buffer */
+
