Re: [U-Boot] [PATCH 8/8] APM82xxx: Add top level common file changes

[Rogan Dawes]

On 2010/09/01 12:35 AM, Tirumala Marri wrote:
> Hi Stefan,
>>> Add bluestone board name  to the board.cfg.
>>> Change Makefile to include bluestone board support.
>>
>> Not needed with board.cfg now. Please remove your changes to Makefile.
>>
> [Marri] You mean we only need board.cfg change and we don't need Makefile
> entry ?

Yes, exactly.

Rogan
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Re: [U-Boot] [PATCH V3] AT91 Fix: return value of get_tbclk

[Reinhard Meyer]

Jens Scharsig schrieb:
> Am 2010-08-31 09:36, schrieb Reinhard Meyer:
>> Hi,
>>  }
>> -- 1.6.0.2 
>>
>> Applied to u-boot-atmel/next
>> Thanks,
>>
>> Reinhard
>>
> What is the reason for the new branch/Custodian Tree u-boot-atmel.
Hello,

one reason is that AVR32 and AT91 share alot in the peripheral
building blocks, so many drivers are both for AVR32 and AT91.

I will try to make sure changes to drivers in that area are
not breaking either architecture.

On that behalf I'd like a briefing why there is

at91_emac AND macb?

macb works for AVR32AP700x and (at least) for AT91SAM9260/9G20/9XE.

What is the deal with at91_emac? Is it required for some AT91's
because macb does not work there?

Does it provide better "results" than macb?

Best Regards
Reinhard

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Re: [U-Boot] [PATCH] support spi gpio driver by control gpio bitbang

[Minkyu Kang]

Dear Donghwa Lee,

2010/9/1 Donghwa Lee :
>  This patch adds basic support for spi mode 0~3 by control gpio bitbang.
> It uses several gpio pin and emulates spi chipselect signal, clock signal
> and sda signal as if spi controller generate spi signal.
>
>
> Signed-off-by: Donghwa Lee  >

Please fix your email address.

>
>
> ---
> drivers/spi/spi_gpio.c | 153 
> include/spi.h | 27 +
> 2 files changed, 180 insertions(+), 0 deletions(-)
> create mode 100644 drivers/spi/spi_gpio.c

Your patch is line wrapped and the tabs are stripped out.
Please resubmit.
And then, people would review your patch.

>
> diff --git a/drivers/spi/spi_gpio.c b/drivers/spi/spi_gpio.c
> new file mode 100644
> index 000..cce809e
> --- /dev/null
> +++ b/drivers/spi/spi_gpio.c
> @@ -0,0 +1,153 @@
> +/*
> + * Copyright (C) 2010 Samsung Electronics

Please insert the name of author

> + * spi_gpio.c - SPI master driver using generic bitbanged GPIO
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +

please remove this space

> +#include 
> +#include 
> +#include 
> +
> +static void spi_gpio_set_sck(struct spi_platform_data *spi, int is_on)
> +{
> + gpio_set_value(spi->clk_bank, spi->clk_num, is_on);
> +}
> +
> +static void spi_gpio_set_mosi(struct spi_platform_data *spi, int is_on)
> +{
> + gpio_set_value(spi->si_bank, spi->si_num, is_on);
> +}
> +
> +static void spi_gpio_chipselect(struct spi_platform_data *spi,
> + int cpol)
> +{
> + gpio_set_value(spi->cs_bank, spi->cs_num,
> + !spi->cs_active);
> +
> + /* set initial clock polarity */
> + if (cpol)
> + spi_gpio_set_sck(spi, spi->mode & SPI_CPOL);
> +
> + /* SPI is normally active-low */
> + gpio_set_value(spi->cs_bank, spi->cs_num,
> + spi->cs_active);
> +}
> +
> +static void
> +spi_gpio_tx_cpha0(struct spi_platform_data *spi,
> + unsigned int nsecs, unsigned int cpol,
> + unsigned int word, unsigned int bits)
> +{
> + int i;
> + unsigned int data;
> +
> + data = (word << spi->word_len) + bits;
> +
> + spi_gpio_chipselect(spi, cpol);
> +
> + /* clock starts at inactive polarity */
> + for (i = spi->word_len; i >= 0; i--) {
> +
> + /* data high or low */
> + if ((data >> i) & 0x1)
> + spi_gpio_set_mosi(spi, 1);
> + else
> + spi_gpio_set_mosi(spi, 0);
> +
> + udelay(nsecs);
> +
> + spi_gpio_set_sck(spi, !cpol);
> + udelay(nsecs);
> +
> + spi_gpio_set_sck(spi, cpol);
> + }
> +}
> +
> +static void
> +spi_gpio_tx_cpha1(struct spi_platform_data *spi,
> + unsigned int nsecs, unsigned int cpol,
> + unsigned int word, unsigned int bits)
> +{
> + int i;
> + unsigned int data;
> +
> + data = (word << spi->word_len) + bits;
> +
> + spi_gpio_chipselect(spi, cpol);
> +
> + /* clock starts at inactive polarity */
> + for (i = spi->word_len; i >= 0; i--) {
> +
please remove this space

> + /* setup MSB (to slave) on leading edge */
> + spi_gpio_set_sck(spi, !cpol);
> +
> + /* data high or low */
> + if ((data >> i) & 0x1)
> + spi_gpio_set_mosi(spi, 1);
> + else
> + spi_gpio_set_mosi(spi, 0);
> +
> + udelay(nsecs);
> +
> + spi_gpio_set_sck(spi, cpol);
> + udelay(nsecs);
> + }
> +}
> +
> +static void spi_gpio_tx_word_mode0(struct spi_platform_data *spi,
> + unsigned int nsecs, unsigned int word, unsigned int bits)
> +{
> + return spi_gpio_tx_cpha0(spi, nsecs, 0, word, bits);
> +}
> +
> +static void spi_gpio_tx_word_mode1(struct spi_platform_data *spi,
> + unsigned int nsecs, unsigned int word, unsigned int bits)
> +{
> + return spi_gpio_tx_cpha1(spi, nsecs, 0, word, bits);
> +}
> +
> +static void spi_gpio_tx_word_mode2(struct spi_platform_data *spi,
> + unsigned int nsecs, unsigned int word, unsigned int bits)
> +{
> + return spi_gpio_tx_cpha0(spi, nsecs, 1, word, bits);
> +}
> +
> +static void spi_gpio_tx_word_mode3(struct spi_platform_data *spi,
> + unsigned int nsecs, unsigned int word, unsigned int bits)
> +{
> + return spi_gpio_tx_cpha1(spi, nsecs, 1, word, bits);
> +}
> +
> +void spi_gpio_write(struct spi_platform_data *spi,
> + unsigned int address, unsigned int command)
> +{
> + switch (spi->mode) {
> + case SPI_MODE_0:
> + spi_gpio_tx_word_mode0(spi,
> + 1, address, command);
> + case SPI_MODE_1:
> + spi_gpio_tx_word_mode1(spi,
> + 1, address, command);
> + case SPI_MODE_2:
> + 

[U-Boot] AT91: Hitachi LCD problem

[Chris Isbell]

Hello,

Our system is based on the AT91SAM9263 and has a Hitachi LCD screen in
portrait mode. The U-Boot splash screen is not displaying correctly. The
left hand half is correct, but the right hand half either flickers or
breaks up completely into a pattern of vertical lines. The whole screen
works correctly under Linux.

The screen configuration appears to match other U-Boot configurations
for this hardware.

U-Boot - our board:

vidinfo_t panel_info = {
vl_col: 240,
vl_row: 320,
vl_clk: 4965000,
vl_sync:ATMEL_LCDC_INVLINE_INVERTED |
ATMEL_LCDC_INVFRAME_INVERTED,
vl_bpix:3,
vl_tft: 1,
vl_hsync_len:   5,
vl_left_margin: 10,
vl_right_margin:33,
vl_vsync_len:   1,
vl_upper_margin:8,
vl_lower_margin:0,
mmio:   AT91SAM9263_LCDC_BASE,
};

U_Boot board-at91sam9263ek:

vidinfo_t panel_info = {
vl_col: 240,
vl_row: 320,
vl_clk: 4965000,
vl_sync:ATMEL_LCDC_INVLINE_INVERTED |
ATMEL_LCDC_INVFRAME_INVERTED,
vl_bpix:3,
vl_tft: 1,
vl_hsync_len:   5,
vl_left_margin: 1,
vl_right_margin:33,
vl_vsync_len:   1,
vl_upper_margin:1,
vl_lower_margin:0,
mmio:   AT91SAM9263_LCDC_BASE,
};


Linux - our hardware:

/* Hitachi TX07D9VM1CAB - 2.4", 320x240 */
static struct fb_videomode at91_tft_vga_modes[] = {
{
.name   = "TX07D9VM1CAB @ 60",
.refresh= 60,
.xres   = 240,
.yres   = 320,
.pixclock   = KHZ2PICOS(4965),
.left_margin= 10,
.right_margin   = 0,
.upper_margin   = 8,
.lower_margin   = 0,
.hsync_len  = 5,
.vsync_len  = 1,
.sync   = FB_SYNC_HOR_HIGH_ACT |
  FB_SYNC_VERT_HIGH_ACT,
.vmode  = FB_VMODE_NONINTERLACED,
},
};

Changing the settings for our board to be exactly the same as
board-at91sam9263ek does not resolve the problem.

Any clues as to where else to look would be very much appreciated.

Thanks,

-- 
Chris Isbell
Systems Integration Manager, CDSRail
Fareham, Hampshire, UK. 

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Re: [U-Boot] [PATCH v1 2/2] APM82xxx: Add bluestone board support

[Stefan Roese]

Hi Marri,

On Wednesday 01 September 2010 04:11:22 tma...@apm.com wrote:
> From: Tirumala Marri 
> 
> Add support code for bluestone board wth APM82XXX processor based.
> This patch includes early board init, misc init, configure EBC,
> initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.

Please find some further comments below.
 
> Signed-off-by: Tirumala R Marri 
> ---
>  V1:
>   * Remove "All rights reserved" phrase from headers.
>   * Add empty line which was removed.
>   * Move EBC definititions to bluestone_config.h file
>   * Remove reconfigure_EBC() function.
>   * Remove unused CONFIG_SDRAM16BIT_OFFSET.
>   * Remove unused CONFIG_SDRAM_INFO_EEPROM_ADDR.
>   * Add empty lines in bluestone.c file.
>   * Replacing AC_R | AC_W | AC_X with AC_RWX.
>   * Remove changes to main Makefile
>   * Remove NAND references from config file.
>   * Squash some of the patches.
>   * Remove top Makefile change.
> ---
>  MAINTAINERS  |3 +
>  MAKEALL  |1 +
>  board/amcc/bluestone/Makefile|   52 +++
>  board/amcc/bluestone/bluestone.c |  162
> +++ board/amcc/bluestone/config.mk   |  
> 40 +
>  board/amcc/bluestone/init.S  |   55 
>  boards.cfg   |1 +
>  include/configs/bluestone.h  |  175
> ++ 8 files changed, 489 insertions(+),
> 0 deletions(-)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4b91b0f..263c00b 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -253,6 +253,9 @@ Feng Kan 
> 
>   redwood PPC4xx
> 
> +Tirumala Marri

Missing space before "<".

> + bluestone   APM82XXX
> +
>  Brad Kemp 
> 
>   ppmc8260MPC8260
> diff --git a/MAKEALL b/MAKEALL
> index b34ae33..02d5c17 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -191,6 +191,7 @@ LIST_4xx="\
>   ASH405  \
>   bamboo  \
>   bamboo_nand \
> + bluestone   \
>   bubinga \
>   CANBT   \
>   canyonlands \
> diff --git a/board/amcc/bluestone/Makefile b/board/amcc/bluestone/Makefile
> new file mode 100644
> index 000..41751c8
> --- /dev/null
> +++ b/board/amcc/bluestone/Makefile
> @@ -0,0 +1,52 @@
> +#
> +# Copyright (c) 2010, Applied Micro Circuits Corporation
> +# Author: Tirumala R Marri 
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB  = $(obj)lib$(BOARD).a
> +
> +COBJS-y  := $(BOARD).o
> +SOBJS:= init.o
> +
> +COBJS   := $(COBJS-y)
> +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
> +OBJS := $(addprefix $(obj),$(COBJS))
> +SOBJS:= $(addprefix $(obj),$(SOBJS))
> +
> +$(LIB):  $(OBJS) $(SOBJS)
> + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
> +
> +clean:
> + rm -f $(SOBJS) $(OBJS)
> +
> +distclean:   clean
> + rm -f $(LIB) core *.bak $(obj).depend
> +
> +#
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#
> diff --git a/board/amcc/bluestone/bluestone.c
> b/board/amcc/bluestone/bluestone.c new file mode 100644
> index 000..fbb70e3
> --- /dev/null
> +++ b/board/amcc/bluestone/bluestone.c
> @@ -0,0 +1,162 @@
> +/*
> + * Bluestone board support
> + *
> + * Copyright (c) 2010, Applied Micro Circuits Corporation
> + * Author: Tirumala R Marri 
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + 

[U-Boot] [PATCH] support spi gpio driver by control gpio bitbang

[Donghwa Lee]

This patch adds basic support for spi mode 0~3 by control gpio bitbang.
It uses several gpio pin and emulates spi chipselect signal, clock signal
and sda signal as if spi controller generate spi signal.

Signed-off-by: Donghwa Lee 
---
I resend this patch because format of sended patch was wrong.

 drivers/spi/spi_gpio.c |  153 
 include/spi.h  |   27 +
 2 files changed, 180 insertions(+), 0 deletions(-)
 create mode 100644 drivers/spi/spi_gpio.c

diff --git a/drivers/spi/spi_gpio.c b/drivers/spi/spi_gpio.c
new file mode 100644
index 000..cce809e
--- /dev/null
+++ b/drivers/spi/spi_gpio.c
@@ -0,0 +1,153 @@
+/*
+ * Copyright (C) 2010 Samsung Electronics
+ * spi_gpio.c - SPI master driver using generic bitbanged GPIO
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+
+static void spi_gpio_set_sck(struct spi_platform_data *spi, int is_on)
+{
+   gpio_set_value(spi->clk_bank, spi->clk_num, is_on);
+}
+
+static void spi_gpio_set_mosi(struct spi_platform_data *spi, int is_on)
+{
+   gpio_set_value(spi->si_bank, spi->si_num, is_on);
+}
+
+static void spi_gpio_chipselect(struct spi_platform_data *spi,
+   int cpol)
+{
+   gpio_set_value(spi->cs_bank, spi->cs_num,
+   !spi->cs_active);
+
+   /* set initial clock polarity */
+   if (cpol)
+   spi_gpio_set_sck(spi, spi->mode & SPI_CPOL);
+
+   /* SPI is normally active-low */
+   gpio_set_value(spi->cs_bank, spi->cs_num,
+   spi->cs_active);
+}
+
+static void
+spi_gpio_tx_cpha0(struct spi_platform_data *spi,
+   unsigned int nsecs, unsigned int cpol,
+   unsigned int word, unsigned int bits)
+{
+   int i;
+   unsigned int data;
+
+   data = (word << spi->word_len) + bits;
+
+   spi_gpio_chipselect(spi, cpol);
+
+   /* clock starts at inactive polarity */
+   for (i = spi->word_len; i >= 0; i--) {
+
+   /* data high or low */
+   if ((data >> i) & 0x1)
+   spi_gpio_set_mosi(spi, 1);
+   else
+   spi_gpio_set_mosi(spi, 0);
+
+   udelay(nsecs);
+
+   spi_gpio_set_sck(spi, !cpol);
+   udelay(nsecs);
+
+   spi_gpio_set_sck(spi, cpol);
+   }
+}
+
+static void
+spi_gpio_tx_cpha1(struct spi_platform_data *spi,
+   unsigned int nsecs, unsigned int cpol,
+   unsigned int word, unsigned int bits)
+{
+   int i;
+   unsigned int data;
+
+   data = (word << spi->word_len) + bits;
+
+   spi_gpio_chipselect(spi, cpol);
+
+   /* clock starts at inactive polarity */
+   for (i = spi->word_len; i >= 0; i--) {
+
+   /* setup MSB (to slave) on leading edge */
+   spi_gpio_set_sck(spi, !cpol);
+
+   /* data high or low */
+   if ((data >> i) & 0x1)
+   spi_gpio_set_mosi(spi, 1);
+   else
+   spi_gpio_set_mosi(spi, 0);
+
+   udelay(nsecs);
+
+   spi_gpio_set_sck(spi, cpol);
+   udelay(nsecs);
+   }
+}
+
+static void spi_gpio_tx_word_mode0(struct spi_platform_data *spi,
+   unsigned int nsecs, unsigned int word, unsigned int bits)
+{
+   return spi_gpio_tx_cpha0(spi, nsecs, 0, word, bits);
+}
+
+static void spi_gpio_tx_word_mode1(struct spi_platform_data *spi,
+   unsigned int nsecs, unsigned int word, unsigned int bits)
+{
+   return spi_gpio_tx_cpha1(spi, nsecs, 0, word, bits);
+}
+
+static void spi_gpio_tx_word_mode2(struct spi_platform_data *spi,
+   unsigned int nsecs, unsigned int word, unsigned int bits)
+{
+   return spi_gpio_tx_cpha0(spi, nsecs, 1, word, bits);
+}
+
+static void spi_gpio_tx_word_mode3(struct spi_platform_data *spi,
+   unsigned int nsecs, unsigned int word, unsigned int bits)
+{
+   return spi_gpio_tx_cpha1(spi, nsecs, 1, word, bits);
+}
+
+void spi_gpio_write(struct spi_platform_data *spi,
+   unsigned int address, unsigned int command)
+{
+   switch (spi->mode) {
+   case SPI_MODE_0:
+   spi_gpio_tx_word_mode0(spi,
+   1, address, command);
+   case SPI_

Re: [U-Boot] [PATCH v1 1/2] Add CPU and other peripheral support

[Stefan Roese]

Hi Marri,

On Wednesday 01 September 2010 04:11:14 tma...@apm.com wrote:
> From: Tirumala Marri 
> 
> APM82XXX is a new line of SoCs which are derivatives of
> PPC44X family of processors.
> 
> This patch adds support of CPU, cache,
> tlb, 32k ocm, bootstraps, PLB AHB bus, DDR and
> Some common register definitions.

Please find some comments below.


 
> diff --git a/arch/powerpc/include/asm/ppc4xx-sdram.h
> b/arch/powerpc/include/asm/ppc4xx-sdram.h index 4ec1ef8..a6cdace 100644
> --- a/arch/powerpc/include/asm/ppc4xx-sdram.h
> +++ b/arch/powerpc/include/asm/ppc4xx-sdram.h
> @@ -292,7 +292,7 @@
>   */
>  #if defined(CONFIG_440SPE) || \
>  defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
> -defined(CONFIG_460SX)
> +defined(CONFIG_460SX) || defined(CONFIG_APM82XXX)
>  #define SDRAM_RXBAS_SDBA_MASK0xFFE0  /* Base 
address */
>  #define SDRAM_RXBAS_SDBA_ENCODE(n)   ((u32)(((phys_size_t)(n) >> 2) &
> 0xFFE0)) #define SDRAM_RXBAS_SDBA_DECODE(n)   phys_size_t)(n)) &
> 0xFFE0) << 2) @@ -322,6 +322,7 @@
>   * Revisit this file to check if all these 405EX defines are correct and
>   * can be used in the common 44x_spd_ddr2 code as well. sr, 2008-06-02
>   */
> +#define SDRAM_MBXCF_BASE_ENCODE(n)  (((n) & 0xFFC0) >> 3)

It seems to me, that you are adding this to the 405EX part of the header. 
Please re-check if this is correct.

>  #define SDRAM_RXBAS_SDSZ_MASKPPC_REG_VAL(19, 0xF)
>  #define SDRAM_RXBAS_SDSZ_4MB PPC_REG_VAL(19, 0x0)
>  #define SDRAM_RXBAS_SDSZ_8MB PPC_REG_VAL(19, 0x1)
> @@ -346,6 +347,18 @@
>  #define SDRAM_RXBAS_SDSZ_2048SDRAM_RXBAS_SDSZ_2048MB
>  #define SDRAM_RXBAS_SDSZ_4096SDRAM_RXBAS_SDSZ_4096MB
>  #define SDRAM_RXBAS_SDSZ_8192SDRAM_RXBAS_SDSZ_8192MB
> +#define SDRAM_RXBAS_SDAM_MODE0  PPC_REG_VAL(23, 0x0)
> +#define SDRAM_RXBAS_SDAM_MODE1  PPC_REG_VAL(23, 0x1)
> +#define SDRAM_RXBAS_SDAM_MODE2  PPC_REG_VAL(23, 0x2)
> +#define SDRAM_RXBAS_SDAM_MODE3  PPC_REG_VAL(23, 0x3)
> +#define SDRAM_RXBAS_SDAM_MODE4  PPC_REG_VAL(23, 0x4)
> +#define SDRAM_RXBAS_SDAM_MODE5  PPC_REG_VAL(23, 0x5)
> +#define SDRAM_RXBAS_SDAM_MODE6  PPC_REG_VAL(23, 0x6)
> +#define SDRAM_RXBAS_SDAM_MODE7  PPC_REG_VAL(23, 0x7)
> +#define SDRAM_RXBAS_SDAM_MODE8  PPC_REG_VAL(23, 0x8)
> +#define SDRAM_RXBAS_SDAM_MODE9  PPC_REG_VAL(23, 0x9)
> +#define SDRAM_RXBAS_SDBE_DISABLEPPC_REG_VAL(31, 0x0)
> +#define SDRAM_RXBAS_SDBE_ENABLE PPC_REG_VAL(31, 0x1)

Again, this is the 405EX part.

Please fix and resubmit. Thanks.

Cheers,
Stefan

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Re: [U-Boot] [PATCH 3/4] cfi_flash: Simplify dynamic flash bank number detection

[Heiko Schocher]

Hello Stefan,

Stefan Roese wrote:
> This patch simplifies the use of CONFIG_SYS_MAX_FLASH_BANKS_DETECT. By
> moving these optional variables and defines into the common code, board
> specific code is minimized. Currently only the following board use
> this feature:
> 
> APC405, IDS8247, TQM834x
> 
> And IDS8247 doesn't seem to really need this feature, since its not
> updating the bank number variable at all. So this patch removes the
> definition of CONFIG_SYS_MAX_FLASH_BANKS_DETECT from this board port.
> 
> This new framework will be used by the upcoming lwmon5 update as well.
> 
> Signed-off-by: Stefan Roese 
> Cc: Matthias Fuchs 
> Cc: Heiko Schocher 

Acked-by: Heiko Schocher

bye,
Heiko
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Re: [U-Boot] [PATCH] usb: fix usb start problem with SMSC USB hub and Toshiba USB stick

[Remy Bohmer]

Hi,

2010/8/31 Anatolij Gustschin :
> Checking the status field of the qTD token in the current code
> do not take into acount cases where endpoint stall (halted) bit
> is set together with some other status bits. As a result clearing
> stall on an endpoint won't be done if other status bits were set.

Reading this description and this code:

>/* special handling of STALL in DATA phase */
> -   if ((result < 0) && (us->pusb_dev->status & USB_ST_STALLED)) {
> +   if ((result < 0) &&
> +   (us->pusb_dev->status & (USB_ST_STALLED | USB_ST_CRC_ERR))) {
>USB_STOR_PRINTF("DATA:stall\n");

Description and code do not seem to match. The old implementation
explicitly checked if the STALLED bit was set, and if so the endpoint
would be cleared. Now, it seems you are clearing the endpoint _also_
when the CRC_ERR bit is set.

There are a lot more reasons, at least on other host controllers that
set the status USB_ST_CRC_ERR, does this change not break the other
code? (A simple grep will show you the situations where it is
returned.)

> E.g. 'usb start' often fails with Toshiba USB stick 0x930/0x6545
> connected to the SMSC USB 2.0 hub 0x424/0x2514. Debugging the
> issue showed that while bulk IN transfers with length of 13 or
> 18 the status field of the qTD token sometimes indicates trans-
> action error (XactErr) and sometimes additionally endpoint halted
> state. In the latter case resetting the USB device in error
> recovery code fails as no clear stall request on the endpoint
> will be done.

OK

> However this fix is not enough to solve 'usb start' problem
> with hub/stick combination mentioned above. Running with lot of
> debug code in ehci_submit_async() I've never seen the problem
> with usb stick recognition. After removing this debug code the
> similar problem sometimes showed up again. Therefore the patch
> also adds delay in ehci_submit_async() for above-mentioned
> hub/stick combination. Even without this delay the fix is an

Why only for these USB sticks? Are these sticks special among the
thousands of different sticks out there?
Or could it be more reliable to always do this delay for all USB
sticks? Or even better, what are we missing here that the delay is
needed at all?

> diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
> index 37d056e..7463a75 100644
> --- a/drivers/usb/host/ehci-hcd.c
> +++ b/drivers/usb/host/ehci-hcd.c

Is this problem only valid for the EHCI code? I can imagine that the
other host controllers (like UHCI and OHCI and so on) code suffer the
same problem and need similar fixes...
(At least I know that I have here a couple of USB sticks that show
similar problems with OHCI ;-) )

Kind regards,

Remy
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[U-Boot] How to adapt top-level Makefile tricks to current boards.cfg

[os user]

Hi All,

In top-level Makefile, there are some tricks to support more config
items. For example,

Lite5200_config \
Lite5200_LOWBOOT_config \
Lite5200_LOWBOOT08_config   \
icecube_5200_config \
icecube_5200_LOWBOOT_config \
icecube_5200_LOWBOOT08_config   \
icecube_5200_DDR_config \
icecube_5200_DDR_LOWBOOT_config \
icecube_5200_DDR_LOWBOOT08_config:  unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/icecube
@[ -z "$(findstring LOWBOOT_,$@)" ] || \
if [ "$(findstring DDR,$@)" ] ; \
then echo "TEXT_BASE = 0xFF80" 
>$(obj)board/icecube/config.tmp ; \
else echo "TEXT_BASE = 0xFF00" 
>$(obj)board/icecube/config.tmp ; \
fi
@[ -z "$(findstring LOWBOOT08,$@)" ] || \
echo "TEXT_BASE = 0xFF80" >$(obj)board/icecube/config.tmp
@[ -z "$(findstring DDR,$@)" ] || \
echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h
@$(MKCONFIG) -n $@ -a IceCube powerpc mpc5xxx icecube


If we want to apply this kind of trick to current boards.cfg, what
should we do? Add a lot of items in boards.cfg?

Thanks.
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Re: [U-Boot] [ELDK] Not able to Uncompress Multi Image

[Detlev Zundel]

Hi Zoolu,

> Thanks for your inputs.
>  
> When i added Printf's at the area of Uncompressing Multi image and programmed
> new u-boot with debugs now the images boot. Does it mean that delay by 
> printf's
> did the magic ?? which gave the time to uncompress the images ?

Well the printfs did something, although they don't have the power for
magic yet ;)

What printfs really change is the timing of sequences.  If this makes a
difference between working and non-working setups, it may well be that
the hardware is also right on the fringe of the conditions where it
works flawlessly.  So maybe the working hardware is just inside these
limits (because of tolerances of components) and the other hardware
isn't.

If I were you, the first thing I'd check is the power supply - maybe the
fast sequence is just enough to make it stumble.  This is not
theoretical, I've seen this in designs changing "completely compatible"
parts against faster parts.

Best wishes
  Detlev

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necessarily a good idea.  It is hard to be sure  where they are going to
land, and it could be dangerous sitting under them as they fly overhead.
  -- The Twelve Networking Truths (RFC 1925)
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[U-Boot] how to distingush a flash is single dial or dual dial only use CFI?

[hacklu.uboot]

  or I only can get this imformation through read the device ID ? 
--
hacklu
2010-09-01

2010-09-01 



hacklu.uboot 
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Re: [U-Boot] [PATCH 2/4] cfi_flash: Add weak default for cfi_flash_bank_addr()

[Sergei Shtylyov]

Hello.

Stefan Roese wrote:

> cfi_flash_bank_addr(int bank_nr) returns the base addresses of the
> requested bank. Introducing this weak default enables boards to override
> this functions with a board specific version when required.

> This feature will be used in the lwmon5 board update, supporting runtime
> detection of 2 board revisions with different flash layouts.

> Signed-off-by: Stefan Roese 
[...]
> diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
> index b4a09dc..f10e09e 100644
> --- a/drivers/mtd/cfi_flash.c
> +++ b/drivers/mtd/cfi_flash.c
[...]
> @@ -2021,14 +2028,12 @@ unsigned long flash_init (void)
>   getenv_f("unlock", s, sizeof(s));
>  #endif
>  
> -#define BANK_BASE(i) (((phys_addr_t 
> [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i])
> -
>   /* Init: no FLASHes known */
>   for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
>   flash_info[i].flash_id = FLASH_UNKNOWN;
>  
> - if (!flash_detect_legacy (BANK_BASE(i), i))
> - flash_get_size (BANK_BASE(i), i);
> + if (!flash_detect_legacy (cfi_flash_bank_addr(i), i))
> + flash_get_size (cfi_flash_bank_addr(i), i);

Could remove the sopaces before parens to improve the coding style, while 
at it...

WBR, Sergei

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Re: [U-Boot] [PATCH 03/26] ARM: cp15: setup mmu and enable dcache

[V, Aneesh]

Hello Heiko Schocher,

> boun...@lists.denx.de] On Behalf Of Heiko Schocher
> +static inline void mmu_setup(void)
> +{
> + static u32 __attribute__((aligned(16384))) page_table[4096];
> + bd_t *bd = gd->bd;
> + int i, j;
> + u32 reg;
> +
> + /* Set up an identity-mapping for all 4GB, rw for everyone */
> + for (i = 0; i < 4096; i++)
> + page_table[i] = i << 20 | (3 << 10) | 0x12;
> + /* Then, enable cacheable and bufferable for RAM only */
> + for (j = 0; j < CONFIG_NR_DRAM_BANKS; j++) {
> + for (i = bd->bi_dram[j].start >> 20;
> + i < (bd->bi_dram[j].start + bd->bi_dram[j].size)
> >> 20;
> + i++) {
> + page_table[i] = i << 20 | (3 << 10) | CACHE_SETUP;
> + }
> + }
> +
> + /* Copy the page table address to cp15 */
> + asm volatile("mcr p15, 0, %0, c2, c0, 0"
> +  : : "r" (page_table) : "memory");
> + /* Set the access control to all-supervisor */
> + asm volatile("mcr p15, 0, %0, c3, c0, 0"
> +  : : "r" (~0));
> + /* and enable the mmu */
> + reg = get_cr(); /* get control reg. */
> + cp_delay();
> + set_cr(reg | CR_M);

I think you need to invalidate caches, TLB, branch-prediction array etc before 
enabling MMU. I don't think the caches are guaranteed to be invalidated at 
power on reset.

Please find below some experimental(but working) code I had written  for 
enabling MMU and caches for an internal project. It's written for the ARM RVCT 
tool chain. So, it will not compile straight away on GCC.

It has code for invalidating caches, TLB, Branch prediction array etc. Also, it 
uses macros for the bit fields in the SCTLR register. However, the L1 D$ 
cleaning is not generic. It assumes the size and organization of the L1 cache. 
arch/arm/cpu/armv7/omap3/cache.S has a more generic implementation of 
invalidating the entire L1 D$.

In case you find it useful, you are welcome to reuse any part of this code. If 
you want me to create a patch myself I am open to do that too.


Best regards,
Aneesh

Mmu.c:

/*
 * (C) Copyright 2008
 * Texas Instruments, 
 * Author:
 *  Aneesh V 
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation's version 2 of
 * the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include 

#ifdef MMU_ENABLED

extern unsigned int pagetable[1024*4];
extern unsigned int Vector(void);

#define PAGE_TAB_SECTION_CONSTANTS 0x40002
#define NS_BIT_1 0x8
#define nG_0 0
#define S_BIT_1 0x01
#define AP_FULL_ACCESS 0x00C00
#define DOMAIN_0 0
#define XN_1 0x10
#define TEX_C_B_NORMAL_I_WBWA_O_WBWA 0x05004 
#define TEX_C_B_NORMAL_I_WBWA_O_NC 0x04004 
#define TEX_C_B_NORMAL_I_NC_O_NC 0x01002 
#define TEX_C_B_NORMAL_SHARABLE_DEVICE 0x4 

#define SECTION_ENTRY_FULL_ACCESS_FULL_CACHED 
(PAGE_TAB_SECTION_CONSTANTS|NS_BIT_1|nG_0|S_BIT_1|AP_FULL_ACCESS|DOMAIN_0|TEX_C_B_NORMAL_I_WBWA_O_WBWA)
#define SECTION_ENTRY_FULL_ACCESS_FULL_CACHED_NON_SHARED 
(PAGE_TAB_SECTION_CONSTANTS|NS_BIT_1|nG_0|AP_FULL_ACCESS|DOMAIN_0|TEX_C_B_NORMAL_I_WBWA_O_WBWA)
#define SECTION_ENTRY_FULL_ACCESS_NORMAL_NC 
(PAGE_TAB_SECTION_CONSTANTS|NS_BIT_1|nG_0|S_BIT_1|AP_FULL_ACCESS|DOMAIN_0|TEX_C_B_NORMAL_I_NC_O_NC)
#define SECTION_ENTRY_FULL_ACCESS_SHARED_DEVICE 
(PAGE_TAB_SECTION_CONSTANTS|NS_BIT_1|nG_0|S_BIT_1|AP_FULL_ACCESS|DOMAIN_0|TEX_C_B_NORMAL_SHARABLE_DEVICE)



#define M_BIT_1 0x1
#define C_BIT_1  0x4
#define Z_BIT_1  0x800
#define I_BIT_1  0x1000
#define V_BIT_1  0x2000

#define SCTRL_VALUE (M_BIT_1|C_BIT_1|Z_BIT_1|I_BIT_1|V_BIT_1)
//#define SCTRL_VALUE (M_BIT_1|Z_BIT_1|I_BIT_1|V_BIT_1)

__asm void setvector(void);
void setup_pagetable(unsigned int *pagetable, unsigned int devicemem_attr, 
unsigned int code_and_data);
__asm unsigned int setup_vector(unsigned int (*vector)(void));
__asm unsigned int setup_ttbr0(unsigned int ttbr0value);
__asm unsigned int setup_ttbr1(unsigned int ttbr1value);
__asm unsigned int setup_ttbrc(unsigned int ttbrc_value);
__asm unsigned int setup_dacr(unsigned int dacr_value);
__asm unsigned int setup_sctlr(unsigned int sctlrr_value);
__asm void invalidate_caches(void);
__asm void barriers(void);
__asm void enable_pl310(void);
void invalidate_dcache_setway(unsigned int setway);
void stresstestaftermmu(void);

__asm unsigned int setup_prrr(unsigned int prrr_value)
{
MCR p15,0,r0,c10,c2,0 ; Read CP15 Primary Region Remap Register
bx lr
}

__asm unsigned i

Re: [U-Boot] [PATCH 03/26] ARM: cp15: setup mmu and enable dcache

[Heiko Schocher]

Hello V, Aneesh,

V, Aneesh wrote:
> Hello Heiko Schocher,
> 
>> boun...@lists.denx.de] On Behalf Of Heiko Schocher
>> +static inline void mmu_setup(void)
>> +{
>> +static u32 __attribute__((aligned(16384))) page_table[4096];
>> +bd_t *bd = gd->bd;
>> +int i, j;
>> +u32 reg;
>> +
>> +/* Set up an identity-mapping for all 4GB, rw for everyone */
>> +for (i = 0; i < 4096; i++)
>> +page_table[i] = i << 20 | (3 << 10) | 0x12;
>> +/* Then, enable cacheable and bufferable for RAM only */
>> +for (j = 0; j < CONFIG_NR_DRAM_BANKS; j++) {
>> +for (i = bd->bi_dram[j].start >> 20;
>> +i < (bd->bi_dram[j].start + bd->bi_dram[j].size)
 20;
>> +i++) {
>> +page_table[i] = i << 20 | (3 << 10) | CACHE_SETUP;
>> +}
>> +}
>> +
>> +/* Copy the page table address to cp15 */
>> +asm volatile("mcr p15, 0, %0, c2, c0, 0"
>> + : : "r" (page_table) : "memory");
>> +/* Set the access control to all-supervisor */
>> +asm volatile("mcr p15, 0, %0, c3, c0, 0"
>> + : : "r" (~0));
>> +/* and enable the mmu */
>> +reg = get_cr(); /* get control reg. */
>> +cp_delay();
>> +set_cr(reg | CR_M);
> 
> I think you need to invalidate caches, TLB, branch-prediction array etc 
> before enabling MMU. I don't think the caches are guaranteed to be 
> invalidated at power on reset.
> 
> Please find below some experimental(but working) code I had written  for 
> enabling MMU and caches for an internal project. It's written for the ARM 
> RVCT tool chain. So, it will not compile straight away on GCC.
> 
> It has code for invalidating caches, TLB, Branch prediction array etc. Also, 
> it uses macros for the bit fields in the SCTLR register. However, the L1 D$ 
> cleaning is not generic. It assumes the size and organization of the L1 
> cache. 
> arch/arm/cpu/armv7/omap3/cache.S has a more generic implementation of 
> invalidating the entire L1 D$.
> 
> In case you find it useful, you are welcome to reuse any part of this code. 
> If you want me to create a patch myself I am open to do that too.

Thanks!

I try to try out your suggestions, if you can make a patch
(and try it on a plattform it would be great ;-)

bye,
Heiko
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Re: [U-Boot] [PATCH 03/26] ARM: cp15: setup mmu and enable dcache

[V, Aneesh]

Hello Heiko,

> -Original Message-
> From: Heiko Schocher [mailto:h...@denx.de]
> Sent: Wednesday, September 01, 2010 4:56 PM
> To: V, Aneesh
> Cc: U-Boot user list; Alessandro Rubini
> Subject: Re: [U-Boot] [PATCH 03/26] ARM: cp15: setup mmu and enable
> dcache
> 
> Hello V, Aneesh,
> 
> V, Aneesh wrote:
> > Hello Heiko Schocher,
> >
> >> boun...@lists.denx.de] On Behalf Of Heiko Schocher
> >> +static inline void mmu_setup(void)
> >> +{
> >> +  static u32 __attribute__((aligned(16384))) page_table[4096];
> >> +  bd_t *bd = gd->bd;
> >> +  int i, j;
> >> +  u32 reg;
> >> +
> >> +  /* Set up an identity-mapping for all 4GB, rw for everyone */
> >> +  for (i = 0; i < 4096; i++)
> >> +  page_table[i] = i << 20 | (3 << 10) | 0x12;
> >> +  /* Then, enable cacheable and bufferable for RAM only */
> >> +  for (j = 0; j < CONFIG_NR_DRAM_BANKS; j++) {
> >> +  for (i = bd->bi_dram[j].start >> 20;
> >> +  i < (bd->bi_dram[j].start + bd->bi_dram[j].size)
>  20;
> >> +  i++) {
> >> +  page_table[i] = i << 20 | (3 << 10) | CACHE_SETUP;
> >> +  }
> >> +  }
> >> +
> >> +  /* Copy the page table address to cp15 */
> >> +  asm volatile("mcr p15, 0, %0, c2, c0, 0"
> >> +   : : "r" (page_table) : "memory");
> >> +  /* Set the access control to all-supervisor */
> >> +  asm volatile("mcr p15, 0, %0, c3, c0, 0"
> >> +   : : "r" (~0));
> >> +  /* and enable the mmu */
> >> +  reg = get_cr(); /* get control reg. */
> >> +  cp_delay();
> >> +  set_cr(reg | CR_M);
> >
> > I think you need to invalidate caches, TLB, branch-prediction
> array etc before enabling MMU. I don't think the caches are
> guaranteed to be invalidated at power on reset.
> >
> > Please find below some experimental(but working) code I had
> written  for enabling MMU and caches for an internal project. It's
> written for the ARM RVCT tool chain. So, it will not compile
> straight away on GCC.
> >
> > It has code for invalidating caches, TLB, Branch prediction array
> etc. Also, it uses macros for the bit fields in the SCTLR register.
> However, the L1 D$ cleaning is not generic. It assumes the size and
> organization of the L1 cache.
> > arch/arm/cpu/armv7/omap3/cache.S has a more generic implementation
> of invalidating the entire L1 D$.
> >
> > In case you find it useful, you are welcome to reuse any part of
> this code. If you want me to create a patch myself I am open to do
> that too.
> 
> Thanks!
> 
> I try to try out your suggestions, if you can make a patch
> (and try it on a plattform it would be great ;-)

I will try this out as time permits. I should be able to test it on
OMAP3430(Cortex-A8) and OMAP4430(Cortex-A9). 

Thanks,
Aneesh

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[U-Boot] U-Boot: U-Boot 2010.06 doesn't boot from NAND Flash on AMCC Sequoia

[YURI ZHARIKOV]

Dear Stefan:

Thank you for fast answer.

Our next problem consists in flashing the NAND without any U-Boot 
version, for our own developed system based on AMCC Sequoia board. The 
most important modifications in our board are:
- We removed from the original Sequoia design: NOR Flash, CPLD, USB 
ports and the second serial port. - We increased NAND FLASH size to 2Gb 
(NAND02GW3B2DN6E and MT29F2G08AADWP-ET:D TR in the next revision of our 
board).
- We decreased RAM size to 128MB.

Logically, we need that PPC boots from NAND Flash, and we use 
Lauterbach LA-7708 Debugger for program NAND. But now, without any 
previous U-Boot version, how can we apply the environment commands that 
you specify in your answer? Are there any configuration limitations 
that we must consider?

Thanks and Regards,

**

Hi Yuri,

On Monday 26 July 2010 19:21:16 YURI ZHARIKOV wrote:
[Ocultar texto citado]
> We are Microelectronic Design and Applications (DMA) research group
> from University Carlos III of Madrid (Spain). At the moment, we are
> developing our own computational hardware platform, based on AMCC
> Sequoia board.
>
> In the past, we used U-Boot 1.3.3 with AMCC Sequoia board, and PPC
> booted fine from NAND Flash. At the moment, with the same configuration
> of bootstrap (533MHz, NAND Boot, 33Mhz PCI) we are trying to use the
> last version of U-Boot (2010.06) on AMCC Sequoia board. But PPC doesn’t
> boot well, because there aren’t any information on HyperTerminal.
>
> We use ELDK 4.2 for compiling U-Boot 2010.06 nand image on the same way
> that we did it for U-Boot 1.3.3:
> $ export CROSS_COMPILE=ppc_4xxFP-
> $ PATH=$PATH:/opt/eldk/usr/bin:/opt/eldk/bin
> $ cd u-boot
> $ make distclean
> $ make sequoia_nand_config
> $ make all
>
> We boot PPC from NOR FLASH with previous version of U-Boot, and then we
> program NAND Flash memory with U-Boot 2010.06 nand image. We also use
> the same commands to do it that we used with U-Boot 1.3.3:
> => loadb 10  /* transfer the U-Boot image */ => nand erase ENTER
> => nand write 10 0 7 ENTER
>
> After that, we put J2 jumper and select SW2 (OFF-OFF-OFF-OFF).
>
> Are we missing something?

I just tested the latest U-Boot version from the mainline git 
repository (master branch). NOR and NAND booting works just fine on 
Sequoia:

U-Boot 2010.06-00236-g7385c28 (Aug 02 2010 - 13:07:47)

CPU:   AMCC PowerPC 440EPx Rev. A at 495 MHz (PLB=165 OPB=82 EBC=55 
PCI=41 MHz)
   Security/Kasumi support
   Bootstrap Option H - Boot ROM Location I2C (Addr 0x52), booting 
from NAND
   Internal PCI arbiter enabled, PCI async ext clock used
   32 kB I-Cache 32 kB D-Cache
Board: Sequoia - AMCC PPC440EPx Evaluation Board, Rev. F, PCI-Async=33 MHz
I2C:   ready
DRAM:  256 MiB
FLASH: 64 MiB
NAND:  32 MiB
*** Warning - bad CRC, using default environment

PCI:   Bus Dev VenId DevId Class Int
USB:   Host(int phy) Device(ext phy)
DTT:   1 is 28 C
Net:   No ethernet found.


As you can see, I'm still using bootstrap option H (I2C EEPROM at 
0x52). Easiest to do this is to use the "chip_config" command to 
reconfigure the bootstrap values for NAND (and/or NOR):

=> chip_config
Available configurations (I2C address 0x52):
333-133-nor  - NOR  CPU: 333 PLB: 133 OPB:  66 EBC:  66
333-166-nor  - NOR  CPU: 333 PLB: 166 OPB:  83 EBC:  55
333-166-nand - NAND CPU: 333 PLB: 166 OPB:  83 EBC:  55
400-133-nor  - NOR  CPU: 400 PLB: 133 OPB:  66 EBC:  66
400-160-nor  - NOR  CPU: 400 PLB: 160 OPB:  80 EBC:  53
416-166-nor  - NOR  CPU: 416 PLB: 166 OPB:  83 EBC:  55
416-166-nand - NAND CPU: 416 PLB: 166 OPB:  83 EBC:  55
500-166-nor  - NOR  CPU: 500 PLB: 166 OPB:  83 EBC:  55
500-166-nand - NAND CPU: 500 PLB: 166 OPB:  83 EBC:  55 ***
533-133-nor  - NOR  CPU: 533 PLB: 133 OPB:  66 EBC:  66
667-133-nor  - NOR  CPU: 667 PLB: 133 OPB:  66 EBC:  66
667-166-nor  - NOR  CPU: 667 PLB: 166 OPB:  83 EBC:  55
667-166-nand - NAND CPU: 667 PLB: 166 OPB:  83 EBC:  55


So you don't need to change the SW2 DIP switch. Only J2 is needed after 
boostrap EEPROM changes.

And here my environment commands for flashing the NAND U-Boot version:

=> printenv nload nupdate nupd
nload=tftp 20 sequoia/u-boot-nand.bin
nupdate=nand erase 0 10;nand write 20 0 10;setenv filesize;saveenv
nupd=run nload nupdate



Cheers,
Stefan


--
Yuri Zharikov

Departamento de Tecnología Electrónica
Universidad Carlos III de Madrid
1.2.A06 BIS
E-mail: yzhar...@ing.uc3m.es
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Re: [U-Boot] [PATCH] display_buffer: fix misaligned buffer

[Detlev Zundel]

Hi Reinhard,

> making the change to the union, I also realized that
>
> /* Copy from memory into linebuf and print hex values */
> for (i = 0; i < linelen; i++) {
>   uint32_t x;
>   if (width == 4)
>   x = lb.u32[i] = *(volatile uint32_t *)data;
>   else if (width == 2)
>   x = lb.u16[i] = *(volatile uint16_t *)data;
>   else
>   x = lb.u8[i] = *(volatile uint8_t *)data;
>   printf(" %0*x", width * 2, x);
>   data += width;
> }
>
> is still a bit "ugly". What about:
>
> union data {
>   u_int32_t *u32;
>   u_int16_t *u16;
>   u_int8_t *u8;
>   void *v;
> } dp;
> dp.v = data;
>
> then:
>
> /* Copy from memory into linebuf and print hex values */
> for (i = 0; i < linelen; i++) {
>   if (width == 4)
>   x = lb.u32[i] = *(dp.u32)++;
>   else if (width == 2)
>   x = lb.u16[i] = *(dp.u16)++;
>   else
>   x = lb.u8[i] = *(dp.u8)++;
>   printf(" %0*x", width * 2, x);
> }

If this works then I have to admit, I like what I see :)

> optionally calling printf inside the if:
>
> /* Copy from memory into linebuf and print hex values */
> for (i = 0; i < linelen; i++) {
>   if (width == 4)
>   printf(" %08x", lb.u32[i] = *(dp.u32)++);
>   else if (width == 2)
>   printf(" %04x", lb.u16[i] = *(dp.u16)++);
>   else
>   printf(" %02x", lb.u8[i] = *(dp.u8)++);
> }

Yes, this may speedup the printf also (ok, not much, but hey).

> maybe it would even be more effective to swap for and if:
>
> /* Copy from memory into linebuf and print hex values */
> if (width == 4) {
>   for (i = 0; i < linelen; i++)
>   printf(" %08x", lb.u32[i] = *(dp.u32)++);
> } else if (width == 2) {
>   for (i = 0; i < linelen; i++)
>   printf(" %04x", lb.u16[i] = *(dp.u16)++);
> } else {
>   for (i = 0; i < linelen; i++)
>   printf(" %02x", lb.u8[i] = *(dp.u8)++);
> }

No, please don't, but why not do a switch on width?

> Of course, all is purely cosmetic ;)

Well this time my signature is in order :)

Cheers
  Detlev

-- 
The  mathematician's patterns,  like the  painter's or  the poet's,  must be
beautiful;  the ideas, like the colours or the words, must fit together in a
harmonious way. Beauty is the first test: there is no permanent place in the
world for ugly mathematics.   -- G. H. Hardy
--
DENX Software Engineering GmbH,  MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich,  Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de
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Re: [U-Boot] [RFC][PATCH] mkimage: Add compatibility option for legacy Multi-File images

[Detlev Zundel]

Hi Thibaut,

> Le lundi 30 août 2010 à 11:29 +0200, Detlev Zundel a écrit :
>> Hi Thibaut,
> Hi,
>
>> generally I'm not a fan to include workarounds for bugs which we do not
>> have anymore in mainline U-Boot.
>
> Hm, yeah, I can understand that...
>
>> Isn't there any other alternative for this?
>
> Well, for my use case, we have to workaround this bug.
> We can do that (adding a byte at the end of some files) outside of
> mkimage, but it's really a u-boot thing, so, it could really go in
> there.

If it goes in, can we set a date to remove it again?  Or do we have to
carry it around forever?  If the latter is the case then I'm really not
a big fan of it.  If you can fix the problem up in the "project where it
is a problem", then the fix would better belong there.

Cheers
  Detlev

-- 
The  mathematician's patterns,  like the  painter's or  the poet's,  must be
beautiful;  the ideas, like the colours or the words, must fit together in a
harmonious way. Beauty is the first test: there is no permanent place in the
world for ugly mathematics.   -- G. H. Hardy
--
DENX Software Engineering GmbH,  MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich,  Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de
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Re: [U-Boot] Debugging, Why USB is not stable

[Detlev Zundel]

Hi Remy,

>> Only the fact that USB is a nightmare to work with.  No, honestly, we
>> have a continuous stream of USB related problems with the current USB
>> code.
>
> This is not what I notice on the amount of fixes that are posted on the 
> list...

Most problems go without a fix if there is an easy hardware replacement.
Even diagnosing such a problem is usually too expensive for customers.

> The only fixes I have seen the last year or two were related to newly
> added host-controller support. Apart from that it is quite silent in
> the u-boot-usb tree...
> But, anyway. I know it has some stability issues, although it is now
> much better compared to a year ago...

Yes it is and without a question I greatly appreciate your work for the
USB part.

>> As I understand it this results from the ever more diverging USB
>> implementation in U-Boot and e.g. in the Linux kernel.
>
> Indeed, It has diverged that much that I did not succeed in finding
> the real origin of the code...
>
>> Sometimes I get the impression that we would save a lot of headache by
>> starting afresh and porting the current Linux code into U-Boot thus
>> leverage all this, but nobody yet dared to start such a feat.
>
> Hey... I have dared to start it!
> (But it is a real pain to do it properly, and I stopped half way due
> to lack of time...)

I can understand that also.  My intention of the mail was to transport
my personal view of the whole area.  USB problems in my experience have
a very high cost even to diagnose, let alone fix.

Cheers
  Detlev

-- 
Test applications  with a variety of tools.  Don't assume everything works if
you've tested  with only  one client.  Also, assume the low end of technology
for clients and don't create applications which can only be used by Graphical
User Interfaces.   -- RFC 1855
--
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HRB 165235 Munich,  Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de
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Re: [U-Boot] How to adapt top-level Makefile tricks to current boards.cfg

[Detlev Zundel]

Hi os user,

> Hi All,
>
> In top-level Makefile, there are some tricks to support more config
> items. For example,
>
> Lite5200_config   \
> Lite5200_LOWBOOT_config   \
> Lite5200_LOWBOOT08_config \
> icecube_5200_config   \
> icecube_5200_LOWBOOT_config   \
> icecube_5200_LOWBOOT08_config \
> icecube_5200_DDR_config   \
> icecube_5200_DDR_LOWBOOT_config   \
> icecube_5200_DDR_LOWBOOT08_config:unconfig
>   @mkdir -p $(obj)include
>   @mkdir -p $(obj)board/icecube
>   @[ -z "$(findstring LOWBOOT_,$@)" ] || \
>   if [ "$(findstring DDR,$@)" ] ; \
>   then echo "TEXT_BASE = 0xFF80" 
> >$(obj)board/icecube/config.tmp ; \
>   else echo "TEXT_BASE = 0xFF00" 
> >$(obj)board/icecube/config.tmp ; \
>   fi
>   @[ -z "$(findstring LOWBOOT08,$@)" ] || \
>   echo "TEXT_BASE = 0xFF80" >$(obj)board/icecube/config.tmp
>   @[ -z "$(findstring DDR,$@)" ] || \
>   echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h
>   @$(MKCONFIG) -n $@ -a IceCube powerpc mpc5xxx icecube
>
>
> If we want to apply this kind of trick to current boards.cfg, what
> should we do? Add a lot of items in boards.cfg?

That's the idea - one line per supported configuration.  Somehow we need
something like the "-t" trick of mkconfig though and as yet we have no
working solution for this.

Ideally the configuration name (1st column) will be split into a base
configuration plus options which result in individual defines tha can be
used in the code.  I think Wolfgang started to work on this, so I
especially ping him on this one.

Cheers
  Detlev

-- 
Some mathematicians become so tense these days that they do not go to
sleep during seminars.
--
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HRB 165235 Munich,  Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de
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Re: [U-Boot] [PATCH 1/2] TI: netdev: add driver for cpsw ethernet device

[Cyril Chemparathy]

Hi Ben,

I seem to have missed a comment while responding earlier:

[...]
>> +int cpsw_register(struct cpsw_platform_data *data)
> Please redo things so that this function takes generic arguments.  Build
> up your struct internally.

Could you elaborate on the generic arguments here?  Are you referring to
the eth_device struct and bd_t args?

Regards
Cyril.
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Re: [U-Boot] [PATCH 08/11] mtd: nand: honor CONFIG_SYS_NAND_QUIET_TEST with unknown NAND printk

[Scott Wood]

On Tue, 31 Aug 2010 19:18:27 -0500
"Paulraj, Sandeep"  wrote:

> 
> 
> > 
> > This printk was added recently and results in ugly output on systems
> > with no NAND:
> > 
> > NAND:  nand_get_flash_type: unknown NAND device: Manufacturer ID: 0x00,
> > Chip ID: 0x00 0 MiB
> > 
> > instead of:
> > 
> > NAND:  0 MiB
[snip]
> > if (!type) {
> > +#ifndef CONFIG_SYS_NAND_QUIET_TEST
> > printk(KERN_INFO "%s: unknown NAND device: Manufacturer ID:"
> >" 0x%02x, Chip ID: 0x%02x\n", __func__,
> >*maf_id, dev_id);
> > +#endif
> > return ERR_PTR(-ENODEV);
> > }
> > 

Hmm, the current use of that seems to be suppressing warnings about
NAND that isn't present at all, not about NAND whose type we don't
recognize.

Perhaps we could instead suppress the warning only for probably-invalid
values such as 0x00 and 0xff, if that's how a missing NAND chip
manifests?

-Scott

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Re: [U-Boot] [PATCH 08/11] mtd: nand: honor CONFIG_SYS_NAND_QUIET_TEST with unknown NAND printk

[Steve Sakoman]

On Wed, 2010-09-01 at 11:26 -0500, Scott Wood wrote:
> On Tue, 31 Aug 2010 19:18:27 -0500
> "Paulraj, Sandeep"  wrote:
> 
> > 
> > 
> > > 
> > > This printk was added recently and results in ugly output on systems
> > > with no NAND:
> > > 
> > > NAND:  nand_get_flash_type: unknown NAND device: Manufacturer ID: 0x00,
> > > Chip ID: 0x00 0 MiB
> > > 
> > > instead of:
> > > 
> > > NAND:  0 MiB
> [snip]
> > >   if (!type) {
> > > +#ifndef CONFIG_SYS_NAND_QUIET_TEST
> > >   printk(KERN_INFO "%s: unknown NAND device: Manufacturer ID:"
> > >  " 0x%02x, Chip ID: 0x%02x\n", __func__,
> > >  *maf_id, dev_id);
> > > +#endif
> > >   return ERR_PTR(-ENODEV);
> > >   }
> > > 
> 
> Hmm, the current use of that seems to be suppressing warnings about
> NAND that isn't present at all, not about NAND whose type we don't
> recognize.

Well, that is precisely the case for new Beagle's and Overo's -- these
boards do not have nand and output this error.

So perhaps the real issue is that "no nand" is being reported as having
a manufacturer id of 0x00 and device id of 0x00 ?

> Perhaps we could instead suppress the warning only for probably-invalid
> values such as 0x00 and 0xff, if that's how a missing NAND chip
> manifests?

That would also be acceptable to me.  Is this your preferred fix?

Steve


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[U-Boot] [PATCH 1/5] FDT: Add fixup support for multiple banks of memory

[John Rigby]

Add fdt_fixup_memory_banks and reimplement fdt_fixup_memory
using it.

Signed-off-by: John Rigby 
---
 common/fdt_support.c  |   86 ++---
 include/fdt_support.h |1 +
 2 files changed, 47 insertions(+), 40 deletions(-)

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 6be..0b07534 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -362,10 +362,40 @@ void do_fixup_by_compat_u32(void *fdt, const char *compat,
do_fixup_by_compat(fdt, compat, prop, &val, 4, create);
 }
 
-int fdt_fixup_memory(void *blob, u64 start, u64 size)
+/*
+ * Get cells len in bytes
+ * if #-cells property is 2 then len is 8
+ * otherwise len is 4
+ */
+static int get_cells_len(void *blob, char *nr_cells_name)
+{
+   const u32 *cell;
+
+   cell = fdt_getprop(blob, 0, nr_cells_name, NULL);
+   if (cell && *cell == 2)
+   return 8;
+
+   return 4;
+}
+
+/*
+ * Write a 4 or 8 byte big endian cell
+ */
+static void write_cell(u8 *addr, u64 val, int size)
 {
-   int err, nodeoffset, len = 0;
-   u8 tmp[16];
+   int shift = (size - 1) * 8;
+   while (size-- > 0) {
+   *addr++ = (val >> shift) & 0xff;
+   shift -= 8;
+   }
+}
+
+int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)
+{
+   int err, nodeoffset;
+   int addr_cell_len, size_cell_len, len;
+   u8 tmp[banks * 8];
+   int bank;
const u32 *addrcell, *sizecell;
 
err = fdt_check_header(blob);
@@ -391,44 +421,15 @@ int fdt_fixup_memory(void *blob, u64 start, u64 size)
return err;
}
 
-   addrcell = fdt_getprop(blob, 0, "#address-cells", NULL);
-   /* use shifts and mask to ensure endianness */
-   if ((addrcell) && (*addrcell == 2)) {
-   tmp[0] = (start >> 56) & 0xff;
-   tmp[1] = (start >> 48) & 0xff;
-   tmp[2] = (start >> 40) & 0xff;
-   tmp[3] = (start >> 32) & 0xff;
-   tmp[4] = (start >> 24) & 0xff;
-   tmp[5] = (start >> 16) & 0xff;
-   tmp[6] = (start >>  8) & 0xff;
-   tmp[7] = (start  ) & 0xff;
-   len = 8;
-   } else {
-   tmp[0] = (start >> 24) & 0xff;
-   tmp[1] = (start >> 16) & 0xff;
-   tmp[2] = (start >>  8) & 0xff;
-   tmp[3] = (start  ) & 0xff;
-   len = 4;
-   }
+   addr_cell_len = get_cells_len(blob, "#address-cells");
+   size_cell_len = get_cells_len(blob, "#size-cells");
 
-   sizecell = fdt_getprop(blob, 0, "#size-cells", NULL);
-   /* use shifts and mask to ensure endianness */
-   if ((sizecell) && (*sizecell == 2)) {
-   tmp[0+len] = (size >> 56) & 0xff;
-   tmp[1+len] = (size >> 48) & 0xff;
-   tmp[2+len] = (size >> 40) & 0xff;
-   tmp[3+len] = (size >> 32) & 0xff;
-   tmp[4+len] = (size >> 24) & 0xff;
-   tmp[5+len] = (size >> 16) & 0xff;
-   tmp[6+len] = (size >>  8) & 0xff;
-   tmp[7+len] = (size  ) & 0xff;
-   len += 8;
-   } else {
-   tmp[0+len] = (size >> 24) & 0xff;
-   tmp[1+len] = (size >> 16) & 0xff;
-   tmp[2+len] = (size >>  8) & 0xff;
-   tmp[3+len] = (size  ) & 0xff;
-   len += 4;
+   for (bank = 0, len = 0; bank < banks; bank++) {
+   write_cell(tmp + len, start, addr_cell_len);
+   len += addr_cell_len;
+
+   write_cell(tmp + len, start, size_cell_len);
+   len += size_cell_len;
}
 
err = fdt_setprop(blob, nodeoffset, "reg", tmp, len);
@@ -440,6 +441,11 @@ int fdt_fixup_memory(void *blob, u64 start, u64 size)
return 0;
 }
 
+int fdt_fixup_memory(void *blob, u64 start, u64 size)
+{
+   return fdt_fixup_memory_banks(blob, &start, &size, 1);
+}
+
 void fdt_fixup_ethernet(void *fdt)
 {
int node, i, j;
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 871ef45..5f631ea 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -48,6 +48,7 @@ void do_fixup_by_compat(void *fdt, const char *compat,
 void do_fixup_by_compat_u32(void *fdt, const char *compat,
const char *prop, u32 val, int create);
 int fdt_fixup_memory(void *blob, u64 start, u64 size);
+int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks);
 void fdt_fixup_ethernet(void *fdt);
 int fdt_find_and_setprop(void *fdt, const char *node, const char *prop,
 const void *val, int len, int create);
-- 
1.7.0.4

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[U-Boot] [PATCH 2/5] FDT: only call boot_get_fdt from generic code

[John Rigby]

All arches except nios2 and microblaze call boot_get_fdt
from bootm_start in common/cmd_bootm.c.

Having nios2 and microblaze do so as well removes code from
their respective do_bootm_linux routines and allows removal of
a nasty ifdef from bootm_start.

Signed-off-by: John Rigby 
---
 arch/microblaze/lib/bootm.c |   12 +++-
 arch/nios2/lib/bootm.c  |   10 +++---
 common/cmd_bootm.c  |2 --
 3 files changed, 6 insertions(+), 18 deletions(-)

diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index 8e2c6d8..25f63d9 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -46,12 +46,9 @@ int do_bootm_linux(int flag, int argc, char * const argv[], 
bootm_headers_t *ima
 
char*of_flat_tree = NULL;
 #if defined(CONFIG_OF_LIBFDT)
-   ulong   of_size = 0;
-
-   /* find flattened device tree */
-   ret = boot_get_fdt (flag, argc, argv, images, &of_flat_tree, &of_size);
-   if (ret)
-   return 1;
+   /* did generic code already find a device tree? */
+   if (images->ft_len)
+   of_flat_tree = images->ft_addr;
 #endif
 
theKernel = (void (*)(char *, ulong, ulong))images->ep;
@@ -64,9 +61,6 @@ int do_bootm_linux(int flag, int argc, char * const argv[], 
bootm_headers_t *ima
 
show_boot_progress (15);
 
-   if (!(ulong) of_flat_tree)
-   of_flat_tree = (char *)simple_strtoul (argv[3], NULL, 16);
-
 #ifdef DEBUG
printf ("## Transferring control to Linux (at address 0x%08lx) " \
"ramdisk 0x%08lx, FDT 0x%08lx...\n",
diff --git a/arch/nios2/lib/bootm.c b/arch/nios2/lib/bootm.c
index e25a113..1ff6f0a 100644
--- a/arch/nios2/lib/bootm.c
+++ b/arch/nios2/lib/bootm.c
@@ -36,14 +36,10 @@ int do_bootm_linux(int flag, int argc, char * const argv[], 
bootm_headers_t *ima
ulong initrd_end = images->rd_end;
char *of_flat_tree = NULL;
 #if defined(CONFIG_OF_LIBFDT)
-   ulong of_size = 0;
-
-   /* find flattened device tree */
-   if (boot_get_fdt(flag, argc, argv, images, &of_flat_tree, &of_size))
-   return 1;
+   /* did generic code already find a device tree? */
+   if (images->ft_len)
+   of_flat_tree = images->ft_addr;
 #endif
-   if (!of_flat_tree)
-   of_flat_tree = (char *)simple_strtoul(argv[3], NULL, 16);
if (of_flat_tree)
initrd_end = (ulong)of_flat_tree;
 
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 4c6ed48..f12e2d1 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -301,7 +301,6 @@ static int bootm_start(cmd_tbl_t *cmdtp, int flag, int 
argc, char * const argv[]
}
 
 #if defined(CONFIG_OF_LIBFDT)
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC)
/* find flattened device tree */
ret = boot_get_fdt (flag, argc, argv, &images,
&images.ft_addr, &images.ft_len);
@@ -312,7 +311,6 @@ static int bootm_start(cmd_tbl_t *cmdtp, int flag, int 
argc, char * const argv[]
 
set_working_fdt_addr(images.ft_addr);
 #endif
-#endif
}
 
images.os.start = (ulong)os_hdr;
-- 
1.7.0.4

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[U-Boot] [PATCH 3/5] boot: change some arch ifdefs to feature ifdefs

[John Rigby]

The routines boot_ramdisk_high, boot_get_cmdline and boot_get_kbd
are currently enabled by various combinations of CONFIG_M68K,
CONFIG_POWERPC and CONFIG_SPARC.

Use CONFIG_ defines instead.

CONFIG_BOOT_RAMDISK_HIGH
CONFIG_BOOT_GET_CMDLINE
CONFIG_BOOT_GET_KBD

Define these as appropriate in arch/include/asm/config.h files.

Signed-off-by: John Rigby 
---
 arch/m68k/include/asm/config.h|3 +++
 arch/powerpc/include/asm/config.h |3 +++
 arch/sparc/include/asm/config.h   |1 +
 common/cmd_bootm.c|2 +-
 common/image.c|   10 ++
 include/image.h   |9 ++---
 6 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/arch/m68k/include/asm/config.h b/arch/m68k/include/asm/config.h
index 36438be..1fbdf0a 100644
--- a/arch/m68k/include/asm/config.h
+++ b/arch/m68k/include/asm/config.h
@@ -22,5 +22,8 @@
 #define _ASM_CONFIG_H_
 
 #define CONFIG_LMB
+#define CONFIG_BOOT_RAMDISK_HIGH
+#define CONFIG_BOOT_GET_CMDLINE
+#define CONFIG_BOOT_GET_KBD
 
 #endif
diff --git a/arch/powerpc/include/asm/config.h 
b/arch/powerpc/include/asm/config.h
index d098657..788f27d 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -22,6 +22,9 @@
 #define _ASM_CONFIG_H_
 
 #define CONFIG_LMB
+#define CONFIG_BOOT_RAMDISK_HIGH
+#define CONFIG_BOOT_GET_CMDLINE
+#define CONFIG_BOOT_GET_KBD
 
 #ifndef CONFIG_MAX_MEM_MAPPED
 #if defined(CONFIG_4xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
diff --git a/arch/sparc/include/asm/config.h b/arch/sparc/include/asm/config.h
index 36438be..b072771 100644
--- a/arch/sparc/include/asm/config.h
+++ b/arch/sparc/include/asm/config.h
@@ -22,5 +22,6 @@
 #define _ASM_CONFIG_H_
 
 #define CONFIG_LMB
+#define CONFIG_BOOT_RAMDISK_HIGH
 
 #endif
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index f12e2d1..9ad82e2 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -521,7 +521,7 @@ int do_bootm_subcommand (cmd_tbl_t *cmdtp, int flag, int 
argc, char * const argv
lmb_reserve(&images.lmb, images.os.load,
(load_end - images.os.load));
break;
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC)
+#ifdef CONFIG_BOOT_RAMDISK_HIGH
case BOOTM_STATE_RAMDISK:
{
ulong rd_len = images.rd_end - images.rd_start;
diff --git a/common/image.c b/common/image.c
index fcb938b..6b1ee6b 100644
--- a/common/image.c
+++ b/common/image.c
@@ -991,7 +991,7 @@ int boot_get_ramdisk (int argc, char * const argv[], 
bootm_headers_t *images,
return 0;
 }
 
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC)
+#ifdef CONFIG_BOOT_RAMDISK_HIGH
 /**
  * boot_ramdisk_high - relocate init ramdisk
  * @lmb: pointer to lmb handle, will be used for memory mgmt
@@ -1080,7 +1080,7 @@ int boot_ramdisk_high (struct lmb *lmb, ulong rd_data, 
ulong rd_len,
 error:
return -1;
 }
-#endif /* defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC) 
*/
+#endif /* CONFIG_BOOT_RAMDISK_HIGH */
 
 #ifdef CONFIG_OF_LIBFDT
 static void fdt_error (const char *msg)
@@ -1587,7 +1587,7 @@ error:
 }
 #endif /* CONFIG_OF_LIBFDT */
 
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
+#ifdef CONFIG_BOOT_GET_CMDLINE
 /**
  * boot_get_cmdline - allocate and initialize kernel cmdline
  * @lmb: pointer to lmb handle, will be used for memory mgmt
@@ -1629,7 +1629,9 @@ int boot_get_cmdline (struct lmb *lmb, ulong *cmd_start, 
ulong *cmd_end,
 
return 0;
 }
+#endif /* CONFIG_BOOT_GET_CMDLINE */
 
+#ifdef CONFIG_BOOT_GET_KBD
 /**
  * boot_get_kbd - allocate and initialize kernel copy of board info
  * @lmb: pointer to lmb handle, will be used for memory mgmt
@@ -1662,7 +1664,7 @@ int boot_get_kbd (struct lmb *lmb, bd_t **kbd, ulong 
bootmap_base)
 
return 0;
 }
-#endif /* CONFIG_PPC || CONFIG_M68K */
+#endif /* CONFIG_BOOT_GET_KBD */
 #endif /* !USE_HOSTCC */
 
 #if defined(CONFIG_FIT)
diff --git a/include/image.h b/include/image.h
index bcc08d1..e94c15d 100644
--- a/include/image.h
+++ b/include/image.h
@@ -339,14 +339,17 @@ int boot_relocate_fdt (struct lmb *lmb, ulong 
bootmap_base,
char **of_flat_tree, ulong *of_size);
 #endif
 
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
+#ifdef CONFIG_BOOT_RAMDISK_HIGH
 int boot_ramdisk_high (struct lmb *lmb, ulong rd_data, ulong rd_len,
  ulong *initrd_start, ulong *initrd_end);
-
+#endif /* CONFIG_BOOT_RAMDISK_HIGH */
+#ifdef CONFIG_BOOT_GET_CMDLINE
 int boot_get_cmdline (struct lmb *lmb, ulong *cmd_start, ulong *cmd_end,
ulong bootmap_base);
+#endif /* CONFIG_BOOT_GET_CMDLINE */
+#ifdef CONFIG_BOOT_GET_KBD
 int boot_get_kbd (struct lmb *lmb, bd_t **kbd, ulong bootmap_base);
-#endif /* CONFIG_PPC || CONFIG_M68K */
+#endif /* CONFIG_BOOT_GET_KBD */
 #endif /* !USE_HOSTCC */
 
 /

[U-Boot] [PATCH 4/5] ARM: add flat device tree support

[John Rigby]

Based on other architectures already supported.

Signed-off-by: John Rigby 
---
 arch/arm/include/asm/config.h |2 +
 arch/arm/lib/bootm.c  |  138 -
 common/image.c|2 +
 3 files changed, 126 insertions(+), 16 deletions(-)

diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h
index b76fd8e..ca3a367 100644
--- a/arch/arm/include/asm/config.h
+++ b/arch/arm/include/asm/config.h
@@ -23,5 +23,7 @@
 
 /* Relocation to SDRAM works on all ARM boards */
 #define CONFIG_RELOC_FIXUP_WORKS
+#define CONFIG_LMB
+#define CONFIG_BOOT_RAMDISK_HIGH
 
 #endif
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 3101321..d4e2502 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -27,6 +27,10 @@
 #include 
 #include 
 
+#include 
+#include 
+#include 
+
 DECLARE_GLOBAL_DATA_PTR;
 
 #if defined (CONFIG_SETUP_MEMORY_TAGS) || \
@@ -50,12 +54,52 @@ static void setup_end_tag (bd_t *bd);
 static struct tag *params;
 #endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG 
*/
 
-int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t 
*images)
+static ulong get_sp(void);
+#if defined(CONFIG_OF_LIBFDT)
+static int bootm_linux_fdt(bootm_headers_t *images);
+#endif
+
+void arch_lmb_reserve(struct lmb *lmb)
+{
+   ulong sp;
+
+   /*
+* Booting a (Linux) kernel image
+*
+* Allocate space for command line and board info - the
+* address should be as high as possible within the reach of
+* the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused
+* memory, which means far enough below the current stack
+* pointer.
+*/
+   sp = get_sp();
+   debug("## Current stack ends at 0x%08lx ", sp);
+
+   /* adjust sp by 1K to be safe */
+   sp -= 1024;
+   lmb_reserve(lmb, sp,
+   gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size - sp);
+}
+
+static void announce_and_cleanup(void)
+{
+   printf("\nStarting kernel ...\n\n");
+
+#ifdef CONFIG_USB_DEVICE
+   {
+   extern void udc_disconnect(void);
+   udc_disconnect();
+   }
+#endif
+   cleanup_before_linux();
+}
+
+int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
 {
bd_t*bd = gd->bd;
char*s;
int machid = bd->bi_arch_number;
-   void(*theKernel)(int zero, int arch, uint params);
+   void(*kernel_entry)(int zero, int arch, uint params);
 
 #ifdef CONFIG_CMDLINE_TAG
char *commandline = getenv ("bootargs");
@@ -64,8 +108,6 @@ int do_bootm_linux(int flag, int argc, char * const argv[], 
bootm_headers_t *ima
if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
return 1;
 
-   theKernel = (void (*)(int, int, uint))images->ep;
-
s = getenv ("machid");
if (s) {
machid = simple_strtoul (s, NULL, 16);
@@ -74,8 +116,15 @@ int do_bootm_linux(int flag, int argc, char * const argv[], 
bootm_headers_t *ima
 
show_boot_progress (15);
 
+#ifdef CONFIG_OF_LIBFDT
+   if (images->ft_len)
+   return bootm_linux_fdt(machid, images);
+#endif
+
+   kernel_entry = (void (*)(int, int, uint))images->ep;
+
debug ("## Transferring control to Linux (at address %08lx) ...\n",
-  (ulong) theKernel);
+  (ulong) kernel_entry);
 
 #if defined (CONFIG_SETUP_MEMORY_TAGS) || \
 defined (CONFIG_CMDLINE_TAG) || \
@@ -99,27 +148,76 @@ int do_bootm_linux(int flag, int argc, char * const 
argv[], bootm_headers_t *ima
if (images->rd_start && images->rd_end)
setup_initrd_tag (bd, images->rd_start, images->rd_end);
 #endif
-   setup_end_tag (bd);
+   setup_end_tag(bd);
 #endif
 
-   /* we assume that the kernel is in place */
-   printf ("\nStarting kernel ...\n\n");
+   announce_and_cleanup();
 
-#ifdef CONFIG_USB_DEVICE
-   {
-   extern void udc_disconnect (void);
-   udc_disconnect ();
+   kernel_entry(0, machid, bd->bi_boot_params);
+   /* does not return */
+
+   return 1;
+}
+
+#if defined(CONFIG_OF_LIBFDT)
+static int fixup_memory_node(void *blob)
+{
+   bd_t*bd = gd->bd;
+   int bank;
+   u64 start[CONFIG_NR_DRAM_BANKS];
+   u64 size[CONFIG_NR_DRAM_BANKS];
+
+   for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
+   start[bank] = bd->bi_dram[bank].start;
+   size[bank] = bd->bi_dram[bank].size;
}
-#endif
 
-   cleanup_before_linux ();
+   return fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
+}
+
+static int bootm_linux_fdt(int machid, bootm_headers_t *images)
+{
+   ulong rd_len;
+   bd_t *bd = gd->bd;
+   char *s;
+   void (*kernel_entry)(int zero, int dt_machid, void *dtblob);
+   ulong bootmap_base = getenv_bootm_low();
+   ulong of_size 

[U-Boot] [PATCH 5/5] ARM: enable device tree for beagle

[John Rigby]

For testing ARM device tree support

Signed-off-by: John Rigby 
---
 include/configs/omap3_beagle.h |   10 --
 1 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index ae5a791..6bd3c7b 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -55,6 +55,9 @@
 #undef CONFIG_USE_IRQ  /* no support for IRQs */
 #define CONFIG_MISC_INIT_R
 
+#define CONFIG_OF_LIBFDT   1
+#define CONFIG_SYS_BOOTMAPSZ   (8 << 20)
+
 #define CONFIG_CMDLINE_TAG 1   /* enable passing of ATAGs */
 #define CONFIG_SETUP_MEMORY_TAGS   1
 #define CONFIG_INITRD_TAG  1
@@ -148,6 +151,7 @@
 #define CONFIG_SYS_I2C_BUS 0
 #define CONFIG_SYS_I2C_BUS_SELECT  1
 #define CONFIG_DRIVER_OMAP34XX_I2C 1
+#define CONFIG_I2C_MULTI_BUS   1
 
 /*
  * TWL4030
@@ -158,6 +162,7 @@
 /*
  * Board NAND Info.
  */
+#define CONFIG_SYS_NAND_QUIET_TEST 1
 #define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_NAND_ADDR   NAND_BASE   /* physical address */
/* to access nand */
@@ -183,6 +188,7 @@
"loadaddr=0x8200\0" \
"usbtty=cdc_acm\0" \
"console=ttyS2,115200n8\0" \
+   "mpurate=500\0" \
"vram=12M\0" \
"dvimode=1024x768mr...@60\0" \
"defaultdisplay=dvi\0" \
@@ -191,16 +197,16 @@
"nandroot=/dev/mtdblock4 rw\0" \
"nandrootfstype=jffs2\0" \
"mmcargs=setenv bootargs console=${console} " \
+   "mpurate=${mpurate} " \
"vram=${vram} " \
"omapfb.mode=dvi:${dvimode} " \
-   "omapfb.debug=y " \
"omapdss.def_disp=${defaultdisplay} " \
"root=${mmcroot} " \
"rootfstype=${mmcrootfstype}\0" \
"nandargs=setenv bootargs console=${console} " \
+   "mpurate=${mpurate} " \
"vram=${vram} " \
"omapfb.mode=dvi:${dvimode} " \
-   "omapfb.debug=y " \
"omapdss.def_disp=${defaultdisplay} " \
"root=${nandroot} " \
"rootfstype=${nandrootfstype}\0" \
-- 
1.7.0.4

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[U-Boot] [PATCH 0/5] Device tree support for ARM

[John Rigby]

Here is a new version of patches for adding device tree support for ARM.
I have tried to address all comments made to the previous RFC patch series.

John Rigby (5):
  FDT: Add fixup support for multiple banks of memory
  FDT: only call boot_get_fdt from generic code
  boot: change some arch ifdefs to feature ifdefs
  ARM: add flat device tree support
  ARM: enable device tree for beagle

 arch/arm/include/asm/config.h |2 +
 arch/arm/lib/bootm.c  |  138 
 arch/m68k/include/asm/config.h|3 +
 arch/microblaze/lib/bootm.c   |   12 +---
 arch/nios2/lib/bootm.c|   10 +--
 arch/powerpc/include/asm/config.h |3 +
 arch/sparc/include/asm/config.h   |1 +
 common/cmd_bootm.c|4 +-
 common/fdt_support.c  |   86 ---
 common/image.c|   12 ++-
 include/configs/omap3_beagle.h|   10 ++-
 include/fdt_support.h |1 +
 include/image.h   |9 ++-
 13 files changed, 207 insertions(+), 84 deletions(-)

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Re: [U-Boot] [PATCH 5/5] ARM: enable device tree for beagle

[John Rigby]

Sorry, ignore this patch it has some left over cruft from a rebase.

On Wed, Sep 1, 2010 at 10:53 AM, John Rigby  wrote:
> For testing ARM device tree support
>
> Signed-off-by: John Rigby 
> ---
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Re: [U-Boot] warning: dereferencing pointer '({anonymous})' does break strict-aliasing rules

[Mike Frysinger]

On Tuesday, August 31, 2010 18:30:39 Timur Tabi wrote:
> I ran Software Update on my Fedora 13 system, and now whenever I build
> U-Boot, I get a bunch of warnings like this:

what version of u-boot exactly ?  for what board/architecture ?  what is your 
host gcc version and your target gcc version ?  what is the exact compile line 
that causes this warning to be displayed ?  this is a pretty information-less 
bug report ...
-mike


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Re: [U-Boot] [PATCH NET 2/2] Net: clarify board/cpu_eth_init calls

[Mike Frysinger]

On Wednesday, September 01, 2010 02:05:04 Ben Warren wrote:
> + if (board_eth_init != __def_eth_init) {
> + } else if (cpu_eth_init != __def_eth_init) {

i'm not sure these changes are useful.  the resolution of the symbols happens 
at link time, so it isnt like gcc will be able to optimize away the default.

if anything, it'd make more sense to declare the functions as external/weak, 
and then check that the pointer is not NULL.  that'd save on the overhead of 
having uncalled stub functions that merely return 0 in the final linked image.
-mike


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Re: [U-Boot] [PATCH] support spi gpio driver by control gpio bitbang

[Mike Frysinger]

On Wednesday, September 01, 2010 03:28:28 Donghwa Lee wrote:
> This patch adds basic support for spi mode 0~3 by control gpio bitbang.
> It uses several gpio pin and emulates spi chipselect signal, clock signal
> and sda signal as if spi controller generate spi signal.

if you're going to make a spi bus driver that uses gpios to bitbang, then you 
really should be using the generic GPIO framework.  it's the same in u-boot as 
in linux.

please fix your patch summary.  it should probably look like:
spi_gpio: new gpio bitbang driver

further, drivers/spi/ is for the u-boot unified spi layer.  your driver does 
not conform to that API, so that needs fixing too.

> Signed-off-by: Donghwa Lee 

your e-mail is still broken.  it should be "@", not " at ".

> +#include 

asm/gpio.h is the generic GPIO layer

> +struct spi_platform_data {
> + struct s5p_gpio_bank *cs_bank;
> + struct s5p_gpio_bank *clk_bank;
> + struct s5p_gpio_bank *si_bank;
> + struct s5p_gpio_bank *so_bank;

these structs are arch-specific, so this is going to break pretty much 
everyone else.  although, once you fix the implementation to follow the 
unified SPI interface, this struct wont exist anymore.
-mike


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Re: [U-Boot] [PATCH V3] AT91 Fix: return value of get_tbclk

[Jens Scharsig]

Am 2010-09-01 09:30, schrieb Reinhard Meyer:
> 
> at91_emac AND macb?
> 
> macb works for AVR32AP700x and (at least) for AT91SAM9260/9G20/9XE.
> 
> What is the deal with at91_emac? Is it required for some AT91's
> because macb does not work there?
> 
> Does it provide better "results" than macb?
> 
> Best Regards
> Reinhard
Hello,

I think the separation has historical reasons.
For AT91RM and AT91SAM existed separate drivers and separate arch.
I remeber in older datascheets the ethernet inteface also marked with MACB.
In my opinion, the at91_emac the latest drivers (NET_MULTI api SoC
access via c structurs).

But I dont know the exact differences are not of single use devices.
Please ask Xu, Hong

Best regards

Jens
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Re: [U-Boot] [PATCH 08/11] mtd: nand: honor CONFIG_SYS_NAND_QUIET_TEST with unknown NAND printk

[Scott Wood]

On Wed, 1 Sep 2010 09:43:17 -0700
Steve Sakoman  wrote:

> On Wed, 2010-09-01 at 11:26 -0500, Scott Wood wrote:
> > Hmm, the current use of that seems to be suppressing warnings about
> > NAND that isn't present at all, not about NAND whose type we don't
> > recognize.
> 
> Well, that is precisely the case for new Beagle's and Overo's -- these
> boards do not have nand and output this error.

Right, I just don't want to end up suppressing the message if there's a
real flash that just needs an ID table update.

> > Perhaps we could instead suppress the warning only for probably-invalid
> > values such as 0x00 and 0xff, if that's how a missing NAND chip
> > manifests?
> 
> That would also be acceptable to me.  Is this your preferred fix?

Yes.

-Scott

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Re: [U-Boot] [PATCH NET 2/2] Net: clarify board/cpu_eth_init calls

[Ben Warren]

  Hi Mike,

On 9/1/2010 10:04 AM, Mike Frysinger wrote:
> On Wednesday, September 01, 2010 02:05:04 Ben Warren wrote:
>> +if (board_eth_init != __def_eth_init) {
>> +} else if (cpu_eth_init != __def_eth_init) {
> i'm not sure these changes are useful.  the resolution of the symbols happens
> at link time, so it isnt like gcc will be able to optimize away the default.
>
> if anything, it'd make more sense to declare the functions as external/weak,
> and then check that the pointer is not NULL.  that'd save on the overhead of
> having uncalled stub functions that merely return 0 in the final linked image.
> -mike
This did work as I hoped on my PPC eval board, but maybe not globally.  
I remember that initially, with the functions defined as weak but with 
no body, check for NULL didn't work.  I've never tried declaring them as 
external, though.

thanks,
Ben
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Re: [U-Boot] Duplicate environment variables in RAM?!?

[dbrazeau]

So I figured out what my issue was.  I was defining CONFIG_IPADDR in my
config .h file and also added ipaddr=xxx.xxx.xxx.xxx to my defined
environment variables list in the config .h file.  I did not realize that
the ipaddr environment variabe (along with others) are added in the variable
list in the env_common.c file.  As a result I was starting out with
duplicate variables before every setting 'ipaddr'.


dbrazeau wrote:
> 
> For some variables, for example "ipaddr",  when I try to change them using
> "setenv" it does not update the current "ipaddr" variable in RAM it
> creates a new one and append it to the end of the variable list.  As a
> result I end up having two "ipaddr" variables in RAM, one with the
> original value and one with the new value at the end of the list.  If I
> try to set the variable a second time it deletes the first instance (the
> original) and adds the second new one to the end of the variable list.
> 
> This may be a little confusing so here is an abbreviated example. The
> '.' represent the rest of the variables in the list.
> 
> Original list of variables
> -
> ...
> ipaddr=10.0.5.2
> ...
> -
> 
> =>setenv ipaddr 10.0.16.4
> Now the variables look like this
> -
> ...
> ipaddr=10.0.5.2
> ...
> ipaddr=10.0.16.4
> -
> 
> =>setenv ipaddr 10.0.28.7
> And now the variables look like this
> -
> ...
> ...
> ipaddr=10.0.16.4
> ipaddr=10.0.28.7
> -
> 
> Is this the intended behavior?  I am running an older version (U-Boot
> 1.3.4) so maybe this has been fixed. If this is the case could you point
> me to the version that it is fixed in.
> 
> Thanks.
> 

-- 
View this message in context: 
http://old.nabble.com/Duplicate-environment-variables-in-RAM-%21--tp29588954p29592447.html
Sent from the Uboot - Users mailing list archive at Nabble.com.

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Re: [U-Boot] [PATCH 1/2] TI: netdev: add driver for cpsw ethernet device

[Ben Warren]

  Hi Cyril,

On 9/1/2010 8:34 AM, Cyril Chemparathy wrote:
> Hi Ben,
>
> I seem to have missed a comment while responding earlier:
>
> [...]
>>> +int cpsw_register(struct cpsw_platform_data *data)
>> Please redo things so that this function takes generic arguments.  Build
>> up your struct internally.
> Could you elaborate on the generic arguments here?  Are you referring to
> the eth_device struct and bd_t args?
>
By generic I mean primitive, or structs that are defined in headers that 
are universally included.  Ideally, you'll pass in arguments that don't 
require another header file to resolve, such as a base address or index 
number.  As you've proposed, anybody that includes  will need 
to know what a 'struct cpsw_platform_data' is, and that's not appropriate.
> Regards
> Cyril.
regards,
Ben
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Re: [U-Boot] [PATCH 1/2] TI: netdev: add driver for cpsw ethernet device

[Ben Warren]

  On 8/31/2010 8:58 AM, Cyril Chemparathy wrote:
> Hi Ben,
>
> [...]
>>> +COBJS-$(CONFIG_DRIVER_TI_CPSW) += cpsw.o
>> Please don't use the word DRIVER here.  If possible, use something more
>> verbose than "CPSW" too.
> Will TI_CPSW_SWITCH work better considering that "CPSW" is the name of
> the hardware block?
>
Sure.
> [...]
>>> +++ b/drivers/net/cpsw.c
>> Please rename this ti_cpsw.c
> Agreed.
>
> [...]
>>> +struct cpsw_priv {
>>> + struct eth_device   *dev;
>>> + struct cpsw_platform_data   data;
>>> + int host_port;
>>> +
>>> + struct cpsw_regs*regs;
>>> + void*dma_regs;
>>> + struct cpsw_host_regs   *host_port_regs;
>>> + void*ale_regs;
>>> +
>>> + struct cpdma_desc   descs[NUM_DESCS];
>>> + struct cpdma_desc   *desc_free;
>>> + struct cpdma_chan   rx_chan, tx_chan;
>>> +
>>> + struct cpsw_slave   *slaves;
>>> +#define for_each_slave(priv, func, arg...)   \
>>> + do {\
>>> + int idx;\
>>> + for (idx = 0; idx<   (priv)->data.slaves; idx++) \
>>> + (func)((priv)->slaves + idx, ##arg);\
>>> + } while (0)
>>> +};
>>> +
>> Can this stuff go in a header file?
> This stuff is intended to be private within the driver.  I can split
> this out into drivers/net/ti_cpsw.h.
>
If it's truly private within the driver and will never be needed by 
anybody else, the source file is OK, but since you're going to create a 
new header file in /include/net anyway, maybe you'll want to put some 
stuff there.  Your call...
> [...]
>>> diff --git a/include/netdev.h b/include/netdev.h
>>> index 94eedfe..009e2f1 100644
>>> --- a/include/netdev.h
>>> +++ b/include/netdev.h
>>> @@ -180,4 +180,33 @@ struct mv88e61xx_config {
>>>int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
>>>#endif /* CONFIG_MV88E61XX_SWITCH */
>>>
>>> +#ifdef CONFIG_DRIVER_TI_CPSW
>>> +
>>> +struct cpsw_slave_data {
>>> + u32 slave_reg_ofs;
>>> + u32 sliver_reg_ofs;
>>> + int phy_id;
>>> +};
>>> +
>>> +struct cpsw_platform_data {
>>> + u32 mdio_base;
>>> + u32 cpsw_base;
>>> + int mdio_div;
>>> + int channels;   /* number of cpdma channels (symmetric) */
>>> + u32 cpdma_reg_ofs;  /* cpdma register offset*/
>>> + int slaves; /* number of slave cpgmac ports */
>>> + u32 ale_reg_ofs;/* address lookup engine reg offset */
>>> + int ale_entries;/* ale table size   */
>>> + u32 host_port_reg_ofs;  /* cpdma host port registers*/
>>> + u32 hw_stats_reg_ofs;   /* cpsw hw stats counters   */
>>> + u32 mac_control;
>>> + struct cpsw_slave_data  *slave_data;
>>> + void(*control)(int enabled);
>>> + void(*phy_init)(char *name, int addr);
>>> +};
>>> +
>> This stuff doesn't belong in this file.  Definitions specific to your
>> driver should go in /include/net/ti_cpsw.h (note that you'll be creating
>> this directory, but that's where we want driver headers to go moving
>> forward.  Also, please call the initialize function
>> 'ti_cpsw_initialize()'.  Despite what the readme file recommends, you're
>> initializing something, not registering it.  If anything, the 'init()'
>> functions are misnamed, but that's another discussion.
> Will do.
>
> We will post an updated v2 series shortly, with these changes.
>
> Thanks
> Cyril.
regards,
Ben
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[U-Boot] [PATCH v2 0/2] Add support for new SoC APM82XXX

[tmarri]

From: Tirumala Marri 

APM8 is Applied Micro Circuits Corporations naming
convention for new line of SoCs.

V1:
  * Squash some of the patches.
  * add space between "||" and "\".
  * Add spaces around operators.
  * Unsigned int to u32.
  * Add empty line which was removed.
  * remove warning "unused variable" in cpu_init.c
  * Remove "All rights reserved" phrase from headers.
  * Add empty line which was removed.
  * Move EBC definititions to bluestone_config.h file
  * Remove reconfigure_EBC() function.
  * Remove unused CONFIG_SDRAM16BIT_OFFSET.
  * Remove unused CONFIG_SDRAM_INFO_EEPROM_ADDR.
  * Add empty lines in bluestone.c file.
  * Replacing AC_R | AC_W | AC_X with AC_RWX.
  * Remove changes to main Makefile
  * Remove NAND references from config file.
  * Squash some of the patches.
  * Remove top Makefile change.

V2:
  * Missing space before "<".
  * SDR_AHB_CFG not used, remove.
  * boot device dfinitions are board specific ? removed.
  * APM82161_MASK not used, remove
  * set_mcsr() is already called in ddr init, no need to call here.
  * removed finding bootdevice function which is not used.
  * Add spaces in tlbentry() function.
  * Board early init function is empty remove.
  * Remove CONFIG_SYS_EXTSRAM_BASE.
  * Set CONFIG_SYS_FLASH_SIZE to 4MB
  * Remove CONFIG_SIZE_REDUCE & CONFIG_SECTOR_REDUCE.
  * Spaces around " >> " .
  * Correct the phy name CONFIG_M88E_PHY to CONFIG_RTL8211CL_PHY.
  * Removed Defines added to 405ex.

Tirumala Marri (2):
  APM82xxx: Add CPU and other peripheral support
  APM82xxx: Add bluestone board support

 MAINTAINERS |3 +
 MAKEALL |1 +
 arch/powerpc/cpu/ppc4xx/cpu.c   |   35 ++-
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |8 +-
 arch/powerpc/cpu/ppc4xx/speed.c |   85 +++-
 arch/powerpc/cpu/ppc4xx/start.S |   10 ++-
 arch/powerpc/include/asm/ppc4xx-ebc.h   |4 +
 arch/powerpc/include/asm/ppc4xx-isram.h |8 +-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   12 +-
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/processor.h|1 +
 board/amcc/bluestone/Makefile   |   52 ++
 board/amcc/bluestone/bluestone.c|  111 
 board/amcc/bluestone/config.mk  |   40 +++
 board/amcc/bluestone/init.S |   55 ++
 boards.cfg  |1 +
 include/configs/bluestone.h |  171 +++
 include/ppc440.h|   57 ++-
 include/ppc4xx.h|7 +-
 19 files changed, 641 insertions(+), 25 deletions(-)
 create mode 100644 board/amcc/bluestone/Makefile
 create mode 100644 board/amcc/bluestone/bluestone.c
 create mode 100644 board/amcc/bluestone/config.mk
 create mode 100644 board/amcc/bluestone/init.S
 create mode 100644 include/configs/bluestone.h

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[U-Boot] [PATCH v2 1/2] APM82xxx: Add CPU and other peripheral support

[tmarri]

From: Tirumala Marri 

APM82XXX is a new line of SoCs which are derivatives of
PPC44X family of processors.

This patch adds support of CPU, cache,
tlb, 32k ocm, bootstraps, PLB AHB bus, DDR and
Some common register definitions.

Signed-off-by: Tirumala R Marri 
---
 V1:
  * Squash some of the patches.
  * add space between "||" and "\".
  * Add spaces around operators.
  * Unsigned int to u32.
  * Add empty line which was removed.
  * remove warning "unused variable" in cpu_init.c
 V2:
  * Removed Defines added to 405ex.
---
 arch/powerpc/cpu/ppc4xx/cpu.c   |   35 -
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |8 ++-
 arch/powerpc/cpu/ppc4xx/speed.c |   85 ++-
 arch/powerpc/cpu/ppc4xx/start.S |   10 +++-
 arch/powerpc/include/asm/ppc4xx-ebc.h   |4 ++
 arch/powerpc/include/asm/ppc4xx-isram.h |8 ++-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   12 ++--
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/processor.h|1 +
 include/ppc440.h|   57 -
 include/ppc4xx.h|7 ++-
 11 files changed, 207 insertions(+), 25 deletions(-)

diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index 851065c..5fe5d8c 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -80,7 +80,8 @@ static int pci_async_enabled(void)
 #endif /* CONFIG_PCI */
 
 #if defined(CONFIG_PCI) && !defined(CONFIG_IOP480) && \
-!defined(CONFIG_405) && !defined(CONFIG_405EX)
+!defined(CONFIG_405) && !defined(CONFIG_405EX) && \
+!defined(CONFIG_APM82XXX)
 int pci_arbiter_enabled(void)
 {
 #if defined(CONFIG_405GP)
@@ -250,6 +251,21 @@ static char *bootstrap_str[] = {
 };
 static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
 #endif
+#if defined(CONFIG_APM82XXX)
+#define SDR0_PINSTP_SHIFT   29
+static char *bootstrap_str[] = {
+   "RESERVED",
+   "RESERVED",
+   "RESERVED",
+   "NAND (8 bits)",
+   "NOR  (8 bits)",
+   "NOR  (8 bits) w/PLL Bypassed",
+   "I2C (Addr 0x54)",
+   "I2C (Addr 0x52)",
+};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' };
+#endif
+
 
 #if defined(SDR0_PINSTP_SHIFT)
 static int bootstrap_option(void)
@@ -285,7 +301,7 @@ int checkcpu (void)
uint pvr = get_pvr();
ulong clock = gd->cpu_clk;
char buf[32];
-#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#if defined(CONFIG_460EX) || defined(CONFIG_460GT) || defined(CONFIG_APM82XXX)
u32 reg;
 #endif
 
@@ -304,6 +320,8 @@ int checkcpu (void)
 
 #if defined(CONFIG_XILINX_440)
puts("IBM PowerPC 4");
+#elif defined(CONFIG_APM82XXX)
+   puts("APM PowerPC APM82");
 #else
puts("AMCC PowerPC 4");
 #endif
@@ -316,7 +334,7 @@ int checkcpu (void)
 #if defined(CONFIG_440)
 #if defined(CONFIG_460EX) || defined(CONFIG_460GT)
puts("60");
-#else
+#elif !defined(CONFIG_APM82XXX)
puts("40");
 #endif
 #endif
@@ -598,7 +616,18 @@ int checkcpu (void)
puts("GX Rev. A");
strcpy(addstr, "No Security support");
break;
+#if defined(CONFIG_APM82XXX)
+   case PVR_APM82XXX_RA:
+   mfsdr(SDR0_ECID3, reg);
+   if (reg & 0x0020)
+   puts("181 Rev. A");
 
+   if (reg & 0x0010)
+   strcpy(addstr, "No Security support");
+   else
+   strcpy(addstr, "Security support");
+   break;
+#endif
case PVR_VIRTEX5:
puts("x5 VIRTEX5");
break;
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c 
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index c04eede..8765059 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -222,13 +222,15 @@ void reconfigure_pll(u32 new_cpu_freq)
 void
 cpu_init_f (void)
 {
-#if defined(CONFIG_WATCHDOG) || defined(CONFIG_440GX) || defined(CONFIG_460EX)
+#if defined(CONFIG_WATCHDOG) || defined(CONFIG_440GX) || \
+   defined(CONFIG_460EX)
u32 val;
 #endif
 
reconfigure_pll(CONFIG_SYS_PLL_RECONFIG);
 
-#if (defined(CONFIG_405EP) || defined (CONFIG_405EX)) && 
!defined(CONFIG_SYS_4xx_GPIO_TABLE)
+#if (defined(CONFIG_405EP) || defined(CONFIG_405EX)) && \
+   !defined(CONFIG_SYS_4xx_GPIO_TABLE) && !defined(CONFIG_APM82XXX)
/*
 * GPIO0 setup (select GPIO or alternate function)
 */
@@ -384,7 +386,7 @@ cpu_init_f (void)
 #if defined(CONFIG_405EX) || \
 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
 defined(CONFIG_460EX) || defined(CONFIG_460GT)  || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM82XXX)
/*
 * Set PLB4 arbiter (Segment 0 and 1) to 4 deep pipeline read
 */
diff --git a/arch/powerpc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index 906face..b613275 1006

[U-Boot] [PATCH v2 2/2] APM82xxx: Add bluestone board support

[tmarri]

From: Tirumala Marri 

Add support code for bluestone board wth APM82XXX processor based.
This patch includes early board init, misc init, configure EBC,
initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.

Signed-off-by: Tirumala R Marri 
---
 V1:
  * Remove "All rights reserved" phrase from headers.
  * Add empty line which was removed.
  * Move EBC definititions to bluestone_config.h file
  * Remove reconfigure_EBC() function.
  * Remove unused CONFIG_SDRAM16BIT_OFFSET.
  * Remove unused CONFIG_SDRAM_INFO_EEPROM_ADDR.
  * Add empty lines in bluestone.c file.
  * Replacing AC_R | AC_W | AC_X with AC_RWX.
  * Remove changes to main Makefile
  * Remove NAND references from config file.
  * Squash some of the patches.

V2:
  * Missing space before "<".
  * SDR_AHB_CFG not used, remove.
  * boot device dfinitions are board specific ? removed.
  * APM82161_MASK not used, remove
  * set_mcsr() is already called in ddr init, no need to call here.
  * removed finding bootdevice function which is not used.
  * Add spaces in tlbentry() function.
  * Board early init function is empty remove.
  * Remove CONFIG_SYS_EXTSRAM_BASE.
  * Set CONFIG_SYS_FLASH_SIZE to 4MB
  * Remove CONFIG_SIZE_REDUCE & CONFIG_SECTOR_REDUCE.
  * Spaces around " >> " .
  * Correct the phy name CONFIG_M88E_PHY to CONFIG_RTL8211CL_PHY.
---
 MAINTAINERS  |3 +
 MAKEALL  |1 +
 board/amcc/bluestone/Makefile|   52 
 board/amcc/bluestone/bluestone.c |  111 
 board/amcc/bluestone/config.mk   |   40 +
 board/amcc/bluestone/init.S  |   55 
 boards.cfg   |1 +
 include/configs/bluestone.h  |  171 ++
 8 files changed, 434 insertions(+), 0 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4b91b0f..ad7e598 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -253,6 +253,9 @@ Feng Kan 
 
redwood PPC4xx
 
+Tirumala Marri 
+   bluestone   APM82XXX
+
 Brad Kemp 
 
ppmc8260MPC8260
diff --git a/MAKEALL b/MAKEALL
index b34ae33..02d5c17 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -191,6 +191,7 @@ LIST_4xx="  \
ASH405  \
bamboo  \
bamboo_nand \
+   bluestone   \
bubinga \
CANBT   \
canyonlands \
diff --git a/board/amcc/bluestone/Makefile b/board/amcc/bluestone/Makefile
new file mode 100644
index 000..41751c8
--- /dev/null
+++ b/board/amcc/bluestone/Makefile
@@ -0,0 +1,52 @@
+#
+# Copyright (c) 2010, Applied Micro Circuits Corporation
+# Author: Tirumala R Marri 
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS-y:= $(BOARD).o
+SOBJS  := init.o
+
+COBJS   := $(COBJS-y)
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/amcc/bluestone/bluestone.c b/board/amcc/bluestone/bluestone.c
new file mode 100644
index 000..182038f
--- /dev/null
+++ b/board/amcc/bluestone/bluestone.c
@@ -0,0 +1,111 @@
+/*
+ * Bluestone board support
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Tirumala R Marri 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for 

Re: [U-Boot] warning: dereferencing pointer '({anonymous})' does break strict-aliasing rules

[Timur Tabi]

On Wed, Sep 1, 2010 at 12:01 PM, Mike Frysinger  wrote:
> On Tuesday, August 31, 2010 18:30:39 Timur Tabi wrote:
>> I ran Software Update on my Fedora 13 system, and now whenever I build
>> U-Boot, I get a bunch of warnings like this:
>
> what version of u-boot exactly ?

Any recent version.  Every version I've tried has this problem.

> for what board/architecture ?

It appears to be any PowerPC board.

> what is your
> host gcc version and your target gcc version ?

$ gcc --version
gcc (GCC) 4.4.4 20100630 (Red Hat 4.4.4-10)

$ powerpc-linux-gnu-gcc --version
powerpc-linux-gnu-gcc (Sourcery G++ Lite 4.4-194) 4.4.1

> what is the exact compile line
> that causes this warning to be displayed ?

powerpc-linux-gnu-gcc  -g  -Os   -mrelocatable -fPIC -meabi
-D__KERNEL__ -DTEXT_BASE=0xeff8 -DRESET_VECTOR_ADDRESS=0xeffc
-I/home/b04825/git/u-boot.diu/include -fno-builtin -ffreestanding
-nostdinc -isystem
/opt/freescale/usr/local/gcc-4.4.194-eglibc-2.11.194/powerpc-linux-gnu/lib/gcc/powerpc-linux-gnu/4.4.1/include
-pipe  -DCONFIG_PPC -D__powerpc__ -ffixed-r2 -Wa,-me500 -msoft-float
-mno-string -mspe=yes -mno-spe -Wall -Wstrict-prototypes
-fno-stack-protector   \
-o dlmalloc.o dlmalloc.c -c

> this is a pretty information-less
> bug report ...

It's not a bug report.  I was hoping that other people had already
seen this, since I'm not doing anything special.

-- 
Timur Tabi
Linux kernel developer at Freescale
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Re: [U-Boot] [PATCH V3] AT91 Fix: return value of get_tbclk

[Xu, Hong]

Hi, 

> -Original Message-
> From: Jens Scharsig [mailto:js_at...@scharsoft.de] 
> Sent: Thursday, September 02, 2010 1:37 AM
> To: Reinhard Meyer
> Cc: Xu, Hong; u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH V3] AT91 Fix: return value of get_tbclk
> 
> Am 2010-09-01 09:30, schrieb Reinhard Meyer:
> > 
> > at91_emac AND macb?
> > 
> > macb works for AVR32AP700x and (at least) for AT91SAM9260/9G20/9XE.
> > 
> > What is the deal with at91_emac? Is it required for some AT91's 
> > because macb does not work there?
> > 
> > Does it provide better "results" than macb?
> > 
> > Best Regards
> > Reinhard
> Hello,
> 
> I think the separation has historical reasons.
> For AT91RM and AT91SAM existed separate drivers and separate arch.
> I remeber in older datascheets the ethernet inteface also 
> marked with MACB.
> In my opinion, the at91_emac the latest drivers (NET_MULTI 
> api SoC access via c structurs).
> 
> But I dont know the exact differences are not of single use devices.
> Please ask Xu, Hong

I believe there must be historic reasons. I'm not familiar with AT91RM series. 
But from the mainline code,

$ grep CONFIG_DRIVER_AT91EMAC include/configs/* | wc -l
11
$ grep CONFIG_MACB include/configs/* | wc -l
19

Many boards are dependent on both. And currently AT91SAM always uses 
CONFIG_MACB, I don't see any
change in the near future.

BR,
Eric
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Re: [U-Boot] warning: dereferencing pointer '({anonymous})' does break strict-aliasing rules

[Mike Frysinger]

On Wednesday, September 01, 2010 21:27:24 Timur Tabi wrote:
> $ powerpc-linux-gnu-gcc --version
> powerpc-linux-gnu-gcc (Sourcery G++ Lite 4.4-194) 4.4.1

all gcc-4.4+ compilers should show similar output.  your host should have 
nothing to do with it.

searching the archives shows people working on it, but no satisfactory 
solution.  feel free to get it working.

the standard Blackfin release is currently based on 4.3.5 which is why i'm not 
seeing it and i'm not worrying about it ;).
-mike


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Re: [U-Boot] [PATCH V3] AT91 Fix: return value of get_tbclk

[Andreas Bießmann]

Hi,

Am 01.09.2010 19:37, schrieb Jens Scharsig:
> Am 2010-09-01 09:30, schrieb Reinhard Meyer:
>>
>> at91_emac AND macb?
>>
>> macb works for AVR32AP700x and (at least) for AT91SAM9260/9G20/9XE.
>>
>> What is the deal with at91_emac? Is it required for some AT91's
>> because macb does not work there?

>> Does it provide better "results" than macb?

> I think the separation has historical reasons.
> For AT91RM and AT91SAM existed separate drivers and separate arch.
> I remeber in older datascheets the ethernet inteface also marked with
MACB.
> In my opinion, the at91_emac the latest drivers (NET_MULTI api SoC
> access via c structurs).

currently at91_emac is used for AT91RM9200 devices cause this register
footprint differs to the one of MACB used in SAM9/AVR32 devices. Both
subsystems use similar namings but some register flags have different
offsets. MACB additionally seems to have more features than EMAC (namely
WOL register, some more flags in status register, ...).

But I think it is possible to merge both drivers cause except for the
different register footprint they both seems to work the same way. I
already have some improvements for at91_emac on stack and can look for
possibilities merging both.

regards

Andreas Bießmann
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