[U-Boot] [PATCH v2 2/2] net: ftmac100: update get_timer() usages
From: Po-Yu Chuang
Use get_timer() the same way as drivers/net/ftgmac100.c
Signed-off-by: Po-Yu Chuang
---
v2:
this patch is splitted from "net: ftmac100: remove unncessary volatiles"
drivers/net/ftmac100.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
index 27381a3..94dc6d9 100644
--- a/drivers/net/ftmac100.c
+++ b/drivers/net/ftmac100.c
@@ -195,8 +195,8 @@ ftmac100_send (struct eth_device *dev, volatile void
*packet, int length)
{
struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase;
struct ftmac100_data *priv = dev->priv;
- int tmo;
struct ftmac100_txdes *curr_des = priv->txdes;
+ ulong start;
if (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) {
debug ("%s(): no TX descriptor available\n", __func__);
@@ -224,9 +224,9 @@ ftmac100_send (struct eth_device *dev, volatile void
*packet, int length)
/* wait for transfer to succeed */
- tmo = get_timer (0) + 5 * CONFIG_SYS_HZ;
+ start = get_timer(0);
while (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) {
- if (get_timer (0) >= tmo) {
+ if (get_timer(start) >= 5) {
debug ("%s(): timed out\n", __func__);
return -1;
}
--
1.6.3.3
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[U-Boot] [PATCH v2 1/2] net: ftmac100: remove unncessary volatiles
From: Po-Yu Chuang
Signed-off-by: Po-Yu Chuang
---
v2:
split get_timer() changes to a seperate patch
drivers/net/ftmac100.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
index 2328cb5..27381a3 100644
--- a/drivers/net/ftmac100.c
+++ b/drivers/net/ftmac100.c
@@ -30,8 +30,8 @@
#define ETH_ZLEN 60
struct ftmac100_data {
- volatile struct ftmac100_txdes txdes[1];
- volatile struct ftmac100_rxdes rxdes[PKTBUFSRX];
+ struct ftmac100_txdes txdes[1];
+ struct ftmac100_rxdes rxdes[PKTBUFSRX];
int rx_index;
};
@@ -88,8 +88,8 @@ static int ftmac100_init (struct eth_device *dev, bd_t *bd)
{
struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase;
struct ftmac100_data *priv = dev->priv;
- volatile struct ftmac100_txdes *txdes = priv->txdes;
- volatile struct ftmac100_rxdes *rxdes = priv->rxdes;
+ struct ftmac100_txdes *txdes = priv->txdes;
+ struct ftmac100_rxdes *rxdes = priv->rxdes;
unsigned int maccr;
int i;
@@ -153,7 +153,7 @@ static int ftmac100_init (struct eth_device *dev, bd_t *bd)
static int ftmac100_recv (struct eth_device *dev)
{
struct ftmac100_data *priv = dev->priv;
- volatile struct ftmac100_rxdes *curr_des;
+ struct ftmac100_rxdes *curr_des;
unsigned short rxlen;
curr_des = &priv->rxdes[priv->rx_index];
@@ -195,8 +195,8 @@ ftmac100_send (struct eth_device *dev, volatile void
*packet, int length)
{
struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase;
struct ftmac100_data *priv = dev->priv;
- volatile struct ftmac100_txdes *curr_des = priv->txdes;
int tmo;
+ struct ftmac100_txdes *curr_des = priv->txdes;
if (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) {
debug ("%s(): no TX descriptor available\n", __func__);
--
1.6.3.3
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[U-Boot] ??: [PATCH v2] include/linux/mii.h: update for supporting GE
Dear Wolfgang, > /home/wd/git/u-boot/work/include/linux/mii.h:134:1: warning: > "LPA_1000HALF" redefined > In file included from uec_phy.c:26: > uec_phy.h:35:1: warning: this is the location of the previous > definition >textdata bss dec hex filename > 327682 28828 230568 587078 8f546 /work/wd/tmp-ppc/u-boot Moreover, after checking drivers/qe/uec_phy.h, I've found some definitions differs from standard linux code. In uec_phy: drivers/qe/uec_phy.h:34:#define LPA_1000FULL0x0400 drivers/qe/uec_phy.h:35:#define LPA_1000HALF0x0200 In Linux: include/linux/mii.h:133:#define LPA_1000FULL0x0800 /* Link partner 1000BASE-T full duplex */ include/linux/mii.h:134:#define LPA_1000HALF0x0400 /* Link partner 1000BASE-T half duplex */ Do you know if this is a wrong defintion on uec_phy ? I'm afraid the fix will lead some mis-behavior for boards has uec_phy. Best regards, Macpaul Lin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] ??: [PATCH v2] include/linux/mii.h: update for supporting GE
Dear Wolfgang, > /home/wd/git/u-boot/work/include/linux/mii.h:133:1: warning: > "LPA_1000FULL" redefined > In file included from uec.c:31: > uec_phy.h:34:1: warning: this is the location of the previous > definition > In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, > from uec.c:32: > In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, > from uec_phy.c:27: > /home/wd/git/u-boot/work/include/linux/mii.h:134:1: warning: > "LPA_1000HALF" redefined > In file included from uec_phy.c:26: > uec_phy.h:35:1: warning: this is the location of the previous > definition >textdata bss dec hex filename > 327682 28828 230568 587078 8f546 /work/wd/tmp-ppc/u-boot > ... I've found that the problem is because uec_phy.c defined these gigabit related definitions since they might be ported from Linux kernel. The redifinition in uec_phy.c should be removed, however I can send the patch for fixing this but I need to get a proper ppc cross-compiler. I will check these stuff after I found and download the ppc cross compiler. Just send a note to mailist. Best regards, Macpaul Lin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] ??: [PATCH v2] include/linux/mii.h: update for supporting GE
Dear Wolfgang, > > Dear Macpaul Lin, > > In message > <129134-18586-1-git-send-email-macp...@andestech.com> you wrote: > > This file has been synced (copy) from Linux source code. > > This commit was based on kernel 2.6.32. > > It updates gigabit related phy registers and basic definitions. > > > > Signed-off-by: Macpaul Lin > > --- > > Change v1: pull header file from Linux. > > Change v2: clean up unused code for u-boot. > > > > include/linux/mii.h | 181 > ++- > > 1 files changed, 107 insertions(+), 74 deletions(-) > > This patch causes build warnings for a number of boards, for example: > > Configuring for MPC8568MDS board... > In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, > from uec.c:32: > /home/wd/git/u-boot/work/include/linux/mii.h:133:1: warning: > "LPA_1000FULL" redefined > In file included from uec.c:31: > uec_phy.h:34:1: warning: this is the location of the previous > definition > In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, > from uec.c:32: > /home/wd/git/u-boot/work/include/linux/mii.h:134:1: warning: > "LPA_1000HALF" redefined > In file included from uec.c:31: > uec_phy.h:35:1: warning: this is the location of the previous > definition > In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, > from uec_phy.c:27: > /home/wd/git/u-boot/work/include/linux/mii.h:133:1: warning: > "LPA_1000FULL" redefined > In file included from uec_phy.c:26: > uec_phy.h:34:1: warning: this is the location of the previous > definition > In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, > from uec_phy.c:27: > /home/wd/git/u-boot/work/include/linux/mii.h:134:1: warning: > "LPA_1000HALF" redefined > In file included from uec_phy.c:26: > uec_phy.h:35:1: warning: this is the location of the previous > definition >textdata bss dec hex filename > 238866 22824 25252 286942 460de /work/wd/tmp-ppc/u-boot > Configuring for MPC8569MDS board... > In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, > from uec.c:32: > /home/wd/git/u-boot/work/include/linux/mii.h:133:1: warning: > "LPA_1000FULL" redefined > In file included from uec.c:31: > uec_phy.h:34:1: warning: this is the location of the previous > definition > In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, > from uec.c:32: > /home/wd/git/u-boot/work/include/linux/mii.h:134:1: warning: > "LPA_1000HALF" redefined > In file included from uec.c:31: > uec_phy.h:35:1: warning: this is the location of the previous > definition > In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, > from uec_phy.c:27: > /home/wd/git/u-boot/work/include/linux/mii.h:133:1: warning: > "LPA_1000FULL" redefined > In file included from uec_phy.c:26: > uec_phy.h:34:1: warning: this is the location of the previous > definition > In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, > from uec_phy.c:27: > /home/wd/git/u-boot/work/include/linux/mii.h:134:1: warning: > "LPA_1000HALF" redefined > In file included from uec_phy.c:26: > uec_phy.h:35:1: warning: this is the location of the previous > definition >textdata bss dec hex filename > 327682 28828 230568 587078 8f546 /work/wd/tmp-ppc/u-boot > ... Okay, Will try to fix this ASAP. Thanks. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] include/linux/mii.h: update for supporting GE
Dear Macpaul Lin, In message <129134-18586-1-git-send-email-macp...@andestech.com> you wrote: > This file has been synced (copy) from Linux source code. > This commit was based on kernel 2.6.32. > It updates gigabit related phy registers and basic definitions. > > Signed-off-by: Macpaul Lin > --- > Change v1: pull header file from Linux. > Change v2: clean up unused code for u-boot. > > include/linux/mii.h | 181 > ++- > 1 files changed, 107 insertions(+), 74 deletions(-) This patch causes build warnings for a number of boards, for example: Configuring for MPC8568MDS board... In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, from uec.c:32: /home/wd/git/u-boot/work/include/linux/mii.h:133:1: warning: "LPA_1000FULL" redefined In file included from uec.c:31: uec_phy.h:34:1: warning: this is the location of the previous definition In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, from uec.c:32: /home/wd/git/u-boot/work/include/linux/mii.h:134:1: warning: "LPA_1000HALF" redefined In file included from uec.c:31: uec_phy.h:35:1: warning: this is the location of the previous definition In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, from uec_phy.c:27: /home/wd/git/u-boot/work/include/linux/mii.h:133:1: warning: "LPA_1000FULL" redefined In file included from uec_phy.c:26: uec_phy.h:34:1: warning: this is the location of the previous definition In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, from uec_phy.c:27: /home/wd/git/u-boot/work/include/linux/mii.h:134:1: warning: "LPA_1000HALF" redefined In file included from uec_phy.c:26: uec_phy.h:35:1: warning: this is the location of the previous definition textdata bss dec hex filename 238866 22824 25252 286942 460de /work/wd/tmp-ppc/u-boot Configuring for MPC8569MDS board... In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, from uec.c:32: /home/wd/git/u-boot/work/include/linux/mii.h:133:1: warning: "LPA_1000FULL" redefined In file included from uec.c:31: uec_phy.h:34:1: warning: this is the location of the previous definition In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, from uec.c:32: /home/wd/git/u-boot/work/include/linux/mii.h:134:1: warning: "LPA_1000HALF" redefined In file included from uec.c:31: uec_phy.h:35:1: warning: this is the location of the previous definition In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, from uec_phy.c:27: /home/wd/git/u-boot/work/include/linux/mii.h:133:1: warning: "LPA_1000FULL" redefined In file included from uec_phy.c:26: uec_phy.h:34:1: warning: this is the location of the previous definition In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, from uec_phy.c:27: /home/wd/git/u-boot/work/include/linux/mii.h:134:1: warning: "LPA_1000HALF" redefined In file included from uec_phy.c:26: uec_phy.h:35:1: warning: this is the location of the previous definition textdata bss dec hex filename 327682 28828 230568 587078 8f546 /work/wd/tmp-ppc/u-boot ... etc. etc. Please fix. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Insults are effective only where emotion is present. -- Spock, "Who Mourns for Adonais?" stardate 3468.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-Boot support for board(s) meesc, otc570
Dear Daniel Gorsulowski, > Hello Reinhard, > > Reinhard Meyer wrote: >> Dear Daniel Gorsulowski, ... >> The at91sam9260(9xe)ek board builds fine and works. > > I can confirm that. > >> Use that as a template or reference what to do. >> You should *only* need to adapt board/*/files and your configs/.h >> files. And of course updated entries in boards.cfg. > > Not quiet. I had to fix arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c > additionally. Yes, of course... I had only "reworked" the 9260 variant yet. You should need to change it similarly to at91sam9260_devices.c... > > With my adoptions, my boards builds fine. But they do not boot. > Can you really confirm that the at91sam9260ek board boots? I have no > chance to debug my problems, so I have no idea, why my boards does not boot. Yes it does. What exactly does "does not boot" mean? No message at all? Check that your AT91Bootstrap loads u-boot to a sane address not at the very end of DRAM, and that CONFIG_SYS_TEXT_BASE is exactly the address where AT91Bootstrap loads u-boot. (I changed AT91Bootstrap to load u-boot to the very begin of DRAM for our boards.) > > Nevertheless, should I send my patches for reviewing? > Of course. We might see something that helps you. Best Regards, Reinhard ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 05/11] I2C: mxc_i2c: address failure with mx35 processor
Hello Stefano,
just a question ...
Stefano Babic wrote:
> There is sporadic failures when more as one I2C slave
> is on the bus and the processor tries to communicate
> with more as one slave.
> The problem was seen on a mx35pdk (two I2C slaves,
> PMIC controller and CAN/RTC chip).
>
> The current driver uses the IIF bit in the status register
> to check if the bus is busy or not. According to the manual,
> this is not correct, because the IIB bit should be checked.
> Not only, to check if a transfer is finished must be checked
> the ICF bit, and this is not tested at all.
>
> This patch comes from analyse with a corresponding driver
> provided by Freescale as part of the LTIB tool. Comparing
> the two drivers, it appears that the current u-boot driver checks
> the wrong bits, and depending on race condition, the transfer
> can be successful or not.
>
> The patch gets rid also of own debug function (DPRINTF),
> replaced with the general debug().
>
> Tested on Freescale mx35pdk.
>
> Signed-off-by: Stefano Babic
> CC: Heiko Schocher
> ---
> Changes:
>
> Wolfgang Denk:
> - change commit message explaining the problem
> and the changes
> - describe in commit message the drop of DPRINTF
>
> drivers/i2c/mxc_i2c.c | 86 ++--
> 1 files changed, 68 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
> index fd6db18..c5ec486 100755
> --- a/drivers/i2c/mxc_i2c.c
> +++ b/drivers/i2c/mxc_i2c.c
[...]
> @@ -116,31 +113,61 @@ void i2c_init(int speed, int unused)
> i2c_reset();
> }
>
> +static int wait_idle(void)
> +{
> + int timeout = I2C_MAX_TIMEOUT;
> +
> + while ((readw(I2C_BASE + I2SR) & I2SR_IBB) && --timeout) {
> + writew(0, I2C_BASE + I2SR);
> + udelay(1);
> + }
> + return timeout ? timeout : (!(readw(I2C_BASE + I2SR) & I2SR_IBB));
> +}
> +
> static int wait_busy(void)
> {
> - int timeout = 1;
> + int timeout = I2C_MAX_TIMEOUT;
>
> - while (!(readw(I2C_BASE + I2SR) & I2SR_IIF) && --timeout)
> + while (!(readw(I2C_BASE + I2SR) & I2SR_IBB) && --timeout)
> udelay(1);
> writew(0, I2C_BASE + I2SR); /* clear interrupt */
>
> return timeout;
> }
>
> +static int wait_complete(void)
> +{
> + int timeout = I2C_MAX_TIMEOUT;
> +
> + while ((!(readw(I2C_BASE + I2SR) & I2SR_ICF)) && (--timeout)) {
> + writew(0, I2C_BASE + I2SR);
> + udelay(1);
> + }
> + udelay(200);
Why is this delay necessary? Why exactly 200? Is this documented
somewhere in the doc?
bye,
Heiko
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Re: [U-Boot] [PATCH v3 1/2] armv7: add support for S5PC210 SoC
Dear Wolfgang Denk, On 20 January 2011 22:31, Wolfgang Denk wrote: > Dear Minkyu Kang, > > In message <4d382f3e.6080...@samsung.com> you wrote: >> S5PC210 is a 32-bit RISC and Cortex-A9 Dual Core based micro-processor. > ... >> new file mode 100644 >> index 000..69011fc >> --- /dev/null >> +++ b/arch/arm/include/asm/arch-s5pc2xx/uart.h > ... >> +static int use_divslot = 0; > > This is certainly wrong in a header file. > > Also, please do not initialise statics to 0 or NULL. > Hm, how about inline function or macro? Thanks Minkyu Kang -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mpc52xx, digsy_mtc_rev5: Fix Linux crash, if no Flash in bank 2
If no Flash is connected to cs1, Linux crashes, because
reg entries are not correct adapted.
Following fix is needed:
- swap base addresses in CONFIG_SYS_FLASH_BANKS_LIST, as
flash bank 1 is on chipselect 0 and flash bank 2 on
chipselect 1
- call fdt_fixup_nor_flash_size() from ft_board_setup()
Signed-off-by: Heiko Schocher
cc: Wolfgang Denk
cc: Werner Pfister
cc: Detlev Zundel
---
board/digsy_mtc/digsy_mtc.c |5 +
include/configs/digsy_mtc.h |4 ++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/board/digsy_mtc/digsy_mtc.c b/board/digsy_mtc/digsy_mtc.c
index afb0948..cbfdc9e 100644
--- a/board/digsy_mtc/digsy_mtc.c
+++ b/board/digsy_mtc/digsy_mtc.c
@@ -46,6 +46,7 @@
#include "is42s16800a-7t.h"
#endif
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -415,6 +416,10 @@ void ft_board_setup(void *blob, bd_t *bd)
ft_delete_node(blob, "mc,rv3029c2");
#endif
#if defined(CONFIG_SYS_UPDATE_FLASH_SIZE)
+#ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
+ /* Update reg property in all nor flash nodes too */
+ fdt_fixup_nor_flash_size(blob);
+#endif
ft_adapt_flash_base(blob);
#endif
}
diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h
index bfbec6a..e7fd0f7 100644
--- a/include/configs/digsy_mtc.h
+++ b/include/configs/digsy_mtc.h
@@ -268,8 +268,8 @@
#define CONFIG_SYS_FLASH_BASE 0xFE00
#define CONFIG_SYS_FLASH_BASE_CS1 0xFC00
#define CONFIG_SYS_MAX_FLASH_BANKS 2
-#define CONFIG_SYS_FLASH_BANKS_LIST{ CONFIG_SYS_FLASH_BASE_CS1, \
- CONFIG_SYS_FLASH_BASE}
+#define CONFIG_SYS_FLASH_BANKS_LIST{ CONFIG_SYS_FLASH_BASE, \
+ CONFIG_SYS_FLASH_BASE_CS1}
#define CONFIG_SYS_UPDATE_FLASH_SIZE
#define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
#else
--
1.7.3.4
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Re: [U-Boot] [PATCH V3 04/11] I2C: mxc_i2c: get rid of __REG access
Hello Stefano, Stefano Babic wrote: > This driver accesses to processor's register > via __REG macros, that are removed (or are planned > to be removed) and replaced by C structures. > This patches replaces all occurrencies of __REG macros. > > Signed-off-by: Stefano Babic > CC: Heiko Schocher > --- > > Changes: > - fix code styling issues > - replace __FUNCTION__ with __func__ > > drivers/i2c/mxc_i2c.c | 72 > ++--- > 1 files changed, 44 insertions(+), 28 deletions(-) Acked-by: Heiko Schocher bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 03/11] mxc_i2c: Add support for the i.MX35 processor
Hello Stefano, Stefano Babic wrote: > Signed-off-by: Stefano Babic > CC: Heiko Schocher > --- > Changes: > > Wolfgang Denk: > - Do not use XXX in defines because are blocked by SPAM filters > > drivers/i2c/mxc_i2c.c |9 + > 1 files changed, 5 insertions(+), 4 deletions(-) Acked-by: Heiko Schocher bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net: ftmac100: remove unncessary volatiles
Hi Sergei,
On Thu, Jan 20, 2011 at 11:38 PM, Sergei Shtylyov wrote:
> Hello.
>
> Po-Yu Chuang wrote:
>
>> From: Po-Yu Chuang
>
>> This patch also update get_timer() usage.
>
> This seems like a material for a separate patch.
OK, I will split this to 2 patches later.
> [...]
>>
>> @@ -219,14 +219,12 @@ ftmac100_send (struct eth_device *dev, volatile void
>> *packet, int length)
>> curr_des->txdes0 = FTMAC100_TXDES0_TXDMA_OWN;
>> /* start transmit */
>> -
>> writel (1, &ftmac100->txpd);
>> /* wait for transfer to succeed */
>> -
>> - tmo = get_timer (0) + 5 * CONFIG_SYS_HZ;
>> + start = get_timer (0);
>> while (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) {
>> - if (get_timer (0) >= tmo) {
>> + if (get_timer (start) >= 5) {
>
> I'm not sure this is equivalent to the old code...
The original code waits unnecessarily long. This change refers to the way
the newer driver does - drivers/net/ftgmac100.c.
>> debug ("%s(): timed out\n", __func__);
>> return -1;
>> }
>
> checkpatch.pl says:
>
> WARNING: space prohibited between function name and open parenthesis '('
> #66: FILE: drivers/net/ftmac100.c:225:
> + start = get_timer (0);
>
> WARNING: space prohibited between function name and open parenthesis '('
> #69: FILE: drivers/net/ftmac100.c:227:
> + if (get_timer (start) >= 5) {
>
> I know you're only modifying the existing code, but it's time to fix the
> style of it as well...
OK, I'll fix it.
Thanks,
Po-Yu Chuang
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Re: [U-Boot] environmental "baudrate" not used at boot up
> -Original Message-
> From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de]
> On Behalf Of Wood Scott-B07421
> Sent: Thursday, January 20, 2011 1:28 AM
> To: chr...@cyberswitching.com
> Cc: u-boot@lists.denx.de
> Subject: Re: [U-Boot] environmental "baudrate" not used at boot up
>
> On Tue, 18 Jan 2011 21:34:45 -0800
> wrote:
>
> > On Sun, Jan 16, 2011 at 06:01:22AM -0800, chr...@cyberswitching.com
> wrote:
> > > ...
> > > Any advice on where to take it from here?
> >
> > Hi everyone,
> >
> > I investigated this a little further, and I'm wondering if the problem
> > is related to the initialization ordering in lib_arm/board.c.
> >
> > Here's the sequence:
> >
> >start_armboot():
> >1. init_baudrate() -> getenv_r() -> serial_setbrg()
> >2. env_relocate()
> >
> > Note that init_baudrate() calls getenv_r("baudrate") and passes either
> > the result (on success) or CONFIG_BAUDRATE (on error) to
> > serial_setbrg(). Only after this does the environment get relocated
> > using env_relocate().
>
> The full NAND code only works after relocation. So you cannot read out
> the NAND environment, in the normal way, before serial init -- you get
> the default environment instead.
>
> If you are booting from NAND, I suggest using CONFIG_NAND_ENV_DST to have
> the NAND SPL load the environment at the same time as it loads U-Boot.
> If you're using some preloader other than U-Boot's NAND SPL, you'll need
> to see if it supports something similar.
Hello Scott
Is this feature available/tested on any FSL platform. The code you pointed to
does not seem to be used by FSL platforms.
It would be good idea to pull this in for P1/P2 RDB nand boot loader.
Regards
Poonam
>
> -Scott
>
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[U-Boot] [PATCH v2] Net: Add Intel E1000 82574L PCIe card support
Add Intel E1000 82574L PCIe card support. Test on MPC8544DS
and MPC8572 board.
Add the missing contact information for future support.
Signed-off-by: Roy Zang
Acked-by: Kumar Gala
---
minor style clean up vs. v1 version.
drivers/net/e1000.c | 33 +
drivers/net/e1000.h |6 ++
include/pci_ids.h |1 +
3 files changed, 32 insertions(+), 8 deletions(-)
diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index 5f390bd..98145bc 100644
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -40,6 +40,8 @@ tested on both gig copper and gig fiber boards
* Copyright (C) Linux Networx.
* Massive upgrade to work with the new intel gigabit NICs.
*
+ *
+ * Copyright 2011 Freescale Semiconductor, Inc.
*/
#include "e1000.h"
@@ -100,6 +102,7 @@ static struct pci_device_id supported[] = {
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82573E},
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82573E_IAMT},
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82573L},
+ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82574L},
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82546GB_QUAD_COPPER_KSP3},
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80003ES2LAN_COPPER_DPT},
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80003ES2LAN_SERDES_DPT},
@@ -331,7 +334,7 @@ static boolean_t e1000_is_onboard_nvm_eeprom(struct
e1000_hw *hw)
if (hw->mac_type == e1000_ich8lan)
return FALSE;
- if (hw->mac_type == e1000_82573) {
+ if (hw->mac_type == e1000_82573 || hw->mac_type == e1000_82574) {
eecd = E1000_READ_REG(hw, EECD);
/* Isolate bits 15 & 16 */
@@ -364,7 +367,7 @@ e1000_acquire_eeprom(struct e1000_hw *hw)
return -E1000_ERR_SWFW_SYNC;
eecd = E1000_READ_REG(hw, EECD);
- if (hw->mac_type != e1000_82573) {
+ if (hw->mac_type != e1000_82573 || hw->mac_type != e1000_82574) {
/* Request EEPROM Access */
if (hw->mac_type > e1000_82544) {
eecd |= E1000_EECD_REQ;
@@ -498,6 +501,7 @@ static int32_t e1000_init_eeprom_params(struct e1000_hw *hw)
eeprom->use_eewr = FALSE;
break;
case e1000_82573:
+ case e1000_82574:
eeprom->type = e1000_eeprom_spi;
eeprom->opcode_bits = 8;
eeprom->delay_usec = 1;
@@ -1317,6 +1321,9 @@ e1000_set_mac_type(struct e1000_hw *hw)
case E1000_DEV_ID_82573L:
hw->mac_type = e1000_82573;
break;
+ case E1000_DEV_ID_82574L:
+ hw->mac_type = e1000_82574;
+ break;
case E1000_DEV_ID_80003ES2LAN_COPPER_SPT:
case E1000_DEV_ID_80003ES2LAN_SERDES_SPT:
case E1000_DEV_ID_80003ES2LAN_COPPER_DPT:
@@ -1487,6 +1494,7 @@ e1000_initialize_hardware_bits(struct e1000_hw *hw)
E1000_WRITE_REG(hw, TARC1, reg_tarc1);
break;
case e1000_82573:
+ case e1000_82574:
reg_ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
reg_ctrl_ext &= ~(1 << 23);
reg_ctrl_ext |= (1 << 22);
@@ -1728,12 +1736,11 @@ e1000_init_hw(struct eth_device *nic)
| E1000_TXDCTL_FULL_TX_DESC_WB;
E1000_WRITE_REG(hw, TXDCTL1, ctrl);
break;
- }
-
- if (hw->mac_type == e1000_82573) {
- uint32_t gcr = E1000_READ_REG(hw, GCR);
- gcr |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX;
- E1000_WRITE_REG(hw, GCR, gcr);
+ case e1000_82573:
+ case e1000_82574:
+ reg_data = E1000_READ_REG(hw, GCR);
+ reg_data |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX;
+ E1000_WRITE_REG(hw, GCR, reg_data);
}
#if 0
@@ -1812,6 +1819,7 @@ e1000_setup_link(struct eth_device *nic)
switch (hw->mac_type) {
case e1000_ich8lan:
case e1000_82573:
+ case e1000_82574:
hw->fc = e1000_fc_full;
break;
default:
@@ -4560,6 +4568,9 @@ static int e1000_set_phy_type (struct e1000_hw *hw)
hw->phy_type = e1000_phy_gg82563;
break;
}
+ case BME1000_E_PHY_ID:
+ hw->phy_type = e1000_phy_bm;
+ break;
/* Fall Through */
default:
/* Should never have loaded on this device */
@@ -4646,6 +4657,10 @@ e1000_detect_gig_phy(struct e1000_hw *hw)
if (hw->phy_id == M88E_I_PHY_ID)
match = TRUE;
break;
+ case e1000_82574:
+ if (hw->phy_id == BME1000_E_PHY_ID)
+ match = TRUE;
+ break;
case e1000_80003es2lan:
if (hw->phy_id == GG82563_E_PHY_
[U-Boot] [PATCH V4 0/4] Add basic NVIDIA Tegra2 SoC support
This series of patches adds preliminary/baseline support for NVIDIA's Tegra2 SoC. Basic CPU (AVP), RAM and UART init are covered so that the system (Harmony or Seaboard) can boot to the U-Boot serial cmd prompt. Further support (for Cortex-A9 CPU(s), USB, SD/MMC, etc.) to follow. Changes for V2: - Coding style cleanup - Remove mach-types.h change; wait for ARM kernel sync-up - Move serial driver changes to separate patch - Use board/nvidia/ instead of /board/tegra - Remove TRUE/FALSE defines - Use standard NS16550 register/bit defines in UART init - Change nv-common.h config file to tegra2-common.h Changes for V3: - Use I/O accessors for Tegra2 HW MMIO register access - Allow conditional compile of UARTA/UARTD code to save space Changes for V4: - Use address of HW structs (&pmc, etc.) in readl/writel - Remove empty lines, fix mixed case hex #s & comments in header(s) - Move board/nvidia/common/board.c UART code & header to arch/arm/cpu/armv7/tegra2/ - Declare internal functions as static in UART code Tom Warren (4): arm: Tegra2: Add basic NVIDIA Tegra2 SoC support serial: Add Tegra2 serial port support arm: Tegra2: Add support for NVIDIA Harmony board arm: Tegra2: Add support for NVIDIA Seaboard board MAINTAINERS |5 + arch/arm/cpu/armv7/tegra2/Makefile | 48 ++ arch/arm/cpu/armv7/tegra2/board.c| 91 +++ arch/arm/cpu/armv7/tegra2/board.h| 58 +++ arch/arm/cpu/armv7/tegra2/config.mk | 28 arch/arm/cpu/armv7/tegra2/lowlevel_init.S| 65 arch/arm/cpu/armv7/tegra2/sys_info.c | 35 arch/arm/cpu/armv7/tegra2/timer.c| 122 +++ arch/arm/cpu/armv7/tegra2/uart.c | 216 ++ arch/arm/include/asm/arch-tegra2/clk_rst.h | 154 ++ arch/arm/include/asm/arch-tegra2/pinmux.h| 51 ++ arch/arm/include/asm/arch-tegra2/pmc.h | 124 +++ arch/arm/include/asm/arch-tegra2/sys_proto.h | 33 arch/arm/include/asm/arch-tegra2/tegra2.h| 49 ++ arch/arm/include/asm/arch-tegra2/uart.h | 44 ++ board/nvidia/common/board.c | 57 +++ board/nvidia/harmony/Makefile| 50 ++ board/nvidia/seaboard/Makefile | 50 ++ boards.cfg |2 + common/serial.c |3 +- include/configs/harmony.h| 48 ++ include/configs/seaboard.h | 44 ++ include/configs/tegra2-common.h | 160 +++ include/serial.h |3 +- 24 files changed, 1538 insertions(+), 2 deletions(-) create mode 100644 arch/arm/cpu/armv7/tegra2/Makefile create mode 100644 arch/arm/cpu/armv7/tegra2/board.c create mode 100644 arch/arm/cpu/armv7/tegra2/board.h create mode 100644 arch/arm/cpu/armv7/tegra2/config.mk create mode 100644 arch/arm/cpu/armv7/tegra2/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/tegra2/sys_info.c create mode 100644 arch/arm/cpu/armv7/tegra2/timer.c create mode 100644 arch/arm/cpu/armv7/tegra2/uart.c create mode 100644 arch/arm/include/asm/arch-tegra2/clk_rst.h create mode 100644 arch/arm/include/asm/arch-tegra2/pinmux.h create mode 100644 arch/arm/include/asm/arch-tegra2/pmc.h create mode 100644 arch/arm/include/asm/arch-tegra2/sys_proto.h create mode 100644 arch/arm/include/asm/arch-tegra2/tegra2.h create mode 100644 arch/arm/include/asm/arch-tegra2/uart.h create mode 100644 board/nvidia/common/board.c create mode 100644 board/nvidia/harmony/Makefile create mode 100644 board/nvidia/seaboard/Makefile create mode 100644 include/configs/harmony.h create mode 100644 include/configs/seaboard.h create mode 100644 include/configs/tegra2-common.h -- 1.7.3.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V4 4/4] arm: Tegra2: Add support for NVIDIA Seaboard board
Signed-off-by: Tom Warren --- Changes for V2: - Remove mach-types.h change; wait for ARM kernel sync-up - Use board/nvidia instead of board/tegra MAINTAINERS|1 + board/nvidia/seaboard/Makefile | 50 boards.cfg |1 + include/configs/seaboard.h | 44 +++ 4 files changed, 96 insertions(+), 0 deletions(-) create mode 100644 board/nvidia/seaboard/Makefile create mode 100644 include/configs/seaboard.h diff --git a/MAINTAINERS b/MAINTAINERS index b5cff19..f4795d3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -844,6 +844,7 @@ Prafulla Wadaskar Tom Warren harmony Tegra2 (ARM7 & A9 Dual Core) + seaboardTegra2 (ARM7 & A9 Dual Core) Matthias Weisser diff --git a/board/nvidia/seaboard/Makefile b/board/nvidia/seaboard/Makefile new file mode 100644 index 000..3a146cb --- /dev/null +++ b/board/nvidia/seaboard/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2010,2011 +# NVIDIA Corporation +# +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS += ../common/board.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB):$(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/boards.cfg b/boards.cfg index ee7c4b7..3c4c249 100644 --- a/boards.cfg +++ b/boards.cfg @@ -123,6 +123,7 @@ omap4_sdp4430arm armv7 sdp4430 ti s5p_goni arm armv7 goni samsungs5pc1xx smdkc100 arm armv7 smdkc100 samsungs5pc1xx harmony arm armv7 harmony nvidia tegra2 +seaboard arm armv7 seaboard nvidia tegra2 actux1 arm ixp actux2 arm ixp actux3 arm ixp diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h new file mode 100644 index 000..98d82d6 --- /dev/null +++ b/include/configs/seaboard.h @@ -0,0 +1,44 @@ +/* + * (C) Copyright 2010,2011 + * NVIDIA Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include +#include "tegra2-common.h" + +/* High-level configuration options */ +#define TEGRA2_SYSMEM "mem=384M@0M nvmem=128M@384M mem=512M@512M" +#define V_PROMPT "Tegra2 (SeaBoard) # " +#define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Seaboard" + +/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA2_ENABLE_UARTA 0 +#define CONFIG_TEGRA2_ENABLE_UARTD 1 +#define CONFIG_SYS_NS16550_COM1NV_PA_APB_UARTD_BASE + +#define CONFIG_MACH_TYPE MACH_TYPE_TEGRA_SEABOARD +#define CONFIG_SYS_BOARD_ODMDATA 0x300d8011 /* lp1, 1GB */ + +#endif /* __CONFIG_H */ -- 1.7.3.5
[U-Boot] [PATCH V4 3/4] arm: Tegra2: Add support for NVIDIA Harmony board
Signed-off-by: Tom Warren --- Changes for V2: - Use board/nvidia/ instead of /board/tegra - Change nv-common.h config file to tegra2-common.h MAINTAINERS |4 + board/nvidia/harmony/Makefile | 50 boards.cfg |1 + include/configs/harmony.h | 48 include/configs/tegra2-common.h | 160 +++ 5 files changed, 263 insertions(+), 0 deletions(-) create mode 100644 board/nvidia/harmony/Makefile create mode 100644 include/configs/harmony.h create mode 100644 include/configs/tegra2-common.h diff --git a/MAINTAINERS b/MAINTAINERS index ba83f71..b5cff19 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -841,6 +841,10 @@ Prafulla Wadaskar rd6281a ARM926EJS (Kirkwood SoC) sheevaplug ARM926EJS (Kirkwood SoC) +Tom Warren + + harmony Tegra2 (ARM7 & A9 Dual Core) + Matthias Weisser jadecpu ARM926EJS (MB86R01 SoC) diff --git a/board/nvidia/harmony/Makefile b/board/nvidia/harmony/Makefile new file mode 100644 index 000..3a146cb --- /dev/null +++ b/board/nvidia/harmony/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2010,2011 +# NVIDIA Corporation +# +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS += ../common/board.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB):$(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/boards.cfg b/boards.cfg index 94b8745..ee7c4b7 100644 --- a/boards.cfg +++ b/boards.cfg @@ -122,6 +122,7 @@ omap4_panda arm armv7 panda ti omap4_sdp4430arm armv7 sdp4430 ti omap4 s5p_goni arm armv7 goni samsungs5pc1xx smdkc100 arm armv7 smdkc100 samsungs5pc1xx +harmony arm armv7 harmony nvidia tegra2 actux1 arm ixp actux2 arm ixp actux3 arm ixp diff --git a/include/configs/harmony.h b/include/configs/harmony.h new file mode 100644 index 000..7d8f27a --- /dev/null +++ b/include/configs/harmony.h @@ -0,0 +1,48 @@ +/* + * (C) Copyright 2010,2011 + * NVIDIA Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include +#include "tegra2-common.h" + +/* High-level configuration options */ +#define TEGRA2_SYSMEM "mem=384M@0M nvmem=128M@384M mem=512M@512M" +#define V_PROMPT "Tegra2 (Harmony) # " +#define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Harmony" + +/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA2_ENABLE_UARTD 1 +#define CONFIG_TEGRA2_ENABLE_UARTA 0 + +/* UARTD: keyboard satellite board uart, default */ +#define CONFIG_SYS_NS16550_COM1NV_P
[U-Boot] [PATCH V4 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
Signed-off-by: Tom Warren --- Changes for V2: - Coding style cleanup - Move serial driver changes to separate patch - Use board/nvidia instead of board/tegra - Remove TRUE/FALSE defines - Use standard NS16550 registers/bit defines in UART init Changes for V3: - Use I/O accessors for Tegra2 HW MMIO register access - Allow conditional compile of UARTA/UARTD code to save space Changes for V4: - Use address of HW structs (&pmc, etc.) in readl/writel - Remove empty lines, fix mixed case hex #s & comments in header(s) - Move board/nvidia/common/board.c UART code & header to arch/arm/cpu/armv7/tegra2/ - Declare internal functions as static in UART code arch/arm/cpu/armv7/tegra2/Makefile | 48 ++ arch/arm/cpu/armv7/tegra2/board.c| 91 +++ arch/arm/cpu/armv7/tegra2/board.h| 58 +++ arch/arm/cpu/armv7/tegra2/config.mk | 28 arch/arm/cpu/armv7/tegra2/lowlevel_init.S| 65 arch/arm/cpu/armv7/tegra2/sys_info.c | 35 arch/arm/cpu/armv7/tegra2/timer.c| 122 +++ arch/arm/cpu/armv7/tegra2/uart.c | 216 ++ arch/arm/include/asm/arch-tegra2/clk_rst.h | 154 ++ arch/arm/include/asm/arch-tegra2/pinmux.h| 51 ++ arch/arm/include/asm/arch-tegra2/pmc.h | 124 +++ arch/arm/include/asm/arch-tegra2/sys_proto.h | 33 arch/arm/include/asm/arch-tegra2/tegra2.h| 49 ++ arch/arm/include/asm/arch-tegra2/uart.h | 44 ++ board/nvidia/common/board.c | 57 +++ 15 files changed, 1175 insertions(+), 0 deletions(-) create mode 100644 arch/arm/cpu/armv7/tegra2/Makefile create mode 100644 arch/arm/cpu/armv7/tegra2/board.c create mode 100644 arch/arm/cpu/armv7/tegra2/board.h create mode 100644 arch/arm/cpu/armv7/tegra2/config.mk create mode 100644 arch/arm/cpu/armv7/tegra2/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/tegra2/sys_info.c create mode 100644 arch/arm/cpu/armv7/tegra2/timer.c create mode 100644 arch/arm/cpu/armv7/tegra2/uart.c create mode 100644 arch/arm/include/asm/arch-tegra2/clk_rst.h create mode 100644 arch/arm/include/asm/arch-tegra2/pinmux.h create mode 100644 arch/arm/include/asm/arch-tegra2/pmc.h create mode 100644 arch/arm/include/asm/arch-tegra2/sys_proto.h create mode 100644 arch/arm/include/asm/arch-tegra2/tegra2.h create mode 100644 arch/arm/include/asm/arch-tegra2/uart.h create mode 100644 board/nvidia/common/board.c diff --git a/arch/arm/cpu/armv7/tegra2/Makefile b/arch/arm/cpu/armv7/tegra2/Makefile new file mode 100644 index 000..f5b657b --- /dev/null +++ b/arch/arm/cpu/armv7/tegra2/Makefile @@ -0,0 +1,48 @@ +# +# (C) Copyright 2010,2011 Nvidia Corporation. +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(SOC).o + +SOBJS := lowlevel_init.o +COBJS := board.o sys_info.o timer.o uart.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) + +all:$(obj).depend $(LIB) + +$(LIB):$(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/arch/arm/cpu/armv7/tegra2/board.c b/arch/arm/cpu/armv7/tegra2/board.c new file mode 100644 index 000..816a8cd --- /dev/null +++ b/arch/arm/cpu/armv7/tegra2/board.c @@ -0,0 +1,91 @@ +/* + * (C) Copyright 2010,2011 + * NVIDIA Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hop
[U-Boot] [PATCH V4 2/4] serial: Add Tegra2 serial port support
Signed-off-by: Tom Warren --- Changes for V2: - Move serial driver to separate patch common/serial.c |3 ++- include/serial.h |3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/common/serial.c b/common/serial.c index 051ae4e..8ebf9a5 100644 --- a/common/serial.c +++ b/common/serial.c @@ -41,7 +41,8 @@ struct serial_device *__default_serial_console (void) #elif defined(CONFIG_4xx) \ || defined(CONFIG_MB86R0x) || defined(CONFIG_MPC5xxx) \ || defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) \ - || defined(CONFIG_MPC86xx) || defined(CONFIG_SYS_SC520) + || defined(CONFIG_MPC86xx) || defined(CONFIG_SYS_SC520) \ + || defined(CONFIG_TEGRA2) #if defined(CONFIG_CONS_INDEX) && defined(CONFIG_SYS_NS16550_SERIAL) #if (CONFIG_CONS_INDEX==1) return &eserial1_device; diff --git a/include/serial.h b/include/serial.h index 15ab73c..f21d961 100644 --- a/include/serial.h +++ b/include/serial.h @@ -27,7 +27,8 @@ extern struct serial_device * default_serial_console (void); defined(CONFIG_405EP) || defined(CONFIG_405EZ) || defined(CONFIG_405EX) || \ defined(CONFIG_MB86R0x) || defined(CONFIG_MPC5xxx) || \ defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \ -defined(CONFIG_MPC86xx) || defined(CONFIG_SYS_SC520) +defined(CONFIG_MPC86xx) || defined(CONFIG_SYS_SC520) || \ +defined(CONFIG_TEGRA2) extern struct serial_device serial0_device; extern struct serial_device serial1_device; #if defined(CONFIG_SYS_NS16550_SERIAL) -- 1.7.3.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] powerpc-linux-gnu-ld: Warning: lib_powerpc/fpu/libpostpowerpcfpu.o uses hard float, libpost.o uses soft float
On Jan 20, 2011, at 3:06 PM, Scott Wood wrote: > On Thu, 20 Jan 2011 14:59:02 -0600 > Timur Tabi wrote: > >> Scott Wood wrote: >> >>> I'm not sure what you mean by "Kumar's >>> repository" (u-boot-mpc85xx.git?), >> >> Yes. >> >> but there hasn't been a >>> "lib_powerpc" for a while now. >> >> Then what's this: >> >> http://git.denx.de/?p=u-boot/u-boot-mpc85xx.git;a=tree;f=post/lib_powerpc;h=0cccba6be270011a259aef734f2637e8d72ec7a1;hb=master > > Ah. "post/" was stripped off the name in the error message, so I > didn't look there. The message is because the post FP code has real FP instructions (in asm I think) but we build -msoft-float - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
On Fri, Jan 21, 2011 at 9:50 AM, Wolfgang Denk wrote:
> Dear Tom Warren,
>
> In message you
> wrote:
>>
>> I'll take a look at the ARM asm code generated, but you are probably right.
>> But shouldn't the compiler have complained if I wasn't passing the
>> struct address?
>
> I'm surprised about this, too. But then, current mainline code still
> has the horrible "(*(volatile unsigned int *)(a) = (v))" definition,
> so the cast will eat all potential warnings :-(
>
Yes, I noticed this with x86 - I can do something like the following
without the compiler warning me:
typdef struct blah {
u32 foo;
u16 bar;
} blah_t;
blah_t *fred = 0x1000;
writel(1, &fred->foo);
writel(1, &fred->bar);
writew(1, &fred->foo);
writew(1, &fred->bar);
This is particularly nasty with the sc520's Memory Mapped Control
Registers - I have found a few here and there where longs were being
written to words and visa-versa
Regards,
Graeme
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Re: [U-Boot] USB storage performance EHCI question - ext2fs performance
I now have some more information on the performance issue. It appears to be filesystem related. If I format the drive as FAT32 I am getting a transfer rate of approximately 10MB/second. However, if I format it as ext3 I am seeing a transfer rate of only 101KB/second! The only difference is the filesystem and both are clean filesystems. I formatted the drive with: mkfs.ext3 -j -L iomega -O dir_index,has_journal,large_file -t ext3 -v /dev/sdc1 mke2fs 1.41.11 (14-Mar-2010) fs_types for mke2fs.conf resolution: 'ext3', 'default' Calling BLKDISCARD from 0 to 1014095872 failed. Filesystem label=iomega OS type: Linux Block size=4096 (log=2) Fragment size=4096 (log=2) Stride=0 blocks, Stripe width=0 blocks 61952 inodes, 247582 blocks 12379 blocks (5.00%) reserved for the super user First data block=0 Maximum filesystem blocks=255852544 8 block groups 32768 blocks per group, 32768 fragments per group 7744 inodes per group Superblock backups stored on blocks: 32768, 98304, 163840, 229376 Writing inode tables: done Creating journal (4096 blocks): done Writing superblocks and filesystem accounting information: done This filesystem will be automatically checked every 35 mounts or 180 days, whichever comes first. Use tune2fs -c or -i to override. -Aaron On Friday, January 14, 2011 01:19:04 am Wolfgang Denk wrote: > Dear Aaron Williams, > > please always keep the ML on cc: > > In message <4d2fa7f0.7020...@caviumnetworks.com> you wrote: > > It is based off of 2010.09 but I have applied all of the latest USB > > updates from GIT with the exception of the multiple LUN support (this > > breaks the SanDisk Cruzer because the Cruzer reports max lun=1). All > > caches are enabled and this is on a 1.2GHz MIPS which is cache-coherent > > (no need to flush/invalidate). > > Maybe there are other issues with your code. It's hard to comment on > onknown out-of-tree ports. > > Best regards, > > Wolfgang Denk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] DaVinci: Fix DM365 & DM644X build error
> > Seems this is already fixed by commit > 51861a953aa10fde5c861ca022f0833f326e3041 which is in u-boot-ti/master, > right? > Yes that is correct I believe. Before my vacation I was getting the entire Davinci series of SOCs compiling as they were broken for various reasons and this is one of the fixes I had made IIRC. This commit should be in u-boot-arm/master as well --Sandeep ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
Dear Tom Warren, In message you wrote: > > I run checkpatch.pl (v 0.31) on every patch before I submit it, and I > did see 12 warnings but > no errors. The warnings were minor - new typedefs and volatile > structs. Could you please > provide the text of the checkpatch.pl output so I can see what the > errors might be? Sorry for the false alarms, I was using an older version of checkpatch. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de It took him several minutes to understand any new idea put to him, and this is a very valuable trait in a leader, because anything any- one is still trying to explain to you after two minutes is probably important and anything they give up after a mere minute or so is al- most certainly something they shouldn't have been bothering you with in the first place. - Terry Pratchett, _Reaper Man_ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
Dear Tom Warren, In message you wrote: > > I'll take a look at the ARM asm code generated, but you are probably right. > But shouldn't the compiler have complained if I wasn't passing the > struct address? I'm surprised about this, too. But then, current mainline code still has the horrible "(*(volatile unsigned int *)(a) = (v))" definition, so the cast will eat all potential warnings :-( Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de "...all the good computer designs are bootlegged; the formally planned products, if they are built at all, are dogs!" - David E. Lundstrom, "A Few Good Men From Univac", MIT Press, 1987 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
Dear Tom Warren, In message you wrote: ... > > Are all these uart functions board-specific? They look more > > CPU-specific. If that's the case they should be moved somewhere in > > arch/arm/*. Other boards that use the Tegra2 don't want to duplicate > > this code or link into Nvidia's board/nvidia directory. > It's Tegra2 SoC-specific - that's not the CPU, per se. I guess I could move > it to arch/arm/cpu/armv7/tegra2, if you think it's important enough. Yes, please do. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Q: How many DEC repairman does it take to fix a flat ? A: Five; four to hold the car up and one to swap tires. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] DaVinci: Fix DM365 & DM644X build error
Le 20/01/2011 12:27, Mohammed Afzal a écrit :
> DM365& DM644X builds 'davinci_emac_mii_mode_sel()',
> which uses 'davinci_syscfg_regs' macro, and the
> macro is valid iff CONFIG_SOC_DA8XX is defined.
>
> Fix: Before compiling 'davinci_emac_mii_mode_sel()', make sure that
> CONFIG_SOC_DA8XX is defined.
>
> Signed-off-by: Mohammed Afzal
> ---
> board/davinci/common/misc.c |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/board/davinci/common/misc.c b/board/davinci/common/misc.c
> index 08c898f..c0a6c41 100644
> --- a/board/davinci/common/misc.c
> +++ b/board/davinci/common/misc.c
> @@ -80,7 +80,7 @@ err:
> /*
>* Set the mii mode as MII or RMII
>*/
> -#if defined(CONFIG_DRIVER_TI_EMAC)
> +#if defined(CONFIG_DRIVER_TI_EMAC)&& defined(CONFIG_SOC_DA8XX)
> void davinci_emac_mii_mode_sel(int mode_sel)
> {
> int val;
Seems this is already fixed by commit
51861a953aa10fde5c861ca022f0833f326e3041 which is in u-boot-ti/master,
right?
Amicalement,
--
Albert.
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Re: [U-Boot] [PATCH v4 7/8] imximage: Add MX53 boot image support
Le 18/01/2011 11:20, Stefano Babic a écrit : > On 01/18/2011 10:24 AM, Wolfgang Denk wrote: > >> It is not too late. I will not pull this into mainline as is. You >> can rebase your tree. > > No problem on my side. Albert should also drop this patch, because it is > already merged into u-boot-arm. I will wait for updates from Jason. Of course I was late to the dance... Stefano, did you rebase your tree? I still see this patch in your current master. > Best regards, > Stefano Babic Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] powerpc-linux-gnu-ld: Warning: lib_powerpc/fpu/libpostpowerpcfpu.o uses hard float, libpost.o uses soft float
On Thu, 20 Jan 2011 14:59:02 -0600 Timur Tabi wrote: > Scott Wood wrote: > > > I'm not sure what you mean by "Kumar's > > repository" (u-boot-mpc85xx.git?), > > Yes. > > but there hasn't been a > > "lib_powerpc" for a while now. > > Then what's this: > > http://git.denx.de/?p=u-boot/u-boot-mpc85xx.git;a=tree;f=post/lib_powerpc;h=0cccba6be270011a259aef734f2637e8d72ec7a1;hb=master Ah. "post/" was stripped off the name in the error message, so I didn't look there. Never mind. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] powerpc-linux-gnu-ld: Warning: lib_powerpc/fpu/libpostpowerpcfpu.o uses hard float, libpost.o uses soft float
Scott Wood wrote: > I'm not sure what you mean by "Kumar's > repository" (u-boot-mpc85xx.git?), Yes. but there hasn't been a > "lib_powerpc" for a while now. Then what's this: http://git.denx.de/?p=u-boot/u-boot-mpc85xx.git;a=tree;f=post/lib_powerpc;h=0cccba6be270011a259aef734f2637e8d72ec7a1;hb=master > Assuming you're trying to build a current tree in a workspace that > hasn't been used in a while, try "make clean", or possbly "git clean -f > -x -d" to be really sure. This is from a freshly cloned tree. I'm running git bisect now. 2010.12-rc1 works -- Timur Tabi Linux kernel developer at Freescale ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] remove (double) LED initialization in arm920t start.s
Le 18/12/2010 13:08, Jens Scharsig a écrit : > * remove LED initialization in front of relocation and bss init > > Signed-off-by: Jens Scharsig > --- > > * prevents run C function on an uninitialized environment > > arch/arm/cpu/arm920t/start.S |3 --- > 1 files changed, 0 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S > index 08f178d..764a06a 100644 > --- a/arch/arm/cpu/arm920t/start.S > +++ b/arch/arm/cpu/arm920t/start.S > @@ -119,9 +119,6 @@ start_code: > orr r0, r0, #0xd3 > msr cpsr, r0 > > - bl coloured_LED_init > - bl red_LED_on > - > #if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) > /* >* relocate exception table > -- 1.7.1 Applied to U-boot-arm, thanks. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] powerpc-linux-gnu-ld: Warning: lib_powerpc/fpu/libpostpowerpcfpu.o uses hard float, libpost.o uses soft float
On Thu, 20 Jan 2011 14:37:35 -0600
Timur Tabi wrote:
> I'm trying to build Kumar's repository, and I'm getting this error. Is anyone
> else seeing this?
>
> $ make P4080DS_config
> awk '(NF && $1 !~ /^#/) { print $1 ": " $1 "_config; $(MAKE)" }' boards.cfg >
> .boards.depend
> Configuring for P4080DS board...
> $ make -s
> powerpc-linux-gnu-ld: Warning: lib_powerpc/fpu/libpostpowerpcfpu.o uses hard
> float, libpost.o uses soft float
I'm not sure what you mean by "Kumar's
repository" (u-boot-mpc85xx.git?), but there hasn't been a
"lib_powerpc" for a while now.
Assuming you're trying to build a current tree in a workspace that
hasn't been used in a while, try "make clean", or possbly "git clean -f
-x -d" to be really sure.
-Scott
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Re: [U-Boot] [PATCH] arm926ejs: timer: Replace bss variable by gdr
Le 20/01/2011 21:43, Albert ARIBAUD a écrit :
> Le 10/12/2010 10:33, Heiko Schocher a écrit :
>> Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss
>> values in the arm926ejs timers implementation.
>>
>> The usage of bss values in drivers before initialisation of bss is forbidden.
>> In that special case some data in .rel.dyn gets corrupted.
>>
>> This patch is similiar to the patch Dirk Behme posted
>> for the armv7/omap-common/timer.c and added suggestions
>> from Reinhard Meyer.
>>
>> Tested on the arm926ejs mx27 based magnesium board
>> Tested on the arm926ejs kirkwood based suen3 board
>>
>> Signed-off-by: Heiko Schocher
>> cc: Albert ARIBAUD
>> cc: Prafulla Wadaskar
>> cc: Stefano Babic
>> cc: Reinhard Meyer
>>
>> Signed-off-by: Heiko Schocher
>> ---
>>arch/arm/cpu/arm926ejs/davinci/timer.c |6 --
>>arch/arm/cpu/arm926ejs/kirkwood/timer.c |6 --
>>arch/arm/cpu/arm926ejs/mb86r0x/timer.c |6 --
>>arch/arm/cpu/arm926ejs/mx25/timer.c |6 --
>>arch/arm/cpu/arm926ejs/mx27/timer.c |6 --
>>arch/arm/cpu/arm926ejs/omap/timer.c |6 --
>>arch/arm/cpu/arm926ejs/orion5x/timer.c |6 --
>>arch/arm/cpu/arm926ejs/spear/timer.c |6 --
>>arch/arm/cpu/arm926ejs/versatile/timer.c |6 --
>>9 files changed, 36 insertions(+), 18 deletions(-)
>>
>> diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c
>> b/arch/arm/cpu/arm926ejs/davinci/timer.c
>> index 9da7443..d7b1e46 100644
>> --- a/arch/arm/cpu/arm926ejs/davinci/timer.c
>> +++ b/arch/arm/cpu/arm926ejs/davinci/timer.c
>> @@ -60,8 +60,10 @@ static struct davinci_timer * const timer =
>>#define TIMER_LOAD_VAL(CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)
>>#define TIM_CLK_DIV 16
>>
>> -static ulong timestamp;
>> -static ulong lastinc;
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +#define timestamp gd->tbl
>> +#define lastinc gd->lastinc
>>
>>int timer_init(void)
>>{
>> diff --git a/arch/arm/cpu/arm926ejs/kirkwood/timer.c
>> b/arch/arm/cpu/arm926ejs/kirkwood/timer.c
>> index 2ec6a93..3e80329 100644
>> --- a/arch/arm/cpu/arm926ejs/kirkwood/timer.c
>> +++ b/arch/arm/cpu/arm926ejs/kirkwood/timer.c
>> @@ -83,8 +83,10 @@ struct kwtmr_registers *kwtmr_regs = (struct
>> kwtmr_registers *)KW_TIMER_BASE;
>>#define READ_TIMER
>> (readl(CNTMR_VAL_REG(UBOOT_CNTR)) / \
>> (CONFIG_SYS_TCLK / 1000))
>>
>> -static ulong timestamp;
>> -static ulong lastdec;
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +#define timestamp gd->tbl
>> +#define lastdec gd->lastinc
>>
>>void reset_timer_masked(void)
>>{
>> diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
>> b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
>> index 9175b71..6966b0d 100644
>> --- a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
>> +++ b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
>> @@ -33,8 +33,10 @@
>>#define TIMER_LOAD_VAL0x
>>#define TIMER_FREQ(CONFIG_MB86R0x_IOCLK / 256)
>>
>> -static unsigned long long timestamp;
>> -static ulong lastdec;
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +#define timestamp gd->tbl
>> +#define lastdec gd->lastinc
>>
>>static inline unsigned long long tick_to_time(unsigned long long tick)
>>{
>> diff --git a/arch/arm/cpu/arm926ejs/mx25/timer.c
>> b/arch/arm/cpu/arm926ejs/mx25/timer.c
>> index 11d41a8..14f0c2d 100644
>> --- a/arch/arm/cpu/arm926ejs/mx25/timer.c
>> +++ b/arch/arm/cpu/arm926ejs/mx25/timer.c
>> @@ -41,8 +41,10 @@
>>#include
>>#include
>>
>> -static ulong timestamp;
>> -static ulong lastinc;
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +#define timestamp gd->tbl
>> +#define lastinc gd->lastinc
>>
>>/*
>> * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
>> diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c
>> b/arch/arm/cpu/arm926ejs/mx27/timer.c
>> index 8f1d47b..5c1cf01 100644
>> --- a/arch/arm/cpu/arm926ejs/mx27/timer.c
>> +++ b/arch/arm/cpu/arm926ejs/mx27/timer.c
>> @@ -43,8 +43,10 @@
>>#define GPTCR_CLKSOURCE_32(4<< 1) /* Clock source
>> */
>>#define GPTCR_TEN 1 /* Timer enable */
>>
>> -static ulong timestamp;
>> -static ulong lastinc;
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +#define timestamp gd->tbl
>> +#define lastinc gd->lastinc
>>
>>/*
>> * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
>> diff --git a/arch/arm/cpu/arm926ejs/omap/timer.c
>> b/arch/arm/cpu/arm926ejs/omap/timer.c
>> index 7d4b6e6..88a0ee6 100644
>> --- a/arch/arm/cpu/arm926ejs/omap/timer.c
>> +++ b/arch/arm/cpu/arm926ejs/omap/timer.c
>> @@ -42,8 +42,10 @@
>>/* macro to read the 32 bit timer */
>>#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8))
>>
>> -static ulong timestamp;
>> -static ulong lastdec;
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +#define timestamp gd->tbl
>> +#define lastdec gd->lastinc
>>
>>int timer_init (void)
>>{
>> diff --git a/arch/arm/cpu/arm926ejs/o
Re: [U-Boot] [PATCH] arm926ejs: timer: Replace bss variable by gdr
Le 10/12/2010 10:33, Heiko Schocher a écrit :
> Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss
> values in the arm926ejs timers implementation.
>
> The usage of bss values in drivers before initialisation of bss is forbidden.
> In that special case some data in .rel.dyn gets corrupted.
>
> This patch is similiar to the patch Dirk Behme posted
> for the armv7/omap-common/timer.c and added suggestions
> from Reinhard Meyer.
>
> Tested on the arm926ejs mx27 based magnesium board
> Tested on the arm926ejs kirkwood based suen3 board
>
> Signed-off-by: Heiko Schocher
> cc: Albert ARIBAUD
> cc: Prafulla Wadaskar
> cc: Stefano Babic
> cc: Reinhard Meyer
>
> Signed-off-by: Heiko Schocher
> ---
> arch/arm/cpu/arm926ejs/davinci/timer.c |6 --
> arch/arm/cpu/arm926ejs/kirkwood/timer.c |6 --
> arch/arm/cpu/arm926ejs/mb86r0x/timer.c |6 --
> arch/arm/cpu/arm926ejs/mx25/timer.c |6 --
> arch/arm/cpu/arm926ejs/mx27/timer.c |6 --
> arch/arm/cpu/arm926ejs/omap/timer.c |6 --
> arch/arm/cpu/arm926ejs/orion5x/timer.c |6 --
> arch/arm/cpu/arm926ejs/spear/timer.c |6 --
> arch/arm/cpu/arm926ejs/versatile/timer.c |6 --
> 9 files changed, 36 insertions(+), 18 deletions(-)
>
> diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c
> b/arch/arm/cpu/arm926ejs/davinci/timer.c
> index 9da7443..d7b1e46 100644
> --- a/arch/arm/cpu/arm926ejs/davinci/timer.c
> +++ b/arch/arm/cpu/arm926ejs/davinci/timer.c
> @@ -60,8 +60,10 @@ static struct davinci_timer * const timer =
> #define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)
> #define TIM_CLK_DIV 16
>
> -static ulong timestamp;
> -static ulong lastinc;
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define timestamp gd->tbl
> +#define lastinc gd->lastinc
>
> int timer_init(void)
> {
> diff --git a/arch/arm/cpu/arm926ejs/kirkwood/timer.c
> b/arch/arm/cpu/arm926ejs/kirkwood/timer.c
> index 2ec6a93..3e80329 100644
> --- a/arch/arm/cpu/arm926ejs/kirkwood/timer.c
> +++ b/arch/arm/cpu/arm926ejs/kirkwood/timer.c
> @@ -83,8 +83,10 @@ struct kwtmr_registers *kwtmr_regs = (struct
> kwtmr_registers *)KW_TIMER_BASE;
> #define READ_TIMER (readl(CNTMR_VAL_REG(UBOOT_CNTR)) /
> \
>(CONFIG_SYS_TCLK / 1000))
>
> -static ulong timestamp;
> -static ulong lastdec;
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define timestamp gd->tbl
> +#define lastdec gd->lastinc
>
> void reset_timer_masked(void)
> {
> diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
> b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
> index 9175b71..6966b0d 100644
> --- a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
> +++ b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
> @@ -33,8 +33,10 @@
> #define TIMER_LOAD_VAL 0x
> #define TIMER_FREQ (CONFIG_MB86R0x_IOCLK / 256)
>
> -static unsigned long long timestamp;
> -static ulong lastdec;
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define timestamp gd->tbl
> +#define lastdec gd->lastinc
>
> static inline unsigned long long tick_to_time(unsigned long long tick)
> {
> diff --git a/arch/arm/cpu/arm926ejs/mx25/timer.c
> b/arch/arm/cpu/arm926ejs/mx25/timer.c
> index 11d41a8..14f0c2d 100644
> --- a/arch/arm/cpu/arm926ejs/mx25/timer.c
> +++ b/arch/arm/cpu/arm926ejs/mx25/timer.c
> @@ -41,8 +41,10 @@
> #include
> #include
>
> -static ulong timestamp;
> -static ulong lastinc;
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define timestamp gd->tbl
> +#define lastinc gd->lastinc
>
> /*
>* "time" is measured in 1 / CONFIG_SYS_HZ seconds,
> diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c
> b/arch/arm/cpu/arm926ejs/mx27/timer.c
> index 8f1d47b..5c1cf01 100644
> --- a/arch/arm/cpu/arm926ejs/mx27/timer.c
> +++ b/arch/arm/cpu/arm926ejs/mx27/timer.c
> @@ -43,8 +43,10 @@
> #define GPTCR_CLKSOURCE_32 (4<< 1)/* Clock source */
> #define GPTCR_TEN 1 /* Timer enable */
>
> -static ulong timestamp;
> -static ulong lastinc;
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define timestamp gd->tbl
> +#define lastinc gd->lastinc
>
> /*
>* "time" is measured in 1 / CONFIG_SYS_HZ seconds,
> diff --git a/arch/arm/cpu/arm926ejs/omap/timer.c
> b/arch/arm/cpu/arm926ejs/omap/timer.c
> index 7d4b6e6..88a0ee6 100644
> --- a/arch/arm/cpu/arm926ejs/omap/timer.c
> +++ b/arch/arm/cpu/arm926ejs/omap/timer.c
> @@ -42,8 +42,10 @@
> /* macro to read the 32 bit timer */
> #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8))
>
> -static ulong timestamp;
> -static ulong lastdec;
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define timestamp gd->tbl
> +#define lastdec gd->lastinc
>
> int timer_init (void)
> {
> diff --git a/arch/arm/cpu/arm926ejs/orion5x/timer.c
> b/arch/arm/cpu/arm926ejs/orion5x/timer.c
> index 089ef47..bbab226 100644
> --- a/arch/arm/cpu/arm926ejs/orion5x/timer.c
> +++ b/arch/arm/cpu/arm926ejs/orion5x/timer.c
> @@ -90,8 +90,10 @@ static inline ulong read_timer(void)
>
[U-Boot] powerpc-linux-gnu-ld: Warning: lib_powerpc/fpu/libpostpowerpcfpu.o uses hard float, libpost.o uses soft float
I'm trying to build Kumar's repository, and I'm getting this error. Is anyone
else seeing this?
$ make P4080DS_config
awk '(NF && $1 !~ /^#/) { print $1 ": " $1 "_config; $(MAKE)" }' boards.cfg >
.boards.depend
Configuring for P4080DS board...
$ make -s
powerpc-linux-gnu-ld: Warning: lib_powerpc/fpu/libpostpowerpcfpu.o uses hard
float, libpost.o uses soft float
--
Timur Tabi
Linux kernel developer at Freescale
___
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Re: [U-Boot] [PATCH] arm1136: timer: Replace bss variable by gd
Le 19/12/2010 09:45, Heiko Schocher a écrit : > Hello Wolfgang, > > Wolfgang Denk wrote: >> Dear Albert& Heiko, >> >> In message<4d01e031.3090...@free.fr> you wrote: Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in the arm1136 timer driver for mx31 and omap24xx The usage of bss values in drivers before initialisation of bss is forbid> den. In that special case some data in .rel.dyn gets corrupted. This patch is similiar to the patch Dirk Behme posted for the armv7/omap-common/timer.c Tested on the mx31 based qong board Signed-off-by: Heiko Schocher cc: Albert ARIBAUD >>> FWIW, >>> >>> Acked-by: Albert ARIBAUD >> >> Should I pull this into v2010.12, or should we rather wait for amore >> general solution and fix it in the next release? > > I vote for pulling this into the v2010.12 release, beause it is a > bugfix and we get a working code with elf relocation(conceding the > patch is not a perfekt solution, but working) > > bye, > Heiko Applied to u-boot-arm, thanks and apologies for the late action. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/1] ARM: */start.S: code cleanup
Le 18/01/2011 08:27, Andreas Bießmann a écrit : > Dear Jason Liu, > Dear Albert Aribaud, > > Am 17.01.2011 um 20:54 schrieb Jason Liu: > >> Hi, Albert, >> >> 2010/12/23 Jason Liu: >>> Remove the useless code from start.S >>> >>> Signed-off-by: Jason Liu >>> >>> --- >>> Changes for v2: >>> -Address the comments from Albert to make changes to all >>> ARM cpus with one single patch >>> --- > >>> arch/arm/cpu/arm920t/start.S |2 -- > >> Any feedback about this patch? > > Tested-by: Andreas Bießmann Applied to u-boot-arm, thanks -- and apologies for the backlogging. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V4 11/11] Add support for Freescale's mx35pdk board.
The patch adds suupport for the Freescale's mx35pdk board (known as well as mx35_3stack). The board boots from the NOR flash. Following devices are supported: - two ethernet devices (FEC and SMC911x on debug board) - I2C - PMIC (MC13892) via I2C interface - UART - NOR flash (64MB) - NAND flash (2GB) - basic access to mc9sdz60 registers via I2C interface Signed-off-by: Stefano Babic --- Please ignore V3 of this patch : the board version was not correctly printed. Sorry for noise. Changes: Wolfgang Denk: - replace board_detect with a more correct name - use the output of get_board_rev to print the board revision - remove leading spaces from lowlevel_init.S MAINTAINERS |3 +- board/freescale/mx35pdk/Makefile| 49 board/freescale/mx35pdk/lowlevel_init.S | 363 +++ board/freescale/mx35pdk/mx35pdk.c | 298 + board/freescale/mx35pdk/mx35pdk.h | 101 + boards.cfg |1 + doc/README.mx35pdk | 188 include/configs/mx35pdk.h | 303 ++ 8 files changed, 1305 insertions(+), 1 deletions(-) create mode 100644 board/freescale/mx35pdk/Makefile create mode 100644 board/freescale/mx35pdk/lowlevel_init.S create mode 100644 board/freescale/mx35pdk/mx35pdk.c create mode 100644 board/freescale/mx35pdk/mx35pdk.h create mode 100644 doc/README.mx35pdk create mode 100644 include/configs/mx35pdk.h diff --git a/MAINTAINERS b/MAINTAINERS index 79aa596..0c3ddc1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -552,9 +552,10 @@ Rowel Atienza Stefano Babic ea20davinci + mx35pdk i.MX35 + mx51evk i.MX51 polaris xscale trizepsiv xscale - mx51evk i.MX51 vision2 i.MX51 Jason Liu diff --git a/board/freescale/mx35pdk/Makefile b/board/freescale/mx35pdk/Makefile new file mode 100644 index 000..b4a60d6 --- /dev/null +++ b/board/freescale/mx35pdk/Makefile @@ -0,0 +1,49 @@ +# +# Copyright (C) 2007, Guennadi Liakhovetski +# +# (C) Copyright 2008-2009 Freescale Semiconductor, Inc. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS := mx35pdk.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/freescale/mx35pdk/lowlevel_init.S b/board/freescale/mx35pdk/lowlevel_init.S new file mode 100644 index 000..8715c8c --- /dev/null +++ b/board/freescale/mx35pdk/lowlevel_init.S @@ -0,0 +1,363 @@ +/* + * Copyright (C) 2007, Guennadi Liakhovetski + * + * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include "mx35pdk.h" + +/* + * return soc version + * 0x10: TO1 + * 0x20: TO2 + * 0x30: TO3 + */ +.macro check_soc_version ret, tmp + ldr \tmp, =IIM_BASE_ADDR + ldr \ret, [\tmp, #IIM_SREV] + cmp \
[U-Boot] [PATCH V3 11/11] Add support for Freescale's mx35pdk board.
The patch adds suupport for the Freescale's mx35pdk board (known as well as mx35_3stack). The board boots from the NOR flash. Following devices are supported: - two ethernet devices (FEC and SMC911x on debug board) - I2C - PMIC (MC13892) via I2C interface - UART - NOR flash (64MB) - NAND flash (2GB) - basic access to mc9sdz60 registers via I2C interface Signed-off-by: Stefano Babic --- Changes: Wolfgang Denk: - replace board_detect with a more correct name - use the output of get_board_rev to print the board revision - remove leading spaces from lowlevel_init.S MAINTAINERS |3 +- board/freescale/mx35pdk/Makefile| 49 board/freescale/mx35pdk/lowlevel_init.S | 363 +++ board/freescale/mx35pdk/mx35pdk.c | 300 + board/freescale/mx35pdk/mx35pdk.h | 101 + boards.cfg |1 + doc/README.mx35pdk | 188 include/configs/mx35pdk.h | 303 ++ 8 files changed, 1307 insertions(+), 1 deletions(-) create mode 100644 board/freescale/mx35pdk/Makefile create mode 100644 board/freescale/mx35pdk/lowlevel_init.S create mode 100644 board/freescale/mx35pdk/mx35pdk.c create mode 100644 board/freescale/mx35pdk/mx35pdk.h create mode 100644 doc/README.mx35pdk create mode 100644 include/configs/mx35pdk.h diff --git a/MAINTAINERS b/MAINTAINERS index 79aa596..0c3ddc1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -552,9 +552,10 @@ Rowel Atienza Stefano Babic ea20davinci + mx35pdk i.MX35 + mx51evk i.MX51 polaris xscale trizepsiv xscale - mx51evk i.MX51 vision2 i.MX51 Jason Liu diff --git a/board/freescale/mx35pdk/Makefile b/board/freescale/mx35pdk/Makefile new file mode 100644 index 000..b4a60d6 --- /dev/null +++ b/board/freescale/mx35pdk/Makefile @@ -0,0 +1,49 @@ +# +# Copyright (C) 2007, Guennadi Liakhovetski +# +# (C) Copyright 2008-2009 Freescale Semiconductor, Inc. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS := mx35pdk.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/freescale/mx35pdk/lowlevel_init.S b/board/freescale/mx35pdk/lowlevel_init.S new file mode 100644 index 000..8715c8c --- /dev/null +++ b/board/freescale/mx35pdk/lowlevel_init.S @@ -0,0 +1,363 @@ +/* + * Copyright (C) 2007, Guennadi Liakhovetski + * + * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include "mx35pdk.h" + +/* + * return soc version + * 0x10: TO1 + * 0x20: TO2 + * 0x30: TO3 + */ +.macro check_soc_version ret, tmp + ldr \tmp, =IIM_BASE_ADDR + ldr \ret, [\tmp, #IIM_SREV] + cmp \ret, #0x00 + moveq \tmp, #ROMPATCH_REV + ldreq \ret, [\tmp] + moveq \ret, \ret
[U-Boot] [PATCH V3 08/11] SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case
From: Anatolij Gustschin
We need to shift only one time in each cycle in the swapping loop
for unaligned tx case. Currently two byte shift operations are
performed in each loop cycle causing zero gaps in the transmited
data, so not all data scheduled for transmition is actually
transmited.
The proper swapping in unaligned rx case is missing, so add it
as we need to put the received data into the rx buffer in the
correct byte order.
Signed-off-by: Anatolij Gustschin
Tested-by: Stefano Babic
---
Changes:
- code styling
drivers/spi/mxc_spi.c |9 -
1 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index 5670714..dadf228 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -372,9 +372,8 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int
bitlen,
/* Buffer is not 32-bit aligned */
if ((unsigned long)dout & 0x03) {
data = 0;
- for (i = 0; i < 4; i++, data <<= 8) {
+ for (i = 0; i < 4; i++)
data = (data << 8) | (*dout++ & 0xFF);
- }
} else {
data = *(u32 *)dout;
data = cpu_to_be32(data);
@@ -405,11 +404,11 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int
bitlen,
if (bitlen % 32) {
data = reg_read(mxcs->base + MXC_CSPIRXDATA);
cnt = (bitlen % 32) / 8;
+ data = cpu_to_be32(data) >> ((sizeof(data) - cnt) * 8);
debug("SPI Rx unaligned: 0x%x\n", data);
if (din) {
- for (i = 0; i < cnt; i++, data >>= 8) {
- *din++ = data & 0xFF;
- }
+ memcpy(din, &data, cnt);
+ din += cnt;
}
nbytes -= cnt;
}
--
1.7.1
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[U-Boot] [PATCH V3 05/11] I2C: mxc_i2c: address failure with mx35 processor
There is sporadic failures when more as one I2C slave
is on the bus and the processor tries to communicate
with more as one slave.
The problem was seen on a mx35pdk (two I2C slaves,
PMIC controller and CAN/RTC chip).
The current driver uses the IIF bit in the status register
to check if the bus is busy or not. According to the manual,
this is not correct, because the IIB bit should be checked.
Not only, to check if a transfer is finished must be checked
the ICF bit, and this is not tested at all.
This patch comes from analyse with a corresponding driver
provided by Freescale as part of the LTIB tool. Comparing
the two drivers, it appears that the current u-boot driver checks
the wrong bits, and depending on race condition, the transfer
can be successful or not.
The patch gets rid also of own debug function (DPRINTF),
replaced with the general debug().
Tested on Freescale mx35pdk.
Signed-off-by: Stefano Babic
CC: Heiko Schocher
---
Changes:
Wolfgang Denk:
- change commit message explaining the problem
and the changes
- describe in commit message the drop of DPRINTF
drivers/i2c/mxc_i2c.c | 86 ++--
1 files changed, 68 insertions(+), 18 deletions(-)
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index fd6db18..c5ec486 100755
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -72,11 +72,8 @@
#error "define CONFIG_SYS_I2C_MX_PORTx to use the mx I2C driver"
#endif
-#ifdef DEBUG
-#define DPRINTF(args...) printf(args)
-#else
-#define DPRINTF(args...)
-#endif
+#define I2C_MAX_TIMEOUT1
+#define I2C_MAX_RETRIES3
static u16 div[] = { 30, 32, 36, 42, 48, 52, 60, 72, 80, 88, 104, 128, 144,
160, 192, 240, 288, 320, 384, 480, 576, 640, 768, 960,
@@ -116,31 +113,61 @@ void i2c_init(int speed, int unused)
i2c_reset();
}
+static int wait_idle(void)
+{
+ int timeout = I2C_MAX_TIMEOUT;
+
+ while ((readw(I2C_BASE + I2SR) & I2SR_IBB) && --timeout) {
+ writew(0, I2C_BASE + I2SR);
+ udelay(1);
+ }
+ return timeout ? timeout : (!(readw(I2C_BASE + I2SR) & I2SR_IBB));
+}
+
static int wait_busy(void)
{
- int timeout = 1;
+ int timeout = I2C_MAX_TIMEOUT;
- while (!(readw(I2C_BASE + I2SR) & I2SR_IIF) && --timeout)
+ while (!(readw(I2C_BASE + I2SR) & I2SR_IBB) && --timeout)
udelay(1);
writew(0, I2C_BASE + I2SR); /* clear interrupt */
return timeout;
}
+static int wait_complete(void)
+{
+ int timeout = I2C_MAX_TIMEOUT;
+
+ while ((!(readw(I2C_BASE + I2SR) & I2SR_ICF)) && (--timeout)) {
+ writew(0, I2C_BASE + I2SR);
+ udelay(1);
+ }
+ udelay(200);
+
+ writew(0, I2C_BASE + I2SR); /* clear interrupt */
+
+ return timeout;
+}
+
+
static int tx_byte(u8 byte)
{
writew(byte, I2C_BASE + I2DR);
- if (!wait_busy() || readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)
+ if (!wait_complete() || readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)
return -1;
return 0;
}
-static int rx_byte(void)
+static int rx_byte(int last)
{
- if (!wait_busy())
+ if (!wait_complete())
return -1;
+ if (last)
+ writew(I2CR_IEN, I2C_BASE + I2CR);
+
return readw(I2C_BASE + I2DR);
}
@@ -160,21 +187,45 @@ int i2c_probe(uchar chip)
static int i2c_addr(uchar chip, uint addr, int alen)
{
- writew(0, I2C_BASE + I2SR);
- writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
+ int i, retry = 0;
+ for (retry = 0; retry < 3; retry++) {
+ if (wait_idle())
+ break;
+ i2c_reset();
+ for (i = 0; i < I2C_MAX_TIMEOUT; i++)
+ udelay(1);
+ }
+ if (retry >= I2C_MAX_RETRIES) {
+ debug("%s:bus is busy(%x)\n",
+ __func__, readw(I2C_BASE + I2SR));
+ return -1;
+ }
+ writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
- if (tx_byte(chip << 1))
+ if (!wait_busy()) {
+ debug("%s:trigger start fail(%x)\n",
+ __func__, readw(I2C_BASE + I2SR));
return -1;
+ }
+ if (tx_byte(chip << 1) || (readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)) {
+ debug("%s:chip address cycle fail(%x)\n",
+ __func__, readw(I2C_BASE + I2SR));
+ return -1;
+ }
while (alen--)
- if (tx_byte((addr >> (alen * 8)) & 0xff))
+ if (tx_byte((addr >> (alen * 8)) & 0xff) ||
+ (readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)) {
+ debug("%s:device address cycle fail(%x)\n",
+ __func__, readw(I2C_BASE + I2SR));
return -1;
+ }
return 0
[U-Boot] [PATCH V3 04/11] I2C: mxc_i2c: get rid of __REG access
This driver accesses to processor's register
via __REG macros, that are removed (or are planned
to be removed) and replaced by C structures.
This patches replaces all occurrencies of __REG macros.
Signed-off-by: Stefano Babic
CC: Heiko Schocher
---
Changes:
- fix code styling issues
- replace __FUNCTION__ with __func__
drivers/i2c/mxc_i2c.c | 72 ++---
1 files changed, 44 insertions(+), 28 deletions(-)
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 7f669ff..fd6db18 100755
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -23,6 +23,7 @@
*/
#include
+#include
#if defined(CONFIG_HARD_I2C)
@@ -81,15 +82,26 @@ static u16 div[] = { 30, 32, 36, 42, 48, 52, 60, 72, 80,
88, 104, 128, 144,
160, 192, 240, 288, 320, 384, 480, 576, 640, 768, 960,
1152, 1280, 1536, 1920, 2304, 2560, 3072, 3840};
+static inline void i2c_reset(void)
+{
+ writew(0, I2C_BASE + I2CR); /* Reset module */
+ writew(0, I2C_BASE + I2SR);
+ writew(I2CR_IEN, I2C_BASE + I2CR);
+}
+
void i2c_init(int speed, int unused)
{
int freq;
int i;
#if defined(CONFIG_MX31)
+ struct clock_control_regs *sc_regs =
+ (struct clock_control_regs *)CCM_BASE;
+
freq = mx31_get_ipg_clk();
/* start the required I2C clock */
- __REG(CCM_CGR0) = __REG(CCM_CGR0) | (3 << I2C_CLK_OFFSET);
+ writel(readl(&sc_regs->cgr0) | (3 << I2C_CLK_OFFSET),
+ &sc_regs->cgr0);
#else
freq = mxc_get_clock(MXC_IPG_PERCLK);
#endif
@@ -98,30 +110,28 @@ void i2c_init(int speed, int unused)
if (freq / div[i] <= speed)
break;
- DPRINTF("%s: speed: %d\n",__FUNCTION__, speed);
+ debug("%s: speed: %d\n", __func__, speed);
- __REG16(I2C_BASE + I2CR) = 0; /* Reset module */
- __REG16(I2C_BASE + IFDR) = i;
- __REG16(I2C_BASE + I2CR) = I2CR_IEN;
- __REG16(I2C_BASE + I2SR) = 0;
+ writew(i, I2C_BASE + IFDR);
+ i2c_reset();
}
static int wait_busy(void)
{
int timeout = 1;
- while (!(__REG16(I2C_BASE + I2SR) & I2SR_IIF) && --timeout)
+ while (!(readw(I2C_BASE + I2SR) & I2SR_IIF) && --timeout)
udelay(1);
- __REG16(I2C_BASE + I2SR) = 0; /* clear interrupt */
+ writew(0, I2C_BASE + I2SR); /* clear interrupt */
return timeout;
}
static int tx_byte(u8 byte)
{
- __REG16(I2C_BASE + I2DR) = byte;
+ writew(byte, I2C_BASE + I2DR);
- if (!wait_busy() || __REG16(I2C_BASE + I2SR) & I2SR_RX_NO_AK)
+ if (!wait_busy() || readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)
return -1;
return 0;
}
@@ -131,27 +141,27 @@ static int rx_byte(void)
if (!wait_busy())
return -1;
- return __REG16(I2C_BASE + I2DR);
+ return readw(I2C_BASE + I2DR);
}
int i2c_probe(uchar chip)
{
int ret;
- __REG16(I2C_BASE + I2CR) = 0; /* Reset module */
- __REG16(I2C_BASE + I2CR) = I2CR_IEN;
+ writew(0, I2C_BASE + I2CR); /* Reset module */
+ writew(I2CR_IEN, I2C_BASE + I2CR);
- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX;
+ writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
ret = tx_byte(chip << 1);
- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MTX;
+ writew(I2CR_IEN | I2CR_MTX, I2C_BASE + I2CR);
return ret;
}
static int i2c_addr(uchar chip, uint addr, int alen)
{
- __REG16(I2C_BASE + I2SR) = 0; /* clear interrupt */
- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX;
+ writew(0, I2C_BASE + I2SR);
+ writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
if (tx_byte(chip << 1))
return -1;
@@ -167,35 +177,40 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf,
int len)
int timeout = 1;
int ret;
- DPRINTF("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",__FUNCTION__,
chip, addr, alen, len);
+ debug("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",
+ __func__, chip, addr, alen, len);
if (i2c_addr(chip, addr, alen)) {
printf("i2c_addr failed\n");
return -1;
}
- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX | I2CR_RSTA;
+ writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX | I2CR_RSTA, I2C_BASE + I2CR);
if (tx_byte(chip << 1 | 1))
return -1;
- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | ((len == 1) ?
I2CR_TX_NO_AK : 0);
+ writew(I2CR_IEN | I2CR_MSTA |
+ ((len == 1) ? I2CR_TX_NO_AK : 0),
+ I2C_BASE + I2CR);
- ret = __REG16(I2C_BASE + I2DR);
+ ret = readw(I2C_BASE + I2DR);
while (len--) {
if ((ret = rx_byte()) < 0)
return -1;
Re: [U-Boot] [PATCH v3 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
On Thu, 2011-01-20 at 09:41 -0700, Tom Warren wrote:
> On Wed, Jan 19, 2011 at 5:04 PM, Peter Tyser wrote:
> > Hi Tom,
> > Some last minutes nits:
> >
> > It looks like some of the new functions can be declared statically.
> > It'd be nice to do so where possible.
> Which functions, Peter? Please point them out specifically, thanks.
Any function that won't be called from outside the scope of the file.
Eg it looks like init_uart() and setup_uart() are local functions and
should be static. Those are the 2 that jumped out initially, but you
should review to see if there are others.
> >> +/*
> >> + * Routine: uart_clock_init
> >> + * Description: init the PLL and clock for the UART in uart_num
> >> + */
> >> +void uart_clock_init(int uart_num)
> >> +{
> >
> > Are all these uart functions board-specific? They look more
> > CPU-specific. If that's the case they should be moved somewhere in
> > arch/arm/*. Other boards that use the Tegra2 don't want to duplicate
> > this code or link into Nvidia's board/nvidia directory.
> It's Tegra2 SoC-specific - that's not the CPU, per se. I guess I could move
> it to arch/arm/cpu/armv7/tegra2, if you think it's important enough.
I think they should be moved. If they aren't, the next board vendor (eg
my company) that uses the Tegra2 will copy your board.[ch] into their
board/ directory and use them as a starting point, which is a
large duplication of code. Moving it somewhere in arch/arm is the
"right" thing to do and will make every future tegra2 board port cleaner
and easier.
Best,
Peter
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Re: [U-Boot] [PATCH v3 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
Wolfgang, On Thu, Jan 20, 2011 at 1:40 AM, Wolfgang Denk wrote: > Dear Tom Warren, > > In message <1295471986-2395-2-git-send-email-twar...@nvidia.com> you wrote: >> Signed-off-by: Tom Warren > > checkpatch.pl reports: > > total: 6 errors, 12 warnings, 1155 lines checked > > /tmp/patch has style problems, please review. > > Please clean up. I run checkpatch.pl (v 0.31) on every patch before I submit it, and I did see 12 warnings but no errors. The warnings were minor - new typedefs and volatile structs. Could you please provide the text of the checkpatch.pl output so I can see what the errors might be? Thanks. > > Best regards, > > Wolfgang Denk > > -- > DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de > "Where shall I begin, please your Majesty?" he asked. "Begin at the > beginning," the King said, gravely, "and go on till you come to the > end: then stop." - Alice's Adventures in Wonderland, Lewis Carroll > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
Graeme,
On Wed, Jan 19, 2011 at 5:20 PM, Graeme Russ wrote:
> On Thu, Jan 20, 2011 at 8:19 AM, Tom Warren wrote:
>
>> +
>> +/*
>> + * Routine: uart_clock_init
>> + * Description: init the PLL and clock for the UART in uart_num
>> + */
>> +void uart_clock_init(int uart_num)
>> +{
>> + clk_rst_ctlr *const clkrst = (clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
>> + static int pllp_init_done;
>> + u32 reg;
>> +
>> + if (!pllp_init_done) {
>> +
>> + /* Override pllp setup for 216MHz operation. */
>> + reg = (PLL_BYPASS | PLL_BASE_OVRRIDE | PLL_DIVP);
>> + reg |= (((NVRM_PLLP_FIXED_FREQ_KHZ/500) << 8) | PLL_DIVM);
>> + writel(reg, clkrst->crc_pllp_base);
>> +
>> + reg |= PLL_ENABLE;
>> + writel(reg, clkrst->crc_pllp_base);
>
> Is this correct? Should it not be writel(reg, &clkrst->crc_pllp_base);
Well, the PLLs, UART and device clocks that I'm writing all seem to work OK.
I'll take a look at the ARM asm code generated, but you are probably right.
But shouldn't the compiler have complained if I wasn't passing the
struct address?
>
> Similarly for other readl()'s and writel()'s
>
> Regards,
>
> Graeme
>
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Re: [U-Boot] [PATCH v3 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
On Wed, Jan 19, 2011 at 5:04 PM, Peter Tyser wrote:
> Hi Tom,
> Some last minutes nits:
>
> It looks like some of the new functions can be declared statically.
> It'd be nice to do so where possible.
Which functions, Peter? Please point them out specifically, thanks.
>
>
>
>> --- /dev/null
>> +++ b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
>> @@ -0,0 +1,66 @@
>> +/*
>> + * Board specific setup info
>
> This is CPU-specific code, correct?
Yes - I'll change the comment.
>
>> + *
>> + * (C) Copyright 2010,2011
>> + * NVIDIA Corporation
>> + *
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> + * MA 02111-1307 USA
>> + */
>> +
>> +#include
>> +#include
>> +
>> +_TEXT_BASE:
>> + .word CONFIG_SYS_TEXT_BASE @ sdram load addr from config file
>> +
>> +.global invalidate_dcache
>> +invalidate_dcache:
>> + mov pc, lr
>> +
>> +
>> + .align 5
>> +.global reset_cpu
>> +reset_cpu:
>> + ldr r1, rstctl @ get addr for global reset
>> + @ reg
>> + ldr r3, [r1]
>> + orr r3, r3, #0x10
>> + str r3, [r1] @ force reset
>> + mov r0, r0
>> +_loop_forever:
>> + b _loop_forever
>> +rstctl:
>> + .word PRM_RSTCTRL
>> +
>> +.globl lowlevel_init
>> +lowlevel_init:
>> + ldr sp, SRAM_STACK
>> + str ip, [sp]
>> + mov ip, lr
>> + bl s_init @ go setup pll, mux & memory
>> + ldr ip, [sp]
>> + mov lr, ip
>> +
>> + mov pc, lr @ back to arch calling code
>> +
>> + @ the literal pools origin
>> + .ltorg
>> +
>> +SRAM_STACK:
>> + .word LOW_LEVEL_SRAM_STACK
>> diff --git a/arch/arm/cpu/armv7/tegra2/sys_info.c
>> b/arch/arm/cpu/armv7/tegra2/sys_info.c
>> new file mode 100644
>> index 000..6d11dc1
>> --- /dev/null
>> +++ b/arch/arm/cpu/armv7/tegra2/sys_info.c
>> @@ -0,0 +1,35 @@
>> +/*
>> + * (C) Copyright 2010,2011
>> + * NVIDIA Corporation
>> + *
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> + * MA 02111-1307 USA
>> + */
>> +
>> +#include
>> +
>> +#ifdef CONFIG_DISPLAY_CPUINFO
>> +/* Print CPU information */
>> +int print_cpuinfo(void)
>> +{
>> + puts("TEGRA2\n");
>> +
>> + /* TBD: Add printf of major/minor rev info, stepping, etc. */
>> + return 0;
>> +}
>> +#endif /* CONFIG_DISPLAY_CPUINFO */
>> diff --git a/arch/arm/cpu/armv7/tegra2/timer.c
>> b/arch/arm/cpu/armv7/tegra2/timer.c
>> new file mode 100644
>> index 000..858af0f
>> --- /dev/null
>> +++ b/arch/arm/cpu/armv7/tegra2/timer.c
>> @@ -0,0 +1,122 @@
>> +/*
>> + * (C) Copyright 2010,2011
>> + * NVIDIA Corporation
>> + *
>> + * (C) Copyright 2008
>> + * Texas Instruments
>> + *
>> + * Richard Woodruff
>> + * Syed Moahmmed Khasim
>> + *
>> + * (C) Copyright 2002
>> + * Sysgo Real-Time Solutions, GmbH
>> + * Marius Groeger
>> + * Alex Zuepke
>> + *
>> + * (C) Copyright 2002
>> + * Gary Jennejohn, DENX Software Engineering,
>> + *
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in th
[U-Boot] [PATCH 6/6] UBI: use mtd->writebufsize to set minimal I/O unit size
Previously we used mtd->writesize field to set UBI's minimal I/O unit size. This sometimes caused UBIFS recovery issues when mounting an uncleanly unmounted UBIFS partition on NOR flash since mtd->writesize is 1 byte for NOR flash. The MTD CFI driver however often performs writing multiple bytes in one programming operation using the chip's write buffer. We have to use the size of this write buffer as a minimal I/O unit size for UBI on NOR flash to fix the observed UBIFS recovery issues. Signed-off-by: Holger Brunck --- drivers/mtd/ubi/build.c | 28 +++- 1 files changed, 27 insertions(+), 1 deletions(-) diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c index 3ea0e6c..7c2e1dc 100644 --- a/drivers/mtd/ubi/build.c +++ b/drivers/mtd/ubi/build.c @@ -542,7 +542,33 @@ static int io_init(struct ubi_device *ubi) if (ubi->mtd->block_isbad && ubi->mtd->block_markbad) ubi->bad_allowed = 1; - ubi->min_io_size = ubi->mtd->writesize; + /* +* Set UBI min. I/O size (@ubi->min_io_size). We use @mtd->writebufsize +* for these purposes, not @mtd->writesize. At the moment this does not +* matter for NAND, because currently @mtd->writebufsize is equivalent to +* @mtd->writesize for all NANDs. However, some CFI NOR flashes may +* have @mtd->writebufsize which is multiple of @mtd->writesize. +* +* The reason we use @mtd->writebufsize for @ubi->min_io_size is that +* UBI and UBIFS recovery algorithms rely on the fact that if there was +* an unclean power cut, then we can find offset of the last corrupted +* node, align the offset to @ubi->min_io_size, read the rest of the +* eraseblock starting from this offset, and check whether there are +* only 0xFF bytes. If yes, then we are probably dealing with a +* corruption caused by a power cut, if not, then this is probably some +* severe corruption. +* +* Thus, we have to use the maximum write unit size of the flash, which +* is @mtd->writebufsize, because @mtd->writesize is the minimum write +* size, not the maximum. +*/ + if (ubi->mtd->type == MTD_NANDFLASH) + ubi_assert(ubi->mtd->writebufsize == ubi->mtd->writesize); + else if (ubi->mtd->type == MTD_NORFLASH) + ubi_assert(ubi->mtd->writebufsize % ubi->mtd->writesize == 0); + + ubi->min_io_size = ubi->mtd->writebufsize; + ubi->hdrs_min_io_size = ubi->mtd->writesize >> ubi->mtd->subpage_sft; /* -- 1.7.0.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 5/6] mtd: initialize writebufsize in the MTD object of a partition
Propagate the writebufsize to the partition's MTD object so that UBI can set correct value for it's minimal I/O size using the writebufsize field of MTD object of the partition. Signed-off-by: Holger Brunck --- drivers/mtd/mtdconcat.c |1 + drivers/mtd/mtdpart.c |1 + 2 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/mtd/mtdconcat.c b/drivers/mtd/mtdconcat.c index fc22701..a33dcfc 100644 --- a/drivers/mtd/mtdconcat.c +++ b/drivers/mtd/mtdconcat.c @@ -606,6 +606,7 @@ struct mtd_info *mtd_concat_create(struct mtd_info *subdev[], /* subdevices to c concat->mtd.size = subdev[0]->size; concat->mtd.erasesize = subdev[0]->erasesize; concat->mtd.writesize = subdev[0]->writesize; + concat->mtd.writebufsize = subdev[0]->writebufsize; concat->mtd.subpage_sft = subdev[0]->subpage_sft; concat->mtd.oobsize = subdev[0]->oobsize; concat->mtd.oobavail = subdev[0]->oobavail; diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c index f647e43..150f2ad 100644 --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c @@ -296,6 +296,7 @@ static struct mtd_part *add_one_partition(struct mtd_info *master, slave->mtd.flags = master->flags & ~part->mask_flags; slave->mtd.size = part->size; slave->mtd.writesize = master->writesize; + slave->mtd.writebufsize = master->writebufsize; slave->mtd.oobsize = master->oobsize; slave->mtd.oobavail = master->oobavail; slave->mtd.subpage_sft = master->subpage_sft; -- 1.7.0.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/6] mtd, nand: add mtd->writebufsize initialization
Initialize mtd->writebufsize to be equal to mtd->writesize. Signed-off-by: Holger Brunck --- drivers/mtd/nand/nand_base.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 3b96b0e..26ae720 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -2843,6 +2843,7 @@ int nand_scan_tail(struct mtd_info *mtd) mtd->unlock = NULL; mtd->block_isbad = nand_block_isbad; mtd->block_markbad = nand_block_markbad; + mtd->writebufsize = mtd->writesize; /* propagate ecc.layout to mtd_info */ mtd->ecclayout = chip->ecc.layout; -- 1.7.0.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/6] mtd, onenand: add mtd writebufsize initialization
Initialize mtd->writebufsize to be equal to mtd->writesize. Signed-off-by: Holger Brunck --- drivers/mtd/onenand/onenand_base.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index 24e02c2..8881672 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -2623,6 +2623,7 @@ static int onenand_probe(struct mtd_info *mtd) mtd->sync = onenand_sync; mtd->block_isbad = onenand_block_isbad; mtd->block_markbad = onenand_block_markbad; + mtd->writebufsize = mtd->writesize; return 0; } -- 1.7.0.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/6] cfi_mtd: add writebufsize initialization
Initialize mtd->writebufsize to the value obtained by by the CFI informations. Signed-off-by: Holger Brunck --- drivers/mtd/cfi_mtd.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/mtd/cfi_mtd.c b/drivers/mtd/cfi_mtd.c index cbcc165..29e32b2 100644 --- a/drivers/mtd/cfi_mtd.c +++ b/drivers/mtd/cfi_mtd.c @@ -241,6 +241,7 @@ int cfi_mtd_init(void) mtd->flags = MTD_CAP_NORFLASH; mtd->size = fi->size; mtd->writesize = 1; + mtd->writebufsize = fi->buffer_size; mtd->erase = cfi_mtd_erase; mtd->read = cfi_mtd_read; -- 1.7.0.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/6] mtd: add writebufsize field to mtd_info struct
This field will be used to indicate the write buffer size
of the MTD device. UBI will set it's minimal I/O unit size
(min_io_size) to the indicated write buffer size. By this
change we intend to fix failed recovery of UBIFS partitions
we currently observe on NOR flash when mounting the partition
after unclean unmount.
Currently the min_io_size is set to mtd->writesize (which is 1
byte for NOR flash). But flash programming is often done from
prepared write buffer containing multiple bytes and is performed
in one programming operation which could be interrupted by a power
cut or a system reset causing corrupted (partially written) areas
in a flash sector. Knowing the size of potentially corrupted areas
UBIFS scanning and recovery algorithms are able to perform
successful recovery.
Signed-off-by: Holger Brunck
---
include/linux/mtd/mtd.h | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 3b18d7d..14d6f70 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -129,6 +129,17 @@ struct mtd_info {
*/
u_int32_t writesize;
+ /*
+* Size of the write buffer used by the MTD. MTD devices having a write
+* buffer can write multiple writesize chunks at a time. E.g. while
+* writing 4 * writesize bytes to a device with 2 * writesize bytes
+* buffer the MTD driver can (but doesn't have to) do 2 writesize
+* operations, but not 4. Currently, all NANDs have writebufsize
+* equivalent to writesize (NAND page size). Some NOR flashes do have
+* writebufsize greater than writesize.
+*/
+ u_int32_t writebufsize;
+
u_int32_t oobsize; /* Amount of OOB data per block (e.g. 16) */
u_int32_t oobavail; /* Available OOB bytes per block */
--
1.7.0.5
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[U-Boot] [0/6] Patch serie UBI min I/O size fixes
This patch serie fixes a problem in the UBI layer. The min I/O size has currently a fixed value of 1 for NOR flashes. But for NOR flashes the min I/O size has to be equal to the size of the writebuffer of the flash. Therefore the mtd layer was enhanced with the writebuffer which was later on used in the ubi layer to set the min I/O size. This patches fixes problems with flash types with a writebuffersize > 128 Byte and is mainly taken from the similar linux patches. See MTD mailing list posts: http://lists.infradead.org/pipermail/linux-mtd/2010-December/033460.html Without the u-boot patches attaching to a ubi device with a min I/O buffer larger than 128 would fail. Best Regards ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [Patch v2] Fix hash table deletion to prevent lost entries
On 01/19/2011 03:47 PM, Wolfgang Denk wrote:
> Dear Peter Barada,
>
> In message <4d371208.3090...@logicpd.com> you wrote:
The hash delete code is in error; instead of just removing the deleted
key, it should instead allocate a new hashtable, hash all the keys into
the new table except for the deleted key and then reclaim the old table
(and deleted key).
>>> Can you please come up with a patch?
>>
From: Peter Barada
Date: Thu, 20 Jan 2011 10:38:57 -0500
Subject: [PATCH] Fix hashtable to properly handle deletion.
Use negative used value to mark deleted entry. Search keeps probing past
deleted entries. Adding an entry uses first deleted entry when it hits
end of probe chain.
Signed-off-by: Peter Barada
---
lib/hashtable.c | 18 +-
1 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/lib/hashtable.c b/lib/hashtable.c
index 9f069c0..fcdb53c 100644
--- a/lib/hashtable.c
+++ b/lib/hashtable.c
@@ -65,7 +65,7 @@
* which describes the current status.
*/
typedef struct _ENTRY {
-unsigned int used;
+int used;
ENTRY entry;
} _ENTRY;
@@ -152,7 +152,7 @@ void hdestroy_r(struct hsearch_data *htab)
/* free used memory */
for (i = 1; i <= htab->size; ++i) {
-if (htab->table[i].used) {
+if (htab->table[i].used > 0) {
ENTRY *ep = &htab->table[i].entry;
free(ep->key);
@@ -209,7 +209,7 @@ int hmatch_r(const char *match, int last_idx, ENTRY **
retval,
size_t key_len = strlen(match);
for (idx = last_idx + 1; idx < htab->size; ++idx) {
-if (!htab->table[idx].used)
+if (htab->table[idx].used > 0)
continue;
if (!strncmp(match, htab->table[idx].entry.key, key_len)) {
*retval = &htab->table[idx].entry;
@@ -229,6 +229,7 @@ int hsearch_r(ENTRY item, ACTION action, ENTRY ** retval,
unsigned int count;
unsigned int len = strlen(item.key);
unsigned int idx;
+unsigned int first_deleted = 0;
/* Compute an value for the given string. Perhaps use a better method. */
hval = len;
@@ -256,6 +257,10 @@ int hsearch_r(ENTRY item, ACTION action, ENTRY ** retval,
*/
unsigned hval2;
+if (htab->table[idx].used == -1
+&& !first_deleted)
+first_deleted = idx;
+
if (htab->table[idx].used == hval
&& strcmp(item.key, htab->table[idx].entry.key) == 0) {
/* Overwrite existing value? */
@@ -335,6 +340,9 @@ int hsearch_r(ENTRY item, ACTION action, ENTRY ** retval,
* Create new entry;
* create copies of item.key and item.data
*/
+if (first_deleted)
+idx = first_deleted;
+
htab->table[idx].used = hval;
htab->table[idx].entry.key = strdup(item.key);
htab->table[idx].entry.data = strdup(item.data);
@@ -387,7 +395,7 @@ int hdelete_r(const char *key, struct hsearch_data *htab)
free(ep->key);
free(ep->data);
-htab->table[idx].used = 0;
+htab->table[idx].used = -1;
--htab->filled;
@@ -467,7 +475,7 @@ ssize_t hexport_r(struct hsearch_data *htab, const char sep,
*/
for (i = 1, n = 0, totlen = 0; i <= htab->size; ++i) {
-if (htab->table[i].used) {
+if (htab->table[i].used > 0) {
ENTRY *ep = &htab->table[i].entry;
list[n++] = ep;
--
1.7.0.4
--
Peter Barada
peter.bar...@logicpd.com
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Re: [U-Boot] [PATCH v2 2/2] armv7: add support for s5pc210 universal board
Dear seedshope,
In message <4d3841b2.8050...@gmail.com> you wrote:
...
> > +int dram_init(void)
> > +{
> > + gd->ram_size = PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE;
> It is shoule to use get_ram_size() function
This, like the others, are valid comments - but:
Can you please explain why you have to quote all the 1000+
unrelated lines of the patch?
It is even difficult to spot your 4 lines of comments in 1000+ lines
of quoted patch. Plase don't do that.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
He had quite a powerful intellect, but it was as powerful like a
locomotive, and ran on rails and was therefore almost impossible to
steer. - Terry Pratchett, _Lords and Ladies_
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Re: [U-Boot] U-boot Config Parameters on Compact Flash
Dear Wolfgang, Thank you again for your hints. >Then #define CONFIG_ENV_IS_NOWHERE > >> What would be than your suggestion >> to access (read/write) u-boot (parameters) environ variables? > >Reserve some space (like a tiny partition) somewhere on your CF card; >say 32 sectors for 16 kB environment data. >Use ide read combined with env import to load the envrionment from CF >card, and use env export combined with ide write to write it back if >needed. Please let me write what I understood from your idea. Please correct me if I am wrong. In the include config file I should say #define CONFIG_ENV_IS_NOWHERE meaning take the default environ configuration is built in the u-boot itself. Next, when the u-boot is booted the environment variables should be imported from Compact Flash. This is done in two steps: 1. ide read (read the u-boot config from Compact Flash to RAM ?) 2. env import (import u-boot config from RAM to u-boot?) Could you please give me more hints which CONFIG macros should/could be used for the above mentioned steps. Is there any command to import/export u-boot config. So far I was using saveenv to export/save u-boot config into Flash? Best Regards Mirek Dear "Dach Miroslaw", In message <1b4f8000449511488d1a640dd6deca350392a...@mailbox0a.psi.ch> you wrote: > > >What do you mean my "u-boot parameters"? > > To be clear I mean u-boot parameters the environment variables which are > denied for example: > CFG_ENV_IS_IN_FLASH > or > CFG_ENV_IS_IN_EEPROM CFG_* ? You code must be _extremely_ old. Update! > My new board does not have Flash nor EEPROM. It has only Compact Flash. Then #define CONFIG_ENV_IS_NOWHERE > What would be than your suggestion > to access (read/write) u-boot (parameters) environ variables? Reserve some space (like a tiny partition) somewhere on your CF card; say 32 sectors for 16 kB environment data. Use ide read combined with env import to load the envrionment from CF card, and use env export combined with ide write to write it back if needed. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de After a time, you may find that "having" is not so pleasing a thing, after all, as "wanting." It is not logical, but it is often true. -- Spock, "Amok Time", stardate 3372.7 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net: ftmac100: remove unncessary volatiles
Hello.
Po-Yu Chuang wrote:
> From: Po-Yu Chuang
> This patch also update get_timer() usage.
This seems like a material for a separate patch.
> Signed-off-by: Po-Yu Chuang
> ---
> drivers/net/ftmac100.c | 20 +---
> 1 files changed, 9 insertions(+), 11 deletions(-)
> diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
> index 2328cb5..787d69b 100644
> --- a/drivers/net/ftmac100.c
> +++ b/drivers/net/ftmac100.c
[...]
> @@ -219,14 +219,12 @@ ftmac100_send (struct eth_device *dev, volatile void
> *packet, int length)
> curr_des->txdes0 = FTMAC100_TXDES0_TXDMA_OWN;
>
> /* start transmit */
> -
> writel (1, &ftmac100->txpd);
>
> /* wait for transfer to succeed */
> -
> - tmo = get_timer (0) + 5 * CONFIG_SYS_HZ;
> + start = get_timer (0);
> while (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) {
> - if (get_timer (0) >= tmo) {
> + if (get_timer (start) >= 5) {
I'm not sure this is equivalent to the old code...
> debug ("%s(): timed out\n", __func__);
> return -1;
> }
checkpatch.pl says:
WARNING: space prohibited between function name and open parenthesis '('
#66: FILE: drivers/net/ftmac100.c:225:
+ start = get_timer (0);
WARNING: space prohibited between function name and open parenthesis '('
#69: FILE: drivers/net/ftmac100.c:227:
+ if (get_timer (start) >= 5) {
I know you're only modifying the existing code, but it's time to fix the
style of it as well...
WBR, Sergei
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[U-Boot] [PATCH] net: ftmac100: remove unncessary volatiles
From: Po-Yu Chuang
This patch also update get_timer() usage.
Signed-off-by: Po-Yu Chuang
---
drivers/net/ftmac100.c | 20 +---
1 files changed, 9 insertions(+), 11 deletions(-)
diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
index 2328cb5..787d69b 100644
--- a/drivers/net/ftmac100.c
+++ b/drivers/net/ftmac100.c
@@ -30,8 +30,8 @@
#define ETH_ZLEN 60
struct ftmac100_data {
- volatile struct ftmac100_txdes txdes[1];
- volatile struct ftmac100_rxdes rxdes[PKTBUFSRX];
+ struct ftmac100_txdes txdes[1];
+ struct ftmac100_rxdes rxdes[PKTBUFSRX];
int rx_index;
};
@@ -88,8 +88,8 @@ static int ftmac100_init (struct eth_device *dev, bd_t *bd)
{
struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase;
struct ftmac100_data *priv = dev->priv;
- volatile struct ftmac100_txdes *txdes = priv->txdes;
- volatile struct ftmac100_rxdes *rxdes = priv->rxdes;
+ struct ftmac100_txdes *txdes = priv->txdes;
+ struct ftmac100_rxdes *rxdes = priv->rxdes;
unsigned int maccr;
int i;
@@ -153,7 +153,7 @@ static int ftmac100_init (struct eth_device *dev, bd_t *bd)
static int ftmac100_recv (struct eth_device *dev)
{
struct ftmac100_data *priv = dev->priv;
- volatile struct ftmac100_rxdes *curr_des;
+ struct ftmac100_rxdes *curr_des;
unsigned short rxlen;
curr_des = &priv->rxdes[priv->rx_index];
@@ -195,8 +195,8 @@ ftmac100_send (struct eth_device *dev, volatile void
*packet, int length)
{
struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase;
struct ftmac100_data *priv = dev->priv;
- volatile struct ftmac100_txdes *curr_des = priv->txdes;
- int tmo;
+ struct ftmac100_txdes *curr_des = priv->txdes;
+ ulong start;
if (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) {
debug ("%s(): no TX descriptor available\n", __func__);
@@ -219,14 +219,12 @@ ftmac100_send (struct eth_device *dev, volatile void
*packet, int length)
curr_des->txdes0 = FTMAC100_TXDES0_TXDMA_OWN;
/* start transmit */
-
writel (1, &ftmac100->txpd);
/* wait for transfer to succeed */
-
- tmo = get_timer (0) + 5 * CONFIG_SYS_HZ;
+ start = get_timer (0);
while (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) {
- if (get_timer (0) >= tmo) {
+ if (get_timer (start) >= 5) {
debug ("%s(): timed out\n", __func__);
return -1;
}
--
1.6.3.3
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Re: [U-Boot] [PATCH v2 2/2] armv7: add support for s5pc210 universal board
On 01/13/2011 06:16 PM, Minkyu Kang wrote: > This patch adds support for Samsung s5pc210 universal board > > Signed-off-by: Minkyu Kang > Signed-off-by: Kyungmin Park > --- > v2 > remove debug message > > MAINTAINERS |5 +- > MAKEALL |1 + > board/samsung/universal_c210/Makefile| 51 > board/samsung/universal_c210/config.mk | 24 ++ > board/samsung/universal_c210/lowlevel_init.S | 395 > ++ > board/samsung/universal_c210/onenand.c | 34 +++ > board/samsung/universal_c210/universal.c | 250 > boards.cfg |1 + > include/configs/s5pc210_universal.h | 248 > 9 files changed, 1007 insertions(+), 2 deletions(-) > create mode 100644 board/samsung/universal_c210/Makefile > create mode 100644 board/samsung/universal_c210/config.mk > create mode 100644 board/samsung/universal_c210/lowlevel_init.S > create mode 100644 board/samsung/universal_c210/onenand.c > create mode 100644 board/samsung/universal_c210/universal.c > create mode 100644 include/configs/s5pc210_universal.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index a5f0493..6eed120 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -672,8 +672,9 @@ Nishant Kamat > > Minkyu Kang > > - s5p_goniARM ARMV7 (S5PC110 SoC) > - SMDKC100ARM ARMV7 (S5PC100 SoC) > + SMDKC100ARM ARMV7 (S5PC100 SoC) > + s5p_goniARM ARMV7 (S5PC110 SoC) > + s5pc210_universal ARM ARMV7 (S5PC210 SoC) > > Frederik Kriewitz > > diff --git a/MAKEALL b/MAKEALL > index a732e6a..a5b265f 100755 > --- a/MAKEALL > +++ b/MAKEALL > @@ -434,6 +434,7 @@ LIST_ARMV7=" \ > omap4_panda \ > omap4_sdp4430 \ > s5p_goni\ > + s5pc210_universal \ > smdkc100\ > " > > diff --git a/board/samsung/universal_c210/Makefile > b/board/samsung/universal_c210/Makefile > new file mode 100644 > index 000..0200220 > --- /dev/null > +++ b/board/samsung/universal_c210/Makefile > @@ -0,0 +1,51 @@ > +# > +# Copyright (C) 2010 Samsung Electronics > +# Minkyu Kang > +# > +# See file CREDITS for list of people who contributed to this > +# project. > +# > +# This program is free software; you can redistribute it and/or > +# modify it under the terms of the GNU General Public License as > +# published by the Free Software Foundation; either version 2 of > +# the License, or (at your option) any later version. > +# > +# This program is distributed in the hope that it will be useful, > +# but WITHOUT ANY WARRANTY; without even the implied warranty of > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > +# GNU General Public License for more details. > +# > +# You should have received a copy of the GNU General Public License > +# along with this program; if not, write to the Free Software > +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, > +# MA 02111-1307 USA > +# > + > +include $(TOPDIR)/config.mk > + > +LIB = $(obj)lib$(BOARD).o > + > +COBJS-y := universal.o onenand.o > +SOBJS:= lowlevel_init.o > + > +SRCS:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c) > +OBJS := $(addprefix $(obj),$(COBJS-y)) > +SOBJS:= $(addprefix $(obj),$(SOBJS)) > + > +$(LIB): $(obj).depend $(SOBJS) $(OBJS) > + $(call cmd_link_o_target, $(SOBJS) $(OBJS)) > + > +clean: > + rm -f $(SOBJS) $(OBJS) > + > +distclean: clean > + rm -f $(LIB) core *.bak $(obj).depend > + > +# > + > +# defines $(obj).depend target > +include $(SRCTREE)/rules.mk > + > +sinclude $(obj).depend > + > +# > diff --git a/board/samsung/universal_c210/config.mk > b/board/samsung/universal_c210/config.mk > new file mode 100644 > index 000..0ecd716 > --- /dev/null > +++ b/board/samsung/universal_c210/config.mk > @@ -0,0 +1,24 @@ > +# > +# Copyright (C) 2010 Samsung Electronics > +# Kyungmin Park > +# > +# See file CREDITS for list of people who contributed to this > +# project. > +# > +# This program is free software; you can redistribute it and/or > +# modify it under the terms of the GNU General Public License as > +# published by the Free Software Foundation; either version 2 of > +# the License, or (at your option) any later version. > +# > +# This program is distributed in the hope that it will be useful, > +# but WITHOUT ANY WARRANTY; without even the implied warranty of > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > +# GNU General Public License for more details. > +# > +# You should have received a copy of the GNU General Public License > +# along with this program; if not, write to the Free Software > +# Foundation, Inc., 59 Temple Place, Suite 3
Re: [U-Boot] U-boot Config Parameters on Compact Flash
Dear "Dach Miroslaw", In message <1b4f8000449511488d1a640dd6deca350392a...@mailbox0a.psi.ch> you wrote: > > >What do you mean my "u-boot parameters"? > > To be clear I mean u-boot parameters the environment variables which are > denied for example: > CFG_ENV_IS_IN_FLASH > or > CFG_ENV_IS_IN_EEPROM CFG_* ? You code must be _extremely_ old. Update! > My new board does not have Flash nor EEPROM. It has only Compact Flash. Then #define CONFIG_ENV_IS_NOWHERE > What would be than your suggestion > to access (read/write) u-boot (parameters) environ variables? Reserve some space (like a tiny partition) somewhere on your CF card; say 32 sectors for 16 kB environment data. Use ide read combined with env import to load the envrionment from CF card, and use env export combined with ide write to write it back if needed. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de After a time, you may find that "having" is not so pleasing a thing, after all, as "wanting." It is not logical, but it is often true. -- Spock, "Amok Time", stardate 3372.7 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/2] armv7: add support for S5PC210 SoC
Dear Minkyu Kang, In message <4d382f3e.6080...@samsung.com> you wrote: > S5PC210 is a 32-bit RISC and Cortex-A9 Dual Core based micro-processor. ... > new file mode 100644 > index 000..69011fc > --- /dev/null > +++ b/arch/arm/include/asm/arch-s5pc2xx/uart.h ... > +static int use_divslot = 0; This is certainly wrong in a header file. Also, please do not initialise statics to 0 or NULL. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The evolution of the human race will not be accomplished in the ten thousand years of tame animals, but in the million years of wild animals, because man is and will always be a wild animal. - Charles Galton Darwin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-boot Config Parameters on Compact Flash
Hello Wolfgang, Thank you for your quick answer. >What do you mean my "u-boot parameters"? To be clear I mean u-boot parameters the environment variables which are denied for example: CFG_ENV_IS_IN_FLASH or CFG_ENV_IS_IN_EEPROM >Note however that the opposite direction is harder: there is no FAT >write support. > >OK, you can read and write raw sectors, but this is obviously less >flexible (but has the charming benefit to work out of the box). My new board does not have Flash nor EEPROM. It has only Compact Flash. What would be than your suggestion to access (read/write) u-boot (parameters) environ variables? When the board is booted than at first the simply boot loader which is in Xilinx internal BRAM can place u-boot environ variables from file (on Compact Flash) to the RAM memory and next u-boot can be booted. In such a scenario u-boot can access easily parameters from RAM. The problem remains valid how to write theses environ variables back to the file on Compact Flash. Best Regards Miroslaw Dach -Original Message- From: Wolfgang Denk [mailto:w...@denx.de] Sent: Thu 1/20/2011 1:09 PM To: Dach Miroslaw Cc: u-boot@lists.denx.de Subject: Re: [U-Boot] U-boot Config Parameters on Compact Flash Dear "Dach Miroslaw", In message <1b4f8000449511488d1a640dd6deca350392a...@mailbox0a.psi.ch> you wrote: > > Compact Flash has few partitions (ie. FAT and EXT2). > Is it possible to configure u-boot to access (ie. read/write) u-boot > parameters which are on Compact Flash as a file? What do you mean my "u-boot parameters"? Of course you can for example read a file from a FAT file system on the CF card, and then import the environment from this. Note however that the opposite direction is harder: thre is no FAT write support. OK, you can read and write raw sectors, but this is obviously less flexible (but has the charming benefit to work out of the box). Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Anarchy may not be the best form of government, but it's better than no government at all. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/2] armv7: add support for s5pc210 universal board
This patch adds support for Samsung s5pc210 universal board Signed-off-by: Minkyu Kang Signed-off-by: Kyungmin Park --- v3 remove config.mk don't add board to MAKEALL v2 remove debug message MAINTAINERS |5 +- board/samsung/universal_c210/Makefile| 51 board/samsung/universal_c210/lowlevel_init.S | 395 ++ board/samsung/universal_c210/onenand.c | 34 +++ board/samsung/universal_c210/universal.c | 250 boards.cfg |1 + include/configs/s5pc210_universal.h | 244 7 files changed, 978 insertions(+), 2 deletions(-) create mode 100644 board/samsung/universal_c210/Makefile create mode 100644 board/samsung/universal_c210/lowlevel_init.S create mode 100644 board/samsung/universal_c210/onenand.c create mode 100644 board/samsung/universal_c210/universal.c create mode 100644 include/configs/s5pc210_universal.h diff --git a/MAINTAINERS b/MAINTAINERS index a5f0493..55977d5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -672,8 +672,9 @@ Nishant Kamat Minkyu Kang - s5p_goniARM ARMV7 (S5PC110 SoC) - SMDKC100ARM ARMV7 (S5PC100 SoC) + SMDKC100ARM ARMV7 (S5PC100 SoC) + s5p_goniARM ARMV7 (S5PC110 SoC) + s5pc210_universal ARM ARMV7 (S5PC210 SoC) Frederik Kriewitz diff --git a/board/samsung/universal_c210/Makefile b/board/samsung/universal_c210/Makefile new file mode 100644 index 000..0200220 --- /dev/null +++ b/board/samsung/universal_c210/Makefile @@ -0,0 +1,51 @@ +# +# Copyright (C) 2010 Samsung Electronics +# Minkyu Kang +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS-y:= universal.o onenand.o +SOBJS := lowlevel_init.o + +SRCS:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(SOBJS) $(OBJS) + $(call cmd_link_o_target, $(SOBJS) $(OBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/samsung/universal_c210/lowlevel_init.S b/board/samsung/universal_c210/lowlevel_init.S new file mode 100644 index 000..67635bb --- /dev/null +++ b/board/samsung/universal_c210/lowlevel_init.S @@ -0,0 +1,395 @@ +/* + * Lowlevel setup for universal board based on S5PC210 + * + * Copyright (C) 2010 Samsung Electronics + * Kyungmin Park + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include + +/* + * Register usages: + * + * r5 has zero always + * r7 has GPIO part1 base 0x1140 + * r6 has GPIO part2 base 0x1100 + */ + + .globl lowlevel_init +lowlevel_init: + mov r11, lr + + /* r5 has always zero */ + mov r5, #0 + + ldr r7, =S5PC210_GPIO_PART1_BASE + ldr r6, =S5PC210_GPIO_PART2_BASE + + /* System Timer */ + ldr r0, =S5PC210_SYSTIMER_BASE + ldr r1, =0x5000 + str r1, [r0, #0x0] + ldr r1, =0x + str r1, [r0, #0x8
[U-Boot] [PATCH v3 1/2] armv7: add support for S5PC210 SoC
S5PC210 is a 32-bit RISC and Cortex-A9 Dual Core based micro-processor.
Signed-off-by: Minkyu Kang
Signed-off-by: Kyungmin Park
---
v3
support s5pc210 EVT1 cpu_id
v2
fix typo: RSIC -> RISC, Coretex -> Cortex
arch/arm/cpu/armv7/s5pc2xx/Makefile | 42
arch/arm/cpu/armv7/s5pc2xx/clock.c| 220 +
arch/arm/cpu/armv7/s5pc2xx/soc.c | 30 +++
arch/arm/include/asm/arch-s5pc2xx/adc.h | 42
arch/arm/include/asm/arch-s5pc2xx/clk.h | 36
arch/arm/include/asm/arch-s5pc2xx/clock.h | 255 +
arch/arm/include/asm/arch-s5pc2xx/cpu.h | 103 ++
arch/arm/include/asm/arch-s5pc2xx/gpio.h | 112 +++
arch/arm/include/asm/arch-s5pc2xx/mmc.h | 71 +++
arch/arm/include/asm/arch-s5pc2xx/pwm.h | 55 ++
arch/arm/include/asm/arch-s5pc2xx/sys_proto.h | 32 +++
arch/arm/include/asm/arch-s5pc2xx/uart.h | 55 ++
12 files changed, 1053 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/cpu/armv7/s5pc2xx/Makefile
create mode 100644 arch/arm/cpu/armv7/s5pc2xx/clock.c
create mode 100644 arch/arm/cpu/armv7/s5pc2xx/soc.c
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/adc.h
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/clk.h
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/clock.h
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/cpu.h
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/gpio.h
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/mmc.h
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/pwm.h
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/sys_proto.h
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/uart.h
diff --git a/arch/arm/cpu/armv7/s5pc2xx/Makefile
b/arch/arm/cpu/armv7/s5pc2xx/Makefile
new file mode 100644
index 000..124c380
--- /dev/null
+++ b/arch/arm/cpu/armv7/s5pc2xx/Makefile
@@ -0,0 +1,42 @@
+#
+# Copyright (C) 2009 Samsung Electronics
+# Minkyu Kang
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(SOC).o
+
+COBJS += clock.o soc.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+all:$(obj).depend $(LIB)
+
+$(LIB):$(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/arm/cpu/armv7/s5pc2xx/clock.c
b/arch/arm/cpu/armv7/s5pc2xx/clock.c
new file mode 100644
index 000..450a630
--- /dev/null
+++ b/arch/arm/cpu/armv7/s5pc2xx/clock.c
@@ -0,0 +1,220 @@
+/*
+ * Copyright (C) 2010 Samsung Electronics
+ * Minkyu Kang
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+
+#ifndef CONFIG_SYS_CLK_FREQ_C210
+#define CONFIG_SYS_CLK_FREQ_C210 2400
+#endif
+
+/* s5pc210: return pll clock frequency */
+static unsigned long s5pc210_get_pll_clk(int pllreg)
+{
+ struct s5pc210_clock *clk =
+ (struct s5pc210_clock *)samsung_get_base_clock();
+ unsigned long r, m, p, s, k = 0, mask, fout;
+ unsigned int freq;
+
+ switch (pllreg) {
+ case APLL:
+ r = readl(&clk->apll_con0);
+ break;
+ case MPLL:
+ r = readl(&clk->mpll_con0);
+ break;
+ case EPLL:
+
Re: [U-Boot] [PATCH v2 1/2] armv7: add support for S5PC210 SoC
On 13 January 2011 19:14, Minkyu Kang wrote:
> S5PC210 is a 32-bit RISC and Cortex-A9 Dual Core based micro-processor.
>
> Signed-off-by: Minkyu Kang
> Signed-off-by: Kyungmin Park
> ---
> v2
> fixtypo: RSIC -> RISC, Coretex -> Cortex
>
> arch/arm/cpu/armv7/s5pc2xx/Makefile | 42
> arch/arm/cpu/armv7/s5pc2xx/clock.c | 220 +
> arch/arm/cpu/armv7/s5pc2xx/soc.c | 30 +++
> arch/arm/include/asm/arch-s5pc2xx/adc.h | 42
> arch/arm/include/asm/arch-s5pc2xx/clk.h | 36
> arch/arm/include/asm/arch-s5pc2xx/clock.h | 255
> +
> arch/arm/include/asm/arch-s5pc2xx/cpu.h | 96 +
> arch/arm/include/asm/arch-s5pc2xx/gpio.h | 112 +++
> arch/arm/include/asm/arch-s5pc2xx/mmc.h | 71 +++
> arch/arm/include/asm/arch-s5pc2xx/pwm.h | 55 ++
> arch/arm/include/asm/arch-s5pc2xx/sys_proto.h | 32 +++
> arch/arm/include/asm/arch-s5pc2xx/uart.h | 55 ++
> 12 files changed, 1046 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm/cpu/armv7/s5pc2xx/Makefile
> create mode 100644 arch/arm/cpu/armv7/s5pc2xx/clock.c
> create mode 100644 arch/arm/cpu/armv7/s5pc2xx/soc.c
> create mode 100644 arch/arm/include/asm/arch-s5pc2xx/adc.h
> create mode 100644 arch/arm/include/asm/arch-s5pc2xx/clk.h
> create mode 100644 arch/arm/include/asm/arch-s5pc2xx/clock.h
> create mode 100644 arch/arm/include/asm/arch-s5pc2xx/cpu.h
> create mode 100644 arch/arm/include/asm/arch-s5pc2xx/gpio.h
> create mode 100644 arch/arm/include/asm/arch-s5pc2xx/mmc.h
> create mode 100644 arch/arm/include/asm/arch-s5pc2xx/pwm.h
> create mode 100644 arch/arm/include/asm/arch-s5pc2xx/sys_proto.h
> create mode 100644 arch/arm/include/asm/arch-s5pc2xx/uart.h
>
> diff --git a/arch/arm/include/asm/arch-s5pc2xx/cpu.h
> b/arch/arm/include/asm/arch-s5pc2xx/cpu.h
> new file mode 100644
> index 000..a5db68c
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-s5pc2xx/cpu.h
> @@ -0,0 +1,96 @@
> +/*
> + * (C) Copyright 2010 Samsung Electronics
> + * Minkyu Kang
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + *
> + */
> +
> +#ifndef _S5PC2XX_CPU_H
> +#define _S5PC2XX_CPU_H
> +
> +#define S5PC2XX_ADDR_BASE 0x1000
> +
> +/* S5PC210 */
> +#define S5PC210_GPIO_PART3_BASE 0x0386
> +#define S5PC210_PRO_ID 0x1000
> +#define S5PC210_POWER_BASE 0x1002
> +#define S5PC210_SWRESET 0x10020400
> +#define S5PC210_CLOCK_BASE 0x1003
> +#define S5PC210_SYSTIMER_BASE 0x1005
> +#define S5PC210_WATCHDOG_BASE 0x1006
> +#define S5PC210_MIU_BASE 0x1060
> +#define S5PC210_DMC0_BASE 0x1040
> +#define S5PC210_DMC1_BASE 0x1041
> +#define S5PC210_GPIO_PART2_BASE 0x1100
> +#define S5PC210_GPIO_PART1_BASE 0x1140
> +#define S5PC210_FIMD_BASE 0x11C0
> +#define S5PC210_USBOTG_BASE 0x1248
> +#define S5PC210_MMC_BASE 0x1251
> +#define S5PC210_SROMC_BASE 0x1257
> +#define S5PC210_USBPHY_BASE 0x125B
> +#define S5PC210_UART_BASE 0x1380
> +#define S5PC210_ADC_BASE 0x1391
> +#define S5PC210_PWMTIMER_BASE 0x139D
> +#define S5PC210_MODEM_BASE 0x13A0
> +
> +#ifndef __ASSEMBLY__
> +#include
> +/* CPU detection macros */
> +extern unsigned int s5p_cpu_id;
> +
> +static inline void s5p_set_cpu_id(void)
> +{
> + s5p_cpu_id = readl(S5PC210_PRO_ID);
> + s5p_cpu_id = (0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12)) + 0x10;
Need to update for s5pc210 EVT1.
I will update it at next patch.
> +}
> +
> +#define IS_SAMSUNG_TYPE(type, id) \
> +static inline int cpu_is_##type(void) \
> +{ \
> + return s5p_cpu_id == id ? 1 : 0; \
> +}
> +
> +IS_SAMSUNG_TYPE(s5pc210, 0xc210)
> +
> +#define SAMSUNG_BASE(device, base) \
> +static inline unsigned int samsung_get_base_##device(void) \
> +{ \
> + if (cpu_is_s5pc210()) \
> + return S5PC210_##base; \
> +
Re: [U-Boot] U-boot Config Parameters on Compact Flash
Dear "Dach Miroslaw", In message <1b4f8000449511488d1a640dd6deca350392a...@mailbox0a.psi.ch> you wrote: > > Compact Flash has few partitions (ie. FAT and EXT2). > Is it possible to configure u-boot to access (ie. read/write) u-boot > parameters which are on Compact Flash as a file? What do you mean my "u-boot parameters"? Of course you can for example read a file from a FAT file system on the CF card, and then import the environment from this. Note however that the opposite direction is harder: thre is no FAT write support. OK, you can read and write raw sectors, but this is obviously less flexible (but has the charming benefit to work out of the box). Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Anarchy may not be the best form of government, but it's better than no government at all. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Adding support for MX35
Dear Stefano Babic, In message <4d381387.50...@denx.de> you wrote: > > > [U-Boot] [PATCH V2 08/11] SPI: mxc_spi: fix swapping bug and add > > total: 0 errors, 1 warnings, 22 lines checked > > Braces, braces...do you agree to follow checkpatch's rule (no braces for > single statement) ? Try it out :-) Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Faith may be defined briefly as an illogical belief in the occurence of the improbable.- H. L. Mencken ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 11/11] Add support for Freescale's mx35pdk board.
Dear Stefano Babic,
In message <4d381237.9040...@denx.de> you wrote:
>
> >> + /* Print board revision */
> >> + puts(board_detect() ? "2.0" : "1.0");
> >> +
> >> + /* Print CPU revision */
> >> + puts(" i.MX35 ");
> >
> > I mentioned this before: If you make board_detect() return 1 or 2,
> > you can combine the calls to puts() for example like that:
>
> I was unsure, it seemed to me easier to understand as it is implemented
> now, becaues board_detect() is used to detect if the PMIC is installed
> or not. It returns 0 or 1, and tell if the test for the PMIC was
> successful.
>
> Probably the former version of the board has no pmic at all or was not
> connected to I2C. So in another part of code board_detect is used in
> boolean form:
>
> if (board_detect()) {
This function should be called pmic_detect() or so.
> I thought that to combine the result makes some confusion. Probably it
> is clearer to use get_board_rev() instead of board_detect() and to
> extract the revision number from the returned u32:
>
> printf("Board: MX35 PDK %d.0 i.MX35 ", (get_board_rev() >> 8) & 0xFF);
Agreed.
Best regards,
Wolfgang Denk
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It's certainly convenient the way the crime (or condition) of
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admisistered without remorse, pity, or prejudice. :-)
-- Tom Christiansen in <559seq$ag1$1...@csnews.cs.colorado.edu>
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Re: [U-Boot] [PATCH V2 08/11] SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case
Dear Stefano Babic,
In message <4d380e7f.60...@denx.de> you wrote:
>
> > [U-Boot] [PATCH V2 08/11] SPI: mxc_spi: fix swapping bug and add
> > total: 0 errors, 1 warnings, 22 lines checked
>
> WARNING: braces {} are not necessary for single statement blocks
> #31: FILE: drivers/spi/mxc_spi.c:375:
> + for (i = 0; i < 4; i++) {
> data = (data << 8) | (*dout++ & 0xFF);
> }
>
> total: 0 errors, 1 warnings, 22 lines checked
>
> This is exactly what you prefer, but checkpatch complains. IMHO I prefer
> to fix in this patch removing braces, and do not change in previous
> patches where you suggest to add braces (and then checkpatch will
> complain about it).
These are two _different_ situations.
Here we have a single statement on a single line. This needs no
braces.
In the other case, we had a single stament split over multiple lines,
and with multiple lines I want to see braces. And checkpatch appears
to be happy with braces then, too (and without as well).
Best regards,
Wolfgang Denk
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[U-Boot] Wir bieten eine Stelle an
Sehr geehrte Ich heibe Chris Collinson und ich habe ein Angebot fur Sie! Unser Unternehmen Jasckson Logistic sucht im Moment neue Arbeitskrafte! Wir haben Ihre Bewerbungsunterlagen bei uns vor einige Zeit liegen gefunden und jetzt mochten wir Ihnen eine Stelle von unseren AuBendienstvertreter anbieten. Was spricht dafur? Keine vorherige Erfahrung notig! wir machen gratis ein Training fur Sie, falls Sie mit uns kooperieren. Schauen Sie, was wir Ihnen anbieten: Stelle: AuBendienstvertreter Bedingungen: Deutsche Staatsangehorigkeit, FlieBendes Deutsch, Grundkenntnisse von Microsoft Word und Microsoft Excel, Grundkenntnisse von Konsumelektronik PC mit Email- und Moglichkeit die Emails min. 2mal taglich zu prufen Drucker, Scanner Volljahrigkeit Beschreibung: - Briefe vom unseren Mitarbeiter regelmaBig empfangen, - Einen Bericht ausfertigen und ihn an den Obermanager verschicken (Der Arbeitnehmer ist einem Obermanager unterordnet), - die angekommene Postsendungen, gemaB unserer Vorschriften, weiterzuleiten, - die Unterlagen, mit Angabe aller Details der Artikel, auszufullen (Der Arbeitnehmer bekommt alle ausfuhrlichen Dokumente fur jede Verpackung per Email), - die Ware versenden. Personliche Eigenschaften: Ehrlichkeit Geselligkeit Teamfahigkeit Hoflichkeit Die Vergutung: 20. pro jede erfolgreich versendete Postsendung (ca.3000 . monatlich) mit Check oder per Uberweisung einmal pro Monat. Wenn Sie daran interessiert sind, schreiben Sie mir unter: collinson...@gmail.com Danke, Chris Collinson HR Department Jasckson Logistic ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] U-boot Config Parameters on Compact Flash
Dear U-Boot Users, I am using successfully U-boot for many years. So far I was dealing with the system which has the Flash memory on board. The u-boot binary and u-boot config parameters were stored in Flash. Currently I am dealing with the new board which has Xilinx Virtex05 chip (with built in powerPC) and Compact Flash instead of Flash memory chip. Compact Flash is interfaced with the system by means of System ACE "interface". Compact Flash has few partitions (ie. FAT and EXT2). Is it possible to configure u-boot to access (ie. read/write) u-boot parameters which are on Compact Flash as a file? I will be grateful for any hint Best Regards Miroslaw Dach ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 01/11] Add support for MX35 processor
Dear Stefano Babic,
In message <4d380c25.20...@denx.de> you wrote:
>
> >> + if (readl(&ccm->pdr3) & MXC_CCM_PDR3_UART_M_U)
> >> + freq = get_mcu_main_clk();
> >> + else
> >> + freq = decode_pll(readl(&ccm->ppctl),
> >> + CONFIG_MX35_HCLK_FREQ);
> >
> > Braces needed
>
> checkpatch (and generally accepted in linux, as I can see) requires that
> single statements must not be surrounded by braces. checkpatch returns a
> warning, explaining that braces are not needed.
> I see in the past some comments requiring to remove braces, but it you
> prefer to add them. IMHO it is better to follow the same codestyle as
> linux, using the same tools as checkpatch. I do not know why we have two
> different results from checkpatch, I try to investigate. I had prefer to
I was running an older version of checkpatch...
> >> + case USB_CLK:
> >> + usb_prdf = (reg4 >> 25) & 0x7;
> >> + usb_podf = (reg4 >> 22) & 0x7;
> >> + if (reg4 & 0x200)
> >> + pll = get_mcu_main_clk();
> >> + else
> >> + pll = decode_pll(readl(&ccm->ppctl),
> >> + CONFIG_MX35_HCLK_FREQ);
> >
> > Ditto. Please fix globally.
>
> See my previous comment. I would prefer to not have a different rule in
> u-boot, and not go against some provided tool (we use both checkpatch)
> if not strictly required.
Did you try it?
For me, both
+ if (reg4 & 0x200)
+ pll = get_mcu_main_clk();
+ else
+ pll = decode_pll(readl(&ccm->ppctl),
+ CONFIG_MX35_HCLK_FREQ);
and
+ if (reg4 & 0x200) {
+ pll = get_mcu_main_clk();
+ } else {
+ pll = decode_pll(readl(&ccm->ppctl),
+ CONFIG_MX35_HCLK_FREQ);
+ }
generate _NO_ warnings with checkpatch.
I feel that when the "single statement" is split across several lines,
eventually even including blank lines (see yesterday's discussion
here), then braces are needed.
> > Indeed they should. Why don't you autogenerate these, then?
> >
> > We have all the tools in place, use them.
>
> I will see how to use them.
See tools/scripts/make-asm-offsets
> > Note: the following remark is a question, NOT a change request:
> >
> > Would it not be possible to reduce all these terrible lists? As far
> > as I can tell, the list is built sequentially, with both arguments to
> > _MXC_BUILD_NON_GPIO_PIN() being incremented by 4 for the next
> > register. This begs for automatic code generation, doesn't it?
>
> I do not know if it helps. The list follows exactly the description in
> user manual, and, if you can see a rule for MX35_PIN_A*, it is not so
> simply to find one for other pins, specially for the MXC_BUILD_GPIO_PIN.
> At least, the list is at the moment coherent for all i.MX processors
> (ok, ugly for all). The name of the pin cannot be generated, and it is
> the name found in manual. Miore as generated, the list is sorted
OK, thanks for the explanation.
Best regards,
Wolfgang Denk
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[U-Boot] [PATCH][v1] powerpc/85xx: Add SERDES support for P1010/P1014
Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are only
ever connected on SERDES.
Updated MPC85xx_PORDEVSR_IO_SEL & MPC85xx_PORDEVSR_IO_SEL_SHIFT
Signed-off-by: Prabhakar Kushwaha
---
Changes for v1: Incorporated Wolfgang Denk's comment
-- removed volatile
Based git://git.denx.de/u-boot-mpc85xx.git (branch master)
arch/powerpc/cpu/mpc85xx/Makefile |2 +
arch/powerpc/cpu/mpc85xx/p1010_serdes.c | 75 +++
arch/powerpc/include/asm/immap_85xx.h |5 ++
3 files changed, 82 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/cpu/mpc85xx/p1010_serdes.c
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile
b/arch/powerpc/cpu/mpc85xx/Makefile
index b7f51e7..69c43b3 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -87,9 +87,11 @@ COBJS-$(CONFIG_MPC8548) += mpc8548_serdes.o
COBJS-$(CONFIG_MPC8568) += mpc8568_serdes.o
COBJS-$(CONFIG_MPC8569) += mpc8569_serdes.o
COBJS-$(CONFIG_MPC8572) += mpc8572_serdes.o
+COBJS-$(CONFIG_P1010) += p1010_serdes.o
COBJS-$(CONFIG_P1011) += p1021_serdes.o
COBJS-$(CONFIG_P1012) += p1021_serdes.o
COBJS-$(CONFIG_P1013) += p1013_serdes.o
+COBJS-$(CONFIG_P1014) += p1010_serdes.o
COBJS-$(CONFIG_P1020) += p1021_serdes.o
COBJS-$(CONFIG_P1021) += p1021_serdes.o
COBJS-$(CONFIG_P1022) += p1022_serdes.o
diff --git a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
new file mode 100644
index 000..4524d29
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
@@ -0,0 +1,75 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Author: Prabhakar Kushwaha
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define SRDS1_MAX_LANES4
+#define SRDS2_MAX_LANES2
+
+static u32 serdes1_prtcl_map, serdes2_prtcl_map;
+
+static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
+ [0x00] = {NONE, NONE, NONE, NONE},
+ [0x01] = {PCIE1, PCIE2, SGMII_TSEC2, SGMII_TSEC3},
+ [0x02] = {PCIE1, SGMII_TSEC1, SGMII_TSEC2, SGMII_TSEC3},
+ [0x03] = {NONE, SGMII_TSEC1, SGMII_TSEC2, SGMII_TSEC3},
+};
+
+static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
+ [0x00] = {NONE, NONE},
+ [0x01] = {SATA1, SATA2},
+ [0x02] = {SATA1, SATA2},
+ [0x03] = {PCIE1, PCIE2},
+};
+
+
+int is_serdes_configured(enum srds_prtcl device)
+{
+ int ret = (1 << device) & serdes1_prtcl_map;
+
+ if (ret)
+ return ret;
+
+ return (1 << device) & serdes2_prtcl_map;
+}
+
+void fsl_serdes_init(void)
+{
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+ u32 pordevsr = in_be32(&gur->pordevsr);
+ u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
+ MPC85xx_PORDEVSR_IO_SEL_SHIFT;
+ int lane;
+
+ debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
+
+ if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
+ printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
+ return;
+ }
+ for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
+ enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
+ serdes1_prtcl_map |= (1 << lane_prtcl);
+ }
+
+ if (srds_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) {
+ printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
+ return;
+ }
+
+ for (lane = 0; lane < SRDS2_MAX_LANES; lane++) {
+ enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
+ serdes2_prtcl_map |= (1 << lane_prtcl);
+ }
+}
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index 93a9e6c..7531fdc 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1891,8 +1891,13 @@ typedef struct ccsr_gur {
#define MPC85xx_PORDEVSR_IO_SEL0x007c
#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 18
#else
+#if defined(CONFIG_P1010)
+#define MPC85xx_PORDEVSR_IO_SEL0x0060
+#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 21
+#else
#define MPC85xx_PORDEVSR_IO_SEL0x0078
#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 19
+#endif /* if defined(CONFIG_P1010) */
#endif
#define MPC85xx_PORDEVSR_PCI2_ARB 0x0004
#define MPC85xx_PORDEVSR_PCI1_ARB 0x0002
--
1.6.3.1
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[U-Boot] [PATCH 1/1] DaVinci: Fix DM365 & DM644X build error
DM365 & DM644X builds 'davinci_emac_mii_mode_sel()',
which uses 'davinci_syscfg_regs' macro, and the
macro is valid iff CONFIG_SOC_DA8XX is defined.
Fix: Before compiling 'davinci_emac_mii_mode_sel()', make sure that
CONFIG_SOC_DA8XX is defined.
Signed-off-by: Mohammed Afzal
---
board/davinci/common/misc.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/board/davinci/common/misc.c b/board/davinci/common/misc.c
index 08c898f..c0a6c41 100644
--- a/board/davinci/common/misc.c
+++ b/board/davinci/common/misc.c
@@ -80,7 +80,7 @@ err:
/*
* Set the mii mode as MII or RMII
*/
-#if defined(CONFIG_DRIVER_TI_EMAC)
+#if defined(CONFIG_DRIVER_TI_EMAC) && defined(CONFIG_SOC_DA8XX)
void davinci_emac_mii_mode_sel(int mode_sel)
{
int val;
--
1.7.1
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[U-Boot] [PATCH][v1] powerpc/85xx: Add SERDES support for P1010/P1014
Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are only
ever connected on SERDES.
Updated MPC85xx_PORDEVSR_IO_SEL & MPC85xx_PORDEVSR_IO_SEL_SHIFT
Signed-off-by: Prabhakar Kushwaha
---
Changes for v1: Incorporated Wolfgang Denk's comment
-- removed volatile
Based git://git.denx.de/u-boot-mpc85xx.git (branch master)
arch/powerpc/cpu/mpc85xx/Makefile |2 +
arch/powerpc/cpu/mpc85xx/p1010_serdes.c | 75 +++
arch/powerpc/include/asm/immap_85xx.h |5 ++
3 files changed, 82 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/cpu/mpc85xx/p1010_serdes.c
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile
b/arch/powerpc/cpu/mpc85xx/Makefile
index b7f51e7..69c43b3 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -87,9 +87,11 @@ COBJS-$(CONFIG_MPC8548) += mpc8548_serdes.o
COBJS-$(CONFIG_MPC8568) += mpc8568_serdes.o
COBJS-$(CONFIG_MPC8569) += mpc8569_serdes.o
COBJS-$(CONFIG_MPC8572) += mpc8572_serdes.o
+COBJS-$(CONFIG_P1010) += p1010_serdes.o
COBJS-$(CONFIG_P1011) += p1021_serdes.o
COBJS-$(CONFIG_P1012) += p1021_serdes.o
COBJS-$(CONFIG_P1013) += p1013_serdes.o
+COBJS-$(CONFIG_P1014) += p1010_serdes.o
COBJS-$(CONFIG_P1020) += p1021_serdes.o
COBJS-$(CONFIG_P1021) += p1021_serdes.o
COBJS-$(CONFIG_P1022) += p1022_serdes.o
diff --git a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
new file mode 100644
index 000..4524d29
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
@@ -0,0 +1,75 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Author: Prabhakar Kushwaha
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define SRDS1_MAX_LANES4
+#define SRDS2_MAX_LANES2
+
+static u32 serdes1_prtcl_map, serdes2_prtcl_map;
+
+static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
+ [0x00] = {NONE, NONE, NONE, NONE},
+ [0x01] = {PCIE1, PCIE2, SGMII_TSEC2, SGMII_TSEC3},
+ [0x02] = {PCIE1, SGMII_TSEC1, SGMII_TSEC2, SGMII_TSEC3},
+ [0x03] = {NONE, SGMII_TSEC1, SGMII_TSEC2, SGMII_TSEC3},
+};
+
+static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
+ [0x00] = {NONE, NONE},
+ [0x01] = {SATA1, SATA2},
+ [0x02] = {SATA1, SATA2},
+ [0x03] = {PCIE1, PCIE2},
+};
+
+
+int is_serdes_configured(enum srds_prtcl device)
+{
+ int ret = (1 << device) & serdes1_prtcl_map;
+
+ if (ret)
+ return ret;
+
+ return (1 << device) & serdes2_prtcl_map;
+}
+
+void fsl_serdes_init(void)
+{
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+ u32 pordevsr = in_be32(&gur->pordevsr);
+ u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
+ MPC85xx_PORDEVSR_IO_SEL_SHIFT;
+ int lane;
+
+ debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
+
+ if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
+ printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
+ return;
+ }
+ for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
+ enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
+ serdes1_prtcl_map |= (1 << lane_prtcl);
+ }
+
+ if (srds_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) {
+ printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
+ return;
+ }
+
+ for (lane = 0; lane < SRDS2_MAX_LANES; lane++) {
+ enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
+ serdes2_prtcl_map |= (1 << lane_prtcl);
+ }
+}
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index 93a9e6c..7531fdc 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1891,8 +1891,13 @@ typedef struct ccsr_gur {
#define MPC85xx_PORDEVSR_IO_SEL0x007c
#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 18
#else
+#if defined(CONFIG_P1010)
+#define MPC85xx_PORDEVSR_IO_SEL0x0060
+#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 21
+#else
#define MPC85xx_PORDEVSR_IO_SEL0x0078
#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 19
+#endif /* if defined(CONFIG_P1010) */
#endif
#define MPC85xx_PORDEVSR_PCI2_ARB 0x0004
#define MPC85xx_PORDEVSR_PCI1_ARB 0x0002
--
1.6.3.1
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[U-Boot] [PATCH][v1] powerpc/85xx: Add SERDES support for P1010/P1014
Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are only
ever connected on SERDES.
Updated MPC85xx_PORDEVSR_IO_SEL & MPC85xx_PORDEVSR_IO_SEL_SHIFT
Signed-off-by: Prabhakar Kushwaha
Signed-off-by: Kumar Gala
---
Changes for v1: Incorporated Wolfgang Denk's comment
-- removed volatile
Based git://git.denx.de/u-boot-mpc85xx.git (branch master)
arch/powerpc/cpu/mpc85xx/Makefile |2 +
arch/powerpc/cpu/mpc85xx/p1010_serdes.c | 75 +++
arch/powerpc/include/asm/immap_85xx.h |5 ++
3 files changed, 82 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/cpu/mpc85xx/p1010_serdes.c
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile
b/arch/powerpc/cpu/mpc85xx/Makefile
index b7f51e7..69c43b3 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -87,9 +87,11 @@ COBJS-$(CONFIG_MPC8548) += mpc8548_serdes.o
COBJS-$(CONFIG_MPC8568) += mpc8568_serdes.o
COBJS-$(CONFIG_MPC8569) += mpc8569_serdes.o
COBJS-$(CONFIG_MPC8572) += mpc8572_serdes.o
+COBJS-$(CONFIG_P1010) += p1010_serdes.o
COBJS-$(CONFIG_P1011) += p1021_serdes.o
COBJS-$(CONFIG_P1012) += p1021_serdes.o
COBJS-$(CONFIG_P1013) += p1013_serdes.o
+COBJS-$(CONFIG_P1014) += p1010_serdes.o
COBJS-$(CONFIG_P1020) += p1021_serdes.o
COBJS-$(CONFIG_P1021) += p1021_serdes.o
COBJS-$(CONFIG_P1022) += p1022_serdes.o
diff --git a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
new file mode 100644
index 000..4524d29
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
@@ -0,0 +1,75 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Author: Prabhakar Kushwaha
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define SRDS1_MAX_LANES4
+#define SRDS2_MAX_LANES2
+
+static u32 serdes1_prtcl_map, serdes2_prtcl_map;
+
+static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
+ [0x00] = {NONE, NONE, NONE, NONE},
+ [0x01] = {PCIE1, PCIE2, SGMII_TSEC2, SGMII_TSEC3},
+ [0x02] = {PCIE1, SGMII_TSEC1, SGMII_TSEC2, SGMII_TSEC3},
+ [0x03] = {NONE, SGMII_TSEC1, SGMII_TSEC2, SGMII_TSEC3},
+};
+
+static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
+ [0x00] = {NONE, NONE},
+ [0x01] = {SATA1, SATA2},
+ [0x02] = {SATA1, SATA2},
+ [0x03] = {PCIE1, PCIE2},
+};
+
+
+int is_serdes_configured(enum srds_prtcl device)
+{
+ int ret = (1 << device) & serdes1_prtcl_map;
+
+ if (ret)
+ return ret;
+
+ return (1 << device) & serdes2_prtcl_map;
+}
+
+void fsl_serdes_init(void)
+{
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+ u32 pordevsr = in_be32(&gur->pordevsr);
+ u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
+ MPC85xx_PORDEVSR_IO_SEL_SHIFT;
+ int lane;
+
+ debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
+
+ if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
+ printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
+ return;
+ }
+ for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
+ enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
+ serdes1_prtcl_map |= (1 << lane_prtcl);
+ }
+
+ if (srds_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) {
+ printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
+ return;
+ }
+
+ for (lane = 0; lane < SRDS2_MAX_LANES; lane++) {
+ enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
+ serdes2_prtcl_map |= (1 << lane_prtcl);
+ }
+}
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index 93a9e6c..7531fdc 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1891,8 +1891,13 @@ typedef struct ccsr_gur {
#define MPC85xx_PORDEVSR_IO_SEL0x007c
#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 18
#else
+#if defined(CONFIG_P1010)
+#define MPC85xx_PORDEVSR_IO_SEL0x0060
+#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 21
+#else
#define MPC85xx_PORDEVSR_IO_SEL0x0078
#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 19
+#endif /* if defined(CONFIG_P1010) */
#endif
#define MPC85xx_PORDEVSR_PCI2_ARB 0x0004
#define MPC85xx_PORDEVSR_PCI1_ARB 0x0002
--
1.6.3.1
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[U-Boot] [PATCH][v1] powerpc/85xx: Add SERDES support for P1010/P1014
Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are only
ever connected on SERDES.
Updated MPC85xx_PORDEVSR_IO_SEL & MPC85xx_PORDEVSR_IO_SEL_SHIFT
Signed-off-by: Prabhakar Kushwaha
---
Changes for v1: Incorporated Wolfgang Denk's comment
-- removed volatile
Based git://git.denx.de/u-boot-mpc85xx.git (branch master)
arch/powerpc/cpu/mpc85xx/Makefile |2 +
arch/powerpc/cpu/mpc85xx/p1010_serdes.c | 75 +++
arch/powerpc/include/asm/immap_85xx.h |5 ++
3 files changed, 82 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/cpu/mpc85xx/p1010_serdes.c
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile
b/arch/powerpc/cpu/mpc85xx/Makefile
index b7f51e7..69c43b3 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -87,9 +87,11 @@ COBJS-$(CONFIG_MPC8548) += mpc8548_serdes.o
COBJS-$(CONFIG_MPC8568) += mpc8568_serdes.o
COBJS-$(CONFIG_MPC8569) += mpc8569_serdes.o
COBJS-$(CONFIG_MPC8572) += mpc8572_serdes.o
+COBJS-$(CONFIG_P1010) += p1010_serdes.o
COBJS-$(CONFIG_P1011) += p1021_serdes.o
COBJS-$(CONFIG_P1012) += p1021_serdes.o
COBJS-$(CONFIG_P1013) += p1013_serdes.o
+COBJS-$(CONFIG_P1014) += p1010_serdes.o
COBJS-$(CONFIG_P1020) += p1021_serdes.o
COBJS-$(CONFIG_P1021) += p1021_serdes.o
COBJS-$(CONFIG_P1022) += p1022_serdes.o
diff --git a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
new file mode 100644
index 000..4524d29
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
@@ -0,0 +1,75 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Author: Prabhakar Kushwaha
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define SRDS1_MAX_LANES4
+#define SRDS2_MAX_LANES2
+
+static u32 serdes1_prtcl_map, serdes2_prtcl_map;
+
+static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
+ [0x00] = {NONE, NONE, NONE, NONE},
+ [0x01] = {PCIE1, PCIE2, SGMII_TSEC2, SGMII_TSEC3},
+ [0x02] = {PCIE1, SGMII_TSEC1, SGMII_TSEC2, SGMII_TSEC3},
+ [0x03] = {NONE, SGMII_TSEC1, SGMII_TSEC2, SGMII_TSEC3},
+};
+
+static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
+ [0x00] = {NONE, NONE},
+ [0x01] = {SATA1, SATA2},
+ [0x02] = {SATA1, SATA2},
+ [0x03] = {PCIE1, PCIE2},
+};
+
+
+int is_serdes_configured(enum srds_prtcl device)
+{
+ int ret = (1 << device) & serdes1_prtcl_map;
+
+ if (ret)
+ return ret;
+
+ return (1 << device) & serdes2_prtcl_map;
+}
+
+void fsl_serdes_init(void)
+{
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+ u32 pordevsr = in_be32(&gur->pordevsr);
+ u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
+ MPC85xx_PORDEVSR_IO_SEL_SHIFT;
+ int lane;
+
+ debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
+
+ if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
+ printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
+ return;
+ }
+ for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
+ enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
+ serdes1_prtcl_map |= (1 << lane_prtcl);
+ }
+
+ if (srds_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) {
+ printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
+ return;
+ }
+
+ for (lane = 0; lane < SRDS2_MAX_LANES; lane++) {
+ enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
+ serdes2_prtcl_map |= (1 << lane_prtcl);
+ }
+}
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index 93a9e6c..7531fdc 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1891,8 +1891,13 @@ typedef struct ccsr_gur {
#define MPC85xx_PORDEVSR_IO_SEL0x007c
#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 18
#else
+#if defined(CONFIG_P1010)
+#define MPC85xx_PORDEVSR_IO_SEL0x0060
+#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 21
+#else
#define MPC85xx_PORDEVSR_IO_SEL0x0078
#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 19
+#endif /* if defined(CONFIG_P1010) */
#endif
#define MPC85xx_PORDEVSR_PCI2_ARB 0x0004
#define MPC85xx_PORDEVSR_PCI1_ARB 0x0002
--
1.6.3.1
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[U-Boot] [PATCH v1] powerpc/85xx: Add support for Integrated Flash Controller (IFC)
The Integrated Flash Controller (IFC) is used to access the external
NAND Flash, NOR Flash, EPROM, SRAM and Generic ASIC memories.Four chip
selects are provided in IFC so that maximum of four Flash devices can be
hooked, but only one can be accessed at a given time.
Features supported by IFC are,
- Functional muxing of pins between NAND, NOR and GPCM
- Support memory banks of size 64KByte to 4 GBytes
- Write protection capability (only for NAND and NOR)
- Provision of Software Reset
- Flexible Timing programmability for every chip select
- NAND Machine
- x8/ x16 NAND Flash Interface
- SLC and MLC NAND Flash devices support with
configurable
page sizes of upto 4KB
- Internal SRAM of 9KB which is directly mapped and
availble at
boot time for NAND Boot
- Configurable block size
- Boot chip select (CS0) available at system reset
- NOR Machine
- Data bus width of 8/16/32
- Compatible with asynchronous NOR Flash
- Directly memory mapped
- Supports address data multiplexed (ADM) NOR device
- Boot chip select (CS0) available at system reset
- GPCM Machine (NORMAL GPCM Mode)
- Support for x8/16/32 bit device
- Compatible with general purpose addressable device
e.g. SRAM, ROM
- External clock is supported with programmable division
ratio
- GPCM Machine (Generic ASIC Mode)
- Support for x8/16/32 bit device
- Address and Data are shared on I/O bus
- Following Address and Data sequences can be supported
on I/O bus
- 32 bit I/O: AD
- 16 bit I/O: AADD
- 8 bit I/O :
- Configurable Even/Odd Parity on Address/Data bus
supported
Signed-off-by: Dipen Dudhat
Acked-by: Scott Wood
---
Changes from v0:
- Integrated Wolfgang's comments
arch/powerpc/cpu/mpc85xx/cpu.c|7 +-
arch/powerpc/cpu/mpc8xxx/Makefile |1 +
arch/powerpc/cpu/mpc8xxx/fsl_ifc.c| 84 +++
arch/powerpc/include/asm/config.h |2 +
arch/powerpc/include/asm/fsl_ifc.h| 947 +
arch/powerpc/include/asm/fsl_law.h|1 +
arch/powerpc/include/asm/immap_85xx.h |4 +
7 files changed, 1045 insertions(+), 1 deletions(-)
create mode 100644 arch/powerpc/cpu/mpc8xxx/fsl_ifc.c
create mode 100644 arch/powerpc/include/asm/fsl_ifc.h
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 1aad2ba..49ea6cc 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -33,6 +33,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -280,7 +281,8 @@ int cpu_mmc_init(bd_t *bis)
/*
* Print out the state of various machine registers.
- * Currently prints out LAWs, BR0/OR0, and TLBs
+ * Currently prints out LAWs, BR0/OR0 for LBC, CSPR/CSOR/Timing
+ * parameters for IFC and TLBs
*/
void mpc85xx_reginfo(void)
{
@@ -289,6 +291,9 @@ void mpc85xx_reginfo(void)
#if defined(CONFIG_FSL_LBC)
print_lbc_regs();
#endif
+#ifdef CONFIG_FSL_IFC
+ print_ifc_regs();
+#endif
}
diff --git a/arch/powerpc/cpu/mpc8xxx/Makefile
b/arch/powerpc/cpu/mpc8xxx/Makefile
index 5dfd65b..4ae26e4 100644
--- a/arch/powerpc/cpu/mpc8xxx/Makefile
+++ b/arch/powerpc/cpu/mpc8xxx/Makefile
@@ -15,6 +15,7 @@ COBJS-y += cpu.o
endif
COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
+COBJS-$(CONFIG_FSL_IFC) += fsl_ifc.o
COBJS-$(CONFIG_FSL_LBC) += fsl_lbc.o
COBJS-$(CONFIG_SYS_SRIO) += srio.o
diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c
b/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c
new file mode 100644
index 000..39a4556
--- /dev/null
+++ b/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c
@@ -0,0 +1,84 @@
+/*
+ * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ * Author: Dipen Dudhat
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+
+void print_ifc_regs(void)
+{
+ int i, j;
+
+ printf("
Re: [U-Boot] Adding support for MX35
On 01/20/2011 10:52 AM, Wolfgang Denk wrote: > Dear Stefano Babic, > > In message <1295513194-16158-1-git-send-email-sba...@denx.de> you wrote: >> Patchset V2 contain patches for SPI sent previously independently to ML >> and additional patches for I2C. > > I just learned that I was running an old version of checkpatch, which > turned out some false positives (and my short visual inspection did > not recognize this) > > Sorry for the flase alarms. No problem, this explains the the different results. I ran checkpatch on the patchset. > > The remaining warnings are: > > [U-Boot] [PATCH V2 01/11] Add support for MX35 processor > total: 0 errors, 8 warnings, 2109 lines checked They are related to typedef (mmmhh...there is one regarding usage of volatile, I will fix it). I do not think that using typedef is forbidden. > > [U-Boot] [PATCH V2 04/11] I2C: mxc_i2c: get rid of __REG access > total: 0 errors, 2 warnings, 169 lines checked __FUNCTION__, I will fix it > > [U-Boot] [PATCH V2 05/11] I2C: mxc_i2c: address failure with mx35 > total: 1 errors, 1 warnings, 166 lines checked See my previous comment. In any case, I will change to avoid checkpatch complains > > [U-Boot] [PATCH V2 08/11] SPI: mxc_spi: fix swapping bug and add > total: 0 errors, 1 warnings, 22 lines checked Braces, braces...do you agree to follow checkpatch's rule (no braces for single statement) ? > > [U-Boot] [PATCH V2 11/11] Add support for Freescale's mx35pdk board. > total: 0 errors, 1 warnings, 1331 lines checked You already give me the solution Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 11/11] Add support for Freescale's mx35pdk board.
On 01/20/2011 10:41 AM, Wolfgang Denk wrote:
> Dear Stefano Babic,
>
> In message <1295513194-16158-12-git-send-email-sba...@denx.de> you wrote:
>> The patch adds suupport for the Freescale's mx35pdk board
>> (known as well as mx35_3stack).
>
> Checkpatch says:
>
> [U-Boot] [PATCH V2 11/11] Add support for Freescale's mx35pdk board.
> total: 0 errors, 1 warnings, 1331 lines checked
>
> (Prototype for smc911x_initialize() is in netdev.h).
Thanks, I have not search with attention. I fix it.
> Please use TAB for indentation.
Thanks - in this case checkpatch reports nothing, and I suppose
everything is ok.
>
>
>> +int checkboard(void)
>> +{
>> +struct ccm_regs *ccm =
>> +(struct ccm_regs *)IMX_CCM_BASE;
>> +
>> +puts("Board: MX35 PDK ");
>> +
>> +/*
>> + * Be sure that I2C is initialized to check
>> + * the board revision
>> + */
>> +i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
>
> Error checking?
I wil ladd it
>
>> +/* Print board revision */
>> +puts(board_detect() ? "2.0" : "1.0");
>> +
>> +/* Print CPU revision */
>> +puts(" i.MX35 ");
>
> I mentioned this before: If you make board_detect() return 1 or 2,
> you can combine the calls to puts() for example like that:
I was unsure, it seemed to me easier to understand as it is implemented
now, becaues board_detect() is used to detect if the PMIC is installed
or not. It returns 0 or 1, and tell if the test for the PMIC was
successful.
Probably the former version of the board has no pmic at all or was not
connected to I2C. So in another part of code board_detect is used in
boolean form:
if (board_detect()) {
I thought that to combine the result makes some confusion. Probably it
is clearer to use get_board_rev() instead of board_detect() and to
extract the revision number from the returned u32:
printf("Board: MX35 PDK %d.0 i.MX35 ", (get_board_rev() >> 8) & 0xFF);
> Eventually similar improvment could be done here. [Just a hint - feel
> free to post-pone into a later patch if this affects other boards as
> well.]
Agree, to change this I would prefer a patch for all i.MX boards at the
same time. They use at the moment the same approach I use now.
best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de
=
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Re: [U-Boot] [PATCH V2 10/11] SPI: mxc_spi: replace fixed offsets with structures
On 01/20/2011 10:33 AM, Wolfgang Denk wrote: > Dear Stefano Babic, > > In message <1295513194-16158-11-git-send-email-sba...@denx.de> you wrote: >> This patch cleans driver code replacing all accesses >> to registers with fixed offsets with a corresponding >> structure. > > Checkpatch says: > > [U-Boot] [PATCH V2 10/11] SPI: mxc_spi: replace fixed offsets with > total: 3 errors, 0 warnings, 274 lines checked > > Please fix. ok, we are clearly a problem using checkpatch: checkpatch.pl --no-tree 0010-SPI-mxc_spi-replace-fixed-offsets-with-structures.patch total: 0 errors, 0 warnings, 274 lines checked 0010-SPI-mxc_spi-replace-fixed-offsets-with-structures.patch has no obvious style problems and is ready for submission. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 08/11] SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case
On 01/20/2011 10:32 AM, Wolfgang Denk wrote:
> Dear Stefano Babic,
>
> In message <1295513194-16158-9-git-send-email-sba...@denx.de> you wrote:
>> From: Anatolij Gustschin
>>
>> We need to shift only one time in each cycle in the swapping loop
>> for unaligned tx case. Currently two byte shift operations are
>> performed in each loop cycle causing zero gaps in the transmited
>> data, so not all data scheduled for transmition is actually
>> transmited.
>>
>> The proper swapping in unaligned rx case is missing, so add it
>> as we need to put the received data into the rx buffer in the
>> correct byte order.
>>
>> Signed-off-by: Anatolij Gustschin
>> Tested-by: Stefano Babic
>
> Checkpatch says:
>
> [U-Boot] [PATCH V2 08/11] SPI: mxc_spi: fix swapping bug and add
> total: 0 errors, 1 warnings, 22 lines checked
WARNING: braces {} are not necessary for single statement blocks
#31: FILE: drivers/spi/mxc_spi.c:375:
+ for (i = 0; i < 4; i++) {
data = (data << 8) | (*dout++ & 0xFF);
}
total: 0 errors, 1 warnings, 22 lines checked
This is exactly what you prefer, but checkpatch complains. IMHO I prefer
to fix in this patch removing braces, and do not change in previous
patches where you suggest to add braces (and then checkpatch will
complain about it).
Best regards,
Stefano Babic
--
=
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [U-Boot] [PATCH V2 05/11] I2C: mxc_i2c: address failure with mx35 processor
On 01/20/2011 10:30 AM, Wolfgang Denk wrote: > Dear Stefano Babic, > > In message <1295513194-16158-6-git-send-email-sba...@denx.de> you wrote: >> There is sporadic failures when more as one I2C slave >> is on the bus and the processor tries to communicate >> with more as one slave. >> The problem was seen on a mx35pdk (two I2C slaves, >> PMIC controller and CAN/RTC chip). > > Please also mention which approach the patch takes to fix this > problem. Ok > > Checkpatch says: > > total: 1 errors, 1 warnings, 166 lines checked I know, but I found the construct ok. checkpatch complains against using assignment in if function, even if it is large used. Again, as we have a tool to check patches, I will change to remove this issue. > > Please have a look. > >> -#ifdef DEBUG >> -#define DPRINTF(args...) printf(args) >> -#else >> -#define DPRINTF(args...) >> -#endif > > Ah. Please forget the related comment in my previous message. ...and you please forget my comment to your comment... > > But please mention this change in the commit message. I will do it. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 04/11] I2C: mxc_i2c: get rid of __REG access
On 01/20/2011 10:27 AM, Wolfgang Denk wrote:
> Dear Stefano Babic,
>
> In message <1295513194-16158-5-git-send-email-sba...@denx.de> you wrote:
>> This driver accesses to processor's register
>> via __REG macros, that are removed (or are planned
>> to be removed) and replaced by C structures.
>> This patches replaces all occurrencies of __REG macros.
>
> Checkpatch says:
>
> total: 0 errors, 2 warnings, 169 lines checked
I have seen, but because __FUNCTION__is generally used, I have not
replaced the occurrencies with the suggested __func__. At least, not in
this patch. I think it is should be done in a separate patch (I will do
in next post).
>> @@ -204,7 +219,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar
>> *buf, int len)
>> int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
>> {
>> int timeout = 1;
>> -DPRINTF("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",__FUNCTION__,
>> chip, addr, alen, len);
>> +DPRINTF("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",
>> +__FUNCTION__, chip, addr, alen, len);
>
> While touching this anyway, can we please convert the DPRINTF() into
> debug() ?
You missed the following patch that removes the ugly private debug
functions..
Best regards,
Stefano Babic
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=
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Re: [U-Boot] [PATCH V2 01/11] Add support for MX35 processor
On 01/20/2011 10:25 AM, Wolfgang Denk wrote:
> Dear Stefano Babic,
>
> In message <1295513194-16158-2-git-send-email-sba...@denx.de> you wrote:
>> The patch adds basic support for the Freescale's i.MX35
>> (arm1136 based) processor.
>>
>> Signed-off-by: Stefano Babic
>
> checkpatch says:
>
> [U-Boot] [PATCH V2 01/11] Add support for MX35 processor
> total: 7 errors, 8 warnings, 2109 lines checked
Mmmhh...checkpatch says:
total: 0 errors, 8 warnings, 2109 lines checked
0001-Add-support-for-MX35-processor.patch has style problems, please
review. If any of these errors
are false positives report them to the maintainer, see
Warnings are only related to typedef ("do not add typedef"), so I do not
know where the errors are coming from. Do you use the --no-tree option
as I usually set?
>
>> +u32 imx_get_uartclk(void)
>> +{
>> +u32 freq;
>> +struct ccm_regs *ccm =
>> +(struct ccm_regs *)IMX_CCM_BASE;
>> +u32 pdr4 = readl(&ccm->pdr4);
>> +
>> +if (readl(&ccm->pdr3) & MXC_CCM_PDR3_UART_M_U)
>> +freq = get_mcu_main_clk();
>> +else
>> +freq = decode_pll(readl(&ccm->ppctl),
>> +CONFIG_MX35_HCLK_FREQ);
>
> Braces needed
checkpatch (and generally accepted in linux, as I can see) requires that
single statements must not be surrounded by braces. checkpatch returns a
warning, explaining that braces are not needed.
I see in the past some comments requiring to remove braces, but it you
prefer to add them. IMHO it is better to follow the same codestyle as
linux, using the same tools as checkpatch. I do not know why we have two
different results from checkpatch, I try to investigate. I had prefer to
use always braces in if statement, to avoid possible errors if some code
is added, but since checkpatch complains about it I was convinced to
remove them.
>
>> +case USB_CLK:
>> +usb_prdf = (reg4 >> 25) & 0x7;
>> +usb_podf = (reg4 >> 22) & 0x7;
>> +if (reg4 & 0x200)
>> +pll = get_mcu_main_clk();
>> +else
>> +pll = decode_pll(readl(&ccm->ppctl),
>> +CONFIG_MX35_HCLK_FREQ);
>
> Ditto. Please fix globally.
See my previous comment. I would prefer to not have a different rule in
u-boot, and not go against some provided tool (we use both checkpatch)
if not strictly required.
>
> Indeed they should. Why don't you autogenerate these, then?
>
> We have all the tools in place, use them.
I will see how to use them.
>
>
>> +#define NFC_BUF_SIZE0x1000
>> +#define NFC_BUFSIZE_REG_OFF (0 + 0x00)
>> +#define RAM_BUFFER_ADDRESS_REG_OFF (0 + 0x04)
>> +#define NAND_FLASH_ADD_REG_OFF (0 + 0x06)
>> +#define NAND_FLASH_CMD_REG_OFF (0 + 0x08)
>> +#define NFC_CONFIGURATION_REG_OFF (0 + 0x0A)
>> +#define ECC_STATUS_RESULT_REG_OFF (0 + 0x0C)
>> +#define ECC_RSLT_MAIN_AREA_REG_OFF (0 + 0x0E)
>> +#define ECC_RSLT_SPARE_AREA_REG_OFF (0 + 0x10)
>> +#define NF_WR_PROT_REG_OFF (0 + 0x12)
>> +#define NAND_FLASH_WR_PR_ST_REG_OFF (0 + 0x18)
>> +#define NAND_FLASH_CONFIG1_REG_OFF (0 + 0x1A)
>> +#define NAND_FLASH_CONFIG2_REG_OFF (0 + 0x1C)
>> +#define UNLOCK_START_BLK_ADD_REG_OFF(0 + 0x20)
>> +#define UNLOCK_END_BLK_ADD_REG_OFF (0 + 0x22)
>
> Why has this not been converted into a C struct?
I will check, I think I do not require anymore. NAND driver is in
mainline and does not require them. Probably I can remove them. In the
code I post now I do not use them at all, so probably I can remove them
without problems.
>
> ...
>> +typedef enum iomux_pin_config {
>> +MUX_CONFIG_FUNC = 0,/*!< used as function */
>> +MUX_CONFIG_ALT1,/*!< used as alternate function 1 */
>> +MUX_CONFIG_ALT2,/*!< used as alternate function 2 */
>> +MUX_CONFIG_ALT3,/*!< used as alternate function 3 */
>> +MUX_CONFIG_ALT4,/*!< used as alternate function 4 */
>> +MUX_CONFIG_ALT5,/*!< used as alternate function 5 */
>> +MUX_CONFIG_ALT6,/*!< used as alternate function 6 */
>> +MUX_CONFIG_ALT7,/*!< used as alternate function 7 */
>> +MUX_CONFIG_SION = 0x1 << 4, /*!< used as LOOPBACK:MUX SION bit */
>> +MUX_CONFIG_GPIO = MUX_CONFIG_ALT5, /*!< used as GPIO */
>> +} iomux_pin_cfg_t;
>
> /*!< ???
I forget to remove them, thanks.
> ...
>> +/*!
>> + * Request ownership for an IO pin. This function has to be the first one
>> + * being called before that pin is used. The caller has to check the
>> + * return value to make sure it returns 0.
>> + *
>> + * @param pin a name defined by \b iomux_pin_name_t
>> + * @param cfg an input function as defined in \b
>> #iomux_pin_cfg_t
>
> \b ???
>
>> + * @param pin a name defined by \b iomux_pin_name_t
>> + * @param cfg an input function as defined in \b
>> #iomux_
Re: [U-Boot] [PATCH] powerpc/85xx: Add SERDES support for P1010/P1014
Dear Prabhakar Kushwaha,
In message <1295515858-4011-1-git-send-email-prabha...@freescale.com> you wrote:
> Add the ability to determine if a given IP block connected on SERDES is
> configured. This is useful for things like PCIe and SRIO since they are only
> ever connected on SERDES.
...
> +void fsl_serdes_init(void)
> +{
> + volatile ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
Use of volatile is usually wrong: see
Documentation/volatile-considered-harmful.txt
Best regards,
Wolfgang Denk
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Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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Re: [U-Boot] Adding support for MX35
Dear Stefano Babic, In message <1295513194-16158-1-git-send-email-sba...@denx.de> you wrote: > Patchset V2 contain patches for SPI sent previously independently to ML > and additional patches for I2C. I just learned that I was running an old version of checkpatch, which turned out some false positives (and my short visual inspection did not recognize this). Sorry for the flase alarms. The remaining warnings are: [U-Boot] [PATCH V2 01/11] Add support for MX35 processor total: 0 errors, 8 warnings, 2109 lines checked [U-Boot] [PATCH V2 04/11] I2C: mxc_i2c: get rid of __REG access total: 0 errors, 2 warnings, 169 lines checked [U-Boot] [PATCH V2 05/11] I2C: mxc_i2c: address failure with mx35 total: 1 errors, 1 warnings, 166 lines checked [U-Boot] [PATCH V2 08/11] SPI: mxc_spi: fix swapping bug and add total: 0 errors, 1 warnings, 22 lines checked [U-Boot] [PATCH V2 11/11] Add support for Freescale's mx35pdk board. total: 0 errors, 1 warnings, 1331 lines checked Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de What was sliced bread the greatest thing since? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/85xx: Add support for Integrated Flash Controller (IFC)
Dear Dudhat Dipen-B09055, In message <57d3ab35efb0e542a4326dbd78e17e950a5...@039-sn1mpn1-005.039d.mgd.msft.net> you wrote: > > Please find my comment inline with your comment. Please do not full quote. > Checkpatch says: > > [Dudhat Dipen-B09055] Now all the architecture related header files are > moved to arch/powerpc/include/asm/ > Isn't this correct?? Good point. As it turns out, I was running a pretty old version of checkpatch. Please ignore the checkpatch related comments. Thanks for pointing out! Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Einstein argued that there must be simplified explanations of nature, because God is not capricious or arbitrary. No such faith comforts the software engineer. - Fred Brooks, Jr. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 11/11] Add support for Freescale's mx35pdk board.
Dear Stefano Babic,
In message <1295513194-16158-12-git-send-email-sba...@denx.de> you wrote:
> The patch adds suupport for the Freescale's mx35pdk board
> (known as well as mx35_3stack).
Checkpatch says:
[U-Boot] [PATCH V2 11/11] Add support for Freescale's mx35pdk board.
total: 0 errors, 1 warnings, 1331 lines checked
(Prototype for smc911x_initialize() is in netdev.h).
...
> +.macro init_clock
> + ldr r0, =CCM_BASE_ADDR
> +
> +/* default CLKO to 1/32 of the ARM core*/
> +ldr r1, [r0, #CLKCTL_COSR]
> +bic r1, r1, #0x0FF00
> +bic r1, r1, #0x000FF
> +mov r2, #0x6C00
> +add r2, r2, #0x67
> +orr r1, r1, r2
> +str r1, [r0, #CLKCTL_COSR]
> +
> +ldr r2, =CCM_CCMR_CONFIG
> +str r2, [r0, #CLKCTL_CCMR]
> +
> + check_soc_version r1, r2
> + cmp r1, #CHIP_REV_2_0
> + ldrhs r3, =CCM_MPLL_532_HZ
> + bhs 1f
> + ldr r2, [r0, #CLKCTL_PDR0]
> +tst r2, #CLKMODE_CONSUMER
> +ldrne r3, =CCM_MPLL_532_HZ /* consumer path*/
> +ldreq r3, =CCM_MPLL_399_HZ /* auto path*/
etc. etc.
Please use TAB for indentation.
> +int checkboard(void)
> +{
> + struct ccm_regs *ccm =
> + (struct ccm_regs *)IMX_CCM_BASE;
> +
> + puts("Board: MX35 PDK ");
> +
> + /*
> + * Be sure that I2C is initialized to check
> + * the board revision
> + */
> + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
Error checking?
> + /* Print board revision */
> + puts(board_detect() ? "2.0" : "1.0");
> +
> + /* Print CPU revision */
> + puts(" i.MX35 ");
I mentioned this before: If you make board_detect() return 1 or 2,
you can combine the calls to puts() for example like that:
printf("Board: MX35 PDK %d.0 i.MX35 ", board_detect());
> + if (get_cpu_rev() & CHIP_REV_2_0)
> + puts("2.0 [");
> + else
> + puts("1.0 [");
Eventually similar improvment could be done here. [Just a hint - feel
free to post-pone into a later patch if this affects other boards as
well.]
Best regards,
Wolfgang Denk
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Re: [U-Boot] [PATCH V2 10/11] SPI: mxc_spi: replace fixed offsets with structures
Dear Stefano Babic, In message <1295513194-16158-11-git-send-email-sba...@denx.de> you wrote: > This patch cleans driver code replacing all accesses > to registers with fixed offsets with a corresponding > structure. Checkpatch says: [U-Boot] [PATCH V2 10/11] SPI: mxc_spi: replace fixed offsets with total: 3 errors, 0 warnings, 274 lines checked Please fix. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de "I think trash is the most important manifestation of culture we have in my lifetime." - Johnny Legend ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 08/11] SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case
Dear Stefano Babic, In message <1295513194-16158-9-git-send-email-sba...@denx.de> you wrote: > From: Anatolij Gustschin > > We need to shift only one time in each cycle in the swapping loop > for unaligned tx case. Currently two byte shift operations are > performed in each loop cycle causing zero gaps in the transmited > data, so not all data scheduled for transmition is actually > transmited. > > The proper swapping in unaligned rx case is missing, so add it > as we need to put the received data into the rx buffer in the > correct byte order. > > Signed-off-by: Anatolij Gustschin > Tested-by: Stefano Babic Checkpatch says: [U-Boot] [PATCH V2 08/11] SPI: mxc_spi: fix swapping bug and add total: 0 errors, 1 warnings, 22 lines checked Please have a look. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The complexity of software is an essential property, not an acciden- tal one. Hence, descriptions of a software entity that abstract away its complexity often abstract away its essence.- Fred Brooks, Jr. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/85xx: Add SERDES support for P1010/P1014
Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are only
ever connected on SERDES.
Updated MPC85xx_PORDEVSR_IO_SEL & MPC85xx_PORDEVSR_IO_SEL_SHIFT
Signed-off-by: Prabhakar Kushwaha
Signed-off-by: Kumar Gala
---
Based git://git.denx.de/u-boot-mpc85xx.git (branch master)
arch/powerpc/cpu/mpc85xx/Makefile |2 +
arch/powerpc/cpu/mpc85xx/p1010_serdes.c | 75 +++
arch/powerpc/include/asm/immap_85xx.h |5 ++
3 files changed, 82 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/cpu/mpc85xx/p1010_serdes.c
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile
b/arch/powerpc/cpu/mpc85xx/Makefile
index b7f51e7..69c43b3 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -87,9 +87,11 @@ COBJS-$(CONFIG_MPC8548) += mpc8548_serdes.o
COBJS-$(CONFIG_MPC8568) += mpc8568_serdes.o
COBJS-$(CONFIG_MPC8569) += mpc8569_serdes.o
COBJS-$(CONFIG_MPC8572) += mpc8572_serdes.o
+COBJS-$(CONFIG_P1010) += p1010_serdes.o
COBJS-$(CONFIG_P1011) += p1021_serdes.o
COBJS-$(CONFIG_P1012) += p1021_serdes.o
COBJS-$(CONFIG_P1013) += p1013_serdes.o
+COBJS-$(CONFIG_P1014) += p1010_serdes.o
COBJS-$(CONFIG_P1020) += p1021_serdes.o
COBJS-$(CONFIG_P1021) += p1021_serdes.o
COBJS-$(CONFIG_P1022) += p1022_serdes.o
diff --git a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
new file mode 100644
index 000..4524d29
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
@@ -0,0 +1,75 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Author: Prabhakar Kushwaha
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define SRDS1_MAX_LANES4
+#define SRDS2_MAX_LANES2
+
+static u32 serdes1_prtcl_map, serdes2_prtcl_map;
+
+static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
+ [0x00] = {NONE, NONE, NONE, NONE},
+ [0x01] = {PCIE1, PCIE2, SGMII_TSEC2, SGMII_TSEC3},
+ [0x02] = {PCIE1, SGMII_TSEC1, SGMII_TSEC2, SGMII_TSEC3},
+ [0x03] = {NONE, SGMII_TSEC1, SGMII_TSEC2, SGMII_TSEC3},
+};
+
+static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
+ [0x00] = {NONE, NONE},
+ [0x01] = {SATA1, SATA2},
+ [0x02] = {SATA1, SATA2},
+ [0x03] = {PCIE1, PCIE2},
+};
+
+
+int is_serdes_configured(enum srds_prtcl device)
+{
+ int ret = (1 << device) & serdes1_prtcl_map;
+
+ if (ret)
+ return ret;
+
+ return (1 << device) & serdes2_prtcl_map;
+}
+
+void fsl_serdes_init(void)
+{
+ volatile ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+ u32 pordevsr = in_be32(&gur->pordevsr);
+ u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
+ MPC85xx_PORDEVSR_IO_SEL_SHIFT;
+ int lane;
+
+ debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
+
+ if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
+ printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
+ return;
+ }
+ for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
+ enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
+ serdes1_prtcl_map |= (1 << lane_prtcl);
+ }
+
+ if (srds_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) {
+ printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
+ return;
+ }
+
+ for (lane = 0; lane < SRDS2_MAX_LANES; lane++) {
+ enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
+ serdes2_prtcl_map |= (1 << lane_prtcl);
+ }
+}
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index 93a9e6c..7531fdc 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1891,8 +1891,13 @@ typedef struct ccsr_gur {
#define MPC85xx_PORDEVSR_IO_SEL0x007c
#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 18
#else
+#if defined(CONFIG_P1010)
+#define MPC85xx_PORDEVSR_IO_SEL0x0060
+#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 21
+#else
#define MPC85xx_PORDEVSR_IO_SEL0x0078
#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 19
+#endif /* if defined(CONFIG_P1010) */
#endif
#define MPC85xx_PORDEVSR_PCI2_ARB 0x0004
#define MPC85xx_PORDEVSR_PCI1_ARB 0x0002
--
1.6.3.1
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Re: [U-Boot] [PATCH V2 05/11] I2C: mxc_i2c: address failure with mx35 processor
Dear Stefano Babic, In message <1295513194-16158-6-git-send-email-sba...@denx.de> you wrote: > There is sporadic failures when more as one I2C slave > is on the bus and the processor tries to communicate > with more as one slave. > The problem was seen on a mx35pdk (two I2C slaves, > PMIC controller and CAN/RTC chip). Please also mention which approach the patch takes to fix this problem. Checkpatch says: total: 1 errors, 1 warnings, 166 lines checked Please have a look. > -#ifdef DEBUG > -#define DPRINTF(args...) printf(args) > -#else > -#define DPRINTF(args...) > -#endif Ah. Please forget the related comment in my previous message. But please mention this change in the commit message. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de EMACS belongs in : Editor too big! ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 04/11] I2C: mxc_i2c: get rid of __REG access
Dear Stefano Babic,
In message <1295513194-16158-5-git-send-email-sba...@denx.de> you wrote:
> This driver accesses to processor's register
> via __REG macros, that are removed (or are planned
> to be removed) and replaced by C structures.
> This patches replaces all occurrencies of __REG macros.
Checkpatch says:
total: 0 errors, 2 warnings, 169 lines checked
Please have a look.
...
> @@ -204,7 +219,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf,
> int len)
> int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
> {
> int timeout = 1;
> - DPRINTF("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",__FUNCTION__,
> chip, addr, alen, len);
> + DPRINTF("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",
> + __FUNCTION__, chip, addr, alen, len);
While touching this anyway, can we please convert the DPRINTF() into
debug() ?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
"Summit meetings tend to be like panda matings. The expectations are
always high, and the results usually disappointing." - Robert Orben
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Re: [U-Boot] [PATCH V2 01/11] Add support for MX35 processor
Dear Stefano Babic,
In message <1295513194-16158-2-git-send-email-sba...@denx.de> you wrote:
> The patch adds basic support for the Freescale's i.MX35
> (arm1136 based) processor.
>
> Signed-off-by: Stefano Babic
checkpatch says:
[U-Boot] [PATCH V2 01/11] Add support for MX35 processor
total: 7 errors, 8 warnings, 2109 lines checked
Please fix.
> +u32 get_cpu_rev(void)
> +{
> + int reg;
> + struct iim_regs *iim =
> + (struct iim_regs *)IIM_BASE_ADDR;
> + reg = readl(&iim->iim_srev);
> + if (!reg) {
> + reg = readw(ROMPATCH_REV);
> + reg <<= 4;
> + } else
> + reg += CHIP_REV_1_0;
If there are braces for the "if", then there shall also be braces for
the "else" ("Use braces in both branches.")
> +u32 imx_get_uartclk(void)
> +{
> + u32 freq;
> + struct ccm_regs *ccm =
> + (struct ccm_regs *)IMX_CCM_BASE;
> + u32 pdr4 = readl(&ccm->pdr4);
> +
> + if (readl(&ccm->pdr3) & MXC_CCM_PDR3_UART_M_U)
> + freq = get_mcu_main_clk();
> + else
> + freq = decode_pll(readl(&ccm->ppctl),
> + CONFIG_MX35_HCLK_FREQ);
Braces needed.
> + case USB_CLK:
> + usb_prdf = (reg4 >> 25) & 0x7;
> + usb_podf = (reg4 >> 22) & 0x7;
> + if (reg4 & 0x200)
> + pll = get_mcu_main_clk();
> + else
> + pll = decode_pll(readl(&ccm->ppctl),
> + CONFIG_MX35_HCLK_FREQ);
Ditto. Please fix globally.
> index 000..c1dc62a
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-mx35/asm-offsets.h
> @@ -0,0 +1,21 @@
> +/*
> + * needed for lowlevel_init.S
> + *
> + * These should be auto-generated
> + */
> +/* CCM */
> +#define CLKCTL_CCMR 0x00
> +#define CLKCTL_PDR0 0x04
> +#define CLKCTL_PDR1 0x08
> +#define CLKCTL_PDR2 0x0C
> +#define CLKCTL_PDR3 0x10
> +#define CLKCTL_PDR4 0x14
> +#define CLKCTL_RCSR 0x18
> +#define CLKCTL_MPCTL 0x1C
> +#define CLKCTL_PPCTL 0x20
> +#define CLKCTL_ACMR 0x24
> +#define CLKCTL_COSR 0x28
> +#define CLKCTL_CGR0 0x2C
> +#define CLKCTL_CGR1 0x30
> +#define CLKCTL_CGR2 0x34
> +#define CLKCTL_CGR3 0x38
Indeed they should. Why don't you autogenerate these, then?
We have all the tools in place, use them.
> +#define NFC_BUF_SIZE 0x1000
> +#define NFC_BUFSIZE_REG_OFF (0 + 0x00)
> +#define RAM_BUFFER_ADDRESS_REG_OFF (0 + 0x04)
> +#define NAND_FLASH_ADD_REG_OFF (0 + 0x06)
> +#define NAND_FLASH_CMD_REG_OFF (0 + 0x08)
> +#define NFC_CONFIGURATION_REG_OFF (0 + 0x0A)
> +#define ECC_STATUS_RESULT_REG_OFF (0 + 0x0C)
> +#define ECC_RSLT_MAIN_AREA_REG_OFF (0 + 0x0E)
> +#define ECC_RSLT_SPARE_AREA_REG_OFF (0 + 0x10)
> +#define NF_WR_PROT_REG_OFF (0 + 0x12)
> +#define NAND_FLASH_WR_PR_ST_REG_OFF (0 + 0x18)
> +#define NAND_FLASH_CONFIG1_REG_OFF (0 + 0x1A)
> +#define NAND_FLASH_CONFIG2_REG_OFF (0 + 0x1C)
> +#define UNLOCK_START_BLK_ADD_REG_OFF(0 + 0x20)
> +#define UNLOCK_END_BLK_ADD_REG_OFF (0 + 0x22)
Why has this not been converted into a C struct?
...
> +typedef enum iomux_pin_config {
> + MUX_CONFIG_FUNC = 0,/*!< used as function */
> + MUX_CONFIG_ALT1,/*!< used as alternate function 1 */
> + MUX_CONFIG_ALT2,/*!< used as alternate function 2 */
> + MUX_CONFIG_ALT3,/*!< used as alternate function 3 */
> + MUX_CONFIG_ALT4,/*!< used as alternate function 4 */
> + MUX_CONFIG_ALT5,/*!< used as alternate function 5 */
> + MUX_CONFIG_ALT6,/*!< used as alternate function 6 */
> + MUX_CONFIG_ALT7,/*!< used as alternate function 7 */
> + MUX_CONFIG_SION = 0x1 << 4, /*!< used as LOOPBACK:MUX SION bit */
> + MUX_CONFIG_GPIO = MUX_CONFIG_ALT5, /*!< used as GPIO */
> +} iomux_pin_cfg_t;
/*!< ???
> +/*!
/*! ???
...
> +/*!
> + * Request ownership for an IO pin. This function has to be the first one
> + * being called before that pin is used. The caller has to check the
> + * return value to make sure it returns 0.
> + *
> + * @param pin a name defined by \b iomux_pin_name_t
> + * @param cfg an input function as defined in \b
> #iomux_pin_cfg_t
\b ???
> + * @param pin a name defined by \b iomux_pin_name_t
> + * @param cfg an input function as defined in \b
> #iomux_pin_cfg_t
"iomux_pin_name_t", but "#iomux_pin_cfg_t" ???
...
> +typedef enum iomux_pins {
...
> + MX35_PIN_A0 = _MXC_BUILD_NON_GPIO_PIN(0x28, 0x368),
> + MX35_PIN_A1 = _MXC_BUILD_NON_GPIO_PIN(0x2C, 0x36C),
> + MX35_PIN_A2 = _MXC_BUILD_NON_GPIO_PIN(0x30, 0x370),
> + MX35_PIN_A3 = _MXC_BUILD_NON_GPIO_PIN(0x34, 0x374),
> + MX35_PIN_A4 = _MXC_BUILD_NON_GPIO_PIN(0x38, 0x378),
> + MX35_PIN_A
Re: [U-Boot] P2020 L2 cache as SRAM
>> >We're trying to configure the PPC P2020 cpu to use the L2 cache >> >as SRAM so we can load the U-Boot code in there. However we >> >stumble into problems. Sometimes the cpu goes on trap when >> >trying to access this area. Sometimes there's no trap but we >> >seem to access a different area. That's probably a problem with >> >setting up a TLB/LAW. >> > >> >Has anybody already done this and could share some code with >> >us? >> > >> >I've seen that there's a mpc85xx branch with quite some work >> >going on. Where should we base our work on? Should we use >> >the master or is it better to use this branch? I'm used to svn, >> >not git, so there may be other options I don't know about yet. >> >> I know you're busy with patches and releasing, I just wanted >> to ask again if anybody has already done this. > >Yes, it's been done. P1_P2_RDB does this when configured for NAND boot. > >Look for CONFIG_SYS_INIT_L2_ADDR. Thanks for the hint. We have seen this and compared it to our implementation which was based on the AN3646.pdf (chapter 4). It seems that disabling the errors as done in cpu_init_nand.c helps quite a bit. We've seen this code before but for some reason that register got lost in the conversion to assembler. So now it works fine. Thanks. bye Fabi ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/85xx: Add support for Integrated Flash Controller (IFC)
Dear Dipen Dudhat,
In message <1295509580-28959-1-git-send-email-dipen.dud...@freescale.com> you
wrote:
>
> The Integrated Flash Controller (IFC) is used to access the external
> NAND Flash, NOR Flash, EPROM, SRAM and Generic ASIC memories.Four chip
> selects are provided in IFC so that maximum of four Flash devices can be
> hooked, but only one can be accessed at a given time.
...
> - GPCM Machine (Generic ASIC Mode)
> - Support for x8/16/32 bit device
> - Address and Data are shared on I/O bus
> - Following Address and Data sequences can be supported
> on I/O bus
> â 32 bit I/O: AD
> â 16 bit I/O: AADD
> â 8 bit I/O :
Please use plain ASCII characters.
Checkpatch says:
ERROR: do not modify files in include/asm, change architecture specific files
in include/asm-
#307: +++ b/arch/powerpc/include/asm/config.h
ERROR: do not modify files in include/asm, change architecture specific files
in include/asm-
#323: +++ b/arch/powerpc/include/asm/fsl_ifc.h
ERROR: do not modify files in include/asm, change architecture specific files
in include/asm-
#1257: +++ b/arch/powerpc/include/asm/fsl_law.h
ERROR: do not modify files in include/asm, change architecture specific files
in include/asm-
#1269: +++ b/arch/powerpc/include/asm/immap_85xx.h
total: 4 errors, 0 warnings, 1084 lines checked
Please fix.
> +void print_ifc_regs(void)
> +{
> + int i, j;
> +
> + printf("\nIFC Controller Registers\n");
> + for (i = 0; i < FSL_IFC_BANK_COUNT; i++) {
> + printf("\nCSPR%d\t0x%08X\tAMASK%d\t0x%08X\tCSOR%d\t0x%08X\n",
> + i, get_ifc_cspr(i), i, get_ifc_amask(i),
> + i, get_ifc_csor(i));
> + for (j = 0; j < 4; j++)
> + printf("IFC_FTIM%d:0x%08X ", j, get_ifc_ftim(i, j));
> + }
> +}
Please note that printf formats starting with "\n..." are almost
always wrong or inappropriate. "\n" _terminates_ a line of text, it
does not start one.
Don't print useless blank lines.
> +/*
> + * Instruction opcodes to be programmed
> + * in FIR registers- 6bits
> + */
> +#define IFC_FIR_OP_NOP 0x00
> +#define IFC_FIR_OP_CA0 0x01
> +#define IFC_FIR_OP_CA1 0x02
> +#define IFC_FIR_OP_CA2 0x03
> +#define IFC_FIR_OP_CA3 0x04
> +#define IFC_FIR_OP_RA0 0x05
> +#define IFC_FIR_OP_RA1 0x06
> +#define IFC_FIR_OP_RA2 0x07
> +#define IFC_FIR_OP_RA3 0x08
> +#define IFC_FIR_OP_CMD0 0x09
> +#define IFC_FIR_OP_CMD1 0x0A
> +#define IFC_FIR_OP_CMD2 0x0B
> +#define IFC_FIR_OP_CMD3 0x0C
> +#define IFC_FIR_OP_CMD4 0x0D
> +#define IFC_FIR_OP_CMD5 0x0E
> +#define IFC_FIR_OP_CMD6 0x0F
> +#define IFC_FIR_OP_CMD7 0x10
> +#define IFC_FIR_OP_CW0 0x11
> +#define IFC_FIR_OP_CW1 0x12
> +#define IFC_FIR_OP_CW2 0x13
> +#define IFC_FIR_OP_CW3 0x14
> +#define IFC_FIR_OP_CW4 0x15
> +#define IFC_FIR_OP_CW5 0x16
> +#define IFC_FIR_OP_CW6 0x17
> +#define IFC_FIR_OP_CW7 0x18
> +#define IFC_FIR_OP_WBCD 0x19
> +#define IFC_FIR_OP_RBCD 0x1A
> +#define IFC_FIR_OP_BTRD 0x1B
> +#define IFC_FIR_OP_RDSTAT0x1C
> +#define IFC_FIR_OP_NWAIT 0x1D
> +#define IFC_FIR_OP_WFR 0x1E
> +#define IFC_FIR_OP_SBRD 0x1F
> +#define IFC_FIR_OP_UA0x20
> +#define IFC_FIR_OP_RB0x21
Make this an enum.
> +/*
> + * ECC Error Status Registers (ECCSTAT0-ECCSTAT3)
> + */
> +/* Number of ECC errors on sector n (n = 0-15) */
> +#define IFC_NAND_ECCSTAT0_NUMBER00x0F00
> +#define IFC_NAND_ECCSTAT0_NUMBER10x000F
> +#define IFC_NAND_ECCSTAT0_NUMBER20x0F00
> +#define IFC_NAND_ECCSTAT0_NUMBER30x000F
> +#define IFC_NAND_ECCSTAT1_NUMBER40x0F00
> +#define IFC_NAND_ECCSTAT1_NUMBER50x000F
> +#define IFC_NAND_ECCSTAT1_NUMBER60x0F00
> +#define IFC_NAND_ECCSTAT1_NUMBER70x000F
> +#define IFC_NAND_ECCSTAT2_NUMBER80x0F00
> +#define IFC_NAND_ECCSTAT2_NUMBER90x000F
> +#define IFC_NAND_ECCSTAT2_NUMBER10 0x0F00
> +#define IFC_NAND_ECCSTAT2_NUMBER11 0x000F
> +#define IFC_NAND_ECCSTAT3_NUMBER12 0x0F00
> +#define IFC_NAND_ECCSTAT3_NUMBER13 0x000F
> +#define IFC_NAND_ECCSTAT3_NUMBER14 0x0F00
> +#define IFC_NAND_ECCSTAT3_NUMBER15 0x000F
Do you think these m
[U-Boot] [PATCH V2 11/11] Add support for Freescale's mx35pdk board.
The patch adds suupport for the Freescale's mx35pdk board (known as well as mx35_3stack). The board boots from the NOR flash. Following devices are supported: - two ethernet devices (FEC and SMC911x on debug board) - I2C - PMIC (MC13892) via I2C interface - UART - NOR flash (64MB) - NAND flash (2GB) - basic access to mc9sdz60 registers via I2C interface Signed-off-by: Stefano Babic --- MAINTAINERS |3 +- board/freescale/mx35pdk/Makefile| 49 board/freescale/mx35pdk/lowlevel_init.S | 363 +++ board/freescale/mx35pdk/mx35pdk.c | 309 ++ board/freescale/mx35pdk/mx35pdk.h | 101 + boards.cfg |1 + doc/README.mx35pdk | 188 include/configs/mx35pdk.h | 303 ++ 8 files changed, 1316 insertions(+), 1 deletions(-) create mode 100644 board/freescale/mx35pdk/Makefile create mode 100644 board/freescale/mx35pdk/lowlevel_init.S create mode 100644 board/freescale/mx35pdk/mx35pdk.c create mode 100644 board/freescale/mx35pdk/mx35pdk.h create mode 100644 doc/README.mx35pdk create mode 100644 include/configs/mx35pdk.h diff --git a/MAINTAINERS b/MAINTAINERS index 79aa596..0c3ddc1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -552,9 +552,10 @@ Rowel Atienza Stefano Babic ea20davinci + mx35pdk i.MX35 + mx51evk i.MX51 polaris xscale trizepsiv xscale - mx51evk i.MX51 vision2 i.MX51 Jason Liu diff --git a/board/freescale/mx35pdk/Makefile b/board/freescale/mx35pdk/Makefile new file mode 100644 index 000..b4a60d6 --- /dev/null +++ b/board/freescale/mx35pdk/Makefile @@ -0,0 +1,49 @@ +# +# Copyright (C) 2007, Guennadi Liakhovetski +# +# (C) Copyright 2008-2009 Freescale Semiconductor, Inc. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS := mx35pdk.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/freescale/mx35pdk/lowlevel_init.S b/board/freescale/mx35pdk/lowlevel_init.S new file mode 100644 index 000..241cb41 --- /dev/null +++ b/board/freescale/mx35pdk/lowlevel_init.S @@ -0,0 +1,363 @@ +/* + * Copyright (C) 2007, Guennadi Liakhovetski + * + * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include "mx35pdk.h" + +/* + * return soc version + * 0x10: TO1 + * 0x20: TO2 + * 0x30: TO3 + */ +.macro check_soc_version ret, tmp + ldr \tmp, =IIM_BASE_ADDR + ldr \ret, [\tmp, #IIM_SREV] + cmp \ret, #0x00 + moveq \tmp, #ROMPATCH_REV + ldreq \ret, [\tmp] + moveq \ret, \ret, lsl #4 + addne \ret, \ret, #0x10 +.endm + +/* + * AIPS setup - Only setup MPROTx registers. + * The PACR default values are good. + */ +.macro init_aips + /* +* Set all MPROTx to be
[U-Boot] [PATCH V2 10/11] SPI: mxc_spi: replace fixed offsets with structures
This patch cleans driver code replacing all accesses
to registers with fixed offsets with a corresponding
structure.
Signed-off-by: Stefano Babic
---
arch/arm/include/asm/arch-mx31/mx31-regs.h | 11 +++
arch/arm/include/asm/arch-mx35/imx-regs.h | 12
arch/arm/include/asm/arch-mx5/imx-regs.h | 12
drivers/spi/mxc_spi.c | 94 ---
4 files changed, 63 insertions(+), 66 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx31/mx31-regs.h
b/arch/arm/include/asm/arch-mx31/mx31-regs.h
index 46ed47c..105f7d8 100644
--- a/arch/arm/include/asm/arch-mx31/mx31-regs.h
+++ b/arch/arm/include/asm/arch-mx31/mx31-regs.h
@@ -64,6 +64,17 @@ struct gpio_regs {
u32 gpio_psr;
};
+struct cspi_regs {
+ u32 rxdata;
+ u32 txdata;
+ u32 ctrl;
+ u32 intr;
+ u32 dma;
+ u32 stat;
+ u32 period;
+ u32 test;
+};
+
#define IOMUX_PADNUM_MASK 0x1ff
#define IOMUX_PIN(gpionum, padnum) ((padnum) & IOMUX_PADNUM_MASK)
diff --git a/arch/arm/include/asm/arch-mx35/imx-regs.h
b/arch/arm/include/asm/arch-mx35/imx-regs.h
index e96a37d..6299ba9 100644
--- a/arch/arm/include/asm/arch-mx35/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx35/imx-regs.h
@@ -309,6 +309,18 @@ struct gpt_regs {
u32 counter;/* counter */
};
+/* CSPI registers */
+struct cspi_regs {
+ u32 rxdata;
+ u32 txdata;
+ u32 ctrl;
+ u32 intr;
+ u32 dma;
+ u32 stat;
+ u32 period;
+ u32 test;
+};
+
/* Watchdog Timer (WDOG) registers */
struct wdog_regs {
u16 wcr;/* Control */
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h
b/arch/arm/include/asm/arch-mx5/imx-regs.h
index 09b69f6..a1849f8 100755
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -256,6 +256,18 @@ struct src {
u32 simr;
};
+/* CSPI registers */
+struct cspi_regs {
+ u32 rxdata;
+ u32 txdata;
+ u32 ctrl;
+ u32 cfg;
+ u32 intr;
+ u32 dma;
+ u32 stat;
+ u32 period;
+};
+
struct iim_regs {
u32 stat;
u32 statm;
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index ee7675b..5068788 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -36,16 +36,6 @@
#include
-#define MXC_CSPIRXDATA 0x00
-#define MXC_CSPITXDATA 0x04
-#define MXC_CSPICTRL 0x08
-#define MXC_CSPIINT0x0C
-#define MXC_CSPIDMA0x10
-#define MXC_CSPISTAT 0x14
-#define MXC_CSPIPERIOD 0x18
-#define MXC_CSPITEST 0x1C
-#define MXC_CSPIRESET 0x00
-
#define MXC_CSPICTRL_EN(1 << 0)
#define MXC_CSPICTRL_MODE (1 << 1)
#define MXC_CSPICTRL_XCH (1 << 2)
@@ -76,15 +66,6 @@ static unsigned long spi_bases[] = {
#include
#include
-#define MXC_CSPIRXDATA 0x00
-#define MXC_CSPITXDATA 0x04
-#define MXC_CSPICTRL 0x08
-#define MXC_CSPICON0x0C
-#define MXC_CSPIINT0x10
-#define MXC_CSPIDMA0x14
-#define MXC_CSPISTAT 0x18
-#define MXC_CSPIPERIOD 0x1C
-#define MXC_CSPIRESET 0x00
#define MXC_CSPICTRL_EN(1 << 0)
#define MXC_CSPICTRL_MODE (1 << 1)
#define MXC_CSPICTRL_XCH (1 << 2)
@@ -119,16 +100,6 @@ static unsigned long spi_bases[] = {
#include
#include
-#define MXC_CSPIRXDATA 0x00
-#define MXC_CSPITXDATA 0x04
-#define MXC_CSPICTRL 0x08
-#define MXC_CSPIINT0x0C
-#define MXC_CSPIDMA0x10
-#define MXC_CSPISTAT 0x14
-#define MXC_CSPIPERIOD 0x18
-#define MXC_CSPITEST 0x1C
-#define MXC_CSPIRESET 0x00
-
#define MXC_CSPICTRL_EN(1 << 0)
#define MXC_CSPICTRL_MODE (1 << 1)
#define MXC_CSPICTRL_XCH (1 << 2)
@@ -158,6 +129,9 @@ static unsigned long spi_bases[] = {
#define OUTMXC_GPIO_DIRECTION_OUT
+#define reg_read readl
+#define reg_write(a, v) writel(v, a)
+
struct mxc_spi_slave {
struct spi_slave slave;
unsigned long base;
@@ -174,16 +148,6 @@ static inline struct mxc_spi_slave
*to_mxc_spi_slave(struct spi_slave *slave)
return container_of(slave, struct mxc_spi_slave, slave);
}
-static inline u32 reg_read(unsigned long addr)
-{
- return *(volatile unsigned long*)addr;
-}
-
-static inline void reg_write(unsigned long addr, u32 val)
-{
- *(volatile unsigned long*)addr = val;
-}
-
void spi_cs_activate(struct spi_slave *slave)
{
struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
@@ -254,17 +218,18 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs,
unsigned int cs,
u32 clk_src = mxc_get_clock(MXC_CSPI_CLK);
s32 pre_div = 0, post_div = 0, i, reg_ctrl, reg_config;
u32 ss_pol = 0, sclkpol = 0, sclkpha = 0;
+ struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
if
