Re: [U-Boot] [PATCH] powerpc/8xxx: Reduce NAND-SPL build size
Dear Kumar Gala, In message you wrote: > > >> We don't use disable_law in the SPL code so only build it if > >> !CONFIG_NAND_SPL. > > > > Does -ffunction-sections / --gc-sections not catch this automatically? > > Doesn't appear to, but not sure if the NAND makefiles are utilizing those > options. Can you please verify this first? At first glace it looks as if the compilation was done with -ffunction-sections and -fdata-sections, but I don't see --gc-sections on the linker command line Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Quantum particles: The dreams that stuff is made of. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-mpc85xx.git
A few fixes for v2011.03 release. The following changes since commit c7977858dcf1f656cbe91ea0dc3cb9139c6a8cc8: ARM: Update mach-types (2011-02-21 08:30:55 +0100) are available in the git repository at: git://git.denx.de/u-boot-mpc85xx.git master Ed Swarthout (1): powerpc/85xx: Fix plat_mp_up() disabling of BPTR for CoreNet Platforms John Schmoller (1): mpc8[5/6]xx: Ensure POST word does not get reset Kumar Gala (1): fsl_law: Fix LAW printing function Matthew McClintock (1): powerpc/85xx: Fix pixis_reset altbank mask on MPC8536DS Priyanka Jain (1): fsl_esdhc: Correcting esdhc timeout counter calculation York Sun (3): powerpc/mpc8xxx: Fix DDR3 timing_cfg_1 and sdram_mode registers corenet_ds: pick the middle value for all tested timing parameters powerpc/corenet_ds: revise platform dependent parameters arch/powerpc/cpu/mpc85xx/interrupts.c| 16 arch/powerpc/cpu/mpc85xx/mp.c|4 +- arch/powerpc/cpu/mpc86xx/interrupts.c| 16 arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c | 20 +++--- board/freescale/corenet_ds/ddr.c | 58 + drivers/misc/fsl_law.c |2 +- drivers/mmc/fsl_esdhc.c | 16 - include/configs/MPC8536DS.h |2 +- 8 files changed, 83 insertions(+), 51 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/8xxx: Reduce NAND-SPL build size
On Mar 13, 2011, at 4:40 PM, Wolfgang Denk wrote: > Dear Kumar Gala, > > In message <1299471395-26596-1-git-send-email-ga...@kernel.crashing.org> you > wrote: >> We don't use disable_law in the SPL code so only build it if >> !CONFIG_NAND_SPL. > > Does -ffunction-sections / --gc-sections not catch this automatically? Doesn't appear to, but not sure if the NAND makefiles are utilizing those options. - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH 1/6] Mips: Move content of arch/mips/cpu to arch/mips/cpu/mips32
Dear Daniel Schwierzeck,
In message <4d7c147a.5060...@gmail.com> you wrote:
>
> >> All current CPUs and SoCs are based on Mips32 arch. The complete
> >
> > Is that true? What about purple SoC? IIUC It's based on MIPS 5Kc
> > and capable of 64-bit, which MIPS32 is 32-bit only architecture.
>
> that was an assumption. I could not find any information about Purple.
> This patch series is a suggestion. Maybe there are better approaches
> like arch/mips/cpu/{mips4k|mips5k|mips24k|...|octeon}.
Purple is (better: was) indeed a 64 bit system.
OTOH, the purple board has not been actively maintained for several
years, and I'm not aware of anybody who still has access to the
hardware. If it should cause trouble, it would probably most
appropriate to drop the purple support.
Best regards,
Wolfgang Denk
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Re: [U-Boot] [PATCH 02/20] mpc832x: add support for the mpc8321 based suvd3 board
Dear Heiko Schocher,
In message <1299591018-8944-3-git-send-email...@denx.de> you wrote:
> - serial console on UART1
> - Ethernet RMII over UCC4
> - PHY SMSC LAN8700
> - 64MB Flash
> - 128 MB DDR2 RAM
> - I2C
> - bootcount
>
> This board is similiar to the kmeter1 (8360) board,
> so common config options are extracted into the
> include/configs/km83xx-common.h file.
...
> -#if defined(CONFIG_BOOTCOUNT_LIMIT) && defined(CONFIG_MPC8360)
> +#if defined(CONFIG_BOOTCOUNT_LIMIT) && \
> +(defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x))
> #include
Please keep lists sorted: 832x < 8360. Please fix globally.
> +phys_size_t initdram (int board_type)
> +{
> +#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
> + extern void ddr_enable_ecc (unsigned int dram_size);
> +#endif
> + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
> + u32 msize = 0;
> +
> + if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)
> + return -1;
> +
> + /* DDR SDRAM - Main SODIMM */
Is this comment correct?
> + im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR;
> + msize = fixed_sdram ();
Can we not use get_ram_size() ?
> +extern int ivm_read_eeprom (void);
Protoypes belong to header files.
Um... seems you did not run checkpatch?
I see this:
[PATCH 01/20] keymile: rework headerfiles for keymile boards
total: 0 errors, 16 warnings, 659 lines checked
[PATCH 02/20] mpc832x: add support for the mpc8321 based suvd3 board
total: 17 errors, 63 warnings, 1326 lines checked
[PATCH 03/20] mpc832x: add support for mpc8321 based tuxa1 board
total: 16 errors, 2 warnings, 250 lines checked
[PATCH 04/20] mpc832x: add support for mpc8321 based tuda1 board
total: 0 errors, 4 warnings, 265 lines checked
...
[PATCH 06/20] arm: add support of Kirkwood based board SUEN8
total: 0 errors, 1 warnings, 73 lines checked
[PATCH 07/20] ppc: add support for ppc based board mgcoge2ne
total: 11 errors, 14 warnings, 733 lines checked
...
[PATCH 09/20] powerpc, 83xx: add kmsupx5 board support
total: 3 errors, 3 warnings, 103 lines checked
[PATCH 10/20] km-arm: i2c support for suenx based boards
total: 1 errors, 0 warnings, 70 lines checked
...
[PATCH 12/20] ppc, 8321: cleanup tuxa1, tuda1 and suvd3 support
total: 1 errors, 5 warnings, 570 lines checked
[PATCH 13/20] keymile, common; fix i2c deblocking support
total: 0 errors, 21 warnings, 161 lines checked
[PATCH 14/20] arm, keymile: updates for the arm based boards from keymile
total: 0 errors, 2 warnings, 142 lines checked
[PATCH 15/20] keymile boards: add CONFIG_PIGGY_MAC_ADRESS_OFFSET
total: 1 errors, 1 warnings, 38 lines checked
[PATCH 16/20] keymile, common: add setting of some environment variables
total: 0 errors, 7 warnings, 145 lines checked
[PATCH 17/20] ppc, arm: rework and enhance keymile-common.h
total: 0 errors, 3 warnings, 253 lines checked
...
[PATCH 19/20] keymile-common.h: remove IO mux stuff
total: 3 errors, 5 warnings, 27 lines checked
Please check and fix where needed. I stop reviewing here.
Best regards,
Wolfgang Denk
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Re: [U-Boot] [PATCH 01/20] keymile: rework headerfiles for keymile boards
Dear Heiko Schocher, In message <1299591018-8944-2-git-send-email...@denx.de> you wrote: > - This patch reworks all headerfiles for keymile boards (coge, supx4, > eter1, suen3). > Furthermore, a refactoring on the whole environment variables has been > acomplished. Two independent changes => Please submit as two separate patches. ... > +#define CONFIG_HUSH_INIT_VAR 1 ... > +#define CONFIG_I2C_MULTI_BUS 1 ... > +#define CONFIG_I2C_MUX 1 Defines like these that select functions only should not be assigned any numeric (or other value). Please omit thse. Please fix globally. > +#define CONFIG_KM_DEF_ENV_CONSTANTS \ ... > + "default=" \ > + "setenv default \'run newenv; reset\' && " \ These backslashes are redundant at best. Why not drop them? ... > + "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin \0"\ Are you sure you really want that trailing blank? [Please check globally.] ... > +#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* Reserve > 768KB for Monitor */ Line too long. Please fix globally. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I object to intellect without discipline; I object to power without constructive purpose. -- Spock, "The Squire of Gothos", stardate 2124.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-sh/master
Dear Nobuhiro Iwamatsu, In message you wrote: > Dear Wolfgang Denk. > > Please pull from u-boot-sh/master. > > The following changes since commit c7977858dcf1f656cbe91ea0dc3cb9139c6a8cc8= > : > > ARM: Update mach-types (2011-02-21 08:30:55 +0100) > > are available in the git repository at: > git://git.denx.de/u-boot-sh.git master > > Nobuhiro Iwamatsu (2): > sh: Add handling of CONFIG_SYS_FLASH_BASE for board.c Sorry, but I disagree with the CONFIG_SYS_FLASH_BASE patch (see previous message - and sorry for the late reply). Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Democracy is mob rule, but with income taxes. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] sh: Add handling of CONFIG_SYS_FLASH_BASE for board.c
Dear Nobuhiro Iwamatsu,
In message <1299484258-6042-1-git-send-email-nobuhiro.iwamatsu...@renesas.com>
you wrote:
> Some board of SH does not have flash memoy.
> This change initializes bi_flashstart, when CONFIG_SYS_FLASH_BASE was defined,
>
> Signed-off-by: Nobuhiro Iwamatsu
> ---
> arch/sh/lib/board.c |6 ++
> 1 files changed, 6 insertions(+), 0 deletions(-)
>
> diff --git a/arch/sh/lib/board.c b/arch/sh/lib/board.c
> index 968566c..81244ae 100644
> --- a/arch/sh/lib/board.c
> +++ b/arch/sh/lib/board.c
> @@ -43,6 +43,7 @@ const char version_string[] = U_BOOT_VERSION"
> ("U_BOOT_DATE" - "U_BOOT_TIME")";
>
> unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN;
>
> +#if defined(CONFIG_SYS_FLASH_BASE)
I don't think this should depend on CONFIG_SYS_FLASH_BASE.
Boards without NOR flash should define CONFIG_SYS_NO_FLASH, and this
define should be used here.
Best regards,
Wolfgang Denk
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Re: [U-Boot] [PATCH] powerpc/8xxx: Reduce NAND-SPL build size
Dear Kumar Gala, In message <1299471395-26596-1-git-send-email-ga...@kernel.crashing.org> you wrote: > We don't use disable_law in the SPL code so only build it if > !CONFIG_NAND_SPL. Does -ffunction-sections / --gc-sections not catch this automatically? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Perfection is reached, not when there is no longer anything to add, but when there is no longer anything to take away. - Antoine de Saint-Exupery ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] omap3_beagle: enable the use of a plain text file named uEnv.txt instead of boot.scr
Dear Alexander Holler, In message <4d722d1f.1050...@ahsoftware.de> you wrote: > > I've just seen a patch which makes env import optional, so you might > consider adding CONFIG_CMD_IMPORTENV to omap3_beagle.h to be prepared > when env import will get optional. I disagree. CONFIG_CMD_IMPORTENV shall be enabled by default. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Reader, suppose you were an idiot. And suppose you were a member of Congress. But I repeat myself. - Mark Twain ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] ARM: Don't grab memory for LCD if FB address is defined
Dear Minkyu Kang, In message <4d75b591.3040...@samsung.com> you wrote: > If FB address is defined specific address then don't grab memory for LCD > > Signed-off-by: Minkyu Kang > Cc: Albert Aribaud > --- > arch/arm/lib/board.c |4 > 1 files changed, 4 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c > index c620d2c..5a4d2bd 100644 > --- a/arch/arm/lib/board.c > +++ b/arch/arm/lib/board.c > @@ -356,9 +356,13 @@ void board_init_f (ulong bootflag) > #endif /* CONFIG_VFD */ > > #ifdef CONFIG_LCD > +#ifdef CONFIG_FB_ADDR If you add a new CONFIG_ option, then you must document it (at least in the README). Also, you must not split this into several patches, one for each architecture. All these changes must be done in a single commit. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de A good marriage would be between a blind wife and deaf husband. -- Michel de Montaigne ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/21] Define new system_restart() and emergency_restart()
Dear Kyle Moffett,
In message <1299519462-25320-2-git-send-email-kyle.d.moff...@boeing.com> you
wrote:
> In preparation for making system restart use a generic set of hooks for
> boards and architectures, we define some wrappers and weak stubs.
>
> The new wrapper functions are:
> system_restart() - Normal system reboot (IE: user request)
> emergency_restart() - Critical error response (IE: panic(), etc)
What is the difference between these two - and why do we need
different functions at all?
A reset is a reset is a reset, isn't it?
...
> +/*
> + * This MUST be called from normal interrupts-on context. If it requires
> + * extended interaction with external hardware it SHOULD react to Ctrl-C.
??? Why such complicated restrictions for a simple command that is
just supposed to reset the board?
> + * If this function fails to guarantee a clean reboot or receives a Ctrl-C
> + * keystroke it SHOULD return with an error (-1).
A "reset" is supposed to take place immediately, and unconditionally.
If you need delays and ^C handling and other bells and whistles,
please add these to your own code, but not here.
> +int system_restart(void)
> +{
> + int err;
> +
> + /*
> + * Print a nice message and wait a bit to make sure it goes out the
> + * console properly.
> + */
> + printf ("Restarting...\n");
> + udelay(5);
> +
> + /* First let the board code try to reboot */
> + err = __board_restart();
> + if (err)
> + goto failed;
> +
> + /* Now call into the architecture-specific code */
> + err = __arch_restart();
> + if (err)
> + goto failed;
> +
> + /* Fallback to the old do_reset() until everything is converted. */
> + err = do_reset(NULL, 0, 0, NULL);
> +
> +failed:
> + printf("*** SYSTEM RESTART FAILED ***\n");
> + return err;
> +}
You are making a simple thing pretty much complicated. This adds lots
of code and I cannot see any benefits.
My initial feeling is a plain NAK, for this and the rest of the patch
series. Why would we want all this?
Best regards,
Wolfgang Denk
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only time they ever find out what is happening now is when they come
to look back on it. - Terry Pratchett, _Wyrd Sisters_
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Re: [U-Boot] [PATCH 0/21] Generic cross-architecture system restart support
Dear Kyle Moffett, In message <1299519462-25320-1-git-send-email-kyle.d.moff...@boeing.com> you wrote: > > This patchset is designed to produce zero change in behavior *except* for > one particular scenario: Platforms which perform a "restart" with a simple > jump to the "_start" entrypoint (or similar) will no longer try to do that > on panic(). > > The new functions to be called from generic code are: > > int system_restart(void) > void emergency_restart(void) Could you please explain what these functions are supposed to do? > The first few patches set up the generic functions and hooks with a default > fallback to the existing "do_reset()" function. Most of the rest are then > architecture-specific modifications necessary to convert away from the old > do_reset() prototype. The last patch finally does away with that function. Why do you replace a simple name like "reset" with a more complicated name like "system_restart"? What is emergency_restart() needed for? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I wish I had a bronze torc for every user who didn't read the manual. - Terry Pratchett, _The Light Fantastic_ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] common/update.c ITB update code refactoring
Dear Dvorkin Dmitry,
In message <4d74e9a1.1000...@tibbo.com> you wrote:
> common/update.c used to update flash with ITB image.
> With this patch it can also use any templated nash commands to load and
> save blobs.
> Also it adds nand as possible target for update.
>
> Usage example:
> // to load itb from usb mass-storage device and save it into nand using
> nash commands
What exactly are "nash commands" ?
> setenv updatefile updateimage.itb
> setenv loadaddr 0x7200
> setenv upditb_load_method cmd
> setenv upditb_cmd_load_pre usb start
> setenv upditb_cmd_load fatload usb 0:1 {load_to} {file}
> setenv upditb_save_method cmd
> setenv upditb_cmd_save nand write {addr_src} {addr_dst} {img_size}
>
> // better way to do the same task:
> setenv updatefile updateimage.itb
> setenv loadaddr 0x7200
> setenv upditb_load_method cmd
> setenv upditb_cmd_load_pre usb start
> setenv upditb_cmd_load fatload usb 0:1 {load_to} {file}
> setenv upditb_save_method nand
This seems to be pretty much hardwired and thus inflexible to me.
Why do you consider this a better approach in general, and why do you
consider the upper example to be better than the lower one?
> seems, common/upditb.c filname better fits it's perpose then
> common/update.c. and it sounds more general. old function names are
> changed also.
"upditb" is pretty much unreadable; I don't like it.
Please split renames and functional changes into separate patches. And
make sure to use correct git options so git detects renames.
...
> + * (C) Copyright 2011 Tibbo Tech.
> + * Code refactoring, Cmd and Nand load/save features:
> + * Dvorkin Dmitry
Don't add history of changes to the code; we have this in the git
commit messages.
Also, why add nand-specific code? What about dataflash, spiflash, or
any other storage devices?
If you generalize this, then please make it as generic as possible.
My review stops here, as it's impossible to see what you changed
because the changes appear as complere file removal / file addition.
Best regards,
Wolfgang Denk
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Re: [U-Boot] [PATCH] arm: Tegra2: add support for A9 CPU init
Le 16/02/2011 21:26, Tom Warren a écrit :
> Signed-off-by: Tom Warren
> ---
> arch/arm/cpu/armv7/start.S |6 +
> arch/arm/cpu/armv7/tegra2/Makefile |2 +-
> arch/arm/cpu/armv7/tegra2/ap20.c | 490
>
This one has an extra empty line at end of file.
> +void cold_boot(void)
> +{
> + asm volatile(
> +
> + "msr cpsr_c, #0xd3\n"
> + /*
> + * Check current processor: CPU or AVP?
> + * If AVP, go to AVP boot code, else continue on.
> + */
> + "mov r0, %0 \n"
> + "ldrbr2, [r0, %1] \n"
> + /* are we the CPU? */
> + "cmp r2, %2 \n"
> + "mov sp, %3 \n"
> + /* leave in some symbols for release debugging */
> + "mov r3, %6 \n"
> + "str r3, [sp, #-4]! \n"
> + "str r3, [sp, #-4]! \n"
> + /* yep, we are the CPU */
> + "bxeq %4 \n"
> + /* AVP Initialization follows this path */
> + "mov sp, %5 \n"
> + /* leave in some symbols for release debugging */
> + "mov r3, %6 \n"
> + "str r3, [sp, #-4]! \n"
> + "str r3, [sp, #-4]! \n"
> +
> + /* Init and Start CPU */
> + "b startup_cpu \n"
> + :
> + : "i"(NV_PA_PG_UP_BASE),
If I'm not mistaken, NV_PA_PG_UP_BASE could be used just as well
directly in the asm statement instead of via %0 and i(), as anyway the
asm will be preprocessed and the macro will turn to a number. That would
simplify the asm instruction as a whole and make the asm statement more
understandable (also applies to other macros used similarly).
Apart from that, I must admit I don't know the Tegra2/A9 well enough to
comment further.
amicalement,
Amicalement,
--
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Re: [U-Boot] common/update.c ITB update code refactoring
(seeing nobody else answered) Hi Dmitry, Le 07/03/2011 15:20, Dvorkin Dmitry a écrit : > common/update.c used to update flash with ITB image. > With this patch it can also use any templated nash commands to load and > save blobs. > Also it adds nand as possible target for update. Is this an official patch submission or an RFC? Please add "[PATCH]" or "[RFC]" accordingly and resubmit -- making sure the commit message remains synthetic, and any additional indication remains after the "---" separation line. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mpc8[5/6]xx: Ensure POST word does not get reset
On Mar 10, 2011, at 4:09 PM, Peter Tyser wrote: > From: John Schmoller > > The POST word is stored in a spare register in the PIC on MPC8[5/6]xx > processors. When interrupt_init() is called, this register gets reset > which resulted in all POST_RAM POSTs not being ran due to the corrupted > POST word. To resolve this, store off POST word before the PIC is > reset, and restore it after the PIC has been initialized. > > Signed-off-by: John Schmoller > Signed-off-by: Peter Tyser > --- > This is a bugfix, so it'd be nice if it made it into the upcoming release > if possible. > > arch/powerpc/cpu/mpc85xx/interrupts.c | 16 > arch/powerpc/cpu/mpc86xx/interrupts.c | 16 > 2 files changed, 32 insertions(+), 0 deletions(-) applied - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] p4080ds starts OS with MSR[EE]=1 and DEC armed?
On Mar 12, 2011, at 4:56 PM, Kumar Gala wrote: > > > On Mar 3, 2011, at 8:59 AM, Jimi Xenidis wrote: > >> I was surprised to find myself at the decrement interrupt when running my >> new stuff. >> That is against ePAPR, right? >> Does u-boot at least make sure that the DEC is set to some large value >> before it leaps at me? >> I don't mind forcing EE=0 but I'd like to make sure I make it that far into >> the code :) >> -JX > > Jimi, > > Not sure how or why you are seeing this, but u-boot should disable interrupts > in common/cmd_bootm.c > > Look for disable_interrupts() -> this should set MSR[EE] = 0. Sorry, this is my brain fart. I was running my unit tests (on SimiCS p4080ds) and when I set MSR[EE]=1 to get a doorbell, I got a DEC (as one should according to interrupt order). Turns out that TSR[DIS] was on when my program took over, and this is ePAPR legal. I need to reset the DEC in my code. Sorry for the confusion. -JX > > - k > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/85xx: Fix determining Fman freq on P1023
On the P1023 the Fman freq is equivalent to the system bus freq, not 1/2 of it. Also we only have one Fman so no need for the code to deal with a second. Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc85xx/speed.c |5 + 1 files changed, 1 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 2caff4b..c4c156d 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -196,10 +196,7 @@ void get_sys_info (sys_info_t * sysInfo) #endif #ifdef CONFIG_SYS_DPAA_FMAN - sysInfo->freqFMan[0] = sysInfo->freqSystemBus / 2; -#if (CONFIG_SYS_NUM_FMAN) == 2 - sysInfo->freqFMan[1] = sysInfo->freqSystemBus / 2; -#endif + sysInfo->freqFMan[0] = sysInfo->freqSystemBus; #endif #endif /* CONFIG_FSL_CORENET */ -- 1.7.2.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/2] powerpc/8xxx: Update USB device tree fixup
From: Ramneek Mehresh
Modify support for USB mode fixup:
* Add support for fetching USB mode and phy type via hwconfig
* Add common support for USB mode and phy type device tree fix-up for all
USB controllers mentioned in hwconfig string
Signed-off-by: Ramneek Mehresh
Signed-off-by: Kumar Gala
---
v2:
* minor bug fix in fdt_fixup_dr_usb logic:
mode_idx should be set to 'j'.
v3:
* Same issues as v2, but for phy_idx
arch/powerpc/cpu/mpc8xxx/fdt.c | 81 +---
1 files changed, 67 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c
index 0c166fd..0edd214 100644
--- a/arch/powerpc/cpu/mpc8xxx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xxx/fdt.c
@@ -29,6 +29,10 @@
#include
#include
#include
+#include
+#ifdef CONFIG_HAS_FSL_DR_USB
+#include
+#endif
#if defined(CONFIG_MP) && (defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx))
static int ft_del_cpuhandle(void *blob, int cpuhandle)
@@ -84,25 +88,22 @@ void ft_fixup_num_cores(void *blob) {
#endif /* defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) */
#ifdef CONFIG_HAS_FSL_DR_USB
-void fdt_fixup_dr_usb(void *blob, bd_t *bd)
+static void fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
+ const char *phy_type)
{
- char *mode;
- char *type;
const char *compat = "fsl-usb2-dr";
const char *prop_mode = "dr_mode";
const char *prop_type = "phy_type";
+ static int start_offset = -1;
int node_offset;
int err;
- mode = getenv("usb_dr_mode");
- type = getenv("usb_phy_type");
- if (!mode && !type)
- return;
-
- node_offset = fdt_node_offset_by_compatible(blob, 0, compat);
+ node_offset = fdt_node_offset_by_compatible(blob,
+ start_offset, compat);
if (node_offset < 0) {
- printf("WARNING: could not find compatible node %s: %s.\n",
- compat, fdt_strerror(node_offset));
+ printf("WARNING: could not find compatible"
+ "node %s: %s.\n", compat,
+ fdt_strerror(node_offset));
return;
}
@@ -114,14 +115,66 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
prop_mode, compat, fdt_strerror(err));
}
- if (type) {
- err = fdt_setprop(blob, node_offset, prop_type, type,
- strlen(type) + 1);
+ if (phy_type) {
+ err = fdt_setprop(blob, node_offset, prop_type, phy_type,
+ strlen(phy_type) + 1);
if (err < 0)
printf("WARNING: could not set %s for %s: %s.\n",
prop_type, compat, fdt_strerror(err));
}
+
+ start_offset = node_offset;
}
+
+void fdt_fixup_dr_usb(void *blob, bd_t *bd)
+{
+ const char *modes[] = { "host", "peripheral", "otg" };
+ const char *phys[] = { "ulpi", "umti" };
+ const char *mode = NULL;
+ const char *phy_type = NULL;
+ char str[5];
+ char usb1_defined = 0;
+ int i, j;
+
+ for (i = 1; i <= USB_MAX_DEVICE; i++) {
+ int mode_idx = -1, phy_idx = -1;
+ sprintf(str, "%s%d", "usb", i);
+ if (hwconfig(str)) {
+ for (j = 0; j < sizeof(modes); j++) {
+ if (hwconfig_subarg_cmp(str, "dr_mode",
+ modes[j])) {
+ mode_idx = j;
+ break;
+ }
+ }
+ for (j = 0; j < sizeof(phys); j++) {
+ if (hwconfig_subarg_cmp(str, "phy_type",
+ phys[j])) {
+ phy_idx = j;
+ break;
+ }
+ }
+ if ((mode_idx >= 0) || (phy_idx >= 0)) {
+ fdt_fixup_usb_mode_phy_type(blob,
+ modes[mode_idx], phys[phy_idx]);
+ if (!strcmp(str, "usb1"))
+ usb1_defined = 1;
+ } else {
+ printf("WARNING: invalid phy or mode\n");
+ }
+ } else {
+ break;
+ }
+ }
+ if (!usb1_defined) {
+ mode = getenv("usb_dr_mode");
+ phy_type = getenv("usb_phy_type");
+ if (!mode && !phy_type)
+ return;
+ fdt_fixup_usb_mode_phy_type(blob, mode, phy_type);
+ }
+}
+
#endif /* CONFIG_HAS_FSL_DR_USB */
/*
--
1.7.2.3
[U-Boot] [PATCH v2 2/2] powerpc/8xxx: Update USB device tree fixup
From: Ramneek Mehresh
Modify support for USB mode fixup:
* Add support for fetching USB mode and phy type via hwconfig
* Add common support for USB mode and phy type device tree fix-up for all
USB controllers mentioned in hwconfig string
Signed-off-by: Ramneek Mehresh
Signed-off-by: Kumar Gala
---
* minor bug fix in fdt_fixup_dr_usb logic:
mode_idx should be set to 'j'.
arch/powerpc/cpu/mpc8xxx/fdt.c | 81 +---
1 files changed, 67 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c
index 0c166fd..68f3e4e 100644
--- a/arch/powerpc/cpu/mpc8xxx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xxx/fdt.c
@@ -29,6 +29,10 @@
#include
#include
#include
+#include
+#ifdef CONFIG_HAS_FSL_DR_USB
+#include
+#endif
#if defined(CONFIG_MP) && (defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx))
static int ft_del_cpuhandle(void *blob, int cpuhandle)
@@ -84,25 +88,22 @@ void ft_fixup_num_cores(void *blob) {
#endif /* defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) */
#ifdef CONFIG_HAS_FSL_DR_USB
-void fdt_fixup_dr_usb(void *blob, bd_t *bd)
+static void fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
+ const char *phy_type)
{
- char *mode;
- char *type;
const char *compat = "fsl-usb2-dr";
const char *prop_mode = "dr_mode";
const char *prop_type = "phy_type";
+ static int start_offset = -1;
int node_offset;
int err;
- mode = getenv("usb_dr_mode");
- type = getenv("usb_phy_type");
- if (!mode && !type)
- return;
-
- node_offset = fdt_node_offset_by_compatible(blob, 0, compat);
+ node_offset = fdt_node_offset_by_compatible(blob,
+ start_offset, compat);
if (node_offset < 0) {
- printf("WARNING: could not find compatible node %s: %s.\n",
- compat, fdt_strerror(node_offset));
+ printf("WARNING: could not find compatible"
+ "node %s: %s.\n", compat,
+ fdt_strerror(node_offset));
return;
}
@@ -114,14 +115,66 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
prop_mode, compat, fdt_strerror(err));
}
- if (type) {
- err = fdt_setprop(blob, node_offset, prop_type, type,
- strlen(type) + 1);
+ if (phy_type) {
+ err = fdt_setprop(blob, node_offset, prop_type, phy_type,
+ strlen(phy_type) + 1);
if (err < 0)
printf("WARNING: could not set %s for %s: %s.\n",
prop_type, compat, fdt_strerror(err));
}
+
+ start_offset = node_offset;
}
+
+void fdt_fixup_dr_usb(void *blob, bd_t *bd)
+{
+ const char *modes[] = { "host", "peripheral", "otg" };
+ const char *phys[] = { "ulpi", "umti" };
+ const char *mode = NULL;
+ const char *phy_type = NULL;
+ char str[5];
+ char usb1_defined = 0;
+ int i, j;
+
+ for (i = 1; i <= USB_MAX_DEVICE; i++) {
+ int mode_idx = -1, phy_idx = -1;
+ sprintf(str, "%s%d", "usb", i);
+ if (hwconfig(str)) {
+ for (j = 0; j < sizeof(modes); j++) {
+ if (hwconfig_subarg_cmp(str, "dr_mode",
+ modes[j])) {
+ mode_idx = j;
+ break;
+ }
+ }
+ for (j = 0; j < sizeof(phys); j++) {
+ if (hwconfig_subarg_cmp(str, "phy_type",
+ phys[j])) {
+ phy_idx = -1;
+ break;
+ }
+ }
+ if ((mode_idx >= 0) || (phy_idx >= 0)) {
+ fdt_fixup_usb_mode_phy_type(blob,
+ modes[mode_idx], phys[phy_idx]);
+ if (!strcmp(str, "usb1"))
+ usb1_defined = 1;
+ } else {
+ printf("WARNING: invalid phy or mode\n");
+ }
+ } else {
+ break;
+ }
+ }
+ if (!usb1_defined) {
+ mode = getenv("usb_dr_mode");
+ phy_type = getenv("usb_phy_type");
+ if (!mode && !phy_type)
+ return;
+ fdt_fixup_usb_mode_phy_type(blob, mode, phy_type);
+ }
+}
+
#endif /* CONFIG_HAS_FSL_DR_USB */
/*
--
1.7.2.3
___
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[U-Boot] [PATCH v2 3/3] powerpc/85xx: Add support for ULI1575 PCI EHCI module on MPC8572DS
From: Zhao Chenhui MPC8572DS provides 2 USB ports with ULI1575. We enable USB storage device support using PCI EHCI module. Signed-off-by: Zhao Chenhui Signed-off-by: Kumar Gala --- include/configs/MPC8572DS.h | 14 ++ 1 files changed, 14 insertions(+), 0 deletions(-) diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 0f419c5..62ce3c4 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -672,6 +672,20 @@ #define CONFIG_CMD_EXT2 #endif +/* + * USB + */ +#define CONFIG_USB_EHCI + +#ifdef CONFIG_USB_EHCI +#define CONFIG_CMD_USB +#define CONFIG_USB_EHCI_PCI +#define ONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_USB_STORAGE +#define CONFIG_PCI_EHCI_DEVICE 0 +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 +#endif + #undef CONFIG_WATCHDOG /* watchdog disabled */ /* -- 1.7.2.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] echi: add ULI1575 PCI ID
From: Zhao Chenhui
Add ULI1575 EHCI controller to the list of the supported devices.
Signed-off-by: Zhao Chenhui
Signed-off-by: Kumar Gala
---
* replaces previous patch for 8572ds
* adds feedback from Remy
drivers/usb/host/ehci-pci.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index cff3438..bf490b0 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -29,6 +29,7 @@
static struct pci_device_id ehci_pci_ids[] = {
/* Please add supported PCI EHCI controller ids here */
{0x1033, 0x00E0},
+ {0x10b9, 0x5239}, /* ULI1575 PCI EHCI module ids */
{0, 0}
};
#endif
--
1.7.2.3
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[U-Boot] [PATCH v2 4/6] powerpc/85xx: Add support usb2/etsec and tdm/audio pin multiplex on P1022DS
From: Jiang Yutang
For soc which have pin multiplex relation, some of them can't enable
simultaneously. This patch add environment var 'hwconfig' content
defination for them. you can enable some one function by setting
environment var 'hwconfig' content and reset board. Detail setting
please refer doc/README.p1022ds
Signed-off-by: Jiang Yutang
Signed-off-by: Kumar Gala
---
* TDM need some configration option by SPI, so enable SPI while enable TDM.
arch/powerpc/include/asm/immap_85xx.h | 10 ++
board/freescale/p1022ds/p1022ds.c | 56 ++--
doc/README.p1022ds| 24 ++
3 files changed, 79 insertions(+), 11 deletions(-)
create mode 100644 doc/README.p1022ds
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index 5118fe0..b51017b 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1937,7 +1937,17 @@ typedef struct ccsr_gur {
#define MPC85xx_PMUXCR_QE100x0020
#define MPC85xx_PMUXCR_QE110x0010
#define MPC85xx_PMUXCR_QE120x0008
+#if defined(CONFIG_P1013) || defined(CONFIG_P1022)
+#define MPC85xx_PMUXCR_TDM_MASK0x0001cc00
+#define MPC85xx_PMUXCR_TDM 0x00014800
+#define MPC85xx_PMUXCR_SPI_MASK0x0060
+#define MPC85xx_PMUXCR_SPI 0x
+#endif
u32 pmuxcr2;/* Alt. function signal multiplex control 2 */
+#if defined(CONFIG_P1013) || defined(CONFIG_P1022)
+#define MPC85xx_PMUXCR2_ETSECUSB_MASK 0x001f1000
+#define MPC85xx_PMUXCR2_USB0x0015
+#endif
u8 res6[8];
u32 devdisr;/* Device disable control */
#define MPC85xx_DEVDISR_PCI1 0x8000
diff --git a/board/freescale/p1022ds/p1022ds.c
b/board/freescale/p1022ds/p1022ds.c
index 6f20dc3..8b78404 100644
--- a/board/freescale/p1022ds/p1022ds.c
+++ b/board/freescale/p1022ds/p1022ds.c
@@ -93,11 +93,19 @@ int checkboard(void)
/* Choose the 11.2896Mhz codec reference clock */
#define CONFIG_PIXIS_BRDCFG1_AUDCLK_11 0x01
+/* Connect to USB2 */
+#define CONFIG_PIXIS_BRDCFG0_USB2 0x10
+/* Connect to TFM bus */
+#define CONFIG_PIXIS_BRDCFG1_TDM 0x0c
+/* Connect to SPI */
+#define CONFIG_PIXIS_BRDCFG0_SPI 0x80
+
int misc_init_r(void)
{
u8 temp;
const char *audclk;
size_t arglen;
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
/* For DVI, enable the TFP410 Encoder. */
@@ -115,22 +123,48 @@ int misc_init_r(void)
return -1;
debug("DVI Encoder Read: 0x%02x\n",temp);
+ /* Enable the USB2 in PMUXCR2 and FGPA */
+ if (hwconfig("usb2")) {
+ clrsetbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_ETSECUSB_MASK,
+ MPC85xx_PMUXCR2_USB);
+ setbits_8(&pixis->brdcfg0, CONFIG_PIXIS_BRDCFG0_USB2);
+ }
+
+ /* tdm and audio can not enable simultaneous*/
+ if (hwconfig("tdm") && hwconfig("audclk")){
+ printf("WARNING: TDM and AUDIO can not be enabled simultaneous
!\n");
+ return -1;
+ }
+
+ /* Enable the TDM in PMUXCR and FGPA */
+ if (hwconfig("tdm")) {
+ clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_TDM_MASK,
+ MPC85xx_PMUXCR_TDM);
+ setbits_8(&pixis->brdcfg1, CONFIG_PIXIS_BRDCFG1_TDM);
+ /* TDM need some configration option by SPI */
+ clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SPI_MASK,
+ MPC85xx_PMUXCR_SPI);
+ setbits_8(&pixis->brdcfg0, CONFIG_PIXIS_BRDCFG0_SPI);
+ }
+
/*
* Enable the reference clock for the WM8776 codec, and route the MUX
* pins for SSI. The default is the 12.288 MHz clock
*/
- temp = in_8(&pixis->brdcfg1) & ~(CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK |
- CONFIG_PIXIS_BRDCFG1_AUDCLK_MASK);
- temp |= CONFIG_PIXIS_BRDCFG1_SSI_TDM_SSI;
-
- audclk = hwconfig_arg("audclk", &arglen);
- /* Check the first two chars only */
- if (audclk && (strncmp(audclk, "11", 2) == 0))
- temp |= CONFIG_PIXIS_BRDCFG1_AUDCLK_11;
- else
- temp |= CONFIG_PIXIS_BRDCFG1_AUDCLK_12;
- out_8(&pixis->brdcfg1, temp);
+ if (hwconfig("audclk")) {
+ temp = in_8(&pixis->brdcfg1) &
~(CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK |
+ CONFIG_PIXIS_BRDCFG1_AUDCLK_MASK);
+ temp |= CONFIG_PIXIS_BRDCFG1_SSI_TDM_SSI;
+
+ audclk = hwconfig_arg("audclk", &arglen);
+ /* Check the first two chars only */
+ if (audclk && (strncmp(audclk, "11", 2) == 0))
+ temp |= CONFIG_PIXIS_BRDCFG1_AUDCLK_11;
+ else
+ temp |= CONFIG_PIXIS_BRDCFG1_AUDCLK_12;
+
[U-Boot] [PATCH]: add canyonlands RAM-boot target
This Patch adds another build target for the AMCC Canyonlands
[PPC460Ex] eval board, this target can be used to do NAND flash or NOR
flash programming in a virgin board using u-boot commands. Using JTAG
debugger(e.g. BDI2000/3000) configured to setup the SDRAM.
here are TLB entries required to load RAM-u-boot (for BDI2000/3000):
WTLB 0x0095 0x003F ;SDRAM 256MB @ 0x
WTLB 0xE105 0x4E10001B
do SDRAM configuration.
Then do the following usin JTAG emulator:
460EX>load 0x0100 u-boot.bin bin
460EX>go
Back to serial session that connected to canyonlands's serial port.
Signed-off-by: Fawaz Gaili
Cc: Stefan Roese
Cc: Wolfgang Denk
Cc: Felix Radensky
---
arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c | 11 ++-
arch/powerpc/cpu/ppc4xx/Makefile |2 +
board/amcc/canyonlands/canyonlands.c |3 +-
board/amcc/canyonlands/init.S |6 ++
board/amcc/canyonlands/u-boot-ram.lds | 96
boards.cfg |1 +
include/configs/canyonlands.h | 31 +--
7 files changed, 137 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
index 95df1d9..2660cd2 100644
--- a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
@@ -66,7 +66,8 @@
"SDRAM_" #mnemonic, SDRAM_##mnemonic, data);\
} while (0)
-#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
+#if (!defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_SYS_RAMBOOT))\
+|| defined(CONFIG_NAND_SPL)
static void update_rdcc(void)
{
u32 val;
@@ -2896,7 +2897,8 @@ phys_size_t initdram(int board_type)
* mustn't be reconfigured again since we're already running
* from SDRAM.
*/
-#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
+#if (!defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_SYS_RAMBOOT)) \
+|| defined(CONFIG_NAND_SPL)
unsigned long val;
#if defined(CONFIG_440)
@@ -3013,12 +3015,13 @@ phys_size_t initdram(int board_type)
#endif
#if defined(CONFIG_PPC4xx_DDR_AUTOCALIBRATION)
-#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
+#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_SYS_RAMBOOT)\
+ && !defined(CONFIG_NAND_SPL)
/*--
| DQS calibration.
+-*/
DQS_autocalibration();
-#endif /* !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) */
+#endif /* !defined(CONFIG_NAND_U_BOOT && CONFIG_SYS_RAMBOOT) &&
!defined(CONFIG_NAND_SPL) */
#endif /* CONFIG_PPC4xx_DDR_AUTOCALIBRATION */
/*
diff --git a/arch/powerpc/cpu/ppc4xx/Makefile
b/arch/powerpc/cpu/ppc4xx/Makefile
index d97ca20..02a48f9 100644
--- a/arch/powerpc/cpu/ppc4xx/Makefile
+++ b/arch/powerpc/cpu/ppc4xx/Makefile
@@ -36,9 +36,11 @@ COBJS:= 40x_spd_sdram.o
ifndef CONFIG_NAND_SPL
ifndef CONFIG_NAND_U_BOOT
+ifndef CONFIG_SYS_RAMBOOT
COBJS+= 44x_spd_ddr.o
endif
endif
+endif
COBJS-$(CONFIG_SDRAM_PPC4xx_IBM_DDR2) += 44x_spd_ddr2.o
COBJS-$(CONFIG_PPC4xx_DDR_AUTOCALIBRATION) += 4xx_ibm_ddr2_autocalib.o
COBJS+= 4xx_pci.o
diff --git a/board/amcc/canyonlands/canyonlands.c
b/board/amcc/canyonlands/canyonlands.c
index 80e2739..d1f5e4f 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -390,8 +390,8 @@ int board_early_init_r (void)
*/
/* Remap the NOR FLASH to 0xcc00. ... 0xcfff. */
-#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
-mtebc(PB3CR, CONFIG_SYS_FLASH_BASE_PHYS_L | 0xda000);
+#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) \
+|| defined(CONFIG_SYS_RAMBOOT)mtebc(PB3CR,
CONFIG_SYS_FLASH_BASE_PHYS_L | 0xda000);
#else
mtebc(PB0CR, CONFIG_SYS_FLASH_BASE_PHYS_L | 0xda000);
#endif
diff --git a/board/amcc/canyonlands/init.S b/board/amcc/canyonlands/init.S
index 8b7bfce..526d8bd 100644
--- a/board/amcc/canyonlands/init.S
+++ b/board/amcc/canyonlands/init.S
@@ -66,6 +66,13 @@ tlbtab:
tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_4K,
CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G)
#endif
+#ifdef CONFIG_SYS_RAMBOOT
+#if CONFIG_SYS_MBYTES_SDRAM >= 512
+tlbentry(0x1000, SZ_256M, 0x1000, 0x0,
AC_R|AC_W|SA_G|SA_I|AC_X)
+/*additional entry required*/
+#endif
+#endif
+
tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x, 0xC, AC_RW | SA_IG)
tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x2000, 0xC, AC_RW |
SA_IG)
tlbentry(CONFIG_SYS_PCIE_MEMBASE, SZ_256M, 0xB000, 0xD, AC_RW
| SA_IG)
diff --git a/board/amcc/canyonlands/u-boot-ram.lds
b/board/amcc/canyonlands/u-boot-ram.lds
new file mode 100644
index 000..e98d947
--- /dev/null
+++ b/board/amcc/canyonlands/u-b
[U-Boot] [PATCH] Ethernut 5 board support
Add support for the Ethernut 5 open hardware design, based on Atmel's AT91SAM9XE512 SoC. Signed-off-by: Harald Kipp --- MAINTAINERS |3 + board/egnite/ethernut5/Makefile | 54 + board/egnite/ethernut5/ethernut5.c| 259 + board/egnite/ethernut5/ethernut5_pwrman.c | 348 + board/egnite/ethernut5/ethernut5_pwrman.h | 68 ++ boards.cfg|1 + include/configs/ethernut5.h | 282 +++ 7 files changed, 1015 insertions(+), 0 deletions(-) create mode 100644 board/egnite/ethernut5/Makefile create mode 100644 board/egnite/ethernut5/ethernut5.c create mode 100644 board/egnite/ethernut5/ethernut5_pwrman.c create mode 100644 board/egnite/ethernut5/ethernut5_pwrman.h create mode 100644 include/configs/ethernut5.h diff --git a/MAINTAINERS b/MAINTAINERS index 4756f14..8b8aa49 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -616,6 +616,9 @@ Wolfgang Denk imx27lite i.MX27 qongi.MX31 +egnite GmbH + ethernut5 ARM926EJS (AT91SAM9XE SoC) + Thomas Elste modnet50ARM720T (NET+50) diff --git a/board/egnite/ethernut5/Makefile b/board/egnite/ethernut5/Makefile new file mode 100644 index 000..d8e485f --- /dev/null +++ b/board/egnite/ethernut5/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# (C) Copyright 2010 +# egnite GmbH +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS-y+= $(BOARD).o +COBJS-y+= $(BOARD)_pwrman.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/egnite/ethernut5/ethernut5.c b/board/egnite/ethernut5/ethernut5.c new file mode 100644 index 000..9006493 --- /dev/null +++ b/board/egnite/ethernut5/ethernut5.c @@ -0,0 +1,259 @@ +/* + * (C) Copyright 2011 + * egnite GmbH + * + * (C) Copyright 2010 + * Ole Reinhardt + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Ethernut 5 general board support + * + * Ethernut is an open source hardware and software project for + * embedded Ethernet devices. Hardware layouts and CAD files are + * freely available under BSD-like license. + * + * Ethernut 5 is the first member of the Ethernut board family + * with U-Boot and Linux support. This implementation is based + * on the original work done by Ole Reinhardt, but heavily modified + * to support additional features and the latest board revision 5.0F. + * + * Main board components are by default: + * + * Atmel AT91SAM9XE512 CPU with 512 kBytes NOR Flash + * 2 x 64 MBytes Micron MT48LC32M16A2P SDRAM + * 512 MBytes Micron MT29F4G08ABADA NAND Flash + * 4 MBytes Atmel AT45DB321D DataFlash + * SMSC LAN8710 Ethernet PHY + * Atmel ATmega168 MCU used for power management + * Linear Techn
Re: [U-Boot] Q: MII read
On 03/13/2011 09:24 AM, Ran Shalit wrote: > Hello, > Hi Ran, > I would like to ask a question regarding the MII functionality : > When using mii commands (cmd_mii.c) everything works well, until trying to > do a ping (using net command). > After any ping try(with success or not), the mii read function is > stuck. Maybe it has to do with davinci mii implementation, but I am not > sure if this is the problem or not. > Any advice is welcomed. I think this is not a general issue, as with other processors/boards everything works fine. However, after using a net command, the dev->halt callback is called, and this could disable the phy. If you are using the davinci_emac driver, take a look at the davinci_eth_close() function. It can be that when the controller is turned off, you cannot access to the phy anymore. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Q: MII read
Hello, I would like to ask a question regarding the MII functionality : When using mii commands (cmd_mii.c) everything works well, until trying to do a ping (using net command). After any ping try(with success or not), the mii read function is stuck. Maybe it has to do with davinci mii implementation, but I am not sure if this is the problem or not. Any advice is welcomed. Regards, Ran ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
