Re: [U-Boot] [PATCH] S5PC2XX: GPIO Macro Values Corrected.
Dear Chander Kashyap, On 14 April 2011 18:17, Chander Kashyap wrote: > Macro values for Pull Up and Driver Strength were wrong. > > Signed-off-by: Chander Kashyap > --- > arch/arm/include/asm/arch-s5pc2xx/gpio.h | 6 +++--- > 1 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/include/asm/arch-s5pc2xx/gpio.h > b/arch/arm/include/asm/arch-s5pc2xx/gpio.h > index 05e5b3e..7bfa8e8 100644 > --- a/arch/arm/include/asm/arch-s5pc2xx/gpio.h > +++ b/arch/arm/include/asm/arch-s5pc2xx/gpio.h > @@ -99,12 +99,12 @@ void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, > int mode); > /* Pull mode */ > #define GPIO_PULL_NONE 0x0 > #define GPIO_PULL_DOWN 0x1 > -#define GPIO_PULL_UP 0x2 > +#define GPIO_PULL_UP 0x3 > > /* Drive Strength level */ > #define GPIO_DRV_1X 0x0 > -#define GPIO_DRV_2X 0x1 > -#define GPIO_DRV_3X 0x2 > +#define GPIO_DRV_2X 0x2 > +#define GPIO_DRV_3X 0x1 Please make orders correctly (0x0, 0x1, 0x2, 0x3) > #define GPIO_DRV_4X 0x3 > #define GPIO_DRV_FAST 0x0 > #define GPIO_DRV_SLOW 0x1 Nice catch : ) Could please fix s5pc1xx also? Please make it one patch. Thanks. Minkyu Kang. -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] is any bug in cp?
hi,in my uboot. there is some bugs when I cp to flash like this: cp.b addr1 addr2 0x100 when the two addr in the same bank of a flash. it go wrongs finally the date of addr2 is 0x8080808080... cp to another bank of flash is work correctly. cp from mem to flash or from flash to mem also correctly. how is this£¿ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] S5P:SROM config code moved to s5p-common directory
SROM config code is made common for S5P series of boards.
smdkc100.c now refers to s5p-common/sromc.c for SROM related
subroutines.
Signed-off-by: Chander Kashyap
---
arch/arm/cpu/armv7/s5p-common/Makefile|3 +-
arch/arm/cpu/armv7/s5p-common/sromc.c | 49 ++
arch/arm/cpu/armv7/s5pc1xx/Makefile |1 -
arch/arm/cpu/armv7/s5pc1xx/sromc.c| 49 --
arch/arm/include/asm/arch-s5pc1xx/smc.h | 53 -
arch/arm/include/asm/arch-s5pc1xx/sromc.h | 53 +
board/samsung/smdkc100/smdkc100.c |4 +-
7 files changed, 106 insertions(+), 106 deletions(-)
create mode 100644 arch/arm/cpu/armv7/s5p-common/sromc.c
delete mode 100644 arch/arm/cpu/armv7/s5pc1xx/sromc.c
delete mode 100644 arch/arm/include/asm/arch-s5pc1xx/smc.h
create mode 100644 arch/arm/include/asm/arch-s5pc1xx/sromc.h
diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile
b/arch/arm/cpu/armv7/s5p-common/Makefile
index ce0a41e..1705399 100644
--- a/arch/arm/cpu/armv7/s5p-common/Makefile
+++ b/arch/arm/cpu/armv7/s5p-common/Makefile
@@ -27,7 +27,8 @@ LIB = $(obj)libs5p-common.o
COBJS-y+= cpu_info.o
COBJS-y+= timer.o
-COBJS-$(CONFIG_PWM)+= pwm.o
+COBJS-y+= sromc.o
+COBJS-$(CONFIG_PWM)+= pwm.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/s5p-common/sromc.c
b/arch/arm/cpu/armv7/s5p-common/sromc.c
new file mode 100644
index 000..091e8d1
--- /dev/null
+++ b/arch/arm/cpu/armv7/s5p-common/sromc.c
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2010 Samsung Electronics
+ * Naveen Krishna Ch
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+
+/*
+ * s5p_config_sromc() - select the proper SROMC Bank and configure the
+ * band width control and bank control registers
+ * srom_bank - SROM
+ * srom_bw_conf - SMC Band witdh reg configuration value
+ * srom_bc_conf - SMC Bank Control reg configuration value
+ */
+void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf)
+{
+ u32 tmp;
+ struct s5p_sromc *srom =
+ (struct s5p_sromc *)samsung_get_base_sromc();
+
+ /* Configure SMC_BW register to handle proper SROMC bank */
+ tmp = srom->bw;
+ tmp &= ~(0xF << (srom_bank * 4));
+ tmp |= srom_bw_conf;
+ srom->bw = tmp;
+
+ /* Configure SMC_BC register */
+ srom->bc[srom_bank] = srom_bc_conf;
+}
diff --git a/arch/arm/cpu/armv7/s5pc1xx/Makefile
b/arch/arm/cpu/armv7/s5pc1xx/Makefile
index b182bf5..d66314e 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/Makefile
+++ b/arch/arm/cpu/armv7/s5pc1xx/Makefile
@@ -32,7 +32,6 @@ SOBJS = cache.o
SOBJS += reset.o
COBJS += clock.o
-COBJS += sromc.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/s5pc1xx/sromc.c
b/arch/arm/cpu/armv7/s5pc1xx/sromc.c
deleted file mode 100644
index 044d122..000
--- a/arch/arm/cpu/armv7/s5pc1xx/sromc.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (C) 2010 Samsung Electronics
- * Naveen Krishna Ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include
-#include
-#include
-
-/*
- * s5pc1xx_config_sromc() - select the proper SROMC Bank and configure the
- * band width control and bank control r
Re: [U-Boot] [PATCH V2 0/3] Fix hang when loading U-Boot from SPI or NAND
Hi Tom, Le 15/04/2011 00:09, Tom Warren a écrit : > This series of patches fixes a hang seen when loading U-Boot from SPI > or NAND on Seaboard and Harmony due to a missing PLLX init. It also > corrects a UARTD bit error in clk_rst.h, and adds rudimentary GPIO > support so that the UART on Seaboard can be used by U-Boot (UARTD& > SPIFLASH are muxed, and the default POR setting is for SPI access, so > GPIO_PI3 has to be driven low to enable serial console I/O over UARTD). > Harmony has no SPIFLASH, so the issue doesn't exist there. > > With these changes, I can write U-Boot to SPI on Seaboard and boot with > it to the U-Boot cmd prompt. This should also apply to loading from NAND > on Seaboard and Harmony - testing to follow. > > Changes in V2: > - Change 2nd patch's description to 'Add basic GPIO definitions' > - Add more descriptive comment for CPCON use in init_pllx Next time you post an updated patchset, please put patch history/changelog in the patches themselves. I'll pull these in tomorrow morning unless someone requests changes in the meantime. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 3/3] MX31: mx31pdk: Print the cause of reset
Print the cause of reset and also change the board name to only 'MX31PDK'.
Signed-off-by: Fabio Estevam
---
board/freescale/mx31pdk/mx31pdk.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/board/freescale/mx31pdk/mx31pdk.c
b/board/freescale/mx31pdk/mx31pdk.c
index 3f291fc..b3f2c09 100644
--- a/board/freescale/mx31pdk/mx31pdk.c
+++ b/board/freescale/mx31pdk/mx31pdk.c
@@ -70,7 +70,7 @@ int board_init(void)
int checkboard(void)
{
- printf("Board: i.MX31 MAX PDK (3DS)\n");
+ printf("Board: MX31PDK [%s]\n", get_reset_cause());
return 0;
}
--
1.6.0.4
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[U-Boot] [PATCH v3 2/3] MX31: Introduce get_reset_cause()
Introduce get_reset_cause() function to indicate the source of the reset.
Signed-off-by: Fabio Estevam
---
arch/arm/cpu/arm1136/mx31/generic.c | 26 ++
arch/arm/include/asm/arch-mx31/imx-regs.h |2 ++
2 files changed, 28 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c
b/arch/arm/cpu/arm1136/mx31/generic.c
index 9b7a7a2..ea452a9 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -132,6 +132,32 @@ char *get_cpu_rev(void)
return "unknown";
}
+char *get_reset_cause(void)
+{
+ /* read SRS register from CCM module */
+ struct clock_control_regs *ccm =
+ (struct clock_control_regs *)CCM_BASE;
+
+ u32 cause = readl(&ccm->rcsr) & 0x07;
+
+ switch (cause) {
+ case 0x:
+ return "POR";
+ break;
+ case 0x0001:
+ return "RST";
+ break;
+ case 0x0002:
+ return "WDOG";
+ break;
+ case 0x0006:
+ return "JTAG";
+ break;
+ default:
+ return "unknown reset";
+ }
+}
+
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo (void)
{
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 7f2..2b0881d 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -27,6 +27,8 @@
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
#include
+extern char *get_reset_cause(void);
+
/* Clock control module registers */
struct clock_control_regs {
u32 ccmr;
--
1.6.0.4
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[U-Boot] [PATCH v3 1/3] ARM: MX31: Fix file name label
Commit 5d2c154 (IMX: MX31: Cleanup include files and drop nasty #ifdef in
drivers)
renamed mx31-imx-regs.h to imx-regs.h.
Change the file label accordingly.
Signed-off-by: Fabio Estevam
---
This patch series should were applied in the u-boot-arm tree.
It also needs the following patch to be applied first:
[PATCH v5] ARM: mx31: Print the silicon version
arch/arm/include/asm/arch-mx31/imx-regs.h |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 0eeaf39..7f2 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -21,8 +21,8 @@
* MA 02111-1307 USA
*/
-#ifndef __ASM_ARCH_MX31_REGS_H
-#define __ASM_ARCH_MX31_REGS_H
+#ifndef __ASM_ARCH_MX31_IMX_REGS_H
+#define __ASM_ARCH_MX31_IMX_REGS_H
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
#include
@@ -774,4 +774,4 @@ enum iomux_pins {
#define MXC_EHCI_IPPUE_DOWN(1 << 8)
#define MXC_EHCI_IPPUE_UP (1 << 9)
-#endif /* __ASM_ARCH_MX31_REGS_H */
+#endif /* __ASM_ARCH_MX31_IMX_REGS_H */
--
1.6.0.4
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Re: [U-Boot] [PATCH 0/2] SROM config code moved to s5p-common directory
Chander Kashyap, On 14 April 2011 19:21, Chander Kashyap wrote: > SROM config code is make common for S5P series boards. > smdkc100.c refers to s5p_config_srom in s5p-common directory. > > Chander Kashyap (2): > S5P: SROM config code moved to common directory s5p-common > S5PC1XX: Refers to SROM config code in s5p-common directory. > Header file renamed from smc.h to sromc.h. > > arch/arm/cpu/armv7/s5p-common/Makefile | 3 +- > arch/arm/cpu/armv7/s5p-common/sromc.c | 49 ++ > arch/arm/cpu/armv7/s5pc1xx/Makefile | 1 - > arch/arm/cpu/armv7/s5pc1xx/sromc.c | 49 -- > arch/arm/include/asm/arch-s5pc1xx/smc.h | 53 > - > arch/arm/include/asm/arch-s5pc1xx/sromc.h | 53 > + > board/samsung/smdkc100/smdkc100.c | 4 +- > 7 files changed, 106 insertions(+), 106 deletions(-) > create mode 100644 arch/arm/cpu/armv7/s5p-common/sromc.c > delete mode 100644 arch/arm/cpu/armv7/s5pc1xx/sromc.c > delete mode 100644 arch/arm/include/asm/arch-s5pc1xx/smc.h > create mode 100644 arch/arm/include/asm/arch-s5pc1xx/sromc.h > No. Please make it one patch. And please use git mv instead of rm and cp. Thanks. Minkyu Kang -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ARM: fix stack pointer adjustment in board_init_f()
Since addr_sp is a byte address, it should be adjusted by 12 here. Signed-off-by: Eric Cooper Cc: Albert ARIBAUD --- arch/arm/lib/board.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index dc46e21..d5b34ad 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -399,7 +399,7 @@ void board_init_f (ulong bootflag) CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ, addr_sp); #endif /* leave 3 words for abort-stack*/ - addr_sp -= 3; + addr_sp -= 12; /* 8-byte alignment for ABI compliance */ addr_sp &= ~0x07; -- 1.7.4.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] avr32: add ATAG_BOARDINFO
Dear Reinhard Meyer, In message <4da6edab.8040...@emk-elektronik.de> you wrote: > > > Guess I have no other choice now, but you owe me a new keyboard. > I'm busy right now, but I will take this (and other stuff) in during the > upcoming weekend. Thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Q: Why do PCs have a reset button on the front? A: Because they are expected to run Microsoft operating systems. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: Tegra2: Fix out of tree builds
No worries. On Thu, Apr 14, 2011 at 2:29 PM, Albert ARIBAUD wrote: >> >> An alternative solution would be to create a Makefile in the common >> directory >> that creates an object/library that each board depends on. I'm not sure >> which >> is better. > > I'd prefer the alternative solution -- the issue is with a common directory, > so it seems logical that the solution is in the common part of the code > rather than spread over the non-common variants. > Yes, that makes perfect sense. I'll make the change. Thanks, Anton ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V5] arm: Tegra2: add support for A9 CPU init
Signed-off-by: Tom Warren
---
Changes for V2:
- Remove returns in void functions
- Move inline assembly code to .S file
- Simplify some if/else code, break out common code
- Minimize the use of local vars
- Inline some single-instance functions
- Remove TRUE/FALSE define, use 1/0 instead
- Replace memset of mem-mapped regs w/loop of writel's
Changes for V3:
- Fix C-style comments in lowlevel_init.S cache_configure
Changes for V4:
- Move cold_boot() from C to assembly
- Fix spacing in cache_configure
Changes for V5:
- Add a timeout and printf msg if CPU never powers up
- Remove redundant is_cpu_powered in start_cpu
arch/arm/cpu/armv7/start.S | 12 +
arch/arm/cpu/armv7/tegra2/Makefile |2 +-
arch/arm/cpu/armv7/tegra2/ap20.c | 329
arch/arm/cpu/armv7/tegra2/ap20.h | 104 +
arch/arm/cpu/armv7/tegra2/lowlevel_init.S | 94
arch/arm/include/asm/arch-tegra2/clk_rst.h | 27 +++
arch/arm/include/asm/arch-tegra2/pmc.h |8 +
arch/arm/include/asm/arch-tegra2/scu.h | 43
arch/arm/include/asm/arch-tegra2/tegra2.h |8 +
board/nvidia/common/board.c| 10 +
board/nvidia/common/board.h| 29 +++
include/configs/harmony.h |1 +
include/configs/seaboard.h |1 +
include/configs/tegra2-common.h|2 +
14 files changed, 669 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/armv7/tegra2/ap20.c
create mode 100644 arch/arm/cpu/armv7/tegra2/ap20.h
create mode 100644 arch/arm/include/asm/arch-tegra2/scu.h
create mode 100644 board/nvidia/common/board.h
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index d83d501..bef0a6d 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -70,6 +70,18 @@ _end_vect:
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
+#ifdef CONFIG_TEGRA2
+/*
+ * Tegra2 uses 2 separate CPUs - the AVP (ARM7TDMI) and the CPU (dual A9s).
+ * U-Boot runs on the AVP first, setting things up for the CPU (PLLs,
+ * muxes, clocks, clamps, etc.). Then the AVP halts, and expects the CPU
+ * to pick up its reset vector, which points here.
+ */
+.globl _armboot_start
+_armboot_start:
+.word _start
+#endif
+
/*
* These are defined in the board-specific linker script.
*/
diff --git a/arch/arm/cpu/armv7/tegra2/Makefile
b/arch/arm/cpu/armv7/tegra2/Makefile
index 687c887..f1ea915 100644
--- a/arch/arm/cpu/armv7/tegra2/Makefile
+++ b/arch/arm/cpu/armv7/tegra2/Makefile
@@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
SOBJS := lowlevel_init.o
-COBJS := board.o sys_info.o timer.o
+COBJS := ap20.o board.o sys_info.o timer.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c b/arch/arm/cpu/armv7/tegra2/ap20.c
new file mode 100644
index 000..d3e6797
--- /dev/null
+++ b/arch/arm/cpu/armv7/tegra2/ap20.c
@@ -0,0 +1,329 @@
+/*
+* (C) Copyright 2010-2011
+* NVIDIA Corporation
+*
+* See file CREDITS for list of people who contributed to this
+* project.
+*
+* This program is free software; you can redistribute it and/or
+* modify it under the terms of the GNU General Public License as
+* published by the Free Software Foundation; either version 2 of
+* the License, or (at your option) any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program; if not, write to the Free Software
+* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+* MA 02111-1307 USA
+*/
+
+#include "ap20.h"
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+u32 s_first_boot = 1;
+
+static void enable_cpu_clock(int enable)
+{
+ struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
+ u32 reg, clk;
+
+ /*
+* NOTE:
+* Regardless of whether the request is to enable or disable the CPU
+* clock, every processor in the CPU complex except the master (CPU 0)
+* will have it's clock stopped because the AVP only talks to the
+* master. The AVP does not know (nor does it need to know) that there
+* are multiple processors in the CPU complex.
+*/
+
+ if (enable) {
+ /* Wait until all clocks are stable */
+ udelay(PLL_STABILIZATION_DELAY);
+
+ writel(CCLK_BURST_POLICY, &clkrst->crc_cclk_brst_pol);
+ writel(SUPER_CCLK_DIVIDER, &clkrst->crc_super_cclk_div);
+ }
+
+ /* Fetch the register containing
[U-Boot] [PATCH V2 3/3] arm: Tegra2: Move clk/mux init to board_early_init_f, add GPIO init
Signed-off-by: Tom Warren
---
board/nvidia/common/board.c | 32 +++
board/nvidia/common/board.h |4 +++
board/nvidia/harmony/Makefile|1 +
board/nvidia/harmony/harmony.c | 34
board/nvidia/seaboard/Makefile |1 +
board/nvidia/seaboard/seaboard.c | 52 ++
6 files changed, 113 insertions(+), 11 deletions(-)
create mode 100644 board/nvidia/harmony/harmony.c
create mode 100644 board/nvidia/seaboard/seaboard.c
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 5edd70f..3d6c248 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -41,7 +41,16 @@ const struct tegra2_sysinfo sysinfo = {
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
- debug("Board Early Init\n");
+ /* Initialize periph clocks */
+ clock_init();
+
+ /* Initialize periph pinmuxes */
+ pinmux_init();
+
+ /* Initialize periph GPIOs */
+ gpio_init();
+
+ /* Init UART, scratch regs, and start CPU */
tegra2_start();
return 0;
}
@@ -64,10 +73,10 @@ int timer_init(void)
static void clock_init_uart(void)
{
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
- static int pllp_init_done;
u32 reg;
- if (!pllp_init_done) {
+ reg = readl(&clkrst->crc_pllp_base);
+ if (!(reg & PLL_BASE_OVRRIDE)) {
/* Override pllp setup for 216MHz operation. */
reg = (PLL_BYPASS | PLL_BASE_OVRRIDE | PLL_DIVP);
reg |= (((NVRM_PLLP_FIXED_FREQ_KHZ/500) << 8) | PLL_DIVM);
@@ -78,8 +87,6 @@ static void clock_init_uart(void)
reg &= ~PLL_BYPASS;
writel(reg, &clkrst->crc_pllp_base);
-
- pllp_init_done++;
}
/* Now do the UART reset/clock enable */
@@ -182,6 +189,15 @@ void pinmux_init(void)
}
/*
+ * Routine: gpio_init
+ * Description: Do individual peripheral GPIO configs
+ */
+void gpio_init(void)
+{
+ gpio_config_uart();
+}
+
+/*
* Routine: board_init
* Description: Early hardware init.
*/
@@ -192,11 +208,5 @@ int board_init(void)
/* board id for Linux */
gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
- /* Initialize peripheral clocks */
- clock_init();
-
- /* Initialize periph pinmuxes */
- pinmux_init();
-
return 0;
}
diff --git a/board/nvidia/common/board.h b/board/nvidia/common/board.h
index 47c7885..350bc57 100644
--- a/board/nvidia/common/board.h
+++ b/board/nvidia/common/board.h
@@ -25,5 +25,9 @@
#define _BOARD_H_
void tegra2_start(void);
+void clock_init(void);
+void pinmux_init(void);
+void gpio_init(void);
+void gpio_config_uart(void);
#endif /* BOARD_H */
diff --git a/board/nvidia/harmony/Makefile b/board/nvidia/harmony/Makefile
index 3a146cb..9fb6b57 100644
--- a/board/nvidia/harmony/Makefile
+++ b/board/nvidia/harmony/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(BOARD).o
+COBJS := $(BOARD).o
COBJS += ../common/board.o
SRCS := $(COBJS:.o=.c)
diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c
new file mode 100644
index 000..f1ab050
--- /dev/null
+++ b/board/nvidia/harmony/harmony.c
@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2010,2011
+ * NVIDIA Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+
+/*
+ * Routine: gpio_config_uart
+ * Description: Does nothing on Harmony - no conflict w/SPI.
+ */
+void gpio_config_uart(void)
+{
+}
diff --git a/board/nvidia/seaboard/Makefile b/board/nvidia/seaboard/Makefile
index 3a146cb..9fb6b57 100644
--- a/board/nvidia/seaboard/Makefile
+++ b/board/nvidia/seaboard/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(BOARD).o
+COBJS := $(BOARD).o
COBJS += ../common/board.o
SRCS := $(COBJS:.o=.c)
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c
new file mode 100644
index 000..4b9a8f3
--- /dev/null
+++ b/board/nvidia/seaboard/seaboard.c
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2010,2011
+ * NVIDIA Corporation
[U-Boot] [PATCH V2 2/3] arm: Tegra2: GPIO: Add basic GPIO definitions
Signed-off-by: Tom Warren
---
arch/arm/include/asm/arch-tegra2/gpio.h | 59 +
arch/arm/include/asm/arch-tegra2/tegra2.h |1 +
2 files changed, 60 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-tegra2/gpio.h
diff --git a/arch/arm/include/asm/arch-tegra2/gpio.h
b/arch/arm/include/asm/arch-tegra2/gpio.h
new file mode 100644
index 000..0fb8f0d
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra2/gpio.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2011, Google Inc. All rights reserved.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _TEGRA2_GPIO_H_
+#define _TEGRA2_GPIO_H_
+
+/*
+ * The Tegra 2x GPIO controller has 222 GPIOs arranged in 8 banks of 4 ports,
+ * each with 8 GPIOs.
+ */
+#define TEGRA_GPIO_PORTS 4 /* The number of ports per bank */
+#define TEGRA_GPIO_BANKS 8 /* The number of banks */
+
+/* GPIO Controller registers for a single bank */
+struct gpio_ctlr_bank {
+ uint gpio_config[TEGRA_GPIO_PORTS];
+ uint gpio_dir_out[TEGRA_GPIO_PORTS];
+ uint gpio_out[TEGRA_GPIO_PORTS];
+ uint gpio_in[TEGRA_GPIO_PORTS];
+ uint gpio_int_status[TEGRA_GPIO_PORTS];
+ uint gpio_int_enable[TEGRA_GPIO_PORTS];
+ uint gpio_int_level[TEGRA_GPIO_PORTS];
+ uint gpio_int_clear[TEGRA_GPIO_PORTS];
+};
+
+struct gpio_ctlr {
+ struct gpio_ctlr_bank gpio_bank[TEGRA_GPIO_BANKS];
+};
+
+#define GPIO_BANK(x) ((x) >> 5)
+#define GPIO_PORT(x) (((x) >> 3) & 0x3)
+#define GPIO_BIT(x)((x) & 0x7)
+
+/*
+ * GPIO_PI3 = Port I = 8, bit = 3.
+ * Seaboard: used for UART/SPI selection
+ * Harmony: not used
+ */
+#define GPIO_PI3 ((8 << 3) | 3)
+
+#endif /* TEGRA2_GPIO_H_ */
diff --git a/arch/arm/include/asm/arch-tegra2/tegra2.h
b/arch/arm/include/asm/arch-tegra2/tegra2.h
index 7b0f5cc..742a75a 100644
--- a/arch/arm/include/asm/arch-tegra2/tegra2.h
+++ b/arch/arm/include/asm/arch-tegra2/tegra2.h
@@ -30,6 +30,7 @@
#define NV_PA_TMRUS_BASE 0x60005010
#define NV_PA_CLK_RST_BASE 0x60006000
#define NV_PA_FLOW_BASE0x60007000
+#define NV_PA_GPIO_BASE0x6000D000
#define NV_PA_EVP_BASE 0x6000F000
#define NV_PA_APB_MISC_BASE0x7000
#define NV_PA_APB_UARTA_BASE (NV_PA_APB_MISC_BASE + 0x6000)
--
1.7.4.3
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[U-Boot] [PATCH V2 0/3] Fix hang when loading U-Boot from SPI or NAND
This series of patches fixes a hang seen when loading U-Boot from SPI or NAND on Seaboard and Harmony due to a missing PLLX init. It also corrects a UARTD bit error in clk_rst.h, and adds rudimentary GPIO support so that the UART on Seaboard can be used by U-Boot (UARTD & SPIFLASH are muxed, and the default POR setting is for SPI access, so GPIO_PI3 has to be driven low to enable serial console I/O over UARTD). Harmony has no SPIFLASH, so the issue doesn't exist there. With these changes, I can write U-Boot to SPI on Seaboard and boot with it to the U-Boot cmd prompt. This should also apply to loading from NAND on Seaboard and Harmony - testing to follow. Changes in V2: - Change 2nd patch's description to 'Add basic GPIO definitions' - Add more descriptive comment for CPCON use in init_pllx Tom Warren (3): arm: Tegra2: Add missing PLLX init arm: Tegra2: GPIO: Add basic GPIO definitions arm: Tegra2: Move clk/mux init to board_early_init_f, add GPIO init arch/arm/cpu/armv7/tegra2/ap20.c | 29 ++ arch/arm/include/asm/arch-tegra2/clk_rst.h |6 ++- arch/arm/include/asm/arch-tegra2/gpio.h| 59 arch/arm/include/asm/arch-tegra2/tegra2.h |1 + board/nvidia/common/board.c| 32 ++- board/nvidia/common/board.h|4 ++ board/nvidia/harmony/Makefile |1 + board/nvidia/harmony/harmony.c | 34 board/nvidia/seaboard/Makefile |1 + board/nvidia/seaboard/seaboard.c | 52 10 files changed, 206 insertions(+), 13 deletions(-) create mode 100644 arch/arm/include/asm/arch-tegra2/gpio.h create mode 100644 board/nvidia/harmony/harmony.c create mode 100644 board/nvidia/seaboard/seaboard.c -- 1.7.4.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2 1/3] arm: Tegra2: Add missing PLLX init
Signed-off-by: Tom Warren
---
arch/arm/cpu/armv7/tegra2/ap20.c | 29
arch/arm/include/asm/arch-tegra2/clk_rst.h |6 +++-
2 files changed, 33 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c b/arch/arm/cpu/armv7/tegra2/ap20.c
index d3e6797..60dd5df 100644
--- a/arch/arm/cpu/armv7/tegra2/ap20.c
+++ b/arch/arm/cpu/armv7/tegra2/ap20.c
@@ -32,6 +32,32 @@
u32 s_first_boot = 1;
+void init_pllx(void)
+{
+ struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
+ u32 reg;
+
+ /* If PLLX is already enabled, just return */
+ reg = readl(&clkrst->crc_pllx_base);
+ if (reg & PLL_ENABLE)
+ return;
+
+ /* Set PLLX_MISC */
+ reg = CPCON;/* CPCON[11:8] = 0001 */
+ writel(reg, &clkrst->crc_pllx_misc);
+
+ /* Use 12MHz clock here */
+ reg = (PLL_BYPASS | PLL_DIVM);
+ reg |= (1000 << 8); /* DIVN = 0x3E8 */
+ writel(reg, &clkrst->crc_pllx_base);
+
+ reg |= PLL_ENABLE;
+ writel(reg, &clkrst->crc_pllx_base);
+
+ reg &= ~PLL_BYPASS;
+ writel(reg, &clkrst->crc_pllx_base);
+}
+
static void enable_cpu_clock(int enable)
{
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
@@ -47,6 +73,9 @@ static void enable_cpu_clock(int enable)
*/
if (enable) {
+ /* Initialize PLLX */
+ init_pllx();
+
/* Wait until all clocks are stable */
udelay(PLL_STABILIZATION_DELAY);
diff --git a/arch/arm/include/asm/arch-tegra2/clk_rst.h
b/arch/arm/include/asm/arch-tegra2/clk_rst.h
index d67a5d7..bd8ad2c 100644
--- a/arch/arm/include/asm/arch-tegra2/clk_rst.h
+++ b/arch/arm/include/asm/arch-tegra2/clk_rst.h
@@ -160,8 +160,8 @@ struct clk_rst_ctlr {
#define PLL_DIVP (1 << 20) /* post divider, b22:20 */
#define PLL_DIVM 0x0C/* input divider, b4:0 */
-#define SWR_UARTD_RST (1 << 2)
-#define CLK_ENB_UARTD (1 << 2)
+#define SWR_UARTD_RST (1 << 1)
+#define CLK_ENB_UARTD (1 << 1)
#define SWR_UARTA_RST (1 << 6)
#define CLK_ENB_UARTA (1 << 6)
@@ -189,4 +189,6 @@ struct clk_rst_ctlr {
#define CPU0_CLK_STP (1 << 8)
#define CPU1_CLK_STP (1 << 9)
+#define CPCON (1 << 8)
+
#endif /* CLK_RST_H */
--
1.7.4.3
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Re: [U-Boot] [PATCH] arm: Tegra2: Fix out of tree builds
Hi Anton, Sorry for the dela in replying. Le 05/04/2011 23:33, Anton Staaf a écrit : > Create the board/nvidia/common directory in the out of tree build > directory. > > Without this patch building out of tree results in a failure to create > the board.o file in the build directory tree. > > Signed-off-by: Anton Staaf > Cc: Tom Warren > Cc: Albert ARIBAUD > --- > > An alternative solution would be to create a Makefile in the common directory > that creates an object/library that each board depends on. I'm not sure which > is better. I'd prefer the alternative solution -- the issue is with a common directory, so it seems logical that the solution is in the common part of the code rather than spread over the non-common variants. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5] ARM: mx31: Print the silicon version
Am 14/04/2011 13:14, schrieb Albert ARIBAUD: > > Seems this is ok. It is for me ok, too. > > Stefano, will you take this patch in and send a pull request, or do you > want me to pick it? I will take this patch and I wiil send you a pull request. Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/9] cmd_sf: add handler for +len arg for erase command
On 04/12/11 02:35, Mike Frysinger wrote:
> From: Richard Retanubun
>
> This patch adds [+]len handler for the erase command that will
> automatically round up the requested erase length to the flash's
> sector_size.
>
> Signed-off-by: Richard Retanubun
> Signed-off-by: Mike Frysinger
> ---
> Richard: I noticed some issues in your original patch, so please try
> this one instead and see if it still works for you.
Hi Mike,
Code looks okay. I won't have time to test for a while. Feel free to mainline
if it works for you
if it makes problems for me, I'll figure it out and poke you then.
- Richard
>
> common/cmd_sf.c | 51 +++
> 1 files changed, 47 insertions(+), 4 deletions(-)
>
> diff --git a/common/cmd_sf.c b/common/cmd_sf.c
> index 6e7be81..afbef99 100644
> --- a/common/cmd_sf.c
> +++ b/common/cmd_sf.c
> @@ -19,6 +19,47 @@
>
> static struct spi_flash *flash;
>
> +
> +/*
> + * This function computes the length argument for the erase command.
> + * The length on which the command is to operate can be given in two forms:
> + * 1. offset len - operate on<'offset', 'len')
> + * 2. offset +len - operate on<'offset', 'round_up(len)')
> + * If the second form is used and the length doesn't fall on the
> + * sector boundary, than it will be adjusted to the next sector boundary.
> + * If it isn't in the flash, the function will fail (return -1).
> + * Input:
> + *arg: length specification (i.e. both command arguments)
> + * Output:
> + *len: computed length for operation
> + * Return:
> + *1: success
> + * -1: failure (bad format, bad address).
> + */
> +static int sf_parse_len_arg(char *arg, ulong *len)
> +{
> + char *ep;
> + char round_up_len; /* indicates if the "+length" form used */
> + ulong len_arg;
> +
> + round_up_len = 0;
> + if (*arg == '+') {
> + round_up_len = 1;
> + ++arg;
> + }
> +
> + len_arg = simple_strtoul(arg,&ep, 16);
> + if (ep == arg || *ep != '\0')
> + return -1;
> +
> + if (round_up_len&& flash->sector_size> 0)
> + *len = ROUND(len_arg - 1, flash->sector_size);
> + else
> + *len = len_arg;
> +
> + return 1;
> +}
> +
> static int do_spi_flash_probe(int argc, char * const argv[])
> {
> unsigned int bus = 0;
> @@ -135,8 +176,9 @@ static int do_spi_flash_erase(int argc, char * const
> argv[])
> offset = simple_strtoul(argv[1],&endp, 16);
> if (*argv[1] == 0 || *endp != 0)
> goto usage;
> - len = simple_strtoul(argv[2],&endp, 16);
> - if (*argv[2] == 0 || *endp != 0)
> +
> + ret = sf_parse_len_arg(argv[2],&len);
> + if (ret != 1)
> goto usage;
>
> ret = spi_flash_erase(flash, offset, len);
> @@ -148,7 +190,7 @@ static int do_spi_flash_erase(int argc, char * const
> argv[])
> return 0;
>
> usage:
> - puts("Usage: sf erase offset len\n");
> + puts("Usage: sf erase offset [+]len\n");
> return 1;
> }
>
> @@ -189,5 +231,6 @@ U_BOOT_CMD(
> " `offset' to memory at `addr'\n"
> "sf write addr offset len - write `len' bytes from memory\n"
> " at `addr' to flash at `offset'\n"
> - "sf erase offset len- erase `len' bytes from `offset'"
> + "sf erase offset [+]len - erase `len' bytes from `offset'\n"
> + " `+len' round up `len' to block size"
> );
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Re: [U-Boot] [PATCHv2] MMC: disable multiblock rw on old rev OMAP3 silicon
On Apr 14, 2011, at 10:46 AM, John Rigby wrote:
> Make existing field b_max field in struct mmc unconditional
> and use it instead of CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_bread
> and mmc_bwrite.
>
> Initialize b_max to CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_register
> if it has not been initialized by the hw driver.
>
> Initialize b_max to 1 in omap_hsmmc.c for old rev silicon OMAP3
> to disable multi block rw.
>
> Signed-off-by: John Rigby
> ---
> v2: Test cpu family and rev
>
> drivers/mmc/mmc.c|8
> drivers/mmc/omap_hsmmc.c |8
> include/mmc.h|2 --
Please split apart the omap changes vs the generic changes.
> 3 files changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
> index d69eaa1..59ca4df 100644
> --- a/drivers/mmc/mmc.c
> +++ b/drivers/mmc/mmc.c
> @@ -144,8 +144,7 @@ mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt,
> const void*src)
> return 0;
>
> do {
> - cur = (blocks_todo > CONFIG_SYS_MMC_MAX_BLK_COUNT) ?
> -CONFIG_SYS_MMC_MAX_BLK_COUNT : blocks_todo;
> + cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
> if(mmc_write_blocks(mmc, start, cur, src) != cur)
> return 0;
> blocks_todo -= cur;
> @@ -217,8 +216,7 @@ static ulong mmc_bread(int dev_num, ulong start, lbaint_t
> blkcnt, void *dst)
> return 0;
>
> do {
> - cur = (blocks_todo > CONFIG_SYS_MMC_MAX_BLK_COUNT) ?
> -CONFIG_SYS_MMC_MAX_BLK_COUNT : blocks_todo;
> + cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
> if(mmc_read_blocks(mmc, dst, start, cur) != cur)
> return 0;
> blocks_todo -= cur;
> @@ -852,6 +850,8 @@ int mmc_register(struct mmc *mmc)
> mmc->block_dev.removable = 1;
> mmc->block_dev.block_read = mmc_bread;
> mmc->block_dev.block_write = mmc_bwrite;
> + if (!mmc->b_max)
> + mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
>
> INIT_LIST_HEAD (&mmc->link);
>
> diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
> index 6f2280a..685ff74 100644
> --- a/drivers/mmc/omap_hsmmc.c
> +++ b/drivers/mmc/omap_hsmmc.c
> @@ -465,6 +465,14 @@ int omap_mmc_init(int dev_index)
> mmc->f_min = 40;
> mmc->f_max = 5200;
>
> +#if defined(CONFIG_OMAP34XX)
> + /*
> + * 34XX silicon revs 2.1 and older do not support multiblock transfers.
> + */
> + if ((get_cpu_family() == CPU_OMAP34XX) && (get_cpu_rev() <=
> CPU_3XX_ES21))
> + mmc->b_max = 1;
> +#endif
> +
It would be better if we could avoid platform-specific code in the
driverbut I see that there's already a lot of that, so I'll save that fight
for another day. :)
> mmc_register(mmc);
>
> return 0;
> diff --git a/include/mmc.h b/include/mmc.h
> index fcd0fd1..91d0495 100644
> --- a/include/mmc.h
> +++ b/include/mmc.h
> @@ -274,9 +274,7 @@ struct mmc {
> struct mmc_cmd *cmd, struct mmc_data *data);
> void (*set_ios)(struct mmc *mmc);
> int (*init)(struct mmc *mmc);
> -#ifdef CONFIG_MMC_MBLOCK
> uint b_max;
> -#endif
Can you go and remove CONFIG_MMC_MBLOCK from the 3 other places it appears? It
seems to be unnecessary at the moment.
Andy
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[U-Boot] [PATCH] fsl-ddr: Fix mixed-case macro names
Signed-off-by: Kyle Moffett --- arch/powerpc/cpu/mpc8xxx/ddr/util.c | 18 +- 1 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/util.c b/arch/powerpc/cpu/mpc8xxx/ddr/util.c index 02908b4..104d360 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/util.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/util.c @@ -13,11 +13,11 @@ #include "ddr.h" /* To avoid 64-bit full-divides, we factor this here */ -#define ULL_2e12 2ULL -#define UL_5pow12 244140625UL -#define UL_2pow13 (1UL << 13) +#define ULL_2E12 2ULL +#define UL_5POW12 244140625UL +#define UL_2POW13 (1UL << 13) -#define ULL_8Fs 0xULL +#define ULL_8FS 0xULL /* * Round mclk_ps to nearest 10 ps in memory controller code. @@ -32,7 +32,7 @@ unsigned int get_memory_clk_period_ps(void) unsigned int result; /* Round to nearest 10ps, being careful about 64-bit multiply/divide */ - unsigned long long mclk_ps = ULL_2e12; + unsigned long long mclk_ps = ULL_2E12; /* Add 5*data_rate, for rounding */ mclk_ps += 5*(unsigned long long)data_rate; @@ -61,9 +61,9 @@ unsigned int picos_to_mclk(unsigned int picos) * Now divide by 5^12 and track the 32-bit remainder, then divide * by 2*(2^12) using shifts (and updating the remainder). */ - clks_rem = do_div(clks, UL_5pow12); + clks_rem = do_div(clks, UL_5POW12); clks_rem <<= 13; - clks_rem |= clks & (UL_2pow13-1); + clks_rem |= clks & (UL_2POW13-1); clks >>= 13; /* If we had a remainder, then round up */ @@ -71,8 +71,8 @@ unsigned int picos_to_mclk(unsigned int picos) clks++; /* Clamp to the maximum representable value */ - if (clks > ULL_8Fs) - clks = ULL_8Fs; + if (clks > ULL_8FS) + clks = ULL_8FS; return (unsigned int) clks; } -- 1.7.2.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv2] powerpc: Minimal private libgcc to build on Debian
On Apr 13, 2011, at 16:57, Wolfgang Denk wrote: > In message <1298479238-22114-1-git-send-email-kyle.d.moff...@boeing.com> you > wrote: >> Standard Debian powerpc and powerpcspe systems only include hard-float >> libgcc in their native compilers, which causes scary build warnings when >> building U-Boot. >> >> Debian and other PowerPC-supporting distributions used to provide libgcc >> and other libraries in a "nof" (soft-float) form in the "multilib" >> packages. As they were completely unused by the distribution and >> therefore tended to be very buggy it was decided to save some time on >> the part of the maintainers and build-servers by removing them. >> >> Admittedly, right now the linker warnings do not indicate any problems, >> as the included routines do not use any floating point at all. >> >> The concern is that if floating-point code were ever added it might >> cause hard-float code to be unexpectedly included in U-Boot without >> generating a hard error. This would cause unexplained crashes or >> indeterminate results at runtime. >> >> The easiest way to resolve this is to borrow the routines that U-Boot >> needs from the Linux kernel, which has the same issue. >> >> Specifically, the routines are: _ashldi3(), _ashrdi3(), and _lshrdi3(). > > Sorry, but I cannot follow your logic. > > First, we do not use floating point in U-Boot. We don't. Period. > [The only exception being well-designed and hand-crafted assemby code > where it is unavoidable - for example in the POST code to test the > FPU, or for certain atomic 64 bit stores]. > > So FP support should never be a reason for such a change. The concern is not with floating point being used in U-Boot, but with the internal implementation of those libgcc functions. Specifically, I could very well imagine that functions such as the full 64-bit divide (_udivdi3) might internally be optimized by using specific floating point operations on PowerPC. On PowerPC with SPE extensions, the native libgcc might use the full 64-bit extensions to the regular integer registers to perform such operations. > What confuses me completely is why you then add some shift functions, > which are completely unrelated to FP operations. Since that CPU state is not necessarily set up in U-Boot, we should not use functions from a libgcc which is allowed to use those ops. Since a native PowerPC U-Boot built on a PowerPC Debian system does not have a soft-float libgcc to build against, this patch provides a minimal "libgcc" with the few libgcc functions that U-Boot seems to need (the various 64-bit shifts). This is similar to the minimal "libgcc" provided by the ARM arch from arch/arm/lib/_ash[lr]di3.S and arch/arm/lib/_divsi3.S, and is almost identical to what the Linux kernel uses on PowerPC. This is only enabled if USE_PRIVATE_LIBGCC=1 (the same config variable as the ARM private libgcc) to avoid breaking other ports. I will update the patch notes. Cheers, Kyle Moffett ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/6] TFTP server
Hi Luca,
Le 14/04/2011 17:52, Luca Ceresoli a écrit :
> A note about checkpatch.pl.
:)
> Some of these patches do have checkpatch errors and/or warnings. These are all
> issues that were already present in the pre-existing code.
> An example from patch 2:
>
> static void
> -PingHandler (uchar * pkt, unsigned dest, unsigned src, unsigned len)
> +PingHandler (uchar * pkt, unsigned dest, IPaddr_t sip, unsigned src,
> +unsigned len)
> {
>
> Raises:
> * ERROR: "foo * bar" should be "foo *bar"
> * WARNING: space prohibited between function name and open parenthesis '('
>
> As I didn't touch the pointer parameters nor the stuff before the '(' (but I
> changed the line somewhere else), should I also fix the checkpatch issues?
> And in case, should it be a separate patch to make it cleaner?
My opinion is that you should make sure that at least the code you touch
is checkpatch-clean, so yes, you should fix that; but there is no need
to submit 'checkpatch-compliance' patches. Just fix the line here so
that checkpatch does not complain.
Amicalement,
--
Albert.
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[U-Boot] [PATCH 6/6] TFTP: add tftpsrv command
Signed-off-by: Luca Ceresoli
Cc: Wolfgang Denk
---
README |1 +
common/cmd_net.c | 14 ++
include/net.h|3 ++-
net/net.c| 10 --
4 files changed, 25 insertions(+), 3 deletions(-)
diff --git a/README b/README
index b9b0fcb..83dcb2a 100644
--- a/README
+++ b/README
@@ -685,6 +685,7 @@ The following options need to be configured:
(requires CONFIG_CMD_MEMORY)
CONFIG_CMD_SOURCE "source" command Support
CONFIG_CMD_SPI * SPI serial bus support
+ CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
CONFIG_CMD_USB * USB support
CONFIG_CMD_VFD * VFD support (TRAB)
CONFIG_CMD_CDP * Cisco Discover Protocol support
diff --git a/common/cmd_net.c b/common/cmd_net.c
index 8c6f5c8..053162a 100644
--- a/common/cmd_net.c
+++ b/common/cmd_net.c
@@ -52,6 +52,20 @@ U_BOOT_CMD(
"[loadAddress] [[hostIPaddr:]bootfilename]"
);
+#ifdef CONFIG_CMD_TFTPSRV
+int do_tftpsrv(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ return netboot_common(TFTPSRV, cmdtp, argc, argv);
+}
+
+U_BOOT_CMD(
+ tftpsrv,2, 1, do_tftpsrv,
+ "boot image via network acting as a TFTP server",
+ "[loadAddress]"
+);
+#endif
+
+
#ifdef CONFIG_CMD_RARP
int do_rarpb (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
diff --git a/include/net.h b/include/net.h
index 01f7159..018a744 100644
--- a/include/net.h
+++ b/include/net.h
@@ -364,7 +364,8 @@ extern int NetState; /* Network loop
state */
extern int NetRestartWrap; /* Tried all network devices
*/
#endif
-typedef enum { BOOTP, RARP, ARP, TFTP, DHCP, PING, DNS, NFS, CDP, NETCONS,
SNTP } proto_t;
+typedef enum { BOOTP, RARP, ARP, TFTP, DHCP, PING, DNS, NFS, CDP, NETCONS,
SNTP,
+ TFTPSRV } proto_t;
/* from net/net.c */
extern charBootFile[128]; /* Boot File name
*/
diff --git a/net/net.c b/net/net.c
index 79afd8b..a9a2f8b 100644
--- a/net/net.c
+++ b/net/net.c
@@ -388,7 +388,11 @@ restart:
/* always use ARP to get server ethernet address */
TftpStart();
break;
-
+#ifdef CONFIG_CMD_TFTPSRV
+ case TFTPSRV:
+ TftpStartServer();
+ break;
+#endif
#if defined(CONFIG_CMD_DHCP)
case DHCP:
BootpTry = 0;
@@ -1730,7 +1734,9 @@ static int net_check_prereq (proto_t protocol)
#if defined(CONFIG_CMD_PING) || defined(CONFIG_CMD_SNTP)
common:
#endif
-
+#ifdef CONFIG_CMD_TFTPSRV
+ case TFTPSRV:
+#endif
if (NetOurIP == 0) {
puts ("*** ERROR: `ipaddr' not set\n");
return (1);
--
1.7.1
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[U-Boot] [PATCH 5/6] TFTP: net/tftp.c: add server mode receive
Signed-off-by: Luca Ceresoli
Cc: Wolfgang Denk
---
A note on the style of this patch.
There are many hunks like this:
> - if (TftpState != STATE_SEND_RRQ && src != TftpRemotePort)
> + if (TftpState != STATE_SEND_RRQ &&
> +#ifdef CONFIG_CMD_TFTPSRV
> + TftpState != STATE_RECV_WRQ &&
> +#endif
> + src != TftpRemotePort)
where I put a comparison between TftpState and STATE_RECV_WRQ in #ifdefs.
The #ifdef is not necessary, as both TftpState and STATE_RECV_WRQ are defined
even when CONFIG_CMD_TFTPSRV is off. Simply, TftpState can never be equal to
STATE_RECV_WRQ.
I've put the #ifdefs with the intention of optimizing the code as much as
possible, avoiding a comparison that would be always true (or always false).
I understand that this makes the code a lot more difficult to read.
Should I instead remote the #ifdefs and make the code more readable (but less
optimized)?
Thanks,
Luca
net/tftp.c | 72 ---
net/tftp.h |6 +
2 files changed, 74 insertions(+), 4 deletions(-)
diff --git a/net/tftp.c b/net/tftp.c
index 2c96358..c586a9f 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -2,6 +2,8 @@
* Copyright 1994, 1995, 2000 Neil Russell.
* (See License)
* Copyright 2000, 2001 DENX Software Engineering, Wolfgang Denk,
w...@denx.de
+ * Copyright 2011 Comelit Group SpA,
+ *Luca Ceresoli
*/
#include
@@ -74,6 +76,7 @@ static short TftpNumchars; /* The number of hashes
we printed */
#define STATE_TOO_LARGE3
#define STATE_BAD_MAGIC4
#define STATE_OACK 5
+#define STATE_RECV_WRQ 6
#define TFTP_BLOCK_SIZE512 /* default TFTP
block size */
#define TFTP_SEQUENCE_SIZE ((ulong)(1<<16))/* sequence number is 16
bit */
@@ -241,6 +244,10 @@ TftpSend (void)
TftpBlock=ext2_find_next_zero_bit(Bitmap,(Mapsize*8),0);
/*..falling..*/
#endif
+
+#ifdef CONFIG_CMD_TFTPSRV
+ case STATE_RECV_WRQ:
+#endif
case STATE_DATA:
xp = pkt;
s = (ushort *)pkt;
@@ -293,7 +300,11 @@ TftpHandler (uchar * pkt, unsigned dest, IPaddr_t sip,
unsigned src,
#endif
return;
}
- if (TftpState != STATE_SEND_RRQ && src != TftpRemotePort)
+ if (TftpState != STATE_SEND_RRQ &&
+#ifdef CONFIG_CMD_TFTPSRV
+ TftpState != STATE_RECV_WRQ &&
+#endif
+ src != TftpRemotePort)
return;
if (len < 2) {
@@ -307,12 +318,24 @@ TftpHandler (uchar * pkt, unsigned dest, IPaddr_t sip,
unsigned src,
switch (ntohs(proto)) {
case TFTP_RRQ:
- case TFTP_WRQ:
case TFTP_ACK:
break;
default:
break;
+#ifdef CONFIG_CMD_TFTPSRV
+ case TFTP_WRQ:
+ debug("Got WRQ\n");
+ TftpRemoteIP = sip;
+ TftpRemotePort = src;
+ TftpOurPort = 1024 + (get_timer(0) % 3072);
+ TftpLastBlock = 0;
+ TftpBlockWrap = 0;
+ TftpBlockWrapOffset = 0;
+ TftpSend(); /* Send ACK(0) */
+ break;
+#endif
+
case TFTP_OACK:
debug("Got OACK: %s %s\n",
pkt,
@@ -383,7 +406,11 @@ TftpHandler (uchar * pkt, unsigned dest, IPaddr_t sip,
unsigned src,
if (TftpState == STATE_SEND_RRQ)
debug("Server did not acknowledge timeout option!\n");
- if (TftpState == STATE_SEND_RRQ || TftpState == STATE_OACK) {
+ if (TftpState == STATE_SEND_RRQ ||
+#ifdef CONFIG_CMD_TFTPSRV
+ TftpState == STATE_RECV_WRQ ||
+#endif
+ TftpState == STATE_OACK) {
/* first block received */
TftpState = STATE_DATA;
TftpRemotePort = src;
@@ -518,7 +545,10 @@ TftpTimeout (void)
} else {
puts ("T ");
NetSetTimeout (TftpTimeoutMSecs, TftpTimeout);
- TftpSend ();
+#ifdef CONFIG_CMD_TFTPSRV
+ if (TftpState != STATE_RECV_WRQ)
+#endif
+ TftpSend();
}
}
@@ -639,6 +669,40 @@ TftpStart (void)
TftpSend ();
}
+#ifdef CONFIG_CMD_TFTPSRV
+void
+TftpStartServer(void)
+{
+ tftp_filename[0] = 0;
+
+#if defined(CONFIG_NET_MULTI)
+ printf("Using %s device\n", eth_get_name());
+#endif
+ printf("Listening for TFTP transfer on %pI4\n", &NetOurIP);
+ printf("Load address: 0x%lx\n", load_addr);
+
+ puts("Loading: *\b");
+
+ TftpTimeoutCountMax = TIMEOUT_COUNT;
+ TftpTimeoutCount = 0;
+ TftpTimeoutMSecs = TIMEOUT;
+ NetSetTimeout(TftpTimeoutMSecs, TftpTimeout);
+
+ /* Revert TftpBlkSize to dflt */
+ TftpBlkSize = TFTP_BLOCK_SIZE;
+ TftpBlock = 0;
+ TftpOurPort = WELL_KNOWN_PORT;
+
+#ifdef CONFIG_TFT
[U-Boot] [PATCH 4/6] TFTP: rename STATE_RRQ to STATE_SEND_RRQ
With the upcoming TFTP server implementation, requests can be either
outgoing or incoming, so avoid ambiguities.
Signed-off-by: Luca Ceresoli
Cc: Wolfgang Denk
---
net/tftp.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/net/tftp.c b/net/tftp.c
index 42469e7..2c96358 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -69,7 +69,7 @@ static intTftpTsize; /* The file size
reported by the server */
static short TftpNumchars; /* The number of hashes we printed
*/
#endif
-#define STATE_RRQ 1
+#define STATE_SEND_RRQ 1
#define STATE_DATA 2
#define STATE_TOO_LARGE3
#define STATE_BAD_MAGIC4
@@ -200,7 +200,7 @@ TftpSend (void)
switch (TftpState) {
- case STATE_RRQ:
+ case STATE_SEND_RRQ:
xp = pkt;
s = (ushort *)pkt;
*s++ = htons(TFTP_RRQ);
@@ -293,7 +293,7 @@ TftpHandler (uchar * pkt, unsigned dest, IPaddr_t sip,
unsigned src,
#endif
return;
}
- if (TftpState != STATE_RRQ && src != TftpRemotePort)
+ if (TftpState != STATE_SEND_RRQ && src != TftpRemotePort)
return;
if (len < 2) {
@@ -380,10 +380,10 @@ TftpHandler (uchar * pkt, unsigned dest, IPaddr_t sip,
unsigned src,
}
}
- if (TftpState == STATE_RRQ)
+ if (TftpState == STATE_SEND_RRQ)
debug("Server did not acknowledge timeout option!\n");
- if (TftpState == STATE_RRQ || TftpState == STATE_OACK) {
+ if (TftpState == STATE_SEND_RRQ || TftpState == STATE_OACK) {
/* first block received */
TftpState = STATE_DATA;
TftpRemotePort = src;
@@ -610,7 +610,7 @@ TftpStart (void)
TftpRemotePort = WELL_KNOWN_PORT;
TftpTimeoutCount = 0;
- TftpState = STATE_RRQ;
+ TftpState = STATE_SEND_RRQ;
/* Use a pseudo-random port unless a specific port is set */
TftpOurPort = 1024 + (get_timer(0) % 3072);
--
1.7.1
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[U-Boot] [PATCH 3/6] TFTP: rename "server" to "remote"
With the upcoming TFTP server implementation, the remote node can be
either a client or a server, so avoid ambiguities.
Signed-off-by: Luca Ceresoli
Cc: Wolfgang Denk
---
net/tftp.c | 28 ++--
1 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/net/tftp.c b/net/tftp.c
index 8e6df0a..42469e7 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -55,8 +55,8 @@ enum {
TFTP_ERR_FILE_ALREADY_EXISTS = 6,
};
-static IPaddr_t TftpServerIP;
-static int TftpServerPort; /* The UDP port at their end
*/
+static IPaddr_t TftpRemoteIP;
+static int TftpRemotePort; /* The UDP port at their end
*/
static int TftpOurPort;/* The UDP port at our end
*/
static int TftpTimeoutCount;
static ulong TftpBlock; /* packet sequence number
*/
@@ -273,7 +273,8 @@ TftpSend (void)
break;
}
- NetSendUDPPacket(NetServerEther, TftpServerIP, TftpServerPort,
TftpOurPort, len);
+ NetSendUDPPacket(NetServerEther, TftpRemoteIP, TftpRemotePort,
+TftpOurPort, len);
}
@@ -292,9 +293,8 @@ TftpHandler (uchar * pkt, unsigned dest, IPaddr_t sip,
unsigned src,
#endif
return;
}
- if (TftpState != STATE_RRQ && src != TftpServerPort) {
+ if (TftpState != STATE_RRQ && src != TftpRemotePort)
return;
- }
if (len < 2) {
return;
@@ -318,7 +318,7 @@ TftpHandler (uchar * pkt, unsigned dest, IPaddr_t sip,
unsigned src,
pkt,
pkt + strlen((char *)pkt) + 1);
TftpState = STATE_OACK;
- TftpServerPort = src;
+ TftpRemotePort = src;
/*
* Check for 'blksize' option.
* Careful: "i" is signed, "len" is unsigned, thus
@@ -386,7 +386,7 @@ TftpHandler (uchar * pkt, unsigned dest, IPaddr_t sip,
unsigned src,
if (TftpState == STATE_RRQ || TftpState == STATE_OACK) {
/* first block received */
TftpState = STATE_DATA;
- TftpServerPort = src;
+ TftpRemotePort = src;
TftpLastBlock = 0;
TftpBlockWrap = 0;
TftpBlockWrapOffset = 0;
@@ -421,7 +421,7 @@ TftpHandler (uchar * pkt, unsigned dest, IPaddr_t sip,
unsigned src,
/*
* Acknoledge the block just received, which will prompt
-* the server for the next one.
+* the remote for the next one.
*/
#ifdef CONFIG_MCAST_TFTP
/* if I am the MasterClient, actively calculate what my next
@@ -548,7 +548,7 @@ TftpStart (void)
debug("TFTP blocksize = %i, timeout = %ld ms\n",
TftpBlkSizeOption, TftpTimeoutMSecs);
- TftpServerIP = NetServerIP;
+ TftpRemoteIP = NetServerIP;
if (BootFile[0] == '\0') {
sprintf(default_filename, "%02lX%02lX%02lX%02lX.img",
NetOurIP & 0xFF,
@@ -568,7 +568,7 @@ TftpStart (void)
strncpy(tftp_filename, BootFile, MAX_LEN);
tftp_filename[MAX_LEN-1] = 0;
} else {
- TftpServerIP = string_to_ip (BootFile);
+ TftpRemoteIP = string_to_ip(BootFile);
strncpy(tftp_filename, p + 1, MAX_LEN);
tftp_filename[MAX_LEN-1] = 0;
}
@@ -578,12 +578,12 @@ TftpStart (void)
printf ("Using %s device\n", eth_get_name());
#endif
printf("TFTP from server %pI4"
- "; our IP address is %pI4", &TftpServerIP, &NetOurIP);
+ "; our IP address is %pI4", &TftpRemoteIP, &NetOurIP);
/* Check if we need to send across this subnet */
if (NetOurGatewayIP && NetOurSubnetMask) {
IPaddr_t OurNet = NetOurIP& NetOurSubnetMask;
- IPaddr_t ServerNet = TftpServerIP & NetOurSubnetMask;
+ IPaddr_t ServerNet = TftpRemoteIP & NetOurSubnetMask;
if (OurNet != ServerNet)
printf("; sending through gateway %pI4", &NetOurGatewayIP);
@@ -608,7 +608,7 @@ TftpStart (void)
NetSetTimeout (TftpTimeoutMSecs, TftpTimeout);
NetSetHandler (TftpHandler);
- TftpServerPort = WELL_KNOWN_PORT;
+ TftpRemotePort = WELL_KNOWN_PORT;
TftpTimeoutCount = 0;
TftpState = STATE_RRQ;
/* Use a pseudo-random port unless a specific port is set */
@@ -616,7 +616,7 @@ TftpStart (void)
#ifdef CONFIG_TFTP_PORT
if ((ep = getenv("tftpdstp")) != NULL) {
- TftpServerPort = simple_strtol(ep, NULL, 10);
+ TftpRemotePort = simple_strtol(ep, NULL, 10);
}
if ((ep = getenv("tftpsrcp")) != NULL) {
[U-Boot] [PATCH 2/6] NET: pass source IP address to packet handlers
This is needed for the upcoming TFTP server implementation.
This also simplifies PingHandler() and fixes rxhand_f documentation.
Signed-off-by: Luca Ceresoli
Cc: Wolfgang Denk
---
drivers/net/netconsole.c |5 +++--
include/net.h| 15 ++-
net/bootp.c |9 ++---
net/dns.c|2 +-
net/net.c| 25 ++---
net/nfs.c|2 +-
net/rarp.c |3 ++-
net/sntp.c |3 ++-
net/tftp.c |3 ++-
9 files changed, 41 insertions(+), 26 deletions(-)
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
index e27bb3e..ed753d1 100644
--- a/drivers/net/netconsole.c
+++ b/drivers/net/netconsole.c
@@ -40,13 +40,14 @@ static short nc_port; /*
source/target port */
static const char *output_packet; /* used by first send udp */
static int output_packet_len = 0;
-static void nc_wait_arp_handler (uchar * pkt, unsigned dest, unsigned src,
+static void nc_wait_arp_handler (uchar * pkt, unsigned dest,
+IPaddr_t sip, unsigned src,
unsigned len)
{
NetState = NETLOOP_SUCCESS; /* got arp reply - quit net loop */
}
-static void nc_handler (uchar * pkt, unsigned dest, unsigned src,
+static void nc_handler (uchar * pkt, unsigned dest, IPaddr_t sip, unsigned src,
unsigned len)
{
if (input_size)
diff --git a/include/net.h b/include/net.h
index 95ef8ab..01f7159 100644
--- a/include/net.h
+++ b/include/net.h
@@ -72,12 +72,17 @@
typedef ulong IPaddr_t;
-/*
- * The current receive packet handler. Called with a pointer to the
- * application packet, and a protocol type (PORT_BOOTPC or PORT_TFTP).
- * All other packets are dealt with without calling the handler.
+/**
+ * An incoming packet handler.
+ * @param pktpointer to the application packet
+ * @param dport destination UDP port
+ * @param sipsource IP address
+ * @param sport source UDP port
+ * @param lenpacket length
*/
-typedef void rxhand_f(uchar *, unsigned, unsigned, unsigned);
+typedef void rxhand_f(uchar *pkt, unsigned dport,
+ IPaddr_t sip, unsigned sport,
+ unsigned len);
/*
* A timeout handler. Called after time interval has expired.
diff --git a/net/bootp.c b/net/bootp.c
index 87b027e..eafaae2 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -44,7 +44,8 @@ ulong seed1, seed2;
dhcp_state_t dhcp_state = INIT;
unsigned long dhcp_leasetime = 0;
IPaddr_t NetDHCPServerIP = 0;
-static void DhcpHandler(uchar * pkt, unsigned dest, unsigned src, unsigned
len);
+static void DhcpHandler(uchar * pkt, unsigned dest, IPaddr_t sip, unsigned src,
+ unsigned len);
/* For Debug */
#if 0
@@ -282,7 +283,8 @@ static void BootpVendorProcess (u8 * ext, int size)
* Handle a BOOTP received packet.
*/
static void
-BootpHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len)
+BootpHandler(uchar * pkt, unsigned dest, IPaddr_t sip, unsigned src,
+unsigned len)
{
Bootp_t *bp;
char*s;
@@ -858,7 +860,8 @@ static void DhcpSendRequestPkt(Bootp_t *bp_offer)
* Handle DHCP received packets.
*/
static void
-DhcpHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len)
+DhcpHandler(uchar * pkt, unsigned dest, IPaddr_t sip, unsigned src,
+ unsigned len)
{
Bootp_t *bp = (Bootp_t *)pkt;
diff --git a/net/dns.c b/net/dns.c
index bb3e3f5..b51d1bd 100644
--- a/net/dns.c
+++ b/net/dns.c
@@ -101,7 +101,7 @@ DnsTimeout(void)
}
static void
-DnsHandler(uchar *pkt, unsigned dest, unsigned src, unsigned len)
+DnsHandler(uchar *pkt, unsigned dest, IPaddr_t sip, unsigned src, unsigned len)
{
struct header *header;
const unsigned char *p, *e, *s;
diff --git a/net/net.c b/net/net.c
index a609632..79afd8b 100644
--- a/net/net.c
+++ b/net/net.c
@@ -555,7 +555,8 @@ startAgainTimeout(void)
}
static void
-startAgainHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len)
+startAgainHandler(uchar * pkt, unsigned dest, IPaddr_t sip,
+ unsigned src, unsigned len)
{
/* Totally ignore the packet */
}
@@ -752,13 +753,10 @@ PingTimeout (void)
}
static void
-PingHandler (uchar * pkt, unsigned dest, unsigned src, unsigned len)
+PingHandler (uchar * pkt, unsigned dest, IPaddr_t sip, unsigned src,
+unsigned len)
{
- IPaddr_t tmp;
- volatile IP_t *ip = (volatile IP_t *)pkt;
-
- tmp = NetReadIP((void *)&ip->ip_src);
- if (tmp != NetPingIP)
+ if (sip != NetPingIP)
return;
NetState = NETLOOP_SUCCESS;
@@ -990,7 +988,8 @@ CDPTimeout (void)
}
static void
-CDPDummyHandler (uchar * pkt, unsigned dest, unsigned src, unsigned len)
+CDPDummyHandler (uchar * pkt, unsigned dest, IPaddr_t sip, unsigned src,
+
[U-Boot] [PATCH 1/6] README: remove spurious line
Signed-off-by: Luca Ceresoli Cc: Wolfgang Denk --- README |1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/README b/README index 4917e26..b9b0fcb 100644 --- a/README +++ b/README @@ -1299,7 +1299,6 @@ The following options need to be configured: driver in use must provide a function: mcast() to join/leave a multicast group. - CONFIG_BOOTP_RANDOM_DELAY - BOOTP Recovery Mode: CONFIG_BOOTP_RANDOM_DELAY -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/6] TFTP server
This patch series adds to U-Boot the ability to receive a file via TFTP acting
as a server, not a client.
The implementation is kept simple:
- receive only (accept WRQ from remote client, not RRQ);
- the Filename in the WRQ is ignored: the destination is always a user-provided
memory location;
- binary transfers only: the Mode in the WRQ is ignored; this is allowed by
RFC1350 (section 5);
- no TFTP Option Extensions (RFC2347);
- no TFTP multicast.
The implementation is discussed here:
http://lists.denx.de/pipermail/u-boot/2011-April/090405.html
Once it has started, the server is stopped like the client is: on a complete
file reception, Ctrl-C and after waiting 5 seconds for 10 times.
The first four patches are preliminary cleanups and extensions to the current
code. Most important, the second patch adds to incoming packet handlers an
argument containing the source IP address, and has impact in many places in
the networking code.
The fifth patch implements the core TFTP server.
The last patch adds a user command to launch the server.
A note about checkpatch.pl.
Some of these patches do have checkpatch errors and/or warnings. These are all
issues that were already present in the pre-existing code.
An example from patch 2:
static void
-PingHandler (uchar * pkt, unsigned dest, unsigned src, unsigned len)
+PingHandler (uchar * pkt, unsigned dest, IPaddr_t sip, unsigned src,
+unsigned len)
{
Raises:
* ERROR: "foo * bar" should be "foo *bar"
* WARNING: space prohibited between function name and open parenthesis '('
As I didn't touch the pointer parameters nor the stuff before the '(' (but I
changed the line somewhere else), should I also fix the checkpatch issues?
And in case, should it be a separate patch to make it cleaner?
Also please take a look at the note in patch number 5.
Luca
Luca Ceresoli (6):
README: remove spurious line
NET: pass source IP address to packet handlers
TFTP: rename "server" to "remote"
TFTP: rename STATE_RRQ to STATE_SEND_RRQ
TFTP: net/tftp.c: add server mode receive
TFTP: add tftpsrv command
README |2 +-
common/cmd_net.c | 14 ++
drivers/net/netconsole.c |5 +-
include/net.h| 18 +---
net/bootp.c |9 +++-
net/dns.c|2 +-
net/net.c| 35 +--
net/nfs.c|2 +-
net/rarp.c |3 +-
net/sntp.c |3 +-
net/tftp.c | 109 -
net/tftp.h |6 +++
12 files changed, 157 insertions(+), 51 deletions(-)
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[U-Boot] [PATCHv2] MMC: disable multiblock rw on old rev OMAP3 silicon
Make existing field b_max field in struct mmc unconditional
and use it instead of CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_bread
and mmc_bwrite.
Initialize b_max to CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_register
if it has not been initialized by the hw driver.
Initialize b_max to 1 in omap_hsmmc.c for old rev silicon OMAP3
to disable multi block rw.
Signed-off-by: John Rigby
---
v2: Test cpu family and rev
drivers/mmc/mmc.c|8
drivers/mmc/omap_hsmmc.c |8
include/mmc.h|2 --
3 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index d69eaa1..59ca4df 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -144,8 +144,7 @@ mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const
void*src)
return 0;
do {
- cur = (blocks_todo > CONFIG_SYS_MMC_MAX_BLK_COUNT) ?
- CONFIG_SYS_MMC_MAX_BLK_COUNT : blocks_todo;
+ cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
if(mmc_write_blocks(mmc, start, cur, src) != cur)
return 0;
blocks_todo -= cur;
@@ -217,8 +216,7 @@ static ulong mmc_bread(int dev_num, ulong start, lbaint_t
blkcnt, void *dst)
return 0;
do {
- cur = (blocks_todo > CONFIG_SYS_MMC_MAX_BLK_COUNT) ?
- CONFIG_SYS_MMC_MAX_BLK_COUNT : blocks_todo;
+ cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
if(mmc_read_blocks(mmc, dst, start, cur) != cur)
return 0;
blocks_todo -= cur;
@@ -852,6 +850,8 @@ int mmc_register(struct mmc *mmc)
mmc->block_dev.removable = 1;
mmc->block_dev.block_read = mmc_bread;
mmc->block_dev.block_write = mmc_bwrite;
+ if (!mmc->b_max)
+ mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
INIT_LIST_HEAD (&mmc->link);
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index 6f2280a..685ff74 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -465,6 +465,14 @@ int omap_mmc_init(int dev_index)
mmc->f_min = 40;
mmc->f_max = 5200;
+#if defined(CONFIG_OMAP34XX)
+ /*
+* 34XX silicon revs 2.1 and older do not support multiblock transfers.
+*/
+ if ((get_cpu_family() == CPU_OMAP34XX) && (get_cpu_rev() <=
CPU_3XX_ES21))
+ mmc->b_max = 1;
+#endif
+
mmc_register(mmc);
return 0;
diff --git a/include/mmc.h b/include/mmc.h
index fcd0fd1..91d0495 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -274,9 +274,7 @@ struct mmc {
struct mmc_cmd *cmd, struct mmc_data *data);
void (*set_ios)(struct mmc *mmc);
int (*init)(struct mmc *mmc);
-#ifdef CONFIG_MMC_MBLOCK
uint b_max;
-#endif
};
int mmc_register(struct mmc *mmc);
--
1.7.1
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[U-Boot] [PATCH 4/4] MergerBox: add board specific files in vendor dir.
Signed-off-by: Andre Schwarz
---
board/matrix_vision/mergerbox/Makefile| 51 ++
board/matrix_vision/mergerbox/fpga.c | 175 +
board/matrix_vision/mergerbox/fpga.h | 30
board/matrix_vision/mergerbox/mergerbox.c | 241 +
board/matrix_vision/mergerbox/mergerbox.h | 67
board/matrix_vision/mergerbox/pci.c | 134
board/matrix_vision/mergerbox/sm107.c | 126 +++
7 files changed, 824 insertions(+), 0 deletions(-)
create mode 100644 board/matrix_vision/mergerbox/Makefile
create mode 100644 board/matrix_vision/mergerbox/fpga.c
create mode 100644 board/matrix_vision/mergerbox/fpga.h
create mode 100644 board/matrix_vision/mergerbox/mergerbox.c
create mode 100644 board/matrix_vision/mergerbox/mergerbox.h
create mode 100644 board/matrix_vision/mergerbox/pci.c
create mode 100644 board/matrix_vision/mergerbox/sm107.c
diff --git a/board/matrix_vision/mergerbox/Makefile
b/board/matrix_vision/mergerbox/Makefile
new file mode 100644
index 000..2b78c98
--- /dev/null
+++ b/board/matrix_vision/mergerbox/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS-y += $(BOARD).o pci.o fpga.o sm107.o
+
+COBJS := $(COBJS-y)
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/matrix_vision/mergerbox/fpga.c
b/board/matrix_vision/mergerbox/fpga.c
new file mode 100644
index 000..673bc2c
--- /dev/null
+++ b/board/matrix_vision/mergerbox/fpga.c
@@ -0,0 +1,175 @@
+/*
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rirel...@enterasys.com.
+ * Keith Outwater, keith_outwa...@mvis.com.
+ *
+ * (C) Copyright 2011
+ * Andre Schwarz, Matrix Vision GmbH, andre.schw...@matrix-vision.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include
+#include
+#include
+#include "mergerbox.h"
+#include "fpga.h"
+
+Altera_CYC2_Passive_Serial_fns altera_fns = {
+ fpga_null_fn,
+ fpga_config_fn,
+ fpga_status_fn,
+ fpga_done_fn,
+ fpga_wr_fn,
+ fpga_null_fn,
+ fpga_null_fn,
+};
+
+Altera_desc cyclone2 = {
+ Altera_CYC2,
+ passive_serial,
+ Altera_EP2C20_SIZE,
+ (void *) &altera_fns,
+ NULL,
+ 0
+};
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int mergerbox_init_fpga(void)
+{
+ debug("Initialize FPGA interface\n");
+ fpga_init();
+ fpga_add(fpga_altera, &cyclone2);
+
+ return 1;
+}
+
+int fpga_null_fn(int cookie)
+{
+ return 0;
+}
+
+int fpga_config_fn(int assert, int flush, int cookie)
+{
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ volatile gpio83xx_t *gpio = (gpio83xx_t *)&im->gpio[0];
+ u32 dvo = gpio->dat;
+
+ dvo &= ~FPGA_CONFIG;
+ gpio->dat = dvo;
+ udelay(5);
+ dvo |= FPGA
[U-Boot] [PATCH 2/4] MergerBox: add documentation.
Signed-off-by: Andre Schwarz --- doc/README.mergerbox | 59 ++ 1 files changed, 59 insertions(+), 0 deletions(-) create mode 100644 doc/README.mergerbox diff --git a/doc/README.mergerbox b/doc/README.mergerbox new file mode 100644 index 000..1994b65 --- /dev/null +++ b/doc/README.mergerbox @@ -0,0 +1,59 @@ +Matrix Vision MergerBox +--- + +1. Board Description + + The MergerBox is a 120x160mm single board computing platform + for 3D Full-HD digital video processing. + + Power Supply is 10-32VDC. + +2 System Components + +2.1CPU + Freescale MPC8377 CPU running at 800MHz core and 333MHz csb. + 256 MByte DDR-II memory @ 333MHz data rate. + 64 MByte Nor Flash on local bus. + 1 GByte Nand Flash on FCM. + 1 Vitesse VSC8601 RGMII ethernet Phys. + 1 USB host controller over ULPI I/F with 4-Port hub. + 2 serial ports. Console running on ttyS0 @ 115200 8N1. + 1 mPCIe expansion slot (PCIe x1 + USB) used for Wifi/Bt. + 2 PCIe x1 busses on local mPCIe and cutom expansion connector. + 2 SATA host ports. + System configuration (HRCW) is taken from I2C EEPROM. + +2.2Graphics + SM107 emebedded video controller driving a 5" 800x480 TFT panel. + Connected over 32-Bit/66MHz PCI utilizing 4 MByte embedded memory. + +2.3FPGA + Altera Cyclone-IV EP4C115 with several PCI DMA engines. + Connects to 7x Gennum 3G-SDI transceivers as video interconnect + as well as a HDMI v1.4 compliant output for 3D monitoring. + Utilizes two more DDR-II controllers providing 256MB memory. + +2.4I2C + Bus1: + AD7418 @ 0x50 for voltage/temp. monitoring. + SX8650 @ 0x90 touch controller for HMI. + EEPROM @ 0xA0 for system setup (HRCW etc.) + vendor specifics. + Bus2: + mPCIe SMBus + SiI9022A @ 0x72/0xC0 HDMI transmitter. + TCA6416A @ 0x40 + 0x42 16-Bit I/O expander. + LMH1983 @ 0xCA video PLL. + DS1338C @ 0xD0 real-time clock with embedded crystal. + 9FG104 @ 0xDC 4x 100MHz LVDS SerDes reference clock. + +3 Flash layout. + + reset vector is 0x0100, i.e. low boot. + + u-boot binary. + 0010FPGA raw bit file. + 0030FIT image holding kernel, dtb and rescue squashfs. + 03d0u-boot environment. + 03e0splash image + + mtd partitions are propagated to linux kernel via device tree blob. -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/4] MergerBox: add maintainer and boards.cfg entries.
Signed-off-by: Andre Schwarz --- MAINTAINERS |1 + boards.cfg |1 + 2 files changed, 2 insertions(+), 0 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 4756f14..0720659 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -442,6 +442,7 @@ Peter De Schrijver Andre Schwarz + mergerbox MPC8377 mvbc_p MPC5200 mvblm7 MPC8343 mvsmr MPC5200 diff --git a/boards.cfg b/boards.cfg index 45c3102..ad10f11 100644 --- a/boards.cfg +++ b/boards.cfg @@ -471,6 +471,7 @@ MPC837XEMDS powerpc mpc83xx mpc837xemds freesca MPC837XEMDS_HOST powerpc mpc83xx mpc837xemds freescale - MPC837XEMDS:PCI MPC837XERDB powerpc mpc83xx mpc837xerdb freescale kmeter1 powerpc mpc83xx kmeter1 keymile +MERGERBOXpowerpc mpc83xx mergerbox matrix_vision MVBLM7 powerpc mpc83xx mvblm7 matrix_vision SIMPC8313_LP powerpc mpc83xx simpc8313 sheldon- SIMPC8313:NAND_LP SIMPC8313_SP powerpc mpc83xx simpc8313 sheldon- SIMPC8313:NAND_SP -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/4] MergerBox: Add board config file.
Signed-off-by: Andre Schwarz --- include/configs/MERGERBOX.h | 619 +++ 1 files changed, 619 insertions(+), 0 deletions(-) create mode 100644 include/configs/MERGERBOX.h diff --git a/include/configs/MERGERBOX.h b/include/configs/MERGERBOX.h new file mode 100644 index 000..f9681cd --- /dev/null +++ b/include/configs/MERGERBOX.h @@ -0,0 +1,619 @@ +/* + * Copyright (C) 2007 Freescale Semiconductor, Inc. + * + * Copyright (C) 2011 Matrix Vision GmbH + * Andre Schwarz + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include + +/* + * High Level Configuration Options + */ +#define CONFIG_E3001 +#define CONFIG_MPC83xx 1 +#define CONFIG_MPC837x 1 +#define CONFIG_MPC8377 1 + +#define CONFIG_SYS_TEXT_BASE 0xFC00 + +#define CONFIG_PCI 1 + +#defineCONFIG_MASK_AER_AO +#define CONFIG_DISPLAY_AER_FULL + +#define CONFIG_MISC_INIT_R + +/* + * On-board devices + */ +#define CONFIG_TSEC_ENET + +/* + * System Clock Setup + */ +#define CONFIG_83XX_CLKIN 6667 /* in Hz */ +#define CONFIG_PCIE +#define CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES +#define CONFIG_SYS_CLK_FREQCONFIG_83XX_CLKIN + +/* + * Hardware Reset Configuration Word stored in EEPROM. + */ +#define CONFIG_SYS_HRCW_LOW0 +#define CONFIG_SYS_HRCW_HIGH 0 + +/* Arbiter Configuration Register */ +#define CONFIG_SYS_ACR_PIPE_DEP3 +#define CONFIG_SYS_ACR_RPTCNT 3 + +/* System Priority Control Regsiter */ +#define CONFIG_SYS_SPCR_TSECEP 3 + +/* System Clock Configuration Register */ +#define CONFIG_SYS_SCCR_TSEC1CM3 +#define CONFIG_SYS_SCCR_TSEC2CM0 +#define CONFIG_SYS_SCCR_SDHCCM 3 +#define CONFIG_SYS_SCCR_ENCCM 3 /* also clock for I2C-1 */ +#define CONFIG_SYS_SCCR_USBDRCMCONFIG_SYS_SCCR_ENCCM /* must match */ +#define CONFIG_SYS_SCCR_PCIEXP1CM 3 +#define CONFIG_SYS_SCCR_PCIEXP2CM 3 +#define CONFIG_SYS_SCCR_PCICM 1 +#define CONFIG_SYS_SCCR_SATACM 0xFF + +/* + * System IO Config + */ +#define CONFIG_SYS_SICRH 0x087c +#define CONFIG_SYS_SICRL 0x4000 + +/* + * Output Buffer Impedance + */ +#define CONFIG_SYS_OBIR0x3000 + +/* + * IMMR new address + */ +#define CONFIG_SYS_IMMR0xE000 + +/* + * DDR Setup + */ +#define CONFIG_SYS_DDR_BASE0x +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_83XX_DDR_USES_CS0 + +#define CONFIG_SYS_DDRCDR_VALUE(DDRCDR_EN | DDRCDR_PZ_HIZ |\ +DDRCDR_NZ_HIZ | DDRCDR_ODT |\ +DDRCDR_Q_DRN) + +#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 + +#define CONFIG_SYS_DDR_MODE_WEAK +#define CONFIG_SYS_DDR_WRITE_DATA_DELAY2 +#define CONFIG_SYS_DDR_CPO 0x1f + +/* SPD table located at offset 0x20 in extended adressing ROM + * used for HRCW fetch after power-on reset + */ +#defineCONFIG_SPD_EEPROM +#defineSPD_EEPROM_ADDRESS 0x50 +#defineSPD_EEPROM_OFFSET 0x20 +#defineSPD_EEPROM_ADDR_LEN 2 + +/* + * The reserved memory + */ +#define CONFIG_SYS_MONITOR_BASECONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (512*1024) +#define CONFIG_SYS_MALLOC_LEN (512*1024) + +/* + * Initial RAM Base Address Setup + */ +#define CONFIG_SYS_INIT_RAM_LOCK 1 +#define CONFIG_SYS_INIT_RAM_ADDR 0xE600 /* Initial RAM address */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */ +#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE -\ +CONFIG_SYS_GBL_DATA_SIZE) + +/* + * Local Bus Configuration & Clock Setup + */ +#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP +#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_8 +#define CONFIG_SYS_LBC_LBCR0x +#define CONFIG_FSL_ELBC1 + +/* + * FLASH on the Local Bus + */ +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT + +#d
[U-Boot] [PATCH 0/4] MPC83xx: Add MergerBox support.
This patch adds support for Matrix Vision MergerBox. It is a Freescale MPC8377 based 3D image preocessing platform utilizing Altera Cyclone IV FPGA and Silicon Motion SM107 embedded graphics connected via PCI. See doc/README.mergerbox for details. MAKEALL -c mpc83xx shows no errors/warnings introduced by this patchset. Files have been checked using checkpatch. Andre Schwarz (4): MergerBox: Add board config file. MergerBox: add documentation. MergerBox: add maintainer and boards.cfg entries. MergerBox: add board specific files in vendor dir. MAINTAINERS |1 + board/matrix_vision/mergerbox/Makefile| 51 +++ board/matrix_vision/mergerbox/fpga.c | 175 board/matrix_vision/mergerbox/fpga.h | 30 ++ board/matrix_vision/mergerbox/mergerbox.c | 241 +++ board/matrix_vision/mergerbox/mergerbox.h | 67 +++ board/matrix_vision/mergerbox/pci.c | 134 +++ board/matrix_vision/mergerbox/sm107.c | 126 ++ boards.cfg|1 + doc/README.mergerbox | 59 +++ include/configs/MERGERBOX.h | 619 + 11 files changed, 1504 insertions(+), 0 deletions(-) create mode 100644 board/matrix_vision/mergerbox/Makefile create mode 100644 board/matrix_vision/mergerbox/fpga.c create mode 100644 board/matrix_vision/mergerbox/fpga.h create mode 100644 board/matrix_vision/mergerbox/mergerbox.c create mode 100644 board/matrix_vision/mergerbox/mergerbox.h create mode 100644 board/matrix_vision/mergerbox/pci.c create mode 100644 board/matrix_vision/mergerbox/sm107.c create mode 100644 doc/README.mergerbox create mode 100644 include/configs/MERGERBOX.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] MPC837x: set i2c1_clk
Running on mpc837x without CONFIG_FSL_ESDHC leads to i2c1_clk not being set at all. It is bound to clock of encryption module. fix this. Signed-off-by: Andre Schwarz --- Changes for v2: - fix commit message mangling in subject line. arch/powerpc/cpu/mpc83xx/speed.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c index 5e616dd..1eca1a8 100644 --- a/arch/powerpc/cpu/mpc83xx/speed.c +++ b/arch/powerpc/cpu/mpc83xx/speed.c @@ -327,6 +327,8 @@ int get_clocks(void) i2c1_clk = enc_clk; #elif defined(CONFIG_FSL_ESDHC) i2c1_clk = sdhc_clk; +#elif defined(CONFIG_MPC837x) + i2c1_clk = enc_clk; #endif #if !defined(CONFIG_MPC832x) i2c2_clk = csb_clk; /* i2c-2 clk is equal to csb clk */ -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] MPC83xx: add config options for memory setup.
CPO value and driver strength settings are board specifc.
Also allow SPD data fetch from any accessible I2C EEPROM.
Signed-off-by: Andre Schwarz
---
arch/powerpc/cpu/mpc83xx/spd_sdram.c | 19 ++-
1 files changed, 18 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c
b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
index 44aaa9a..9b01f0d 100644
--- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c
+++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
@@ -68,6 +68,12 @@ void board_add_ram_info(int use_default)
#ifndefCONFIG_SYS_READ_SPD
#define CONFIG_SYS_READ_SPDi2c_read
#endif
+#ifndef SPD_EEPROM_OFFSET
+#define SPD_EEPROM_OFFSET 0
+#endif
+#ifndef SPD_EEPROM_ADDR_LEN
+#define SPD_EEPROM_ADDR_LEN 1
+#endif
/*
* Convert picoseconds into clock cycles (rounding up if needed).
@@ -160,7 +166,8 @@ long int spd_sdram()
isync();
/* Read SPD parameters with I2C */
- CONFIG_SYS_READ_SPD(SPD_EEPROM_ADDRESS, 0, 1, (uchar *) & spd, sizeof
(spd));
+ CONFIG_SYS_READ_SPD(SPD_EEPROM_ADDRESS, SPD_EEPROM_OFFSET,
+ SPD_EEPROM_ADDR_LEN, (uchar *) &spd, sizeof(spd));
#ifdef SPD_DEBUG
spd_debug(&spd);
#endif
@@ -562,6 +569,9 @@ long int spd_sdram()
* Empirically, 0x3 == 6/8 clock delay is suggested for DDR I 266.
*/
wr_data_delay = 2;
+#ifdef CONFIG_SYS_DDR_WRITE_DATA_DELAY
+ wr_data_delay = CONFIG_SYS_DDR_WRITE_DATA_DELAY;
+#endif
/*
* Write Latency
@@ -601,6 +611,9 @@ long int spd_sdram()
*/
cpo = 0;
if (spd.mem_type == SPD_MEMTYPE_DDR2) {
+#ifdef CONFIG_SYS_DDR_CPO
+ cpo = CONFIG_SYS_DDR_CPO;
+#else
if (effective_data_rate == 266) {
cpo = 0x4; /* READ_LAT + 1/2 */
} else if (effective_data_rate == 333) {
@@ -611,6 +624,7 @@ long int spd_sdram()
/* Automatic calibration */
cpo = 0x1f;
}
+#endif
}
ddr->timing_cfg_2 = (0
@@ -679,6 +693,9 @@ long int spd_sdram()
ddr->sdram_mode =
(0
| (1 << (16 + 10)) /* DQS Differential
disable */
+#ifdef CONFIG_SYS_DDR_MODE_WEAK
+| (1 << (16 + 1)) /* weak driver (~60%) */
+#endif
| (add_lat << (16 + 3))/* Additive Latency in
EMRS1 */
| (mode_odt_enable << 16) /* ODT Enable in EMRS1
*/
| ((twr_clk - 1) << 9) /* Write Recovery
Autopre */
--
1.7.0.4
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[U-Boot] [PATCH] MPC83xx: add define for global half-strength enable (HSE)
Signed-off-by: Andre Schwarz --- include/mpc83xx.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/mpc83xx.h b/include/mpc83xx.h index ea137c7..8292018 100644 --- a/include/mpc83xx.h +++ b/include/mpc83xx.h @@ -1000,6 +1000,7 @@ #define SDRAM_CFG_8_BE 0x0004 #define SDRAM_CFG_NCAP 0x0002 #define SDRAM_CFG_2T_EN0x8000 +#define SDRAM_CFG_HSE 0x0008 #define SDRAM_CFG_BI 0x0001 /* DDR_SDRAM_MODE - DDR SDRAM Mode Register -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] MPC837x: set i2c1_clk Running on mpc837x without CONFIG_FSL_ESDHC leads to i2c1_clk not being set at all. It is bound to clock of encryption module. fix this.
Signed-off-by: Andre Schwarz --- arch/powerpc/cpu/mpc83xx/speed.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c index 5e616dd..1eca1a8 100644 --- a/arch/powerpc/cpu/mpc83xx/speed.c +++ b/arch/powerpc/cpu/mpc83xx/speed.c @@ -327,6 +327,8 @@ int get_clocks(void) i2c1_clk = enc_clk; #elif defined(CONFIG_FSL_ESDHC) i2c1_clk = sdhc_clk; +#elif defined(CONFIG_MPC837x) + i2c1_clk = enc_clk; #endif #if !defined(CONFIG_MPC832x) i2c2_clk = csb_clk; /* i2c-2 clk is equal to csb clk */ -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] MatrixVision common code: use getenv_f instead of snprintf.
Signed-off-by: Andre Schwarz
---
board/matrix_vision/common/mv_common.c | 25 +
1 files changed, 13 insertions(+), 12 deletions(-)
diff --git a/board/matrix_vision/common/mv_common.c
b/board/matrix_vision/common/mv_common.c
index 0afc535..742a90a 100644
--- a/board/matrix_vision/common/mv_common.c
+++ b/board/matrix_vision/common/mv_common.c
@@ -32,7 +32,7 @@ DECLARE_GLOBAL_DATA_PTR;
static char* entries_to_keep[] = {
"serial#", "ethaddr", "eth1addr", "model_info", "sensor_cnt",
"fpgadatasize", "ddr_size", "use_dhcp", "use_static_ipaddr",
- "static_ipaddr", "static_netmask", "static_gateway",
+ "static_ipaddr", "static_netmask", "static_gateway", "boot_sqfs",
"syslog", "watchdog", "netboot", "evo8serialnumber" };
#define MV_MAX_ENV_ENTRY_LENGTH64
@@ -41,28 +41,27 @@ static char* entries_to_keep[] = {
void mv_reset_environment(void)
{
int i;
- char *s[MV_KEEP_ENTRIES];
char entries[MV_KEEP_ENTRIES][MV_MAX_ENV_ENTRY_LENGTH];
printf("\n*** RESET ENVIRONMENT ***\n");
memset(entries, 0, MV_KEEP_ENTRIES * MV_MAX_ENV_ENTRY_LENGTH);
+
for (i = 0; i < MV_KEEP_ENTRIES; i++) {
- s[i] = getenv(entries_to_keep[i]);
- if (s[i]) {
- printf("save '%s' : %s\n", entries_to_keep[i], s[i]);
- strncpy(entries[i], s[i], MV_MAX_ENV_ENTRY_LENGTH);
- }
+ if (getenv_f(entries_to_keep[i], entries[i],
+ MV_MAX_ENV_ENTRY_LENGTH) <= 0)
+ memset(entries[i], 0, MV_MAX_ENV_ENTRY_LENGTH);
+ else
+ printf("save '%s' : %s\n", entries_to_keep[i],
+ entries[i]);
}
gd->env_valid = 0;
env_relocate();
for (i = 0; i < MV_KEEP_ENTRIES; i++) {
- if (s[i]) {
- printf("restore '%s' : %s\n", entries_to_keep[i], s[i]);
- setenv(entries_to_keep[i], s[i]);
- }
+ printf("restore '%s' : %s\n", entries_to_keep[i], entries[i]);
+ setenv(entries_to_keep[i], entries[i]);
}
saveenv();
@@ -70,7 +69,8 @@ void mv_reset_environment(void)
int mv_load_fpga(void)
{
- int result;
+ int result = -1;
+#ifdef CONFIG_FPGA
size_t data_size = 0;
void *fpga_data = NULL;
char *datastr = getenv("fpgadata");
@@ -92,6 +92,7 @@ int mv_load_fpga(void)
}
result = fpga_load(0, fpga_data, data_size);
+#endif
if (!result)
show_boot_progress(0);
--
1.7.0.4
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Re: [U-Boot] [PATCH] avr32: add ATAG_BOARDINFO
Dear Wolfgang Denk: > Dear "=?ISO-8859-1?Q?Andreas_Bie=DFmann?=", > > In message <4da6b173.2010...@gmail.com> you wrote: >> >>> From my point of view, I would like to reject this patch. If you >>> however manage to get this accepted for mainline Linux, then maybe I >>> reconsider. >> >> The patch was accepted in kernel mainline (see >> http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=24a1a47562b0fbb97321191dcc3a67b337b20f8f >> ) > > Ouch... uchh! > >> Please consider accepting this patch in u-boot. > > Guess I have no other choice now, but you owe me a new keyboard. I'm busy right now, but I will take this (and other stuff) in during the upcoming weekend. Best Regards, Reinhard ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [arm] a320evb related fix
Hi Albert, >> http://patchwork.ozlabs.org/patch/87733/ >> http://patchwork.ozlabs.org/patch/87749/ >> http://patchwork.ozlabs.org/patch/87750/ > > Done for these. > >> 2011-03-22 >> [PATCH v2] ftsdmc020: move ftsdmc020.h to include/faraday >> http://patchwork.ozlabs.org/patch/87861/ >> >> 2011-03-22 >> [PATCH v2] ftsmc020: move ftsmc020 static mem controller to driver/mtd >> http://patchwork.ozlabs.org/patch/87862/ > > These are 3rd and 4th of a 4-patch set. What about the other two, 87860 and > 87859? > Thank you very much. The 1st and the 2nd patch of this 4-patch set are less related to a320evb board. These 2 patch are meant to add function is used in other SoC. Although a320 SoC has one of the same hardware and another one is the same controller family related to these 2 patches, it doen't affect the current function of a320evb's u-boot. So I think 87860 and 87859 could be reviewed later. If you can help on those 2 patches is also a great help. -- Best regards, Macpaul Lin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V1 1/1] MX5: Keep L2 cache enabled before jump to kernel
Hi Jason, Le 13/04/2011 15:25, Jason Liu a écrit : > Currently, Linux kernel does not do any L2 cache enable > Operation.So,Keep L2 cache enabled(L2EN=1) in the u-boot > before Jump to the Linux Kernel and thus L2 cache can be > effectively used in Linux Kernel. Do you mean that the Linux Kernel has L2 cache support except for enabling it? It would seem to me the most logical thing would be to enable the cache in Linux then, rather than expecting the bootloader to do it. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [arm] a320evb related fix
Hi MacPaul Lin, Le 13/04/2011 07:14, Macpaul Lin a écrit : > Hi Albert, > > Since there are 3 days to merge windows is closed (4/16) and you've > just changed a new e-mail address. > I've summarized the following patches which has been send before. > Just want to remind you that please give a help to review and check > if the patch is applicable to a320evb board and to arm's source tree. > > Thanks a lot. > > 2011-03-21 > [PATCH v2] ftpmu010: fix relocation and enhance features > http://patchwork.ozlabs.org/patch/87733/ > > 2011-03-21 > [PATCH v2] fttmr010: move fttmr010 header to include/faraday > http://patchwork.ozlabs.org/patch/87749/ > > 2011-03-21 > [PATCH v2] a320evb: fix include path of timer fttmr010 > http://patchwork.ozlabs.org/patch/87750/ Done for these. > 2011-03-22 > [PATCH v2] ftsdmc020: move ftsdmc020.h to include/faraday > http://patchwork.ozlabs.org/patch/87861/ > > 2011-03-22 > [PATCH v2] ftsmc020: move ftsmc020 static mem controller to driver/mtd > http://patchwork.ozlabs.org/patch/87862/ These are 3rd and 4th of a 4-patch set. What about the other two, 87860 and 87859? Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] avr32: add ATAG_BOARDINFO
Dear "=?ISO-8859-1?Q?Andreas_Bie=DFmann?=", In message <4da6b173.2010...@gmail.com> you wrote: > > > From my point of view, I would like to reject this patch. If you > > however manage to get this accepted for mainline Linux, then maybe I > > reconsider. > > The patch was accepted in kernel mainline (see > http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=24a1a47562b0fbb97321191dcc3a67b337b20f8f > ) Ouch... uchh! > Please consider accepting this patch in u-boot. Guess I have no other choice now, but you owe me a new keyboard. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de There are always alternatives. -- Spock, "The Galileo Seven", stardate 2822.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/2] a320evb: fix include path of timer fttmr010
Le 21/03/2011 12:45, Macpaul Lin a écrit : > Fix include path of timer fttmr010 in a320evb. > > Signed-off-by: Macpaul Lin > --- Applied to u-boot-arm/master, thanks. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] fttmr010: move fttmr010 header to include/faraday
Le 21/03/2011 12:45, Macpaul Lin a écrit : > Move the header file and definitions of fttmr010 > power control unit from a320 SoC folder to > "include/faraday" folder. > > This change will let other SoC which also use fttmr010 > could share the same header file. > > Signed-off-by: Macpaul Lin > --- Applied to u-boot-arm/master, thanks. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/2] ftpmu010.h: add asm support used by lowlevel_init
Le 21/03/2011 11:01, Macpaul Lin a écrit : > Add asm support which is ususally used in lowlevel_init to set > power related parameters to sdram controller and static memory controller. > > Signed-off-by: Macpaul Lin > --- As it depends on commits already in u-boot-arm/master: Applied to u-boot-arm/master, thanks. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] ftpmu010: fix relocation and enhance features
Hi Macpaul Lin, Le 21/03/2011 11:00, Macpaul Lin a écrit : > 1. ftpmu010.h: fix and add definitions > Enhanced for more features and asm related support > according to datasheet. > > Note: > - FTPMU010_PDLLCR0_HCLKOUTDIS is "incorrect" in datasheet. > - FTPMU010_PDLLCR0_DLLFRANG is only 1 bit at bit #19. (not 20-19) > - FTPMU010_PDLLCR0_HCLKOUTDIS is 4 bits at bit #20. (not 24-21) > > 2. ftpmu010.c: enhance features and fix relocation > - The following functions is added for pmu features. > ftpmu010_mfpsr_select_dev() > ftpmu010_sdramhtc_set() > - This patch also fix the declare statement for relocation. > > Signed-off-by: Macpaul Lin > --- As it depends on commits already in u-boot-arm/master: Applied to u-boot-arm/master, thanks. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5] ARM: mx31: Print the silicon version
Le 12/04/2011 04:18, Fabio Estevam a écrit : > Use the same method of the Linux kernel to print the MX31 silicon version on > boot. > > Tested on a MX31PDK with a 2.0 silicon, where it shows: > > CPU: Freescale i.MX31 rev 2.0 at 531 MHz > > Signed-off-by: Fabio Estevam > > --- > Changes since v4: > - Get rid of imx_soc_revision.h and its macro > Changes since v3: > - Keep consistency with other i.MX processors and print the silicon version > in the same line as the CPU name > - Remove unneeded blank line in imx_soc_revision.h > Changes since v2: > - Use macro instead of defines for IMX_CHIP_REVISION > Changes since v1: > - rename the CPU detect function name to get_cpu_rev > - Use struct to access iim register > arch/arm/cpu/arm1136/mx31/generic.c | 30 > +++- > arch/arm/include/asm/arch-mx31/imx-regs.h | 25 > 2 files changed, 53 insertions(+), 2 deletions(-) Seems this is ok. Stefano, will you take this patch in and send a pull request, or do you want me to pick it? Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] Act as a TFTP server
Luca Ceresoli wrote: > - net/tftp.c: extend the TFTP state machine (TftpHandler() and TftpStart()) > a new STATE_WAITING state (it should be enough); > - the state machine would be different in the session setup: in > STATE_WAITING handle WRQ packets and select a new UDP port; > - after the setup phase, the state machine would converge on the > currently-implemented STATE_DATA for normal DATA/ACK management. Right now the TFTP server is working here, but before submitting patches I have a question about the TftpHandler() callback function. TftpHandler() is of type: include/net.h:80: typedef void rxhand_f(uchar *, unsigned, unsigned, unsigned); The 4 parameters are: packet pointer, UDP source port, UDP destination port and packet length. Upon reception of a Write Request packet, the TFTP server needs to know the remote (client) IP address, or it won't be able to send any packet back. This is different from currently implemented network file transfer modes, which are always initiated by U-Boot in client mode, and thus the remote (server) IP address is known a priori. I plan to add a new parameter to the rxhand_t, and change accordingly all handlers to have the new (unused) parameter: - typedef void rxhand_f(uchar *, unsigned, unsigned, unsigned); + typedef void rxhand_f(uchar *pkt, unsigned dest_port, IPaddr_t src_ip, unsigned src_port, unsigned len); Is this ok, or do you foresee any issues with the function footprint or anything else? Thanks, Luca ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] S5PC1XX: Refers to SROM config code in s5p-common directory. Header file renamed from smc.h to sromc.h.
Signed-off-by: Chander Kashyap
---
arch/arm/cpu/armv7/s5pc1xx/Makefile |1 -
arch/arm/cpu/armv7/s5pc1xx/sromc.c| 49 --
arch/arm/include/asm/arch-s5pc1xx/smc.h | 53 -
arch/arm/include/asm/arch-s5pc1xx/sromc.h | 53 +
board/samsung/smdkc100/smdkc100.c |4 +-
5 files changed, 55 insertions(+), 105 deletions(-)
delete mode 100644 arch/arm/cpu/armv7/s5pc1xx/sromc.c
delete mode 100644 arch/arm/include/asm/arch-s5pc1xx/smc.h
create mode 100644 arch/arm/include/asm/arch-s5pc1xx/sromc.h
diff --git a/arch/arm/cpu/armv7/s5pc1xx/Makefile
b/arch/arm/cpu/armv7/s5pc1xx/Makefile
index b182bf5..d66314e 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/Makefile
+++ b/arch/arm/cpu/armv7/s5pc1xx/Makefile
@@ -32,7 +32,6 @@ SOBJS = cache.o
SOBJS += reset.o
COBJS += clock.o
-COBJS += sromc.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/s5pc1xx/sromc.c
b/arch/arm/cpu/armv7/s5pc1xx/sromc.c
deleted file mode 100644
index 044d122..000
--- a/arch/arm/cpu/armv7/s5pc1xx/sromc.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (C) 2010 Samsung Electronics
- * Naveen Krishna Ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include
-#include
-#include
-
-/*
- * s5pc1xx_config_sromc() - select the proper SROMC Bank and configure the
- * band width control and bank control registers
- * srom_bank - SROM Bank 0 to 5
- * smc_bw_conf - SMC Band witdh reg configuration value
- * smc_bc_conf - SMC Bank Control reg configuration value
- */
-void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf)
-{
- u32 tmp;
- struct s5pc1xx_smc *srom =
- (struct s5pc1xx_smc *)samsung_get_base_sromc();
-
- /* Configure SMC_BW register to handle proper SROMC bank */
- tmp = srom->bw;
- tmp &= ~(0xF << (srom_bank * 4));
- tmp |= smc_bw_conf;
- srom->bw = tmp;
-
- /* Configure SMC_BC register */
- srom->bc[srom_bank] = smc_bc_conf;
-}
diff --git a/arch/arm/include/asm/arch-s5pc1xx/smc.h
b/arch/arm/include/asm/arch-s5pc1xx/smc.h
deleted file mode 100644
index 88f4ffe..000
--- a/arch/arm/include/asm/arch-s5pc1xx/smc.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * (C) Copyright 2010 Samsung Electronics
- * Naveen Krishna Ch
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Note: This file contains the register description for Memory subsystem
- * (SROM, NAND Flash, OneNand, DDR, OneDRAM) on S5PC1XX.
- *
- * Only SROMC is defined as of now
- */
-
-#ifndef __ASM_ARCH_SMC_H_
-#define __ASM_ARCH_SMC_H_
-
-#define SMC_DATA16_WIDTH(x)(1<<((x*4)+0))
-#define SMC_BYTE_ADDR_MODE(x) (1<<((x*4)+1)) /* 0-> Half-word base address*/
- /* 1-> Byte base address*/
-#define SMC_WAIT_ENABLE(x) (1<<((x*4)+2))
-#define SMC_BYTE_ENABLE(x) (1<<((x*4)+3))
-
-#define SMC_BC_TACS(x) (x << 28) /* 0clk address set-up */
-#define SMC_BC_TCOS(x) (x << 24) /* 4clk chip selection set-up */
-#define SMC_BC_TACC(x) (x << 16) /* 14clkaccess cycle */
-#define SMC_BC_TCOH(x) (x << 12) /* 1clk chip selection hold */
-#define SMC_BC_TAH(x) (x << 8) /* 4clk address holding time */
-#define SMC_BC_TACP(x) (x << 4) /* 6clk page mode access cycle */
-#define SMC_BC_PMC(x) (x << 0) /* normal(1data)page mode configuration */
-
-#ifndef __ASSEMBLY__
-struct s5pc1xx_smc
[U-Boot] [PATCH 1/2] S5P: SROM config code moved to common directory s5p-common
SROM configuration is same for various S5P series Boards.
Signed-off-by: Chander Kashyap
---
arch/arm/cpu/armv7/s5p-common/Makefile |3 +-
arch/arm/cpu/armv7/s5p-common/sromc.c | 49
2 files changed, 51 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/armv7/s5p-common/sromc.c
diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile
b/arch/arm/cpu/armv7/s5p-common/Makefile
index ce0a41e..1705399 100644
--- a/arch/arm/cpu/armv7/s5p-common/Makefile
+++ b/arch/arm/cpu/armv7/s5p-common/Makefile
@@ -27,7 +27,8 @@ LIB = $(obj)libs5p-common.o
COBJS-y+= cpu_info.o
COBJS-y+= timer.o
-COBJS-$(CONFIG_PWM)+= pwm.o
+COBJS-y+= sromc.o
+COBJS-$(CONFIG_PWM)+= pwm.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/s5p-common/sromc.c
b/arch/arm/cpu/armv7/s5p-common/sromc.c
new file mode 100644
index 000..091e8d1
--- /dev/null
+++ b/arch/arm/cpu/armv7/s5p-common/sromc.c
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2010 Samsung Electronics
+ * Naveen Krishna Ch
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+
+/*
+ * s5p_config_sromc() - select the proper SROMC Bank and configure the
+ * band width control and bank control registers
+ * srom_bank - SROM
+ * srom_bw_conf - SMC Band witdh reg configuration value
+ * srom_bc_conf - SMC Bank Control reg configuration value
+ */
+void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf)
+{
+ u32 tmp;
+ struct s5p_sromc *srom =
+ (struct s5p_sromc *)samsung_get_base_sromc();
+
+ /* Configure SMC_BW register to handle proper SROMC bank */
+ tmp = srom->bw;
+ tmp &= ~(0xF << (srom_bank * 4));
+ tmp |= srom_bw_conf;
+ srom->bw = tmp;
+
+ /* Configure SMC_BC register */
+ srom->bc[srom_bank] = srom_bc_conf;
+}
--
1.7.1
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[U-Boot] [PATCH 0/2] SROM config code moved to s5p-common directory
SROM config code is make common for S5P series boards. smdkc100.c refers to s5p_config_srom in s5p-common directory. Chander Kashyap (2): S5P: SROM config code moved to common directory s5p-common S5PC1XX: Refers to SROM config code in s5p-common directory. Header file renamed from smc.h to sromc.h. arch/arm/cpu/armv7/s5p-common/Makefile|3 +- arch/arm/cpu/armv7/s5p-common/sromc.c | 49 ++ arch/arm/cpu/armv7/s5pc1xx/Makefile |1 - arch/arm/cpu/armv7/s5pc1xx/sromc.c| 49 -- arch/arm/include/asm/arch-s5pc1xx/smc.h | 53 - arch/arm/include/asm/arch-s5pc1xx/sromc.h | 53 + board/samsung/smdkc100/smdkc100.c |4 +- 7 files changed, 106 insertions(+), 106 deletions(-) create mode 100644 arch/arm/cpu/armv7/s5p-common/sromc.c delete mode 100644 arch/arm/cpu/armv7/s5pc1xx/sromc.c delete mode 100644 arch/arm/include/asm/arch-s5pc1xx/smc.h create mode 100644 arch/arm/include/asm/arch-s5pc1xx/sromc.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] S5PC2XX: GPIO Macro Values Corrected.
Macro values for Pull Up and Driver Strength were wrong. Signed-off-by: Chander Kashyap --- arch/arm/include/asm/arch-s5pc2xx/gpio.h |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/arch-s5pc2xx/gpio.h b/arch/arm/include/asm/arch-s5pc2xx/gpio.h index 05e5b3e..7bfa8e8 100644 --- a/arch/arm/include/asm/arch-s5pc2xx/gpio.h +++ b/arch/arm/include/asm/arch-s5pc2xx/gpio.h @@ -99,12 +99,12 @@ void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); /* Pull mode */ #define GPIO_PULL_NONE 0x0 #define GPIO_PULL_DOWN 0x1 -#define GPIO_PULL_UP 0x2 +#define GPIO_PULL_UP 0x3 /* Drive Strength level */ #define GPIO_DRV_1X0x0 -#define GPIO_DRV_2X0x1 -#define GPIO_DRV_3X0x2 +#define GPIO_DRV_2X0x2 +#define GPIO_DRV_3X0x1 #define GPIO_DRV_4X0x3 #define GPIO_DRV_FAST 0x0 #define GPIO_DRV_SLOW 0x1 -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] Centralise documentation of CONFIG_ options (and finding unused ones)
>> From this it is easy to find unused options (CONFIG_ARIA is found only as a > #define in include/configs/aria.h for example) > > So my RFC is twofold: > 1) Should we start to systematically remove unused options > 2) Should we centralise all options in a single README (or two, one for > standard CONFIG options and one for CONFIG_SYS options)? Can you post data for which options are not used. While I think automatic removal is harsh, I think something close to automatic is reasonable. - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] Centralise documentation of CONFIG_ options (and finding unused ones)
On 14/04/11 16:17, Albert ARIBAUD wrote: > Hi Graeme, > > Le 11/04/2011 15:11, Graeme Russ a écrit : > >> So my RFC is twofold: >> 1) Should we start to systematically remove unused options > > I would tend to answer 'yes'. Unused options should not clobber code or > documentation. > >> 2) Should we centralise all options in a single README (or two, one for >> standard CONFIG options and one for CONFIG_SYS options)? > > That would be nice indeed, but it requires all options to have the same > semantics over all arches. While this is highly desirable, it may not be > true ATM -- just thinking out loud, haven't checked. But even if some > options only make sense only for some arch(es), then we could always do > it this way: > > doc/README.CONFIG_options > doc/README.CONFIG_SYS_options > doc/arch/README.CONFIG_options Hmm, I have a better idea after I can to the realisation that the central location for configuration options is Ctrl^F in the doc/ directory :) doc/README.CONFIG_options.unused doc/README.CONFIG_options.undocumented I will tweak my scripts to produce these two files and see what the result is. Regards, Graeme ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] avr32: add ATAG_BOARDINFO
Dear Wolfgang Denk, Am 13.04.2011 13:44, schrieb Wolfgang Denk: > Dear =?UTF-8?q?Andreas=20Bie=C3=9Fmann?=, > From my point of view, I would like to reject this patch. If you > however manage to get this accepted for mainline Linux, then maybe I > reconsider. The patch was accepted in kernel mainline (see http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=24a1a47562b0fbb97321191dcc3a67b337b20f8f ) Please consider accepting this patch in u-boot. regards Andreas Bießmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] MX5:MX53: support for freescale MX53LOCO board
Hi, Stefano, 2011/4/14 Jason Liu : > 2011/4/14 Wolfgang Denk : >> Dear Jason Liu, >> >> In message you wrote: > [...] >>> BTW, this patch set has been send out 2 months ago and Stefano has >>> send out pull request >>> to Albert and Albert has pulled in already, do you agree I send out >>> another patch to address >>> your comments? Thanks for your consideration. >> >> No, this patch has serious bugs (memory size calculation) and other >> issues (needs cleanup) and is thus rejected. > > OK, I will send out v3 patch to address it. Thanks, Please drop the mx53loco board support patch from u-boot-imx master branch and I will resubmit the following patches soon since the merge window will be closed soon. (1) clean-up patch:factor out the boot reason code to common code for all the mx5 (2) fix-up: address Wolfgang's last minute comments and resubmit the patch. Stefano, do you have some comments about what else I should do? Sorry for bring your trouble and thanks for consideration. BR, Jason >> >> Best regards, >> >> Wolfgang Denk >> >> -- >> DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel >> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany >> Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de >> "Anyone attempting to generate random numbers by deterministic means >> is, of course, living in a state of sin." - John Von Neumann >> > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] MX5:MX53: support for freescale MX53LOCO board
2011/4/14 Wolfgang Denk : > Dear Jason Liu, > > In message you wrote: [...] >> BTW, this patch set has been send out 2 months ago and Stefano has >> send out pull request >> to Albert and Albert has pulled in already, do you agree I send out >> another patch to address >> your comments? Thanks for your consideration. > > No, this patch has serious bugs (memory size calculation) and other > issues (needs cleanup) and is thus rejected. OK, I will send out v3 patch to address it. Thanks, Jason > > Best regards, > > Wolfgang Denk > > -- > DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de > "Anyone attempting to generate random numbers by deterministic means > is, of course, living in a state of sin." - John Von Neumann > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC 2/3][v4] mmc: SEND_OP_COND considers card capabilities (voltage)
Hi Andy,
On Wed, Apr 13, 2011 at 1:24 PM, Andy Fleming wrote:
> On Fri, Mar 11, 2011 at 6:01 AM, Raffaele Recalcati
> wrote:
>> From: Raffaele Recalcati
>>
>> The first SEND_OP_COND (CMD1) command added is used to ask card capabilities.
>> After it an AND operation is done between card capabilities and host
>> capabilities (at the moment only for the voltage field).
>> Finally the correct value is sent to the MMC, waiting that the card
>> exits from busy state.
>>
>> Signed-off-by: Raffaele Recalcati
>> ---
>> drivers/mmc/mmc.c | 19 +--
>> include/mmc.h | 2 ++
>> 2 files changed, 19 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
>> index fc1792a..5bea476 100644
>> --- a/drivers/mmc/mmc.c
>> +++ b/drivers/mmc/mmc.c
>> @@ -351,17 +351,32 @@ sd_send_op_cond(struct mmc *mmc)
>>
>> int mmc_send_op_cond(struct mmc *mmc)
>> {
>> - int timeout = 1000;
>> + int timeout = 1;
>> struct mmc_cmd cmd;
>> int err;
>>
>> /* Some cards seem to need this */
>> mmc_go_idle(mmc);
>>
>> + /* Asking to the card its capabilities */
>> + cmd.cmdidx = MMC_CMD_SEND_OP_COND;
>> + cmd.resp_type = MMC_RSP_R3;
>> + cmd.cmdarg = 0;
>> + cmd.flags = 0;
>> +
>> + err = mmc_send_cmd(mmc, &cmd, NULL);
>> +
>> + if (err)
>> + return err;
>> +
>> + udelay(1000);
>> +
>> do {
>> cmd.cmdidx = MMC_CMD_SEND_OP_COND;
>> cmd.resp_type = MMC_RSP_R3;
>> - cmd.cmdarg = OCR_HCS | mmc->voltages;
>> + cmd.cmdarg = ((mmc->voltages &
>> + (cmd.response[0] & OCR_VOLTAGE_MASK)) |
>> + (cmd.response[0] & OCR_ACCESS_MODE));
>
>
> My concern here is that OCR_HCS has been dropped. I thought it was
> necessary to query the HCS abilities.
>
> I'm guessing I'm missing something, or that it's not needed, so I will
> apply this patch, and we'll see if anyone has issues.
>
> Andy
>
Thx,
Raffaele
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